Dale Paulin

"Scotty we need more power!" For those of use old enough to remember Star Trek TOS (and if you don't know what that is I'll wait for you to visit the wikipedias...) this phrase is burned indelibly into our brains. Invariably some nefarious force was holding the Enterprise against its will, or the ship was trying to outrun a baddie, or an incoming energy bolt threatened the integrity of the hull, and always the solution was "more power". The world we live in today is quite different. Not to say that the need for compute power has reduced, in fact quite the opposite given the enormous computational requirements of modern AI and HPC workloads. But that "power" must now be weighed against the power (energy) required to use it. In AI it's no longer about TOPS, it's about TOPS/W. And a laptop that dramatically outperformed its competitors but had only a 30 minute battery life would be considered fairly useless. So when the power (energy) requirements of datacenters start to be measured as a percentage of global energy consumption it's easy to see why managing and reducing power (energy) is a critical part of modern designs. Enter the Movellus Aeonic Power product family. By integrating the power supply for components of an SoC the power (energy) can be made more localized, smarter, more efficient, and the overall demand for energy can be reduced significantly. So rather than running all of your compute cores or AI acceleration clusters full tilt when only a few are needed, you can now modulate power at the core or block or cluster level to reduce the energy to precisely what is needed and no more, and this fine grained power control can yield immediate benefits. Advanced power savings like this were once attainable only by the largest and most advanced teams on the planet, but the field has been leveled. If you want to know more just send me a note, or come visit us at DAC 2024. Or just keep burning more energy than you have to, reducing your competitiveness and decreasing reliability, that's an option too... #AI #PowerDelivery #DAC2024

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The Micron 6550 ION has just taken the lead in density, performance, AND efficiency for 60TB SSDs, addressing key challenges for AI-driven data centers. This groundbreaking innovation offers unparalleled high-density performance with up to 12.0 GB/s sequential reads and 5.0 GB/s sequential writes, all while consuming up to 20% less power compared to competition. It's been a pleasure collaborating with leaders across Micron and the industry to bring this revolutionary product to the world. The 6550 ION is set to transform AI workloads, high-performance computing, big data, and analytics environments. Learn more about this game-changing SSD at the link below! hashtag#Innovation hashtag#DataCenter hashtag#SSD hashtag#Micron hashtag#TechNews

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Designers are already using ReRAM today in various applications, as the best choice of NVM. Read more to see who is using it and why.

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"Designing a thermistor-based temperature measurement system is a challenging, multi-step process..." Thermistor-based Temperature Sensing System: System Optimization and Evaluation. Read this Analog Devices article in the Mouser Electronics Electronics Information Update ebook | May 2024 edition. 👀 https://lnkd.in/egirdVky #temperature #sensing #evaluation #optimization #technology #engineering #innovation

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Cadence introduces the Janus NoC for SoC designs.

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To our knowledge, no North American River Otters currently subscribe to the TechInsights Semiconductor Information Platform. Coincidence? Surely not! Be more informed than your local semi-aquatic critter by checking out the go-to answer to your semiconductor information and analysis needs. Take a look at this article on how #AdvancedPackaging will help semiconductors continue to drive industries forward: https://bit.ly/4c2Nwk8

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Uncover the power-efficient MPU featuring advanced graphics and audio capabilities, along with EdgeLock® Secure Enclave, SESIP, and PSA Level 2 certifications in this special whitepaper from #NXP!

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This is a webinar worth tuning into if you have an interest in industrial automation.

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Learn how the Cadence DDR controller IP is a key element in a new AI vision processor. https://ow.ly/UzsQ50RpGEf

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https://lnkd.in/gGR5Q6dW DRAM industry Q2 sales surged 24.8% to $22.9 billion! According to TrendForce, DRAM industry revenue increased significantly to US$22.9 billion in the second quarter of 2024, a month-on-month increase of 24.8%. This surge was mainly due to the expansion of mainstream product shipments, which drove revenue growth for most manufacturers. Contract prices in the second quarter continued to rise, and due to geopolitical factors, the increase in traditional DRAM contract prices in the third quarter is expected to exceed previous forecasts. Major manufacturers Samsung, SK Hynix and Micron all saw an increase in shipments in the second quarter compared to the previous quarter. Average selling prices also continued the upward trend in the first quarter. Driving factors included the earthquake in Taiwan in early April and high demand for high-bandwidth memory (HBM) products, which prompted DRAM buyers to adopt a more aggressive purchasing strategy. As a result, contract prices in the second quarter ultimately increased by 13% to 18%. #realized #China #Oem , #ODM , #OBM #TechbicalSales #IPSales #OwnalltheChipsknowledge #Builddeeplytruthasmyrespondsibility #Microchip #SSD #HDD #DRAM #DDR #Serverparts #HPC #Servercpu #Truth #OneStopShopping #OEM. #OWNTear1Chipsresource #Outstanding #monthlyorder #europe #buy #globalbusiness #headhunter #usa #automotive #automotiveindustry #leadership #motivation ]#personaldevelopment #employment #happiness #jobs #health #global #world #jobchange #process #plasma #Knlowledgestudy #buyer #globalbusiness #ssd #dram #ddr

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PI Expert, our robust online design tool, features schematic and netlist export function made possible by SnapMagic. You can automatically export any power supply design you create in PI Expert to your preferred CAD tool within seconds, saving hours, even days, of development time. Watch this video to learn more -

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Everspin Technologies continues to lead the industry in the adoption of MRAM. Industrial and commercial space markets have embraced the technology.

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Gain exclusive insights into the #semiconductor industry's latest trends, including how #AI is shaping demand and inventory management. Dive into Fusion's report, "From the Source's Mouth," for a comprehensive view of upcoming demand, capacity, and #supply trends from industry insiders. Stay ahead of the curve – explore key insights now>>> https://lnkd.in/eRev4eAC

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Design-optimized, cost-competitive, "flat" single board designs make sense to consider as you scale above a few thousand boards. Watch this informative video of the approach we take at Ezurio!

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Happy #CostModelMonday! I did a #fan-out panel-level versus wafer-level comparison at #IMAPS DPC this year, and I'm expanding on it for the IMAPS Symposium. I had a single #yield chart in my analysis previously, looking at yield crossover points in relation to how expensive the incoming chip was. I did a new analysis that looks at when the crossover point occurs for two different panel sizes. In this chart, the same package is built with fan-out packaging on a 300mm wafer and from two different panel sizes. The yield for the 300mm wafer example is held steady at 99%, while the yield is changed for the panel-level processes. For the package built with the 515x510mm panel, the crossover point occurs just past 95%. However, the crossover point is closer to 94% for the package from the 600x600mm panel. In other words, a little more yield loss can be sustained by the package from the larger panel before it no longer competes with a higher yielding package from the wafer.

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Success Story – MEMS Microfluidics Wafer Probe System Applicationhttps://hubs.ly/Q02BkK0J0

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We're expanding our edge computing portfolio with the new MCX W wireless MCU series. Dive into this article to learn how these advanced chips are powering smart industrial and IoT devices. #NXP #Semiconductors #IoT

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Yesterday hundreds of industry professionals and partners joined us on our campus for the Global Semiconductor Alliance Technology Summit. At Samsung Semiconductor, we know that collaboration drives innovation and advancement of the semiconductor industry, and events like these are a great way to spark new ideas and connections. I was invited to open the event by discussing trends and the hurdles we’re facing as an industry including power consumption, supply chain complexities, and the memory wall challenge. With projections indicating that Data Center & AI consumption may double in the coming years, there is an increasing dialogue in the news and on social media every day around creative solutions to address the insatiable need for power – even including geothermal energy from volcanoes. It is indeed an exciting, unprecedented time to be in the Memory business! #GSATechSummit #Innovation #SamsungMemory #AI

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