TL-UL Checklist

This checklist is for Hardware Stage transitions for the TL-UL component. All checklist items refer to the content in the Checklist.

Design Checklist

Type	Item	Resolution	Note/Collaterals
Documentation	SPEC_COMPLETE	Done	TL-UL Spec crossbar_tool
Documentation	CSR_DEFINED	N/A
RTL	CLKRST_CONNECTED	Done
RTL	IP_TOP	Done
RTL	IP_INSTANTIABLE	Done
RTL	PHYSICAL_MACROS_DEFINED_80	N/A
RTL	FUNC_IMPLEMENTED	Done
RTL	ASSERT_KNOWN_ADDED	Done
Code Quality	LINT_SETUP	Done

Type	Item	Resolution	Note/Collaterals
Documentation	NEW_FEATURES	N/A
Documentation	BLOCK_DIAGRAM	Done
Documentation	DOC_INTERFACE	N/A
Documentation	DOC_INTEGRATION_GUIDE	Waived	This checklist item has been added retrospectively.
Documentation	MISSING_FUNC	N/A
Documentation	FEATURE_FROZEN	Done
RTL	FEATURE_COMPLETE	Done
RTL	PORT_FROZEN	Done	Targeting for current top_earlgrey( Port can be changed later based on top_earlgrey config)
RTL	ARCHITECTURE_FROZEN	Done
RTL	REVIEW_TODO	Done	PR #837 is pending
RTL	STYLE_X	Done
RTL	CDC_SYNCMACRO	N/A
Code Quality	LINT_PASS	Done
Code Quality	CDC_SETUP	Waived	No block-level flow available - waived to top-level signoff.
Code Quality	RDC_SETUP	Waived	No block-level flow available - waived to top-level signoff.
Code Quality	AREA_CHECK	Done
Code Quality	TIMING_CHECK	Done	Pipeline inserted in front of Core IBEX. meet timing @ 50MHz on NexysVideo
Security	SEC_CM_DOCUMENTED	N/A

Type	Item	Resolution
Security	SEC_CM_ASSETS_LISTED	Not Started
Security	SEC_CM_IMPLEMENTED	Not Started
Security	SEC_CM_RND_CNST	Not Started
Security	SEC_CM_NON_RESET_FLOPS	Not Started
Security	SEC_CM_SHADOW_REGS	Not Started
Security	SEC_CM_RTL_REVIEWED	Not Started
Security	SEC_CM_COUNCIL_REVIEWED	Not Started

Type	Item	Resolution	Note/Collaterals
Documentation	NEW_FEATURES_D3	N/A
RTL	TODO_COMPLETE	Done	Resolved: #837
Code Quality	LINT_COMPLETE	Done
Code Quality	CDC_COMPLETE	N/A
Code Quality	RDC_COMPLETE	Not Started
Review	REVIEW_RTL	Done	1st @tjaychen / 2nd @martin-lueker
Review	REVIEW_DELETED_FF	N/A
Review	REVIEW_SW_CHANGE	N/A
Review	REVIEW_SW_ERRATA	Done
Review	Reviewer(s)	Done	@weicaiyang @tjaychen
Review	Signoff date	Done	2019-11-07

Type	Item	Resolution	Note/Collaterals
Documentation	DV_DOC_DRAFT_COMPLETED	Done	XBAR DV document
Documentation	TESTPLAN_COMPLETED	Done	XBAR Testplan
Testbench	TB_TOP_CREATED	Done
Testbench	PRELIMINARY_ASSERTION_CHECKS_ADDED	Done
Testbench	TB_ENV_CREATED	Done
Testbench	RAL_MODEL_GEN_AUTOMATED	N/A
Testbench	TB_GEN_AUTOMATED	Waived	Manually generated. Planned to automate later
Tests	SMOKE_TEST_PASSING	Done
Tests	CSR_MEM_TEST_SUITE_PASSING	N/A
Tool Setup	ALT_TOOL_SETUP	Done
Regression	SMOKE_REGRESSION_SETUP	Done	Exception (Runs at local)
Regression	NIGHTLY_REGRESSION_SETUP	Done	Exception (Runs at local)
Coverage	COVERAGE_MODEL_ADDED	Done
Code Quality	TB_LINT_SETUP	Done
Integration	PRE_VERIFIED_SUB_MODULES_V1	Waived	prim_arbiter to be verified later
Review	DESIGN_SPEC_REVIEWED	Done
Review	TESTPLAN_REVIEWED	Done
Review	STD_TEST_CATEGORIES_PLANNED	Done	Exception (Security, Power, Debug, Performance)
Review	V2_CHECKLIST_SCOPED	Done

Type	Item	Resolution	Note/Collaterals
Documentation	DESIGN_DELTAS_CAPTURED_V2	N/A
Documentation	DV_DOC_COMPLETED	Done
Testbench	FUNCTIONAL_COVERAGE_IMPLEMENTED	Not Started
Testbench	ALL_INTERFACES_EXERCISED	Done
Testbench	ALL_ASSERTION_CHECKS_ADDED	Done
Testbench	SIM_TB_ENV_COMPLETED	Done
Tests	SIM_ALL_TESTS_PASSING	Done
Tests	FPV_ALL_ASSERTIONS_WRITTEN	N/A
Tests	FPV_ALL_ASSUMPTIONS_REVIEWED	N/A
Tests	SIM_FW_SIMULATED	N/A
Regression	SIM_NIGHTLY_REGRESSION_V2	Done
Coverage	SIM_CODE_COVERAGE_V2	Done
Coverage	SIM_FUNCTIONAL_COVERAGE_V2	Done
Coverage	FPV_CODE_COVERAGE_V2	N/A
Coverage	FPV_COI_COVERAGE_V2	N/A
Integration	PRE_VERIFIED_SUB_MODULES_V2	Waived	prim_arbiter to be verified later
Issues	NO_HIGH_PRIORITY_ISSUES_PENDING	Done
Issues	ALL_LOW_PRIORITY_ISSUES_ROOT_CAUSED	Done
Review	DV_DOC_TESTPLAN_REVIEWED	Not Started
Review	V3_CHECKLIST_SCOPED	Done

Type	Item	Resolution
Documentation	SEC_CM_TESTPLAN_COMPLETED	Not Started
Tests	FPV_SEC_CM_VERIFIED	Not Started
Tests	SIM_SEC_CM_VERIFIED	Not Started
Coverage	SIM_COVERAGE_REVIEWED	Not Started
Review	SEC_CM_DV_REVIEWED	Not Started

Type	Item	Resolution	Note/Collaterals
Documentation	DESIGN_DELTAS_CAPTURED_V3	N/A
Tests	X_PROP_ANALYSIS_COMPLETED	Waived	tool setup in progress
Tests	FPV_ASSERTIONS_PROVEN_AT_V3	N/A
Regression	[SIM_NIGHTLY_REGRESSION_AT_100][]	Done
Coverage	SIM_CODE_COVERAGE_AT_100	Done	xbar_cov_excl.el
Coverage	SIM_FUNCTIONAL_COVERAGE_AT_100	Done
Coverage	FPV_CODE_COVERAGE_AT_100	N/A
Coverage	FPV_COI_COVERAGE_AT_100	N/A
Code Quality	ALL_TODOS_RESOLVED	Done
Code Quality	NO_TOOL_WARNINGS_THROWN	Done	Waived warning due to using ‘force’ to connect the signal
Code Quality	TB_LINT_COMPLETE	Not Started
Integration	PRE_VERIFIED_SUB_MODULES_V3	Waived	prim_arbiter to be verified later
Issues	NO_ISSUES_PENDING	Done
Review	Reviewer(s)	Done	@eunchan @sriyerg
Review	Signoff date	Done	2019-11-07