MRK IT / ECE CEC337

CEC337 - DSP ARCHITECTURE AND PROGRAMMING

UNIT IV IMPLEMENTATION OF DSP ALGORITHMS

DSP Development system, On-chip, and On-board peripherals of C54xx and C67xx DSP
development boards, Code Composer Studio (CCS) and support files, Implementation of
Conventional FIR, IIR, and Adaptive filters in TMS320C54xx/TMS320C67xx DSP
processors for real-time DSP applications, Implementation of FFT algorithm for frequency
analysis in real-time.

DSP DEVELOPMENT SYSTEM :

INTRODUCTION
Digital signal processors such as the TMS320C6x (C6x) family of processors are like fast
special-purpose microprocessors with a specialized type of architecture and an instruction set
appropriate for signal processing. The C6x notation is used to designate a member of Texas
Instruments’ (TI) TMS320C6000 family of digital signal processors.

The architecture of the C6x digital signal processor is very well suited for numerically
intensive calculations. Based on a very-long-instruction-word (VLIW) architecture, the
C6x is considered to be TI’s most powerful processor. Digital signal processors are used for
a wide range of applications, from communications and controls to speech and image
processing. The general-purpose digital signal processor is dominated by applications in
communications (cellular).

Applications embedded digital signal processors are dominated by consumer products.

They are found in cellular phones, fax/modems, disk drives, radio, printers, hearing
aids, MP3 players, high-definition television (HDTV), digital cameras, and so on. These
processors have become the products of choice for a number of consumer applications, since
they have become very cost-effective.They can handle different tasks, since they can be
reprogrammed readily for a different application. DSP techniques have been very successful
because of the development of low-cost software and hardware support. For example,
modems and speech recognition can be less expensive using DSP techniques.

DSP processors are concerned primarily with real-time signal processing. Realtime
processing requires the processing to keep pace with some external event, whereas non-real-
time processing has no such timing constraint.The external event to keep pace with is usually
the analog input.Whereas analog-based systems with discrete electronic components such as
resistors can be more sensitive to temperature changes, DSP-based systems are less affected
by environmental conditions. DSP processors enjoy the advantages of microprocessors.

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MRK IT / ECE CEC337

They are easy to use, flexible, and economical.A number of books and articles address the
importance of digital signal processors for a number of applications [1–22]. Various
technologies have been used for real-time processing, from fiberoptics for very high
frequency to DSPs very suitable for the audio-frequency range. Common applications using
these processors have been for frequencies from 0 to 96kHz. Speech can be sampled at 8
kHz (the rate at which samples are acquired), which implies that each value sampled is
acquired at a rate of 1/(8 kHz) or 0.125ms. A commonly used sample rate of a compact disk
is 44.1kHz.

Analog/digital (A/D)-based boards in the megahertz sampling rate range are currently
available. The basic system consists of an analog-to-digital converter (ADC) to capture an
input signal. The resulting digital representation of the captured signal is then processed by a
digital signal processor such as the C6x and then output through a digital-to-analog converter
(DAC). Also included within the basic system are a special input filter for anti-aliasing to
eliminate erroneous signals and an output filter to smooth or reconstruct the processed output
signal.

DSK SUPPORT TOOLS

Most of the work presented in this book involves the design of a program to implement a
DSP application. To perform the experiments, the following tools are used:

1. TI’s DSP starter kit (DSK). The DSK package includes:

(a) Code Composer Studio (CCS), which provides the necessary software support tools.
CCS provides an integrated development environment (IDE), bringing together the C
compiler, assembler, linker, debugger, and so on.

(b) A board, that contains the TMS320C6713 (C6713) floating-point digital signal
processor as well as a 32-bit stereo codec for input and output (I/O) support.

(c) A universal synchronous bus (USB) cable that connects the DSK board to a PC.

(d) A 5V power supply for the DSK board.

2. An IBM-compatible PC.The DSK board connects to the USB port of the PC through the
USB cable included with the DSK package.

3. An oscilloscope, signal generator, and speakers. A signal/spectrum analyzer is optional.

Shareware utilities are available that utilize the PC and a sound card to create a virtual
instrument such as an oscilloscope, a function generator, or a spectrum analyzer.

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MRK IT / ECE CEC337

DSK Board

The DSK package is powerful, yet relatively inexpensive ($395), with the necessary
hardware and software support tools for real-time signal processing [23–43]. It is a complete
DSP system.The DSK board, with an approximate size of 5X8 inches., includes the C6713
floating-point digital signal processor and a 32-bit stereo codec TLV320AIC23 (AIC23) for
input and output.

The onboard codec AIC23 [37] uses a sigma–delta technology that provides ADC and
DAC. It connects to a 12-MHz system clock.Variable sampling rates from 8 to 96 kHz can
be set readily. A daughter card expansion is also provided on the DSK board. Two 80-pin
connectors provide for external peripheral and external memory interfaces.Two project
examples illustrate the use of the external memory interface (EMIF) with light-emitting
diodes (LEDs) and liquid-crystal displays (LCDs) for spectrum display.

The DSK board includes 16MB (megabytes) of synchronous dynamic random access
memory (SDRAM) and 256kB (kilobytes) of flash memory. Four connectors on the
board provide input and output: MIC IN for microphone input, LINE IN for line
input, LINE OUT for line output, and HEADPHONE for a headphone output
(multiplexed with line output). The status of the four user dip switches on the DSK board
can be read from a program and provides the user with a feedback control interface.The DSK
operates at 225MHz.Also onboard the DSK are voltage regulators that provide 1.26 V for the
C6713 core and 3.3 V for its memory and peripherals.

TMS320C6713 Digital Signal Processor

The TMS320C6713 (C6713) is based on the VLIW architecture, which is very well suited
for numerically intensive algorithms. The internal program memory is structured so that a
total of eight instructions can be fetched every cycle. For example, with a clock rate of
225MHz, the C6713 is capable of fetching eight 32-bit instructions every 1/(225 MHz) or
4.44 ns.

Features of the C6713 include 264 kB of internal memory (8kB as L1P and L1D Cache and
256kB as L2 memory shared between program and data space), eight functional or execution
units composed of six arithmetic-logic units (ALUs) and two multiplier units, a 32-bit
address bus to address 4 GB (gigabytes), and two sets of 32-bit general-purpose registers.

The C67xx (such as the C6701, C6711, and C6713) belong to the family of the C6x floating-
point processors, whereas the C62xx and C64xx belong to the family of the C6x fixed-point
processors. The C6713 is capable of both fixed- and floatingpoint processing.

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MRK IT / ECE CEC337

ON-CHIP PERIPHERALS OF C54xx AND C67xx DSP DEVELOPMENT BOARDS :

1. Timers and Counters.

2. Serial communication interface
i. UART
ii. SPI
iii. I2C
3. ADC / DAC.
4. DMA Controller.
5. PWM.
6. Watch dog Timers.
7. Memory Interfaces.
i. SRAM
ii. DRAM
iii. EEPROM
iv. Flash memory

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MRK IT / ECE CEC337

1.Timers and Counters.

Digital signal processors typically have one or more on-chip timers that generate the
hardware interrupt at periodic intervals. They can be used to time or count events,
generate pulses or interrupt the CPU. The timers have two signaling modes, and can be
clocked by an external clock or the CPU clock. By default they are clocked internally. The
timer output can be configured as a timer output or a general-purpose output. When an
internal clock drives the timer, the frequency on the timer input clock varies across the
processor generations. the timer input frequency for different TI chips as a ratio of the CPU
clocking rate.

2.Serial communication interface.

The SCI is constituted by three pins: Receive data (RXD), transmit data (TXD) and the
SCI serial clock (SCLK). It provides a versatile connection to other units. Communication
between the SCI and the DSP core is performed with memory mapped control and data
registers.

i. UART : UART stands for universal asynchronous receiver / transmitter and defines a
protocol, or set of rules, for exchanging serial data between two devices. UART is very
simple and only uses two wires between transmitter and receiver to transmit and receive in
both directions.

ii. SPI : Serial Peripheral Interface (SPI) is for synchronous serial communication, used
primarily in embedded systems for short-distance wired communication between integrated
circuits.

iii. I2C : Inter-Integrated Circuit. It is a bus interface connection protocol incorporated into
devices for serial communication. The I2C bus is a very popular and powerful bus used
for communication between a master (or multiple masters) and a single or multiple slave
devices.

3.ADC / DAC.

An analog-to-digital converter (ADC) is used to convert an analog signal such as voltage

to a digital form so that it can be read and processed by a microcontroller. Most
microcontrollers nowadays have built-in ADC converters. It is also possible to connect an
external ADC converter to any type of microcontroller.
An digital-to-analog (DAC) is used correctly that converts digital signals into analog
signals, ensuring accurate sound reproduction without affecting its properties. DSP optimizes
the digital signal for the DAC's conversion process, resulting in the best possible output.

PREPARED BY : Mrs .ARULMOZHI R .,M.E

MRK IT / ECE CEC337

4.DMA Controller.

Direct memory access (DMA) is the process of transferring data without the involvement of
the processor itself. It is often used for transferring data to/from input/output devices. A
separate DMA controller is required to handle the transfer. The controller notifies the DSP
processor that it is ready for a transfer.

5.PWM.

The Pulse-width modulator (PWM) feature is very common in embedded systems.

It provides a way to generate a pulse periodic waveform for motor control or can act as a
digital-to-analog converter with some external components.

PWM method is used to reduce the harmonic content in the output voltage applied to
induction motor. The pulses were generated using Texas Instruments TMS 320F28335 DSP
controller and that triggers the inverter. Results of input and output of the inverter were
captured using Digital Storage Oscilloscope.

6.Watch dog Timers.

A watchdog timer (WDT) is a timer that monitors microcontroller (MCU) programs to see
if they are out of control or have stopped operating. It acts as a “watchdog” watching over
MCU operation. A microcontroller (MCU) is a compact processor for controlling electronic
devices.

7.Memory Interfaces.

i.SRAM : Static random-access memory (static RAM or SRAM) is a type of random-

access memory (RAM) that uses latching circuitry (flip-flop) to store each bit. SRAM is
volatile memory; data is lost when power is removed.

ii.DRAM : DRAM (dynamic random access memory) is a type of semiconductor memory

that is typically used for the data or program code needed by a computer processor to
function. DRAM is a common type of random access memory (RAM) that is used in PCs,
workstations and servers.

iii.EEPROM : EEPROM is an acronym that stands for Electrically Erasable Programmable

Read-Only Memory. It denotes a type of rewritable storage chip or memory package that can
continue to hold its stored information even without power. This is known as non-volatile
memory. By using UV ultraviolet rays can erase the data.

iv.Flash memory : Flash memory is a long-life and non-volatile storage chip that is widely
used in embedded systems. It can keep stored data and information even when the power is
off. It can be electrically erased and reprogrammed.
PREPARED BY : Mrs .ARULMOZHI R .,M.E
MRK IT / ECE CEC337

ON-BOARD PERIPHERALS OF C54xx AND C67xx DSP DEVELOPMENT

BOARDS :

1. JTAG Interface.
2. Power supply Unit.
3. Clock generator.
4. Memory unit.
5. Expansion headers .
6. GPIO.
7. LED & Push buttons.

1.JTAG Interface :

JTAG (named after the Joint Test Action Group which codified it) is an industry standard
for verifying designs and testing printed circuit boards after manufacture. JTAG implements
standards for on-chip instrumentation in electronic design automation (EDA) as a
complementary tool to digital simulation.

JTAG/boundary-scan (IEEE Std 1149.1) is an electronic four port serial JTAG interface that
allows access to the special embedded logic on a great many of today's ICs (chips) .

2.Power supply Unit :

A 5V power supply for the DSK board.

3.Clock generator :

A clock signal generator is a circuit that produces a timing signal for use in synchronizing a
system's operation. At its most basic level, a clock generator consists of a resonant circuit
and an amplifier. A clock signal is produced by an electronic oscillator called a clock
generator. The most common clock signal is in the form of a square wave with a 50% duty
cycle. A simple technique for on-chip generation of a primary clock signal would be to use a
ring oscillator Such a clock circuit has been used in low-end microprocessor chips. Simple
on-chip clock generation circuit using a ring oscillator.

A free-running ring oscillator is used as internal clock and the output clock is generated
using two counters. The clock generator is described in synthesisable VHDL-code and can
therefore easily be made from standard cells found in any commercial standard CMOS cell
library.

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MRK IT / ECE CEC337

4.Memory unit :

They have various RAM and ROM configurations, a 16 bit I/O bus, and serial ports. The
mid-range processor operates between 27-50 Mhz, with 16-32 bit floating point operations
and 16-24 bit fixed point operations. A mid-range processor typically has around 32-40 bit
registers.

5.Expansion headers:

An expansion header is a collection of expansion connectors placed on the development

board. The pins from the connectors lead out the processor pins outside and can be identified
by a label on the board. There can be multiple expansion headers on a single board.

6.GPIO :

GPIO stands for General Purpose Input/Output. It's a standard interface used to connect
microcontrollers to other electronic devices. For example, it can be used with sensors,
diodes, displays, and System-on-Chip modules.

7.LED & Push buttons :

LED stands for light emitting diode. LED lighting products produce light up to 90% more
efficiently than incandescent light bulbs. How do they work? An electrical current passes
through a microchip, which illuminates the tiny light sources we call LEDs and the result is
visible light.

A push-button (also spelled pushbutton) or simply button is a simple switch mechanism to

control some aspect of a machine or a process. Buttons are typically made out of hard
material, usually plastic or metal.

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MRK IT / ECE CEC337

CODE COMPOSER STUDIO (CCS) AND SUPPORT FILES :

CODE COMPOSER STUDIO (CCS) :

CCS provides an IDE to incorporate the software tools. CCS includes tools for code
generation, such as a C compiler, an assembler, and a linker. It has graphical capabilities
and supports real-time debugging. It provides an easy-to-use software tool to build and
debug programs.

The C compiler compiles a C source program with extension .c to produce an assembly

source file with extension.asm.The assembler assembles an.asm source file to produce a
machine language object file with extension.obj.The linker combines object files and
object libraries as input to produce an executable file with extension.out.

This executable file represents a linked common object file format (COFF), popular in
Unix-based systems and adopted by several makers of digital signal processors [25]. This
executable file can be loaded and run directly on the C6713 processor. the linear assembly
source file with extension .sa, which is a cross between C and assembly code. A linear
optimizer optimizes this source file to create an assembly file with extension .asm (similar to
the task of the C compiler).

To create an application project, one can “add” the appropriate files to theproject.
Compiler/linker options can readily be specified. A number of debuggingfeatures are
available, including setting breakpoints and watching variables; viewing memory, registers,
and mixed C and assembly code; graphing results; and monitoring execution time. One can
step through a program in different ways (step into, over, or out).

Real-time analysis can be performed using real-time data exchange (RTDX).RTDX allows
for data exchange between the host PC and the target DSK, as well as analysis in real time
without stopping the target. Key statistics and performance can be monitored in real time.
Through the joint team action group (JTAG), communication with on-chip emulation
support occurs to control and monitor program execution. The C6713 DSK board includes a
JTAG interface through the USB port.

CCS Installation and Support

Use the USB cable to connect the DSK board to the USB port on the PC. Use the 5-V power
supply included with the DSK package to connect to the +5-V power connector on the DSK
to turn it on. Install CCS with the CD-ROM included with the DSK, preferably using the
c:\C6713 structure (in lieu of c:\ti as the default).

The CCS icon should be on the desktop as “C6713DSK CCS” and is used to launch
CCS.The code generation tools (C compiler, assembler, linker) are used with CCS version
2.x.

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MRK IT / ECE CEC337

CCS provides useful documentations included with the DSK package on the following (see
the Help icon):

1. Code generation tools (compiler, assembler, linker, etc.)

2. Tutorials on CCS, compiler, RTDX
3. DSP instructions and registers
4. Tools on RTDX, DSP/basic input/output system (DSP/BIOS), and so on.

An extensive amount of support material (pdf files) is included with CCS.There are also
examples included with CCS within the folder c:\C6713\examples. They illustrate the board
and chip support library files, DSP/BIOS, and so on. CCS Version 2.x was used to build and
test the examples included in this book.A number of files included in the following
subfolders/directories within c:\C6713 (suggested structure during CCS installation) can be
very useful:

1. myprojects: a folder supplied only for your projects. All the folders in the
accompanying book CD should be placed within this subdirectory.
2. bin: contains many utilities.
3. docs: contains documentation and manuals.
4. c6000\cgtools: contains code generation tools.
5. c6000\RTDX: contains support files for real-time data transfer.
6. c6000\bios: contains support files for DSP/BIOS.
7. examples: contains examples included with CCS.
8. tutorial: contains additional examples supplied with CCS.

Useful Types of Files :

You will be working with a number of files with different extensions. They include:

1. file.pjt: to create and build a project named file

2. file.c: C source program
3. file.asm: assembly source program created by the user, by the C compiler,or by the linear
optimizer
4. file.sa: linear assembly source program.The linear optimizer uses file.sa as input to
produce an assembly program file.asm
5. file.h: header support file
6. file.lib: library file, such as the run-time support library file rts6700.lib
7. file.cmd: linker command file that maps sections to memory
8. file.obj: object file created by the assembler
9. file.out: executable file created by the linker to be loaded and run on the C6713 processor
10. file.cdb: configuration file when using DSP/BIOS

PREPARED BY : Mrs .ARULMOZHI R .,M.E

MRK IT / ECE CEC337

SUPPORT FILES :

The following support files located in the folder support (except the library files)
are used for most of the examples and projects:

1. C6713dskinit.c: contains functions to initialize the DSK, the codec, the serial ports, and
for I/O. It is not included with CCS.

2. C6713dskinit.h: header file with function prototypes. Features such as those used to
select the mic input in lieu of line input (by default), input gain, and so on are obtained from
this header file (modified from a similar file included with CCS).

3. C6713dsk.cmd: sample linker command file. This generic file can be changed when
using external memory in lieu of internal memory.

4. Vectors_intr.asm: a modified version of a vector file included with CCS to handle

interrupts. Twelve interrupts, INT4 through INT15, are available, and INT11 is selected
within this vector file.They are used for interrupt-driven programs.

5. Vectors_poll.asm: vector file for programs using polling.

6. rts6700.lib,dsk6713bsl.lib,csl6713.lib: run-time, board, and chip support library files,

respectively. These files are included with CCS and are located in C6000\cgtools\lib,
C6000\dsk6713\lib, and c6000\bios\lib, respectively.

On-Chip Peripherals in C54x DSP Processor :

The following on-chip peripherals are available on C54x devices:

1. General-purpose I/O pins: XF and BIO

2. Timer
3. Clock generator
4. Host port interface (HPI)
i. 8-bit standard
ii. 8-bit enhanced
iii. 16-bit enhanced
5. Synchronous serial port
6. Buffered serial port (BSP)
7. Multichannel buffered serial port (McBSP)
8. Time-division multiplexed (TDM) serial port
9. Software-programmable wait-state generator
10. Programmable bank-switch

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MRK IT / ECE CEC337

1. General-Purpose I/O :

The C54x DSP offers general-purpose I/O through two dedicated pins that are software
controlled. The two dedicated pins are the branch control input pin (BIO) and the external
flag output pin (XF).

i. Branch Control Input Pin (BIO) : BIO can be used to monitor the status of peripheral
devices. It is especially useful as an alternative to using an interrupt when time-critical loops
must not be disturbed. A branch can be conditionally executed dependent upon the state of
the BIO input. Of the instructions that use BIO, the execute conditionally (XC) instruction
samples the condition of BIO during the decode phase of the pipeline; all other conditional
instructions (branch, call, and return) sample BIO during the read phase of the pipeline.

ii. External Flag Output Pin (XF) : XF can be used to signal external devices. The XF pin
is controlled using software. It is driven high by setting the XF bit (in ST1) and is driven low
by clearing the XF bit. The set status register bit (SSBX) and reset status register bit (RSBX)
instructions can be used to set and clear XF, respectively. XF is also set high at device reset.
Figure 8–1 shows the relationship between the time the SSBX or RSBX instruction is
fetched and the time the XF pin is set or reset (refer to the TMS320C54x DSP data sheet for
timing specifications). The XF timing shown is for a sequence of single-cycle instructions.
Actual timing can vary with different instruction sequences.

2. Timer :

The on-chip timer is a software-programmable timer that consists of three registers and can
be used to periodically generate interrupts. The timer resolution is the CPU clock rate of the
processor.The high dynamic range of the timer is achieved with a 16-bit counter with a 4-bit
prescaler. The C5402 and the C5420 have two on-chip timers.

3. Clock Generator :

The clock generator allows system designers to select the clock source. The sources that
drive the clock generator are:

 A crystal resonator with the internal oscillator circuit. The crystal resonator circuit is
connected across the X1 and X2/CLKIN pins of the C54x DSP. The CLKMD pins
must be configured to enable the internal oscillator.
 An external clock. The external clock source is directly connected to the X2/CLKIN
pin, and X1 is left unconnected.

The clock generator on the C54x devices consists of an internal oscillator and a phase-locked
loop (PLL) circuit. Currently, there are two different types of PLL circuits on C54x devices.
Some devices have hardware-configurable PLL circuits while others have software-
programmable PLL circuit.

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MRK IT / ECE CEC337

4.Host Port Interface :

The standard host port interface (HPI) is available on the C542, C545, C548, and C549
devices. The HPI is an 8-bit parallel port that interfaces a host device or host processor to the
C54x DSP.

Information is exchanged between the C54x DSP and the host device through on-chip C54x
DSP memory that is accessible by both the host and the C54x DSP. Enhanced host port
interfaces are available on the C5402, C5410 (HPI-8), and C5420 (HPI-16) devices. This
chapter does not describe these enhanced HPIs

The HPI interfaces to the host device as a peripheral, with the host device as master of the
interface, facilitating ease of access by the host. The host device communicates with the HPI
through dedicated address and data registers, to which the C54x DSP does not have direct
access, and the HPI control register, using the external data and interface control signals
Both the host device and the C54x DSP have access to the HPI control register.

5.Synchronous serial port :

In all C54x DSP serial ports, both receive and transmit operations are doublebuffered, thus
allowing a continuous communications stream with either 8-bit or 16-bit data packets. The
continuous mode provides operation that, once initiated, requires no further frame
synchronization pulses (FSR and FSX) when transmitting at maximum packet frequency.

The serial ports are fully static and thus will function at arbitrarily low clocking frequencies.
The maximum operating frequency for the standard serial port of one-fourth of CLKOUT
(10 Mbit/s at 25 ns, 12.5 Mbit/s at 20 ns) is achieved when using internal serial port clocks.
The maximum operating frequency for the BSP is CLKOUT. When the serial ports are in
reset, the device may be configured to turn off the internal serial port clocks, allowing the
device to run in a lower power mode of operation.

6.Buffered Serial Port (BSP) Interface :

The buffered serial port (BSP) is made up of a full-duplex, double-buffered serial port
interface, which functions in a similar manner to the C54x DSP standard serial port, and an
autobuffering unit (ABU)

The serial port section of the BSP is an enhanced version of the C54x DSP standard serial
port. The ABU is an additional section of logic which allows the serial port section to
read/write directly to C54x DSP internal memory independent of the CPU. This results in a
minimum overhead for serial port transfers and faster data rates.

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MRK IT / ECE CEC337

7.Time-Division Multiplexed (TDM) Serial Port Interface :

The time-division multiplexed (TDM) serial port allows the C54x DSP to communicate
serially with up to seven other devices. The TDM port, therefore, provides a simple and
efficient interface for multiprocessing applications. By means of the TDM bit in the TDM
serial port control register (TSPC), the port can be configured in multiprocessing mode
(TDM = 1) or stand-alone mode (TDM = 0).

When in stand-alone mode, the port operates as described in section 9.2. When in
multiprocessing mode, the port operates as described in this section. The port can be shut
down for low power consumption via the XRST and RRST bits,

8.Wait-State Generator :

The software-programmable wait-state generator can extend external bus cycles by up to

seven machine cycles (14 machine cycles on C5402, C5409, C5410, and C5420 devices),
providing a convenient means to interface the C54x DSP to slower external devices. Devices
that require more than seven wait states can be interfaced using the hardware READY line.

When all external accesses are configured for zero wait states, the internal clocks to the wait-
state generator are shut off. Shutting off these paths from the internal clocks allows the
device to run with lower power consumption. The software-programmable wait-state
generator is controlled by the 16-bit software wait-state register (SWWSR), which is
memory-mapped to address 0028h in data space.

9.Bank-Switching Logic :

Programmable bank-switching logic allows the C54x DSP to switch between external
memory banks without requiring external wait states for memories that need several cycles
to turn off. The bank-switching logic automatically inserts one cycle when accesses cross
memory-bank boundaries inside program or data space.

PREPARED BY : Mrs .ARULMOZHI R .,M.E

MRK IT / ECE CEC337
UNIT – II

BLOCK DIAGRAM OF TMS320C54XX DSP STARTER KIT :

Depicts the basic block diagram of the ’C50. It shows the interconnections, which include
the host interface, analog interface, and emulation interface. PC communications are via the
RS-232 port on the DSK board. The 32K bytes of PROM contain the kernel program for
boot loading. All pins of the ’C50 are connected to the external I/O interfaces. The external
I/O interfaces include four 24-pin headers, a 4-pin header, and a 14-pin XDS510 header. The
TLC32040 AIC interfaces to the ’C50 serial port. Two RCA connectors provide analog input
and output on the board.

PREPARED BY : Mrs .ARULMOZHI R .,M.E