DSP Labmanual
DSP Labmanual
DSP Labmanual
.
Digital Signal Processing Lab
The C6713 DSK builds on TI's industry-leading line of low cost, easy-to-use DSP
Starter Kit (DSK) development boards. The high-performance board features the
TMS320C6713 floating-point DSP. Capable of performing 1350 million floating-point
operations per second (MFLOPS), the C6713 DSP makes the C6713 DSK the most
powerful DSK development board.
The DSK is USB port interfaced platform that allows efficiently developing and testing
applications for the C6713. The DSK consists of a C6713-based printed circuit board that
will serve as a hardware reference design for TI’s customers’ products. With extensive
host PC and target DSP software support, including bundled TI tools, the DSK provides
ease-of-use and capabilities that are attractive to DSP engineers.
The following checklist details items that are shipped with the C6711 DSK kit.
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Digital Signal Processing Lab
The C6713 DSK has a TMS320C6713 DSP onboard that allows full-speed verification of
code with Code Composer Studio. The C76713 DSK provides:
• A USB Interface
• SDRAM and ROM
• An analog interface circuit for Data conversion (AIC)
• An I/O port
• Embedded JTAG emulation support
Connectors on the C6713 DSK provide DSP external memory interface (EMIF) and
peripheral signals that enable its functionality to be expanded with custom or third party
daughter boards.
The DSK provides a C6713 hardware reference design that can assist you in the
development of your own C6713-based products. In addition to providing a reference for
interfacing the DSP to various types of memories and peripherals, the design also
addresses power, clock, JTAG, and parallel peripheral interfaces.
The C6711 DSK includes a stereo codec. This analog interface circuit (AIC) has the
following characteristics:
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Digital Signal Processing Lab
The 6713 DSK is a low-cost standalone development platform that enables customers to
evaluate and develop applications for the TI C67XX DSP family. The DSK also serves
as a hardware reference design for the TMS320C6713 DSP. Schematics, logic equations
and application notes are available to ease hardware development and reduce time to
market.
The DSK uses the 32-bit EMIF for the SDRAM (CE0) and daughtercard expansion
interface (CE2 and CE3). The Flash is attached to CE1 of the EMIF in 8-bit mode.
An on-board AIC23 codec allows the DSP to transmit and receive analog signals.
McBSP0 is used for the codec control interface and McBSP1 is used for data. Analog
audio I/O is done through four 3.5mm audio jacks that correspond to microphone input,
line input, line output and headphone output. The codec can select the microphone or the
line input as the active input. The analog output is driven to both the line out (fixed gain)
and headphone (adjustable gain) connectors. McBSP1 can be re-routed to the expansion
connectors in software.
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Digital Signal Processing Lab
A programmable logic device called a CPLD is used to implement glue logic that ties the
board components together. The CPLD has a register based user interface that lets the
user configure the board by reading and writing to the CPLD registers. The registers
reside at the midpoint of CE1.
The DSK includes 4 LEDs and 4 DIPswitches as a simple way to provide the user with
interactive feedback. Both are accessed by reading and writing to the CPLD registers.
An included 5V external power supply is used to power the board. On-board voltage
regulators provide the 1.26V DSP core voltage, 3.3V digital and 3.3V analog voltages. A
voltage supervisor monitors the internally generated voltage, and will hold the board in
reset until the supplies are within operating specifications and the reset button is released.
If desired, JP1 and JP2 can be used as power test points for the core and I/O power
supplies.
Code Composer communicates with the DSK through an embedded JTAG emulator with
a USB host interface. The DSK can also be used with an external emulator through the
external JTAG connector.
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Digital Signal Processing Lab
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Digital Signal Processing Lab
Package Options:
208-Pin PowerPAD™ Plastic (Low-Profile) Quad Flatpack (PYP)
272-BGA Packages (GDP and ZDP)
0.13-µm/6-Level Copper Metal Process
CMOS Technology
3.3-V I/Os, 1.2 -V Internal (GDP & PYP)
3.3-V I/Os, 1.4-V Internal (GDP)(300 MHz only)
1.4 INSTALLATION
SYSTEM REQUIREMENTS
Minimum Recommended
• 233MHz or Higher Pentium- • 500MHz or Higher Pentium –
Compatible CPU Compatible CPU
• 600MB of free hard disk space
• 128MB of RAM • 128MB RAM
• SVGA (800 x 600 ) display
• Internet Explorer (4.0 or later) or • 16bit Color
• Netscape Navigator (4.7 or later)
• Local CD-ROM drive
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Digital Signal Processing Lab
If Code Composer Studio IDE fails to configure your port correctly, perform the
following steps:
• Test the USB port by running DSK Port test from the start menu
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Digital Signal Processing Lab
You must install the hardware before you install the software on your system.
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Digital Signal Processing Lab
Code Composer is the DSP industry's first fully integrated development environment
(IDE) with DSP-specific functionality. With a familiar environment liked MS-based C+
+TM, Code Composer lets you edit, build, debug, profile and manage projects from a
single unified environment. Other unique features include graphical signal analysis,
injection/extraction of data signals via file I/O, multi-processor debugging, automated
testing and customization via a C-interpretive scripting language and much more.
• IDE
• Debug IDE
• Advanced watch windows
• Integrated editor
• File I/O, Probe Points, and graphical algorithm scope probes
• Advanced graphical signal analysis
• Interactive profiling
• Automated testing and customization via scripting
• Visual project management system
• Compile in the background while editing and debugging
• Multi-processor debugging
• Help on the target DSP
Note :
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Digital Signal Processing Lab
Compile:
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Digital Signal Processing Lab
sum.c
# include<stdio.h>
main()
{
int i=0;
i++;
printf("%d",i);
}
1. Keep the cursor on the on to the line from where u want to start single step
debugging.(eg: set a break point on to first line int i=0; of your project.)
4. Debug Run.
6. Now press F10. See the changes happening in the watch window.
7. Similarly go to view & select CPU registers to view the changes happening in
CPU registers.
8. Repeat steps 2 to 6.
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Digital Signal Processing Lab
2. LINEAR CONVOLUTION
Aim: To verify the linear convolution using DSK6713 processor
Software: CCStudio
Theory:
#include<stdio.h>
main()
{ int m=4; /*Lenght of i/p samples sequence*/
int n=4; /*Lenght of impulse response Co-efficients */
int i=0,j;
int x[10]={1,2,3,4,0,0,0,0}; /*Input Signal Samples*/
int h[10]={1,2,3,4,0,0,0,0}; /*Impulse Response Co-efficients*/
/*At the end of input sequences pad ‘M’ and ‘N’ no. of zero’s*/
int y[10];
for(i=0;i<m+n-1;i++)
{
y[i]=0;
for(j=0;j<=i;j++)
y[i]+=x[j]*h[i-j];
}
for(i=0;i<m+n-1;i++)
printf("%d\n",y[i]);
}
Note:
1. To execute the above program follow “ procedure to work on code composer
studio”
PROCEDURE:
Open Code Composer Studio, make sure the DSP kit is turned on.
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Digital Signal Processing Lab
INPUT
x[n] =
h[k] =
OUTPUT: y[i] =
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Digital Signal Processing Lab
3. Circular Convolution
Aim: To verify the Circular Convolution using DSK6713 Processor.
Software: CCStudio.
Theory:
Steps for cyclic convolution are the same as the usual convolution, except all index
calculations are done "mod N" = "on the wheel"
Steps for Cyclic Convolution
Step 2: "Spin" h[−m] n times Anti Clock Wise (counter-clockwise) to get h[n-m]
(i.e. Simply rotate the sequence, h[n], clockwise by n steps)
Figure 2: Step 2
Step 3: Pointwise multiply the f[m] wheel and the h[n−m] wheel. sum=y[n]
Example 1: Convolve (n = 4)
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Digital Signal Processing Lab
• h[−m] =
Figure 4
Multiply f[m] and sum to yield: y[0] =3
• h[1−m]
Figure 5
Multiply f[m] and sum to yield: y[1] =5
• h[2−m]
Figure 6
Multiply f[m] and sum to yield: y[2] =3
• h[3−m]
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Digital Signal Processing Lab
Figure 7
Multiply f[m] and sum to yield: y[3] =1
#include<stdio.h>
int m,n,x[30],h[30],y[30],i,j,temp[30],k,x2[30],a[30];
void main()
scanf("%d",&m);
scanf("%d",&n);
for(i=0;i<m;i++)
scanf("%d",&x[i]);
for(j=0;j<n;j++)
scanf("%d",&h[j]);
for(i=n;i<m;i++)
h[i]=0;
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Digital Signal Processing Lab
n=m;
for(i=m;i<n;i++)
x[i]=0;
m=n;
y[0]=0;
a[0]=h[0];
a[j]=h[n-j];
/*Circular convolution*/
for(i=0;i<n;i++)
y[0]+=x[i]*a[i];
for(k=1;k<n;k++)
y[k]=0;
/*circular shift*/
for(j=1;j<n;j++)
x2[j]=a[j-1];
x2[0]=a[n-1];
for(i=0;i<n;i++)
a[i]=x2[i];
y[k]+=x[i]*x2[i];
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Digital Signal Processing Lab
for(i=0;i<n;i++)
printf("%d \t",y[i]);
IN PUT:
Eg: x[4]={3, 2, 1,0}
h[4]={1, 1, 0,0}
PROCEDURE:
Open Code Composer Studio, make sure the DSP kit is turned on.
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Digital Signal Processing Lab
2.0 Prerequisites
TMS320C6713 DSP Starter Kit, PC with Code Composer Studio, CRO, Audio Source,
Speakers and Signal Generator.
4.0 Procedure
• All the Real time implementations covered in the Implementations module follow
code Configuration using board support library.
• The board Support Library (CSL) is a collection of functions, macros, and
symbols used to configure and control on-chip peripherals.
• The goal is peripheral ease of use, shortened development time, portability,
hardware abstraction, and some level of standardization and compatibility among
TI devices.
• BSL is a fully scalable component of DSP/BIOS. It does not require the use of
other DSP/BIOS components to operate.
Steps:
1. Connect CRO to the Socket Provided for LINE OUT.
2. Connect a Signal Generator to the LINE IN Socket.
3. Switch on the Signal Generator with a sine wave of frequency 500 Hz.
4. Now Switch on the DSK and Bring Up Code Composer Studio on the PC.
5. Create a new project with name XXXX.pjt.
6. From the File Menu new DSP/BIOS Configuration select
“dsk6713.cdb” and save it as “YYYY.cdb” and add it to the current project.
7. Add the generated “YYYYcfg.cmd” file to the current project.
8. Add the given “codec.c” file to the current project which has the main function and
calls all the other necessary routines.
9. View the contents of the generated file “YYYYcfg_c.c” and copy the include header
file ‘YYYYcfg.h’ to the “codec.c” file.
10. Add the library file “dsk6713bsl.lib” from the location
“C:\ti\C5400\dsk6713\lib\dsk6713bsl.lib” to the current project
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Digital Signal Processing Lab
12. You can notice the input signal of 500 Hz. appearing on the CRO verifying the codec
configuration.
13. You can also pass an audio input and hear the output signal through the speakers.
14. You can also vary the sampling frequency using the DSK6713_AIC23_setFreq
Function in the “codec.c” file and repeat the above steps.
5.0 Conclusion:
The codec TLV320AIC23 successfully configured using the board support library
and verified.
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Digital Signal Processing Lab
codec.c
#include "filtercfg.h"
#include "dsk6713.h"
#include "dsk6713_aic23.h"
void main()
{
DSK6713_AIC23_CodecHandle hCodec;
int l_input, r_input,l_output, r_output;
while(1)
{
/* Read a sample to the left channel */
while (!DSK6713_AIC23_read(hCodec, &l_input));
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Digital Signal Processing Lab
Software: 1.CCStudio
2. Matlab2008a version
2. Function generator
Theory:
III. Compute the desired Impulse Response h d (n) using particular Window
Eg: b_rect1=fir1(order, Wc , 'high',boxcar(31));
IV. Convolve input sequence with truncated Impulse Response x (n)*h (n)
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Digital Signal Processing Lab
If Wn is a multi-element vector,
Wn = [W1 W2 W3 W4 W5 ... WN],
FIR1 returns an order N multiband filter with bands
0 < W < W1, W1 < W < W2, ..., WN < W < 1.
B = FIR1(N,Wn,'DC-1') makes the first band a passband.
B = FIR1(N,Wn,'DC-0') makes the first band a stopband.
By default, the filter is scaled so the center of the first pass band
has magnitude exactly one after windowing. Use a trailing 'noscale'
argument to prevent this scaling, e.g. B = FIR1(N,Wn,'noscale'),
B = FIR1(N,Wn,'high','noscale'), B = FIR1(N,Wn,wind,'noscale').
% FIR Low pass filters using rectangular, triangular and kaiser windows
order = 30;
cf=[500/4000,1000/4000,1500/4000]; cf--> contains set of cut-off frequencies[Wc ]
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Digital Signal Processing Lab
b_rect3=fir1(order,cf(3),boxcar(31));
b_tri3=fir1(order,cf(3),bartlett(31));
b_kai3=fir1(order,cf(3),kaiser(31,8));
fid=fopen('FIR_lowpass_rectangular.txt','wt');
fprintf(fid,'\t\t\t\t\t\t%s\n','Cutoff -400Hz');
fprintf(fid,'\nfloat b_rect1[31]={');
fprintf(fid,'%f,%f,%f,%f,%f,%f,%f,%f,%f,%f,\n',b_rect1);
fseek(fid,-1,0);
fprintf(fid,'};');
fprintf(fid,'\n\n\n\n');
fprintf(fid,'\t\t\t\t\t\t%s\n','Cutoff -800Hz');
fprintf(fid,'\nfloat b_rect2[31]={');
fprintf(fid,'%f,%f,%f,%f,%f,%f,%f,%f,%f,%f,\n',b_rect2);
fseek(fid,-1,0);
fprintf(fid,'};');
fprintf(fid,'\n\n\n\n');
fprintf(fid,'\t\t\t\t\t\t%s\n','Cutoff -1200Hz');
fprintf(fid,'\nfloat b_rect3[31]={');
fprintf(fid,'%f,%f,%f,%f,%f,%f,%f,%f,%f,%f,\n',b_rect3);
fseek(fid,-1,0);
fprintf(fid,'};');
fclose(fid);
winopen('FIR_highpass_rectangular.txt');
T.1 : Matlab generated Coefficients for FIR Low Pass Kaiser filter:
Cutoff -500Hz
float b_kai1[31]={-0.000019,-0.000170,-0.000609,-0.001451,-0.002593,-0.003511,-
0.003150,0.000000,0.007551,0.020655,0.039383,0.062306,0.086494,0.108031,0.122944,
0.128279,0.122944,0.108031,0.086494,0.062306,0.039383,0.020655,0.007551,0.000000,
-0.003150,-0.003511,-0.002593,-0.001451,-0.000609,-0.000170,-0.000019};
Cutoff -1000Hz
float b_kai2[31]={-0.000035,-0.000234,-0.000454,0.000000,0.001933,0.004838,0.005671,
-0.000000,-0.013596,-0.028462,-0.029370,0.000000,0.064504,0.148863,0.221349,0.249983,
IMPLEMENTATION OF AN FIR FILTER :
0.221349,0.148863,0.064504,0.000000,-0.029370,-0.028462,-0.013596,-0.000000,0.005671,
0.004838,0.001933,0.000000,-0.000454,-0.000234,
ALGORITHM TO IMPLEMENT : -0.000035};
WeCutoff
need -1500Hz
to realize an advance FIR filter by implementing its difference equation as per
float
the b_kai3[31]={-0.000046,-0.000166,0.000246,0.001414,0.001046,-0.003421,-0.007410,
specifications. A direct form I implementation approach is taken. (The filter
0.000000,0.017764,0.020126,-0.015895,-0.060710,-0.034909,0.105263,0.289209,0.374978,
coefficients are taken as ai as generated by the Matlab program.)
0.289209,0.105263,-0.034909,-0.060710,-0.015895,0.020126,0.017764,0.000000,-0.007410,
-0.003421,0.001046,0.001414,0.000246,-0.000166, -0.000046};
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Digital Signal Processing Lab
•
T.2 :Matlab generated Coefficients for FIR Low Pass Rectangular
filter
Cutoff -500Hz
float b_rect1[31]={-0.008982,-0.017782,-0.025020,-0.029339,-0.029569,-0.024895,
-0.014970,0.000000,0.019247,0.041491,0.065053,0.088016,0.108421,0.124473,0.134729,
0.138255,0.134729,0.124473,0.108421,0.088016,0.065053,0.041491,0.019247,0.000000,
-0.014970,-0.024895,-0.029569,-0.029339,-0.025020,-0.017782,-0.008982};
Cutoff -1000Hz
float b_rect2[31]={-0.015752,-0.023869,-0.018176,0.000000,0.021481,0.033416,0.026254,-
0.000000,-0.033755,-0.055693,-0.047257,0.000000,0.078762,0.167080,0.236286,0.262448,
0.236286,0.167080,0.078762,0.000000,-0.047257,-0.055693,-0.033755,-0.000000,0.026254,
0.033416,0.021481,0.000000,-0.018176,-0.023869,-0.015752};
Cutoff -1500Hz
float b_rect2[31]={-0.020203,-0.016567,0.009656,0.027335,0.011411,-0.023194,-0.033672,
0.000000,0.043293,0.038657,-0.025105,-0.082004,-0.041842,0.115971,0.303048,0.386435,
0.303048,0.115971,-0.041842,-0.082004,-0.025105,0.038657,0.043293,0.000000,-0.033672,
-0.023194,0.011411,0.027335,0.009656,-0.016567,-0.020203};
FLOWCHART FOR FIR :
T.3 : Matlab generated Coefficients for FIR Low Pass Triangular filter
Cutoff -500Hz
float b_tri1[31]={0.000000,-0.001185,-0.003336,-0.005868,-0.007885,-0.008298,-0.005988,
0.000000,0.010265,0.024895,0.043368,0.064545,0.086737,0.107877,0.125747,0.138255,
0.125747,0.107877,0.086737,0.064545,0.043368,0.024895,0.010265,0.000000,-0.005988,
-0.008298,-0.007885,-0.005868,-0.003336,-0.001185,0.000000};
Cutoff -1000Hz
float b_tri2[31]={0.000000,-0.001591,-0.002423,0.000000,0.005728,0.011139,0.010502,
-0.000000,-0.018003,-0.033416,-0.031505,0.000000,0.063010,0.144802,0.220534,0.262448,
0.220534,0.144802,0.063010,0.000000,-0.031505,-0.033416,-0.018003,-0.000000,0.010502,
0.011139,0.005728,0.000000,-0.002423,-0.001591,0.000000};
Cutoff -1500Hz
float b_tri3[31]={0.000000,-0.001104,0.001287,0.005467,0.003043,-0.007731,-0.013469,
0.000000,0.023089,0.023194,-0.016737,-0.060136,-0.033474,0.100508,0.282844,0.386435,
0.282844,0.100508,-0.033474,-0.060136,-0.016737,0.023194,0.023089,0.000000,-0.013469,
-0.007731,0.003043,0.005467,0.001287,-0.001104,0.000000};
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Digital Signal Processing Lab
% FIR High pass filters using rectangular, triangular and kaiser windows
fid=fopen('FIR_highpass_rectangular.txt','wt');
fprintf(fid,'\t\t\t\t\t\t%s\n','Cutoff -400Hz');
fprintf(fid,'\nfloat b_rect1[31]={');
fprintf(fid,'%f,%f,%f,%f,%f,%f,%f,%f,%f,%f,\n',b_rect1);
fseek(fid,-1,0);
fprintf(fid,'};');
fprintf(fid,'\n\n\n\n');
fprintf(fid,'\t\t\t\t\t\t%s\n','Cutoff -800Hz');
fprintf(fid,'\nfloat b_rect2[31]={');
fprintf(fid,'%f,%f,%f,%f,%f,%f,%f,%f,%f,%f,\n',b_rect2);
fseek(fid,-1,0);
fprintf(fid,'};');
fprintf(fid,'\n\n\n\n');
fprintf(fid,'\t\t\t\t\t\t%s\n','Cutoff -1200Hz');
fprintf(fid,'\nfloat b_rect3[31]={');
fprintf(fid,'%f,%f,%f,%f,%f,%f,%f,%f,%f,%f,\n',b_rect3);
fseek(fid,-1,0);
fprintf(fid,'};');
fclose(fid);
winopen('FIR_highpass_rectangular.txt');
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Digital Signal Processing Lab
Cutoff -400Hz
float b_kai1[31]={0.000050,0.000223,0.000520,0.000831,0.000845,-0.000000,-0.002478,
-0.007437,-0.015556,-0.027071,-0.041538,-0.057742,-0.073805,-0.087505,-0.096739,
0.899998,-0.096739,-0.087505,-0.073805,-0.057742,-0.041538,-0.027071,-0.015556,
-0.007437,-0.002478,-0.000000,0.000845,0.000831,0.000520,0.000223,0.000050};
Cutoff -800Hz
float b_kai2[31]={0.000000,-0.000138,-0.000611,-0.001345,-0.001607,-0.000000,0.004714,
0.012033,0.018287,0.016731,0.000000,-0.035687,-0.086763,-0.141588,-0.184011,0.800005,
IMPLEMENTATION OF AN FIR FILTER :
-0.184011,-0.141588,-0.086763,-0.035687,0.000000,0.016731,0.018287,0.012033,0.004714,
-0.000000,-0.001607,-0.001345,-0.000611,-0.000138,0.000000};
ALGORITHM TO IMPLEMENT :
WeCutoff -1200Hz
need to realize an advance FIR filter by implementing its difference equation as per
float
the b_kai3[31]={-0.000050,-0.000138,0.000198,0.001345,0.002212,-0.000000,-0.006489,
specifications. A direct form I implementation approach is taken. (The filter
-0.012033,-0.005942,0.016731,0.041539,0.035687,-0.028191,-0.141589,-0.253270,0.700008,
coefficients are taken as ai as generated by the Matlab program.)
-0.253270,-0.141589,-0.028191,0.035687,0.041539,0.016731,-0.005942,-0.012033,-0.006489,
-0.000000,0.002212,0.001345,0.000198,-0.000138,-0.000050};
•
•
Cutoff -400Hz
float b_rect1[31]={0.021665,0.022076,0.020224,0.015918,0.009129,-0.000000,-0.011158,
-0.023877,-0.037558,-0.051511,-0.064994,-0.077266,-0.087636,-0.095507,-.100422,0.918834,
-0.100422,-0.095507,-0.087636,-0.077266,-0.064994,-0.051511,-0.037558,-0.023877,
-0.011158,-0.000000,0.009129,0.015918,0.020224,0.022076,0.021665};
Cutoff -800Hz
float b_rect2[31]={0.000000,-0.013457,-0.023448,-0.025402,-0.017127,-0.000000,0.020933,
0.038103,0.043547,0.031399,0.000000,-0.047098,-0.101609,-0.152414,-0.188394,0.805541,
-0.188394,-0.152414,-0.101609,-0.047098,0.000000,0.031399,0.043547,0.038103,0.020933,
-0.000000,-0.017127,-0.025402,-0.023448,-0.013457,0.000000};
Cutoff -1200Hz
float b_rect3[31]={-0.020798,-0.013098,0.007416,0.024725,0.022944,-0.000000,-0.028043,
-0.037087,-0.013772,0.030562,0.062393,0.045842,-0.032134,-0.148349,-0.252386,0.686050,
-0.252386,-0.148349,-0.032134,0.045842,0.062393,0.030562,-0.013772,-0.037087,-0.028043,
-0.000000,0.022944,0.024725,0.007416,-0.013098,-0.020798};
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Digital Signal Processing Lab
Cutoff -800Hz
float b_tri2[31]={0.000000,-0.000897,-0.003126,-0.005080,-0.004567,-0.000000,0.008373,
0.017782,0.023225,0.018839,0.000000,-0.034539,-0.081287,-0.132092,-0.175834,0.805541,
-0.175834,-0.132092,-0.081287,-0.034539,0.000000,0.018839,0.023225,0.017782,0.008373,
-0.000000,-0.004567,-0.005080,-0.003126,-0.000897,0.000000};
Cutoff -1200Hz
float b_tri3[31]={0.000000,-0.000901,0.001021,0.005105,0.006317,-0.000000,-0.011581,
-0.017868,-0.007583,0.018931,0.042944,0.034707,-0.026541,-0.132736,-0.243196,0.708287,
-0.243196,-0.132736,-0.026541,0.034707,0.042944,0.018931,-0.007583,-0.017868,-0.011581,
-0.000000,0.006317,0.005105,0.001021,-0.000901,0.000000};
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Digital Signal Processing Lab
Start
Start
Start
Initialize the DSP Board.
Initialize Counter = 0
Initialize Output = 0 , i =
0
Output += coeff[N-
i]*val[i]
Shift the input value by
one
No
Is the loop
Cnt =
order
fir.c
#include "filtercfg.h"
#include "dsk6713.h"
#include "dsk6713_aic23.h"
DSK6713_AIC23_Config config = {\
0x0017, /* 0 DSK6713_AIC23_LEFTINVOL Leftline input channel volume */\
0x0017, /* 1 DSK6713_AIC23_RIGHTINVOL Right line input channel volume*/\
0x00d8, /* 2 DSK6713_AIC23_LEFTHPVOL Left channel headphone volume */\
0x00d8, /* 3 DSK6713_AIC23_RIGHTHPVOL Right channel headphone volume */\
0x0011, /* 4 DSK6713_AIC23_ANAPATH Analog audio path control */\
0x0000, /* 5 DSK6713_AIC23_DIGPATH Digital audio path control */\
0x0000, /* 6 DSK6713_AIC23_POWERDOWN Power down control */\
0x0043, /* 7 DSK6713_AIC23_DIGIF Digital audio interface format */\
0x0081, /* 8 DSK6713_AIC23_SAMPLERATE Sample rate control */\
0x0001 /* 9 DSK6713_AIC23_DIGACT Digital interface activation */ \
};
/*
* main() - Main code routine, initializes BSL and generates tone
*/
void main()
{
DSK6713_AIC23_CodecHandle hCodec;
DSK6713_AIC23_setFreq(hCodec, 1);
while(1)
{ /* Read a sample to the left channel */
while (!DSK6713_AIC23_read(hCodec, &l_input));
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Digital Signal Processing Lab
l_output=(Int16)FIR_FILTER(&filter_Coeff ,l_input);
r_output=l_output;
for(i=30;i>0;i--)
in_buffer[i] = in_buffer[i-1]; /* shuffle the buffer */
for(i=0;i<32;i++)
output = output + h[i] * in_buffer[i];
return(output);
PROCEDURE :
#include "dsk6713.h"
#include "dsk6713_aic23.h"
void main()
{
DSK6713_AIC23_CodecHandle hCodec;
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Digital Signal Processing Lab
while(1)
{
/* Read a sample to the left channel */
while (!DSK6713_AIC23_read(hCodec, &l_input));
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Digital Signal Processing Lab
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Digital Signal Processing Lab
Software: 1.CCStudio
2. Matlab2008a version
2. Function generator
Theory:
GENERAL CONSIDERATIONS:
In the design of frequency – selective filters, the desired filter characteristics are
specified in the frequency domain in terms of the desired magnitude and phase response
of the filter. In the filter design process, we determine the coefficients of a causal IIR
filter that closely approximates the desired frequency response specifications.
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Digital Signal Processing Lab
UNIT OBJECTIVE:
The aim of this laboratory exercise is to design and implement a Digital IIR Filter
& observe its frequency response. In this experiment we design a simple IIR filter so as
to stop or attenuate required band of frequencies components and pass the frequency
components which are outside the required band.
BACKGROUND CONCEPTS:
EQUIPMENTS NEEDED:
ALGORITHM TO IMPLEMENT:
We need to realize the Butter worth band pass IIR filter by implementing the difference
equation y[n] = b0x[n] + b1x[n-1]+b2x[n-2]-a1y[n-1]-a2y[n-2] where b0 – b2, a0-a2 are feed
forward and feedback word coefficients respectively [Assume 2nd order of filter].These
coefficients are calculated using MATLAB.A direct form I implementation approach is
taken.
• Step 1 - Initialize the McBSP, the DSP board and the on board codec.
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Digital Signal Processing Lab
• Step 2 - Initialize the discrete time system , that is , specify the initial conditions.
Generally zero initial conditions are assumed.
• Step 3 - Take sampled data from codec while input is fed to DSP kit from the signal
generator. Since Codec is stereo , take average of input data read from left and right
channel . Store sampled data at a memory location.
• Step 4 - Perform filter operation using above said difference equation and store
filter Output at a memory location .
• Step 5 - Output the value to codec (left channel and right channel) and view the
output at Oscilloscope.
• Step 6 - Go to step 3.
Start
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Digital Signal Processing Lab
Do y[-3] = y[-2],y[-2]=y[-1]
and Y[-1] = output .
x[-3] = x[-2], x[-2]=x[-1] output = x[0]b0+x[-1]b1+
x[-2]b2 - y[-1]a1 - y[-2]a2
x[-1]=x[0]
Stop
F.1 : Flowchart for implementing IIR filter.
order = 2;
cf=[2500/12000,8000/12000,1600/12000];
fid=fopen('IIR_LP_BW.txt','wt');
fprintf(fid,'\t\t-----------Pass band range: 0-2500Hz----------\n');
fprintf(fid,'\t\t-----------Magnitude response: Monotonic-----\n\n\');
fprintf(fid,'\n float num_bw1[9]={');
fprintf(fid,'%f,%f,%f,%f,%f,\n%f,%f,%f,%f};\n',num_bw1);
fprintf(fid,'\nfloat den_bw1[9]={');
fprintf(fid,'%f,%f,%f,%f,%f,\n%f,%f,%f,%f};\n',den_bw1);
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Digital Signal Processing Lab
fprintf(fid,'\nfloat den_bw2[9]={');
fprintf(fid,'%f,%f,%f,%f,%f,\n%f,%f,%f,%f};\n',den_bw2);
fclose(fid);
winopen('IIR_LP_BW.txt');
fid=fopen('IIR_LP_CHEB Type1.txt','wt');
fprintf(fid,'\t\t-----------Pass band range: 2500Hz----------\n');
fprintf(fid,'\t\t-----------Magnitude response: Rippled (3dB) -----\n\n\');
fprintf(fid,'\nfloat num_cb1[9]={');
fprintf(fid,'%f,%f,%f,%f,%f,\n%f,%f,%f,%f};\n',num_cb1);
fprintf(fid,'\nfloat den_cb1[9]={');
fprintf(fid,'%f,%f,%f,%f,%f,\n%f,%f,%f,%f};\n',den_cb1);
fprintf(fid,'\n\n\n\t\t-----------Pass band range: 8000Hz----------\n');
fprintf(fid,'\t\t-----------Magnitude response: Rippled (3dB)-----\n\n');
fprintf(fid,'\nfloat num_cb2[9]={');
fprintf(fid,'%f,%f,%f,%f,%f,\n%f,%f,%f,%f};\n',num_cb2);
fprintf(fid,'\nfloat den_cb2[9]={');
fprintf(fid,'%f,%f,%f,%f,%f,\n%f,%f,%f,%f};\n',den_cb2);
fclose(fid);
winopen('IIR_LP_CHEB Type1.txt');
%%%%%%%%%%%%%%%%%%
figure(1);
[h,w]=freqz(num_bw1,den_bw1);
w=(w/max(w))*12000;
plot(w,20*log10(abs(h)),'linewidth',2)
hold on
[h,w]=freqz(num_cb1,den_cb1);
w=(w/max(w))*12000;
plot(w,20*log10(abs(h)),'linewidth',2,'color','r')
grid on
legend('Butterworth','Chebyshev Type-1');
xlabel('Frequency in Hertz');
ylabel('Magnitude in Decibels');
title('Magnitude response of Low pass IIR filters (Fc=2500Hz)');
figure(2);
[h,w]=freqz(num_bw2,den_bw2);
w=(w/max(w))*12000;
plot(w,20*log10(abs(h)),'linewidth',2)
hold on
[h,w]=freqz(num_cb2,den_cb2);
w=(w/max(w))*12000;
plot(w,20*log10(abs(h)),'linewidth',2,'color','r')
grid on
legend('Butterworth','Chebyshev Type-1 (Ripple: 3dB)');
xlabel('Frequency in Hertz');
ylabel('Magnitude in Decibels');
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Digital Signal Processing Lab
Note: We have Multiplied Floating Point Values with 32767(215) to get Fixed Point Values.
Note: We have Multiplied Floating Point Values with 32767(215) to get Fixed Point Values.
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Digital Signal Processing Lab
Note: We have Multiplied Floating Point Values with 32767(215) to get Fixed Point Values.
Note: We have Multiplied Floating Point Values with 32767(215) to get Fixed Point Values.
#include "filtercfg.h"
#include "dsk6713.h"
#include "dsk6713_aic23.h"
/*
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Digital Signal Processing Lab
DSK6713_AIC23_setFreq(hCodec, 3);
while(1)
{ /* Read a sample to the left channel */
while (!DSK6713_AIC23_read(hCodec, &l_input));
l_output=IIR_FILTER(&filter_Coeff ,l_input);
r_output=l_output;
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Digital Signal Processing Lab
return (temp<<2);
}
PROCEDURE:
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Digital Signal Processing Lab
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Theory:
Twiddle Factor
In the Definition of the DFT, there is a factor called the Twiddle Factor
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Digital Signal Processing Lab
Note that
If you look at the equation for the Discrete Fourier Transform you will see that it
is quite complicated to work out as it involves many additions and multiplications
involving complex numbers. Even a simple eight sample signal would require 49
complex multiplications and 56 complex additions to work out the DFT. At this level it is
still manageable, however a realistic signal could have 1024 samples which requires over
20,000,000 complex multiplications and additions. As you can see the number of
calculations required soon mounts up to unmanageable proportions.
The Fast Fourier Transform is a simply a method of laying out the computation, which is
much faster for large values of N, where N is the number of samples in the sequence. It is
an ingenious way of achieving rather than the DFT's clumsy P^2 timing.
The idea behind the FFT is the divide and conquer approach, to break up the original N
point sample into two (N / 2) sequences. This is because a series of smaller problems is
easier to solve than one large one. The DFT requires (N-1)^2 complex multiplications
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Digital Signal Processing Lab
and N(N-1) complex additions as opposed to the FFT's approach of breaking it down into
a series of 2 point samples which only require 1 multiplication and 2 additions and the
recombination of the points which is minimal.
For example Seismic Data contains hundreds of thousands of samples and would take
months to evaluate the DFT. Therefore we use the FFT.
FFT Algorithm
The FFT has a fairly easy algorithm to implement, and it is shown step by step in the
list below. Thjis version of the FFT is the Decimation in Time Method
1. Pad input sequence, of N samples, with Zero’s until the number of samples is the
nearest power of two.
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Digital Signal Processing Lab
6. Until the all the samples combine into one N-sample DFT
Shuffled Inputs
The process of decimating the signal in the time domain has caused the INPUT samples
to be re-ordered. For an 8 point signal the original order of the samples is
0, 1, 2, 3, 4, 5, 6, 7
0, 4, 2, 6, 1, 5, 3, 7
At first it may look as if there is no order to this new sequence, BUT if the numbers are
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Digital Signal Processing Lab
What has happened is that the bit patterns representing the sample number has been
reversed. This new sequence is the order that the samples enter the FFT.
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Digital Signal Processing Lab
#include <math.h>
#define PTS 64 //# of points for FFT
#define PI 3.14159265358979
main()
{
for (i = 0 ; i<PTS ; i++) // set up twiddle constants in w
{
w[i].real = cos(2*PI*i/(PTS*2.0)); //Re component of twiddle constants
w[i].imag =-sin(2*PI*i/(PTS*2.0)); //Im component of twiddle constants
}
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Digital Signal Processing Lab
} //end of main
fft.c:
do
{
num_stages +=1;
i = i*2;
}while (i!=N);
leg_diff = N/2; //difference between upper&lower legs
step = (PTS*2)/N; //step between values in twiddle.h
for (i = 0;i < num_stages; i++) //for N-point FFT
{
index = 0;
for (j = 0; j < leg_diff; j++)
{
for (upper_leg = j; upper_leg < N; upper_leg += (2*leg_diff))
{
lower_leg = upper_leg+leg_diff;
temp1.real = (Y[upper_leg]).real + (Y[lower_leg]).real;
temp1.imag = (Y[upper_leg]).imag + (Y[lower_leg]).imag;
temp2.real = (Y[upper_leg]).real - (Y[lower_leg]).real;
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Digital Signal Processing Lab
if (i<j)
{
temp1.real = (Y[j]).real;
temp1.imag = (Y[j]).imag;
(Y[j]).real = (Y[i]).real;
(Y[j]).imag = (Y[i]).imag;
(Y[i]).real = temp1.real;
(Y[i]).imag = temp1.imag;
}
}
return;
}
Input:
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Output:
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HOW TO PROCEED
Open Code Composer Studio, make sure the DSP kit is turned on.
Add the source files “FFT256.c“ and “FFT.C” in the project using
‘Projectadd files to project’ pull down menu.
Load the program in program memory of DSP chip using the ‘File-load program’
pull down menu.
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Digital Signal Processing Lab
7. POWER SPECTRUM
Aim: To verify the power spectrum using DSP processor.
Software: CCStudio
Theory:
The total or the average power in a signal is often not of as great an interest. We
are most often interested in the PSD or the Power Spectrum. We often want to see is how
the input power has been redistributed by the channel and in this frequency-based
redistribution of power is where most of the interesting information lies. The total area
under the Power Spectrum or PSD is equal to the total avg. power of the signal. The PSD
is an even function of frequency or in other words
To compute PSD:
The value of the auto-correlation function at zero-time equals the total power in the
signal. To compute PSD We compute the auto-correlation of the signal and then take its
FFT. The auto-correlation function and PSD are a Fourier transform pair. (Another
estimation method called “period gram” uses sampled FFT to compute the PSD.)
1 N
=lim
N→
∞
+∑
( ) (x n x)n
N n =1
τ
1
2π ∫
R (τ) = ω
−1
FT (S =
( )) ωS ( ω
)e d jω
τ
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Digital Signal Processing Lab
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PSD.c:
/*************************************************************
* FILENAME
* Non_real_time_PSD.c
* DESCRIPTION
* Program to Compute Non real time PSD
* using the TMS320C6711 DSK.
***************************************************************
* DESCRIPTION
* Number of points for FFT (PTS)
* x --> Sine Wave Co-Efficients
* iobuffer --> Out put of Auto Correlation.
* x1 --> use in graph window to view PSD
/*===========================================================*/
#include <math.h>
#define PTS 128 //# of points for FFT
#define PI 3.14159265358979
main()
{
float j,sum=0.0 ;
int n,k,i,a;
for (i = 0 ; i<PTS ; i++) // set up twiddle constants in w
{
w[i].real = cos(2*PI*i/(PTS*2.0));
/*Re component of twiddle constants*/
w[i].imag =-sin(2*PI*i/(PTS*2.0));
/*Im component of twiddle constants*/
}
for(i=0,j=0;i<PTS;i++)
{ x[i] = sin(2*PI*5*i/PTS);
// Signal x(Fs)=sin(2*pi*f*i/Fs);
samples[i].real=0.0;
samples[i].imag=0.0;
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Digital Signal Processing Lab
for(n=0;n<PTS;n++)
{
sum=0;
for(k=0;k<PTS-n;k++)
{
sum=sum+(x[k]*x[n+k]); // Auto Correlation R(t)
}
iobuffer[n] = sum;
}
} //end of main
FFT.c:
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}
}
return;
}
HOW TO PROCEED
Open Code Composer Studio, make sure the DSP kit is turned on.
Add the source files “PSD.c“ and “FFT.c” in the project using
‘Projectadd files to project’ pull down menu.
Load the program in program memory of DSP chip using the ‘File-load program’
pull down menu.
OUT PUT:
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Digital Signal Processing Lab
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Aim:
Write a MATLAB program to generate sinusoidal signals.
Program:
t=0: .01:pi;
y=sin(2*pi*t);
subplot(2,1,1);
plot (t,y);
ylabel('amplitude-------->');
xlabel('(a)n------->');
Procedure:
1.Open the Matlab 7.0.
2.Go to the new open M-file and write the code.
3.Save the code and viewrun
4.Observe the waveforms.
OUTPUT:
Sine wave:
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Digital Signal Processing Lab
Aim:
Write a MATLAB program to generate cosine signal.
Program:
t=0:.01:pi;
y=cos(2*pi*t);
subplot(2,1,2);
plot(t,y);
ylabel('amplitude----->');
xlabel('(b)n-------->');
OUTPUT:
Cosine wave:
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Digital Signal Processing Lab
Theory:
A continuous-time signal x(t) is said to be periodic with period T if it satisfy the
condition
A signal is periodic if the above condition is not satisfied for at least one value of T.
The smallest value of T that satisfy the above condition is known as fundamental period.
f0 = w
2Π
X (t+T) = x(t)
wT = 2Π
T = 2Π
w
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Digital Signal Processing Lab
Program:
clc;
clear all;
close all;
t=0: .2:10;
x1=(4/pi)*sin(t);
subplot(2,2,1);
plot(t,x1);
title('4/pi sint');
x2=(4/pi)*1/3*sin(3*t);
xa=x1+x2;
subplot(2,2,2);
plot(t,xa);
title('(4/pi)sint+(4/3pi)sin3t');
x3=(4/pi)*1/5*sin(5*t);
xb=x1+x2+x3;
subplot(2,2,3);
plot(t,xb);
title('(4/pi)sint+(4/3pi)sin3t+(4/5pi)sin5t');
x4=4/pi*1/7*sin(7*t);
xc=x1+x2+x3+x4;
subplot(2,2,4);
plot(t,xc);
title('(4/pi)sint+(4/3pi)sin3t+(4/5pi)sin5t+(4/7pi)sin7t');
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Digital Signal Processing Lab
OUTPUT:
Sine waves:
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Digital Signal Processing Lab
Software: MatlabR2008a
Theory:
Butterworth filter:
1
The typical prototype is the low-pass filter, which can be modified into a high-pass
filter, or placed in series with others to form band-pass and band-stop filters, and higher
order versions of these.
The gain G(ω) of an n-order Butterworth low pass filter is given in terms of the transfer
function H(s) as:
where
• n = order of filter
• ωc = cutoff frequency (approximately the -3dB frequency)
• G0 is the DC gain (gain at zero frequency)
It can be seen that as n approaches infinity, the gain becomes a rectangle function and
frequencies below ωc will be passed with gain G0, while frequencies above ωc will be
suppressed. For smaller values of n, the cutoff will be less sharp.
We wish to determine the transfer function H(s) where s = σ + jω. Since H(s)H(-s)
evaluated at s = jω is simply equal to |H(jω)|2, it follows that:
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Digital Signal Processing Lab
and hence,
These are the most common Chebyshev filters. The gain (amplitude) response as
a function of angular frequency ω of the nth order low pass filter is
where ε is the ripple factor, ω0 is the cutoff frequency and Tn() is a Chebyshev polynomial
of the nth order.
The passband exhibits equiripple behavior, with the ripple determined by the ripple factor
ε. In the passband, the Chebyshev polynomial alternates between 0 and 1 so the filter gain
will alternate between maxima at G=1 and minima at . At the cutoff
frequency ω0 the gain again has the value but continues to drop into the stop
band as the frequency increases. This behavior is shown in the diagram on the right.
(note: the common definition of the cutoff frequency to −3 dB does not hold for
Chebyshev filters!)
The order of a Chebyshev filter is equal to the number of reactive components (for
example, inductors) needed to realize the filter using analog electronics.
Ripple in dB =
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Digital Signal Processing Lab
Gain and group delay of a fifth order type I Chebyshev filter with ε=0.5.
The group delay is defined as the derivative of the phase with respect to angular
frequency and is a measure of the distortion in the signal introduced by phase differences
for different frequencies.
The gain and the group delay for a fifth order type I Chebyshev filter with ε=0.5
are plotted in the graph on the left. It can be seen that there are ripples in the gain and the
group delay in the passband but not in the stop band
Also known as inverse Chebyshev, this type is less common because it does not
roll off as fast as type I, and requires more components. It has no ripple in the passband,
but does have equiripple in the stopband. The gain is:
In the stop band, the Chebyshev polynomial will oscillate between 0 and 1 so that the
gain will oscillate between zero and
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Digital Signal Processing Lab
and the smallest frequency at which this maximum is attained will be the cutoff
frequency ω0. The parameter ε is thus related to the stopband attenuation γ in decibels by:
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Digital Signal Processing Lab
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Digital Signal Processing Lab
100
0
gain in db
-100
-200
-300
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
normalised frequency
4
phase in radians
-2
-4
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
normalised frequency
Result: The Program has been written that designs the Butterworth lowpass filter
for the given specifications
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Digital Signal Processing Lab
m=20*log10(abs(h));
an=angle(h);
subplot(2,1,1); plot(ph/pi,m);grid;
ylabel('gain in db');xlabel('normalised frequency');
subplot(2,1,2);plot(ph/pi,an);grid;
xlabel('normalised frequency');
ylabel('phase in radians');
[b,a]=cheby1(n,alphap,wn)
-100
gain in db
-200
-300
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
normalised frequency
4
phase in radians
-2
-4
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
normalised frequency
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Digital Signal Processing Lab
Program:
50
0
gain in db
-50
-100
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
normalised frequency
4
phase in radians
-2
-4
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
normalised frequency
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Digital Signal Processing Lab
Aim:
MATLAB program to generate FIR filter (LP/HP) using Rectangular windowing
technique.
Program:
clear all;
N=25;
alpha=(N-1)/2;
n=0:1:N-1;
hd=cos(pi*(n-alpha))./(n-alpha);
hd(alpha+1)=0;
wr=Boxcar(N);
hn=hd.*wr';
w=0:.01:pi;
h=freqz(hn,1,w);
plot(w/pi,abs(h));
hold on
wh=hanning(N);
hn=hd.*wh';
w=0:.01:pi;
h=freqz(hn,1,w);
plot(w/pi,abs(h),'-.');
ylabel('magnitude');
xlabel('normalized frequency');
hold off
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OUTPUT:
Waveform:
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Digital Signal Processing Lab
Aim:
MATLAB program to generate FIR filter (LP/HP) using Hamming windowing
technique.
Program:
clear all;
wc=.5*pi;
N=25;
b=fir1(N,wc/pi,hamming(N+1));
w=0:.01:pi;
h=freqz(b,1,w);
plot(w/pi,abs(h));
hold on
b=fir1(N,wc/pi,blackman(N+1));
w=0:.01:pi;
h=freqz(b,1,w);
plot(w/pi,abs(h),'-.');
ylabel('magnitude');
xlabel('normalized frequency');
hold off
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OUTPUT:
Waveform:
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Digital Signal Processing Lab
Aim:
Program:
clear all;
wc=.5*pi;
N=25;
b=fir1(N,wc/pi,kaiser(N+1,.5));
w=0:.01:pi;
h=freqz(b,1,w);
plot(w/pi,20*log10(abs(h)));
hold on
b=fir1(N,wc/pi,kaiser(N+1,3.5));
w=0:.01:pi;
h=freqz(b,1,w);
plot(w/pi,20*log10(abs(h)),'-.');
hold on
b=fir1(N,wc/pi,kaiser(N+1,8.5));
w=0:.01:pi;
h=freqz(b,1,w);
plot(w/pi,20*log10(abs(h)));
ylabel('magnitude in db');
xlabel('normalized frequency');
hold off
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OUTPUT:
Waveform:
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Digital Signal Processing Lab
Program:
clc;
clear all;
close all;
x=[0,1,2,3,4,5,6,7];
n=8;
y=fft(x,n);
stem(y);
ylabel('imaginary axis');
xlabel('real axis');
title('FAST FOURIER TRANSFORM');
Input:
x(n) = { 1,2,3,4,4,3,2,1}.
Output:
X (k) = {20,-5.828-j2.414,0,-0.172-j0.414,0,-0.172+j0.414,0,-5.828+j2.414}.
OUTPUT:
Waveform:
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Digital Signal Processing Lab
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