Earth Leakage Detector KA2803: Description

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Earth Leakage Detector

KA2803
Description
The KA2803 is designed for use in earth leakage circuit interrupters,
for operation directly off the AC line in breakers. The input of the
differential amplifier is connected to the secondary coil of Zero
Current Transformer (ZCT). The amplified output of differential
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amplifier is integrated at external capacitor to gain adequate time
delay. The level comparator generates a high level when earth leakage
current is greater than the fixed level.

Features 8
• Low Power Consumption: 5 mW, 100 V/200 V
1
• Built-in Voltage Regulator
• High-gain Differential Amplifier SOIC8 PDIP−8
CASE 751EB CASE 626−05
• 0.4 mA Output Current Pulse to Trigger SCRs
• Low External Part Count
MARKING DIAGRAM
• SOP Package, High Packing Density
• High Noise Immunity, Large Surge Margin
• Super Temperature Characteristic of Input Sensitivity
• Wide Operating Temperature Range: $Y&Z&2&K $Y&Z&2&K
TA=−25°C to +80°C for KA2803B and KA2803BDTF 2803X KA2803B
TA = −25°C to +100°C for KA2803CDTF
• Operation from 12 V to 20 V Input

Functions
• Differential Amplifier $Y = ON Semiconductor Logo
&Z = Assembly Plant Code
• Level Comparator &2 = Data Code (Year & Week)
• Latch Circuit &K = Lot
KA2803B or 2803X = Specific Device Code
X = B or C

ORDERING INFORMATION
See detailed ordering and shipping information on page 10 of
this data sheet.

© Semiconductor Components Industries, LLC, 2016 1 Publication Order Number:


August, 2020 − Rev. 7 KA2803/D
KA2803

BLOCK DIAGRAM

Figure 1. Block Diagram

PIN CONFIGURATION

VR 1 8 VCC

VI 2 7 OS

GND 33 6
3 NR

OD 4 5 SC

Figure 2. Pin Assignment

PIN DESCRIPTION
Pin No. Name Description
1 VR Non inverting input for current sensing amplifier
2 VI Inverting Input for current sensing amplifier
3 GND Ground
4 OD Output of current sensing amplifier
5 SC Input of latch circuit
6 NR Noise absorption

7 OS Gate drive for external SCR


8 VCC Power supply input for KA2803 circuitry

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KA2803

APPLICATION CIRCUITS

Figure 3. Full-wave Application Circuit Figure 4. Half-wave Application Circuit

APPLICATION INFORMATION
(Refer to full-wave application circuit in Figure 3)

Figure 3 shows the KA2803 connected in a typical (KA2803). The range of RP is from several hundred W to
leakage current detector system. The power is applied to the several kW.
VCC terminal (Pin 8) directly from the power line. The Capacitor C1 is for the noise canceller and a standard value
resistor RS and capacitor CS are chosen so that Pin 8 voltage of C1 is 0.047 mF. Capacitor C2 is also a noise canceller
is at least 12 V. The value of CS is recommended above 1 mF. capacitance, but it is not usually used.
If the leakage current is at the load, it is detected by the When high noise is present, a 0.047 mF capacitor may be
Zero Current Transformer (ZCT). The output voltage signal connected between Pins 6 and 7. The amplified signal finally
of ZCT is amplified by the differential amplifier of the appears at the Pin 7 with pulse signal through the internal
KA2803 internal circuit and appears as a half-cycle sine latch circuit of the KA2803. This signal drives the gate of the
wave signal referred to input signal at the output of the external SCR, which energizes the trip coil, which opens the
amplifier. The amplifier closed-loop gain is fixed about circuit breaker. The trip time of the breaker is determined by
1000 times with internal feedback resistor to compensate for capacitor C3 and the mechanism breaker. This capacitor
Zero Current Transformer (ZCT) variations. The resistor RL should be selected under 1 mF to satisfy the required trip
should be selected so that the breaker satisfies the required time. The full-wave bridge supplies power to the KA2803
sensing current. The protection resistor RP is not usually during both the positive and negative half cycles of the line
used when high current is injected at the breaker; this resistor voltage. This allows the hot and neutral lines to be
should be used to protect the earth leakage detector IC interchanged.

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KA2803

ABSOLUTE MAXIMUM RATINGS


Symbol Parameter Min. Max. Unit

VCC Supply Voltage 20 V

ICC Supply Current 8 mA

PD Power Dissipation 300 mW

TL Lead Temperature, Soldering 10 Seconds 260 °C


TA Operation Temperature Range for KA2803B and KA2803BDTF −25 80 °C
Operation Temperature Range for KA2803CDTF −25 +100 °C

TSTG Storage Temperature Range −65 +150 °C


Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.

RECOMMENDED OPERATING CONDITIONS (For KA2803B and KA2803BDTF, TA = −25°C to 80°C unless otherwise noted. For
KA2803CDTF, TA = −25°C to +100°C unless otherwise noted.)

Symbol Parameter Conditions Test Circuit Min. Typ. Max. Units


ICC Supply Current 1 VCC = 12V, TA = −25°C Figure 5 580 mA
VR = OPEN,
VI = 2 V TA = +25°C 300 400 530
TA = +100°C 480
VT Trip Voltage VCC = 16 V, TA = +25°C Figure 6 14 16 18 mV
VR = 2 V~2.02 V, (rms)
VI = 2 V
IO(D) Differential Amplifier VCC = 16 V, TA = +25°C Figure 8 −12 −20 −30 mA
Current Current 1 VR~VI = 30 mV,
VOD = 1.2 V
Differential Amplifier VCC = 16 V, TA = +25°C Figure 9 17 27 37
Current Current 2 VOD = 0.8 V,VR,
VI Short = VP
IO Output Current VSC = 1.4 V, TA= −25°C Figure 10 200 400 800 mA
VOS = 0.8 V,
VCC = 16.0 V TA= +25°C 200 400 800
TA= +100°C 100 300 600
VSCON Latch-On Voltage VCC = 16 V Figure 11 0.7 1.0 1.4 V
ISCON Latch Input Current VCC = 16 V Figure 12 −13 −7 −1 mA
IOSL Output Low Current VCC = 12 V, VOSL = 0.2 V Figure 13 200 800 1400 mA
VIDC Differential Input Clamp VCC = 16 V, IIDC = 100 mA Figure 14 0.4 1.2 2.0 V
Voltage

VSM Maximum Current ISM = 7 mA Figure 15 20 24 28 V


Voltage

IS2 Supply Current 2 VCC = 12.0 V, VOSL = 0.6 V Figure 16 200 400 900 mA
VSOFF Latch-Off Supply Voltage VOS = 12.0 V Figure 17 7 8 9 V
VSC = 1.8 V
IIDC = 100.0 mA
tON Response Time VCC = 16 V, VR−VI = 0.3 V, Figure 18 2 3 4 ms
1 V < VX < 5 V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
1. Guaranteed by design, not tested in production.

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KA2803

TEST CIRCUITS

0.047 mF
0.047 mF

Figure 5. Supply Current 1 Figure 6. Trip Voltage

0.047 mF

Figure 7. VPN1 for VP Measurement Figure 8. Differential Amplifier Output Current 1

0.047 mF

Figure 9. Differential Amplifier Output Current 2 Figure 10. Output Current

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KA2803

TEST CIRCUITS (Continued)

0.047 mF
0.047 mF

Figure 11. Latch-On Voltage Figure 12. Latch Input Current

0.047 mF

0.047 mF
Figure 13. Output Low Current Figure 14. Differential Input Clamp Voltage

0.047 mF
0.047 mF

Figure 15. Maximum Current Voltage Figure 16. Supply Current 2


0.047 mF

0.047 mF

0.047 mF

Figure 17. Latch-Off Supply Voltage Figure 18. Response Time

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KA2803

TYPICAL PERFORMANCE CHARACTERISTICS

Figure 19. Supply Current Figure 20. Differential Amplifier Output Current
(VR − VI = 30 mV, VOD = 1.2 V)

Figure 21. Differential Amplifier Output Current Figure 22. Output Current
(VR, VI = VP, VOD = 0.8 V)

Figure 23. Output Low Current Figure 24. VCC Voltage vs. Supply Current 1

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KA2803

TYPICAL PERFORMANCE CHARACTERISTICS (Continued)

Figure 25. Differential Amplifier Output Current 1 Figure 26. Differential Amplifier Output

Figure 27. Latch Input Current Figure 28. Output Low Current

Figure 29. Output Current Figure 30. VCC Voltage vs. Supply Current 2

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KA2803

TYPICAL PERFORMANCE CHARACTERISTICS (Continued)

Figure 31. Differential Input Clamp Voltage Figure 32. Latch−Off Supply Voltage

Figure 33. Latch−On Input Voltage Figure 34. Maximum Supply

Figure 35. Trip and Output Figure 36. Output Response Time

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KA2803

ORDERING INFORMATION
Part Number Operating Temperature Range Package Shipping†
KA2803CDTF −25 to +100°C 8-lead, Small Outline Package (SOP) 3,000 / Tape& Reel
KA2803B −25 to 80°C 8-lead, Plastic Dual Inline Package (PDIP) 3,000 / Tube
KA2703BDTF −25 to 80°C 8-lead, Small Outline Package (SOP) 3,000 / Tape& Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.

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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

PDIP−8
CASE 626−05
ISSUE P
DATE 22 APR 2015
SCALE 1:1
NOTES:
D A 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
E 2. CONTROLLING DIMENSION: INCHES.
H 3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACK-
AGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3.
8 5
4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH
OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE
E1 NOT TO EXCEED 0.10 INCH.
5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM
PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR
1 4
TO DATUM C.
6. DIMENSION eB IS MEASURED AT THE LEAD TIPS WITH THE
NOTE 8 LEADS UNCONSTRAINED.
c 7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE
b2 B END VIEW LEADS, WHERE THE LEADS EXIT THE BODY.
TOP VIEW WITH LEADS CONSTRAINED 8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE
CORNERS).
NOTE 5
INCHES MILLIMETERS
A2 DIM MIN MAX MIN MAX
e/2 A −−−− 0.210 −−− 5.33
A NOTE 3 A1 0.015 −−−− 0.38 −−−
A2 0.115 0.195 2.92 4.95
L b 0.014 0.022 0.35 0.56
b2 0.060 TYP 1.52 TYP
C 0.008 0.014 0.20 0.36
D 0.355 0.400 9.02 10.16
SEATING
PLANE D1 0.005 −−−− 0.13 −−−
A1 E 0.300 0.325 7.62 8.26
C M E1 0.240 0.280 6.10 7.11
D1 e 0.100 BSC 2.54 BSC
eB −−−− 0.430 −−− 10.92
e eB L 0.115 0.150 2.92 3.81
8X b END VIEW M −−−− 10 ° −−− 10 °
0.010 M C A M B M NOTE 6
SIDE VIEW
GENERIC
MARKING DIAGRAM*
STYLE 1:
PIN 1. AC IN
2. DC + IN XXXXXXXXX
3. DC − IN AWL
4. AC IN
5. GROUND YYWWG
6. OUTPUT
7. AUXILIARY
8. VCC
XXXX = Specific Device Code
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98ASB42420B Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: PDIP−8 PAGE 1 OF 1

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.

© Semiconductor Components Industries, LLC, 2019 www.onsemi.com


MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

SOIC8
CASE 751EB
ISSUE A
DATE 24 AUG 2017

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98AON13735G Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: SOIC8 PAGE 1 OF 1

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.

© Semiconductor Components Industries, LLC, 2019 www.onsemi.com


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