STW19NM60N
STW19NM60N
STW19NM60N
Features
VDS RDS(on)
Order code ID PTOT
(@Tjmax) max.
STW19NM60N 650 V 0.285 Ω 13 A 110 W
Applications
Figure 1. Internal schematic diagram
• Switching applications
$ 4!"
Description
This device is an N-channel Power MOSFET
developed using the second generation of
MDmesh™ technology. This revolutionary Power
' MOSFET associates a vertical structure to the
company’s strip layout to yield one of the world’s
lowest on-resistance and gate charge. It is
therefore suitable for the most demanding high
3 efficiency converters.
!-V
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) ........................... 6
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
1 Electrical ratings
2 Electrical characteristics
Drain-source breakdown
V(BR)DSS ID = 1 mA, VGS= 0 600 V
voltage
Table 5. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
10
ax a r
(o
10µs
DS
m is
by in th
100µs
ite tion
Lim era
d
Op
1ms
1 Tj=150°C
Tc=25°C 10ms
Sinlge
pulse
0.1
0.1 1 10 100 VDS(V)
24 24
6V
20 20
16 16
12 12
5V
8 8
4 4
0 4V 0
0 4 8 12 16 20 VDS(V) 0 2 4 6 8 10 VGS(V)
1000 Ciss 6
100 4
Coss 3
10 2
Crss 1
1 0
0.1 1 10 100 VDS(V) 0 100 200 300 400 500 600 VDS(V)
Figure 10. Normalized gate threshold voltage vs Figure 11. Normalized on-resistance vs
temperature temperature
VGS(th) AM05534v2 AM05535v2
(norm) RDS(on)
ID = 250 µA (norm)
1.0
2.0
0.8
1.5
0.6
1.0
0.4
0.2 0.5
0 0
-50 -25 0 25 50 75 100 125 TJ(°C) -50 -25 0 25 50 75 100 125 TJ(°C)
Figure 12. Normalized VDS vs temperature Figure 13. Source-drain diode forward vs
temperature
AM09028v2 AM14768v1
VDS VSD
(norm)
ID=1mA (V)
1.10 1.4
TJ=-50°C
1.2
1.05
1.0 TJ=25°C
1.00
0.8
0.95
0.6 TJ=150°C
0.90
0.4
0.85 0.2
0.80 0
-50 -25 0 25 50 75 100 125 TJ(°C) 0 2 4 6 8 10 12 ISD(A)
3 Test circuits
Figure 14. Switching times test circuit for Figure 15. Gate charge test circuit
resistive load
VDD
12V 47kΩ
1kΩ
100nF
RL 2200 3.3
μF μF
VDD IG=CONST
VD Vi=20V=VGMAX 100Ω D.U.T.
VGS 2200
RG D.U.T. μF 2.7kΩ VG
PW
47kΩ
PW 1kΩ
AM01468v1 AM01469v1
Figure 16. Test circuit for inductive load Figure 17. Unclamped inductive load test circuit
switching and diode recovery times
L
A A A
D
FAST L=100μH VD
G D.U.T. DIODE 2200 3.3
μF μF VDD
S B 3.3 1000
B B μF μF
25 Ω VDD ID
D
RG S
Vi D.U.T.
Pw
AM01470v1 AM01471v1
Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform
V(BR)DSS ton toff
tr tdoff tf
VD tdon
90% 90%
IDM
10%
ID 10% VDS
0
A 4.85 5.15
A1 2.20 2.60
b 1.0 1.40
b1 2.0 2.40
b2 3.0 3.40
c 0.40 0.80
D 19.85 20.15
E 15.45 15.75
e 5.30 5.45 5.60
L 14.20 14.80
L1 3.70 4.30
L2 18.50
∅P 3.55 3.65
∅R 4.50 5.50
S 5.30 5.50 5.70
0075325_G
5 Revision history
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