360 IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, VOL. 4, NO.

6, DECEMBER 2010

An Inductively Powered Scalable 32-Channel

Wireless Neural Recording System-on-a-Chip
for Neuroscience Applications
Seung Bae Lee, Student Member, IEEE, Hyung-Min Lee, Student Member, IEEE,
Mehdi Kiani, Student Member, IEEE, Uei-Ming Jow, Student Member, IEEE, and
Maysam Ghovanloo, Senior Member, IEEE

Abstract—We present an inductively powered 32-channel wire-

less integrated neural recording (WINeR) system-on-a-chip (SoC)
to be ultimately used for one or more small freely behaving an-
imals. The inductive powering is intended to relieve the animals
from carrying bulky batteries used in other wireless systems, and
enables long recording sessions. The WINeR system uses time-di-
vision multiplexing along with a novel power scheduling method
that reduces the current in unused low-noise amplifiers (LNAs)
to cut the total SoC power consumption. In addition, an on-chip
high-efficiency active rectifier with optimized coils help improve
the overall system power efficiency, which is controlled in a closed
loop to supply stable power to the WINeR regardless of the coil
Fig. 1. Conceptual view of the inductively powered wireless-implantable
displacements. The WINeR SoC has been implemented in a 0.5- neural recording system-on-a-chip (WINeR-6) for long-term neural recording
m standard complementary metal–oxide semiconductor process, from small freely behaving animals [10].
measuring 4.9 3.3 mm2 and consuming 5.85 mW at 1.5 V when
12 out of 32 LNAs are active at any time by power scheduling. Mea-
sured input-referred noise for the entire system, including the re-
ceiver located at 1.2 m, is 4.95 V
rms in the 1 Hz~10 kHz range On the other hand, devices that target neuroscience research
when the system is inductively powered with 7-cm separation be- applications are often used on animal subjects and do not nec-
tween aligned coils. essarily need to be implantable. They are often used to monitor
Index Terms—Implantable microelectronic devices, inductive the interactions among large populations of neurons as the an-
power transmission, neural recording, system-on-a-chip (SoC). imals perform certain tasks that involve processing sensory in-
puts, generating motor control outputs, or some cognitive abili-
ties, such as learning and memory [6]. These devices, however,
I. INTRODUCTION have to compete with sophisticated instruments that are in use
by the neuroscience community [7]. These devices should at
least provide the same quality and quantity of information as
N EURAL interfacing technology can be applied to two
major types of applications: 1) neurological diseases
(clinical) and 2) neuroscience research (laboratory) [1]–[4].
their older counterparts, while resolving some of their limita-
tions, such as hardwired interconnects. The tethering effect of
the wires attached to small behaving animals may affect their
Devices that target the former area, also known as neuropros-
behavior. They also wear out quickly, increase noise, and mo-
theses, substitute sensory or motor functions that might be
tion artifacts, and need costly motorized commutators as part of
lost due to an injury or a disease. These devices need to be
the recording setup.
chronically implantable, safe, and highly reliable to be used
We introduced a wireless integrated neural recording system
in humans as part of a therapeutic paradigm. Size, power
(WINeR-5) in [8] as a substitute for hardwires in recording
consumption, and carrier frequency are highly constrained in
setups from freely moving animals particularly in behavioral
these devices due to the implantation requirement. Cochlear
neuroscience research applications. However, a key limitation
implants and deep brain stimulators (DBSs) are examples of
of the WINeR-5 and many similar wireless neural recording sys-
neuroprostheses with undeniable positive outcomes [5].
tems is the need for the animal subject to carry a large payload
of batteries. This may not matter when recording from costly
Manuscript received June 22, 2010; accepted August 22, 2010. Date of cur- primates [3], [9]. However, most labs use small animals, such
rent version November 24, 2010. This work was supported in part by the Na- as rats and mice, for which there will be a compromise between
tional Institutes of Health, NIBIB under Grant 1R21EB009437-01A1 and in part
by the National Science Foundation under Award ECCS-824199. This paper the size and weight of the headstage and the uninterrupted dura-
was recommended by Associate Editor A. Hamoui. tion of the experiments. The ability to conduct long-term unin-
The authors are with the GT-Bionics Lab, School of Electrical and Computer terrupted recording is very attractive to neuroscientists because
Engineering at the Georgia Institute of Technology, Atlanta, GA 30308 USA the neural population under analysis often changes over time.
(e-mail: [email protected]).
Color versions of one or more of the figures in this paper are available online Therefore, overnight recording is needed to track neurons over
at http://ieeexplore.ieee.org. an extended period of time for learning studies, or for combining
Digital Object Identifier 10.1109/TBCAS.2010.2078814 experimental trials across consecutive days [4].
1932-4545/$26.00 © 2010 IEEE
LEE et al.: INDUCTIVELY POWERED SCALABLE 32-CHANNEL WIRELESS NEURAL RECORDING SOC 361

Fig. 2. WINeR-6 system block diagram with its key new features highlighted: 1) LNA power scheduling, 2) improved RF transmitter, 3) inductive powering, and
4) closed-loop power control [10].

Here, we present a closed-loop inductively powered wire- Therefore, every frame of the PWM signal at the output of
less integrated neural recording system-on-a-chip (WINeR-6) the TDM block consists of 36 pulses, which pass through a
for neuroscience research applications, which can simultane- PWM mask to improve their timing accuracy (see Section III-E)
ously record from 32 channels for an unlimited period of time and drive a tunable voltage-controlled oscillator (VCO) that op-
without losing any piece of information. This is the full-length erates around 915 MHz. The VCO upconverts the baseband
version of a short paper that was presented at ISSCC’10 [10]. PWM-TDM signal by frequency-shift keying (FSK) and, fi-
Fig. 1 shows a conceptual view of the WINeR-6 system which nally, the PWM-TDM-FSK signal at the output of the VCO
employs two independent wireless links in the industrial-scien- is RF amplified and transmitted through a miniature wideband
tific-medical (ISM) band at 915 MHz and 13.56 MHz for wire- monopole antenna.
less neural recording and inductive powering, respectively. The The custom-designed external wideband receiver, which is
WINeR-6 SoC architecture has been described in Section II. The shown on the right side of Fig. 2 and a yellow box in Fig. 1,
system operation has been divided into the neural signal flow RF amplifies and downconverts the received PWM-TDM- FSK
and the inductive power flow, which are covered in Sections III signal to a baseband PWM-TDM. This signal is then fed into a
and IV, respectively. An extensive set of simulation and mea- time-to-digital converter (TDC), which has been implemented
surement results is presented in Section V, followed by the con- on a field-programmable gate array (FPGA) [12]. The result is
cluding remarks. a series of digitized samples from the recorded neural signals,
which are sent to a PC through its universal-serial-bus () port to
be demultiplexed into individual waveforms before further dig-
II. WINER-6 ARCHITECTURE
ital signal processing, storage, and visualization in the BCI2000
The current WINeR-6 system prototype consists of three key environment [13].
components: 1) a 32-channel transmitter application-specific in- The WINeR-6 system has four important new features com-
tegrated circuit (ASIC) that is integrated on a chip, 2) a custom pared to its predecessor (WINeR-5): 1) LNA power scheduling;
designed wideband receiver unit (Rx), and 3) a wireless power 2) an improved RF transmitter; 3) inductive powering; and 4)
transmitter unit (Reader). Fig. 2 shows the complete WINeR-6 closed-loop power control, which are highlighted in Fig. 2 and
system block diagram. Extracellular neural activity is picked up explained in more detail in the following sections.
by a microelectrode array (MEA), which can be either microma- Our prior experience with WINeR-5 showed that although
chined or an equally spaced bundle of sharpened microwires. each LNA consumes a small amount of current, since there are
An array of two-stage low-noise amplifiers (LNA) magnifies 32 of them on-chip, the LNA block quickly becomes one of the
the neural signals by a gain of up to 8000 [11]. An array of major power consumers of the WINeR SoC. To address this
high-speed comparators compares the amplified neural signals issue, we have employed a power-scheduling mechanism that
with a precision triangular waveform to sample and convert their puts most of the LNAs that are not being sampled in sleep mode
amplitudes to time segments in a step well known as pulsewidth with very low power consumption. This is explained in more
modulation (PWM) or analog-to-time conversion (ATC) [12]. detail in Section III-D. In WINeR-6, we have added a class-AB
The next stage is a time-division multiplexer (TDM), which se- RF power amplifier (PA) after the VCO in order to extend the
rializes the PWM samples and combines them with four mon- transmission range, improve the signal-to-noise ratio (SNR) at
itoring signals: half of the rectifier output ( ), bandgap the receiver input, and stabilize the VCO operation by blocking
reference voltage ( ), a temperature-dependent voltage ( ), reflections and backscattering from the antenna. The external
and the negative supply rail ( ). adaptive power transmitter, which is shown on the lower left
362 IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, VOL. 4, NO. 6, DECEMBER 2010

Fig. 3. Schematic diagram of the WINeR-6 analog front end. (a) Two-stage
LNA. (b) OTA1. (c) OTA2.

corner of Fig. 2, and a green box in Fig. 1 drives a geomet-

Fig. 4. Schematic diagram of the triangular waveform generator (TWG) block.
rically optimized hexagonal coil that induces power at 13.56
MHz in a receiver LC-tank circuit that is embedded in the animal
headstage [14]. The induced power is sent to an on-chip active
full-wave rectifier that is followed by a low dropout regulator.
Thanks to the closed-loop power control mechanism, WINeR-6
is expected to maintain the power delivered to the headstage at a
constant level even when the distance or alignment between the
transmitter and receiver coils change due to animal movements
[15], [16].

III. NEURAL SIGNAL FLOW

A. Low-Noise Amplifiers (LNAs)

Extracellular neural signals that are picked up by the MEA
have amplitude levels in the 50–500 V range, a bandwidth
of 0.1 Hz to 10 kHz, and large dc components due to elec-
trode-electrolyte half-cell potentials [3]. The WINeR-6 analog
front end has been designed accordingly, using two-stage capac-
itively coupled LNAs with built-in tunable bandpass filtering.
The schematic diagram of the LNA is shown in Fig. 3. The
first-stage LNA is a fully differential operational transconduc-
tance amplifier (OTA1), shown in Fig. 3(b), with a midband gain
of 100. is the common-mode voltage usually Fig. 5. Block diagram and timing diagram of the power scheduling mechanism.
tied to ground, and is the reference voltage from the an- The OTAs in the LNA block are switched between active (BW = 10 kHz) and
sleep (BW = 200 Hz) modes by changing their bias currents.
imal reference electrode. Turning OTA1 completely off when it
is not in use in order to reduce power consumption results in a
long transient to allow charge build up in its capacitors before
it retains its normal operation. To reduce this transient time, we changes from 8.6 to 2.8 A when the LNA is switched from the
simply change the OTA1 bandwidth from its nominal value at 10 active to sleep modes, and vice-versa (controlled by En2).
kHz when the current consumption is 16 A ( ) and Achieving low-cutoff frequency in the sub-hertz range with
the LNA is in the active mode to 200 Hz when the current con- a small footprint on the chip is a challenge for LNA designers.
sumption is A( ), and the LNA is in sleep Many have used subthreshold-biased MOS resistors or diode-
mode (also see Section III-D and Fig. 5). The second stage of connected MOS resistors to achieve high resistance ( )
the LNA (OTA2), shown in Fig. 3(c), has an adjustable gain of and ultra low cutoff frequencies [17]–[19]. However, in these
either 20 or 80 for a total designs, the MOS resistance highly depends on the input and
LNA gain of 2000 or 8000 (66/78 dB). The current in OTA2 also output voltages, causing distortion when large signals appear at
LEE et al.: INDUCTIVELY POWERED SCALABLE 32-CHANNEL WIRELESS NEURAL RECORDING SOC 363

the output. This is not uncommon, particularly at the output of

OTA2 in the presence of local field potentials (LFP), which are
inband neural signals from large populations of neurons firing
in sync, and creating low-frequency signals with relatively large
amplitudes.
To solve this problem, both stages of the LNA in Fig. 3(a)
are equipped with voltage-controlled PMOS-NMOS pseudo
resistors to create a low-cutoff frequency
that can be continuously tuned by and , as
presented in [11]. transistors are biased with
floating bias circuitry so that they can operate as a bidirectional
current source. Hence, the impedance seen from either end of
the remains constant and almost independent
of the OTA input and output voltages, causing less distortion.

B. Pulsewidth Modulator and 36:1 Time-Division Multiplexer

As shown in Fig. 2, conditioned neural signals at the 32 LNA
outputs join four monitoring signals: , , , and
at the input of the PWM-TDM block. These 36 analog sig-
nals are fed into the PWM block, which consists of 36 rail-to-rail
high-speed comparators, enabled one at a time over one sam-
pling period, to convert the analog signals from each channel
into a sequence of pulses by comparing them with a precision
triangular waveform (TW). To reduce noise and dynamic power
dissipation, WINeR-6 does not use any high frequency clock
signal. Instead, it uses a low-frequency clock at the sampling
rate for TDM, which is generated locally by the triangular wave-
form generator (TWG) block. As a result during each compar-
ison, the substrate is entirely quiet and there is no digital transi-
tion anywhere on the chip. Monitoring signals also play a second
role by providing a unique pattern that is used for synchroniza-
tion between the WINeR-6 transmitter and external receiver by
Fig. 6. (a) Schematic diagram of the PWM mask circuit. (b) PWM mask wave-
marking the beginning of each TDM-PWM 36-pulse frame to forms.
be easily detected on the receiver side.
The TDM block consists of a 36-b circular shift register
(CSR) and a 36:1 multiplexer (MUX) as shown in Fig. 5. nodes to turn the CCSS on and off, while consuming negligible
The CSR receives a buffered time-base signal at the sampling static power.
rate from the TWG block, shown in Fig. 4 for its clock. At
the global reset, the CSR is loaded with a 36-b binary code D. Power Scheduling
“ ,” in which the number of “1”s is programmable
Although each individual LNA consumes only 25 A,
( ). When the system is running, the string of “1”s circulates
the 32-channel LNA block is responsible for 42% of the
in the CSR and connects one out of 36 comparator PWM pulses
total WINeR-6 power consumption when all channels are
(the last “1”) to the MUX output. The resulting signal will be
active. Unfortunately, this situation only gets exacerbated
a 36-pulse TDM-PWM frame, which is buffered and trimmed
with an increased number of channels. On the other hand, the
before being fed into the VCO. The architecture shown in Fig. 2
TDM-PWM block, described in Section III-B, only samples
significantly facilitates the extension of the WINeR-6 system
one LNA at a time. To address this issue, we have employed a
from 32 to 64 or 128 channels.
power scheduling mechanism, depicted in Fig. 5, which puts
most of the LNAs that are not being sampled in the sleep mode,
C. Triangular Waveform Generator (TWG)
where their power consumption reduces by 86% to A.
Precision TWG, shown in Fig. 4, is a key building block in The LNAs are not completely turned off to reduce the tran-
accurate ATC. Its performance affects noise, accuracy, and reso- sient time for a dormant LNA to reach its active state well
lution of the system, as described in [12]. The TWG consists of a ahead of the sampling time to track the neural signals with high
binary weighted ( and ), high-voltage compliance bandwidth and low distortion (10 kHz). Since cannot be re-
( 1.4 V), large output impedance, complementary cur- duced down to zero, the number of LNAs that should be acti-
rent source/sink (CCSS) pair, which linearly charges/discharges vated ahead of sampling, , depend on the overall sampling rate
(6 pF) to generate the triangular wave [8], [20]. Unlike , which, in turn, depends on the desired neural signal band-
common designs that need at least two comparators, our new width (i.e., ). In our design, is programmable by
TWG design utilizes only one comparator to reduce power con- SR0:2, which can change the number of consecutive “1”s in the
sumption and the negative effects of offset mismatch. CSR from 4 to 32. For example, when 12, twelve consec-
and are dynamic, current limited, bias generator blocks. utive “1”s circulate in the CSR and each LNA is switched to the
They provide fast switching waveforms at specific dc biasing active mode 11 times the sampling period , before being
364 IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, VOL. 4, NO. 6, DECEMBER 2010

Fig. 8. Block diagram of the custom-designed external wideband receiver.

Fig. 7. WINeR-6 neural signal-flow diagram with emphasis on the transmitter

SoC.
G. Custom-Designed Wideband Receiver and BCI2000
The external custom-designed wideband receiver in the
WINeR-6 system is responsible for amplifying the received
sampled. In this case, LNAs remain in the sleep mode during RF signal, downconverting it, FSK demodulating it back to
the rest of the sampling periods ( ) and result in more than the baseband TDM-PWM signal, digitizing the PWM samples
51% reduction in power consumption of the LNA block. taken from the neural signals, and sending this information to
a PC for demultiplexing, storage, visualization, and real-time
E. PWM Mask or offline processing. The receiver block diagram is shown in
Fig. 8, where the key blocks are: RF front end, FSK demod-
Fig. 6(a) shows the schematic of the PWM mask that is ulator, TDC, continuous high-data-rate USB interface, and
responsible for enforcing minimum and maximum PWM real-time graphic user interface (GUI). In the RF front end, the
pulsewidths. This circuit reduces the wireless-link bandwidth received FSK-TDM- PWM carrier is amplified and bandpass
requirements and increases the system accuracy by avoiding filtered by a wideband RF LNA and a surface-acoustic-wave
high and low PWM pulses that are too narrow. In addition, it (SAW) filter, respectively. A mixer downconverts the carrier
synchronizes the PWM signal at the falling edges of or . signal from RF to intermediate frequencies (IF), and power
Fig. 6(b) shows the PWM mask operation and its associated stabilizes it within 0.5 dB by its automatic gain controller
signals. PWM is the signal before trimming and synchroniza- (AGC). The IF-TDM- PWM is then rectified and low-pass
tion, and , , , and are generated by the TWG block filtered with selectable receiver bandwidths ( 9/18/36
in Fig. 4. are user-defined digital inputs. When MHz) to recover the baseband TDM-PWM signal. The rising
00, the PWM mask output will be synchronized with the falling and falling edges of the TDM-PWM signal are sharpened by a
edge of (PWM1), with maximum and minimum pulsewidths high-speed comparator to improve the timing accuracy [12].
of and , respectively. When 01, the output of An FPGA-based TDC with 308-ps time resolution converts
the PWM mask will be synchronized with the falling edge of the TDM-PWM pulses into a series of 16-b digitized samples. It
(PWM2), with maximum and minimum pulsewidths of also buffers them through 2-MB SDRAM to maintain the conti-
and , respectively. Finally, when 10 or 11, nuity of the signal despite data-transfer delays, and sends them
the PWM mask is bypassed (i.e., ). to a PC via its 2.0 port for visualization, storage, and further
processing [22]. In the PC, continuous real-time data demon-
stration was performed in the BCI2000 environment, which is
F. Voltage-Controlled Oscillator and Power Amplifier general-purpose open-source software for brain–computer in-
The WINeR-6 RF transmitter consists of a VCO with terfacing (BCI) research applications [13].
an off-chip inductor followed by a PA, as shown in Fig. 7.
Animal movements in the shielded Faraday cage resulted in IV. INDUCTIVE POWER FLOW
undesired VCO frequency shifts in WINeR-5 due to changes Key components that are responsible for inductively pow-
in the antenna loading and reflected RF signal. To prevent ering the WINeR-6 system are similar to those used in
this, a nonlinear class-AB PA is used to not only reduce the radio-frequency-identification (RFID) systems: inductive
frequency-shift problem but also help with the transmitter power transmitter, inductive link, and the transponding por-
output matching with miniature 50- antennas, and extend the tion of the WINeR-6 SoC, as shown in Fig. 9. On the power
transmission range. A complementary negative-Gm structure transmitter side, which can also be referred to as the reader or
is used for the VCO core due to its low power and superior interrogator, a power amplifier drives the primary coil ( ) at
phase-noise performance [21]. Coarse and fine VCO tunings the power carrier frequency of 13.56 MHz. We chose
are performed with the choice of an off-chip inductor and a 4-b this frequency, which is closer to the higher end of the 1~20
on-chip varactor bank (VC0:3), respectively. The VCO varac- MHz acceptable range for implantable microelectronic devices
tors are PMOS transistors, in which the gates are connected (IMD), to enhance the quality factor of the coils , which
to the VCO outputs, bulks are tied to , and sources and improves the power transfer efficiency. Another reason was to
drains are tied together and connected to either the varactor take advantage of the commercial off-the-shelf (COTS) devices
bank control signals (VC0:3) for center frequency tuning or the that are available for RFID applications for building the reader.
TDM-PWM signal to generate the FSK signal. In order to fine The power carrier is induced on to the secondary coil ( ),
tune the transmitter frequency, VC0:3 is accessible to the user. and generates ac voltage across the transponder resonance cir-
Once the VCO frequency is adjusted in the desired band, the cuit ( and ). Following the tank, there is a full-
external receiver can be tuned to the transmitter frequency. wave rectifier and a low dropout regulator to generate and
LEE et al.: INDUCTIVELY POWERED SCALABLE 32-CHANNEL WIRELESS NEURAL RECORDING SOC 365

Fig. 9. Inductive closed-loop power-flow diagram.

supply lines, respectively, for the rest of the WINeR-6 SoC. To

implement efficient and robust inductive power flow, the fol-
lowing techniques were employed: 1) full-wave active rectifica-
tion using high-speed comparators to improve the power conver-
sion efficiency (PCE), 2) closed-loop power control to maintain
the supply voltage constant despite the coils’ coupling varia-
tions, and 3) an optimized coil design to maximize the power
transmission through the inductive link.

A. Full-Wave Active Rectifier

The performance of the rectifier is key to the overall power
efficiency of this system because all of the usable received
power for the WINeR-6 SoC has to pass through this block.
Achieving a high PCE is generally important in inductively Fig. 10. Schematic diagram of the power-efficient full-wave active rectifier.
powered IMDs because it allows them to operate with smaller
induced power from a longer distance, lowering the heat dis-
sipation on both sides of the inductive link, which can cause shown in Fig. 9, which is a necessary safety feature for situa-
tissue damage if it results in temperature rise beyond safe tions in which the rectifier input signal has grown too large as
limits [23]. We utilized a full-wave active rectifier, shown in a result of the coils being too close or the load current being
Fig. 10, which is equipped with offset-controlled high-speed too small. The overvoltage protection circuit compares
comparators ( and ) that provide high PCE at with 1.1 V, and if 4.4 V, closes a switch that
a high frequency (13.56 MHz). The offset-control function adds a 120-pF off-chip capacitor in parallel with . This will
in these comparators compensates for turn-on and turn-off detune the tank and reduce the rectifier input voltage, and
delays in operating the main rectifying switches ( and ) consequently reduce to the safe limits without heat dissi-
and closes or opens them precisely when or pation that often results from voltage clamping methods.
, respectively. As a result, the rectifier conducts
for the maximum possible period of time and delivers maximum B. Closed-Loop Power Control Mechanism
forward current to the load, while minimizing the back current. The heart of the external power transmitter in Fig. 9 is a COTS
The comparator has a common-gate input stage (see further 13.56-MHz RFID reader (MLX90121) from Melexis (Concord,
details in [24]), in which the two comparator input voltages NH). It drives a class-C PA that is added to increase the RFID
are also used as supply voltages. Hence, the sinusoidal input maximum output power from 200 mW to 1 W. The PA supply
voltage ( ) guarantees that the rectifier reliably starts up voltage has been used to control its output power through a
even before the rectifier output voltage ( ) is sufficiently Darlington-connected BJT pair for closed-loop power control
charged up. In addition, the rectifying transistor sizes were [26]. The reader adjusts the transmitted power by monitoring
optimized for minimizing their and switching losses at , which is one of the four monitoring signals that are
the rectifier operating frequency (13.56 MHz) by detailed PCE added to each PWM-TDM frame (see Section II) and fed back
analysis [24], [25]. to the external receiver. The idea is to oppose any undesired vari-
In addition, the rectifier block has a built-in back telemetry ations in due to changes in the coils’ coupling coefficient
mechanism, using short-coil switches and that can be , resulting from animal movements or load variations, due to
utilized for reverse data communication with the reader in order changing for example.
to establish a closed-loop control mechanism for wireless power A control unit, which consists of an MSP430, an 8-b DAC,
transmission (see Section IV-B). WINeR-6 SoC has also been and the Darlington pair, as shown in Fig. 9, adjusts the trans-
equipped with a detuning-based overvoltage protection circuit, mitted power with an adjustable step size, until reaches
366 IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, VOL. 4, NO. 6, DECEMBER 2010

The inductance model for a solenoid can be found from [29]

(3)

(4)

where is the mutual inductance from (5) between turn

and turn , is the self inductance of turn , and and
are the diameters of the conductor and a single turn of the
solenoid, respectively. Maxwell equations are used for deriving
between a pair of parallel single-turn circular coils at radii
and from

Fig. 11. (a) Simplified model of the inductive link with lumped circuit com- (5)
ponents. (b) More detailed modeling of the primary PSC at the bottom of the
cage and the secondary solenoid, embedded in the headstage, using the HFSS
commercial field solver. where is the relative coupling distance between the two coils
and is the lateral misalignment [29], [30]. and are the
Bessel functions of the zeroth and first order, respectively.
its nominal value. Therefore, in steady state, the control unit Since the received power decreases when the coupling dis-
adjusts the transmitted power to ensure that a constant amount tance increases, the coil geometries should be optimized for the
of power is being delivered to the WINeR-6 SoC, and worst case conditions to maintain minimum–received power at
is maintained around 3.2 V. In the presence of a disturbance, all times. However, considering all possible worst case scenarios
often in the form of a change in the coils relative distance, align- that can arise from animal movements, such as when the animal
ment, or rotation, deviates from its nominal value, and the turns its head or stands on its hindlimbs, requires a very com-
control unit counter inside MSP430, which is driven by a 100 plicated analysis, which is out of the scope of this paper. There-
Hz clock, counts up or down based on the received value fore, we have optimized the coil geometries for a much simpler
to bring back to 3.2 V. In this implementation, the dig- condition when the nominal coupling distance between the pri-
ital-to-analog converter (DAC) in the power-control loop can mary PSC and the headstage, mounted on top of a rat’s head is
change the PA supply voltage from 2 V to 12 V in 256 steps. 7 cm. The idea is that any further misalignments or changes
in the coils’ separation will be compensated by the closed-loop
power control mechanism (see Section IV-B). With these as-
C. Optimized Coil Design sumptions and the above models, the optimal geometry of the
A simplified model of the inductive power transmission link coils can be found by following the iterative design method-
is shown in Fig. 11(a). is the primary with a hexagonal planar ology that was described in [14]. In this method, although the
spiral coil (PSC) geometry, which is placed at the bottom of a closed-form theoretical models in (1)–(5) provide a quick esti-
small cage. is going to be another PSC or a solenoid-type mate of the suitable coil geometries, more accurate models are
secondary coil that is wound around the animal headstage (see utilized in a commercial field solver, HFSS (Ansoft, Pittsburgh,
Fig. 1). All windings have distributed parasitic resistance and PA), to fine tune the optimal coil designs. Fig. 11(b) shows an
capacitance associated with them, which are shown as lumped example of these models.
elements , , , and in Fig. 11(a). and
are additional capacitors that are added to the circuit to form a V. SIMULATION AND MEASUREMENT RESULTS
pair of resonance LC-tank circuits with and , respectively,
and represents the loading of the WINeR-6 SoC. The values WINeR-6 SoC was fabricated in the ON Semiconductor
of these lumped elements are dependent on the coils’ geometry 0.5- m 3-metal 2-poly standard CMOS process. Fig. 12 shows
and material properties. For instance, the inductance of a PSC the micrograph and floorplanning of the chip, which occupies
from [27] can be found from 4.9 3.3 mm of silicon area, including the padframe.

A. WINeR-6 Bench-Top Characterization

(1)
Fig. 13 shows our bench-top measurement setup, which in-
cludes the WINeR-6 SoC in a 176-pin TQFP package, mounted
(2) on a prototype printed-circuit board (PCB) along with the sec-
ondary coil and a small (17.6 mm) 916-MHz antenna (Antenna
where is the number of turns, and are the outer and inner Factor, Merlin, OR). The setup also includes the hexagonal pri-
diameters of the coil, respectively, , and mary coil, connected to the reader box, as well as the external
is a parameter known as the fill factor. Detailed modeling of the receiver box, connected via to a laptop PC that runs the BCI2000
parasitic capacitance ( ) and resistance ( ) of PSCs has GUI. The two coils were aligned at 7 cm separation. The
been discussed in [14] and [28]. supply voltage of the class-C power amplifier, inside the reader
LEE et al.: INDUCTIVELY POWERED SCALABLE 32-CHANNEL WIRELESS NEURAL RECORDING SOC 367

Fig. 14. Simultaneous 32-ch bench-top wireless recording with inductively

powered WINeR-6 system at 1 m Tx-Rx distance (BCI2000 GUI).
Fig. 12. Die photomicrograph of the 32-ch WINeR-6 SoC, implemented in the
2
ON semiconductor 0.5-m 3M2P std. CMOS process (size: 4.9 3.3 mm ).

filter) was 8 kHz at full-scale tail current. The fully differential

design of the LNA leads to 62.7-dB power-supply rejection ratio
(PSRR) and 134-dB common-mode rejection ratio (CMRR) in
simulations, with a measured input-referred noise of 4.39
in 0.1 Hz–10 kHz when the system was battery powered.
The sampling frequency was adjustable in 225 steps from
58 kHz to 709 kHz using and digital inputs.
The FSK modulation index of the RF carrier was adjustable by
one bit. Therefore, the RF FSK carrier frequency of the appli-
cation-spcific integrated circuit (ASIC) could be set to either
915/845.5 MHz or 915/877.5 MHz. The RF transmitter output
power could reach 22 dBm with proper matching, in which
case the Tx-Rx antenna distance could be as far as 3.3 m with in-
ductive powering. Even though WINeR-6 does not transmit any
digital bit per se, considering its transmitter power consumption
of 3.3 mW, sampling rate of 680 kS/s, and system resolution
Fig. 13. Bench-top measurement setup (relative positions are changed to fit all of 8 b, the equivalent energy per bit for its wireless data link
components in the image). can be calculated as 607 pJ/b. The maximum rectifier PCE was
measured to be 80.2%, and the aligned coils’ separation could
be increased up to 12 cm. Table I summarizes the measured key
box, was gradually increased by the closed-loop system until specifications of the WINeR-6 system, and Table II benchmarks
on the WINeR-6 SoC reached its nominal value at 3.2 V. its performance against the state of the art.
The FSK-TDM-PWM RF carrier signal was picked up at 1
m away from the WINeR-6 SoC by a 26.2-cm receiver antenna B. Load-Pull Measurements
that was designed for the 824~960 MHz band. The receiver For nonlinear large signal devices, such as class-AB PAs, in
amplified and downconverted the RF carrier to the 40/58 MHz which the operating point can change with the power level, con-
IF-FSK-TDM-PWM, and rectified and filtered it to achieve a ducting load-pull and source-pull measurements are necessary
baseband TDM-PWM signal with 18-MHz bandwidth. It was to find the optimum load and source impedances for transferring
then translated to transistor-transistor-logic (TTL) levels by a the maximum amount of RF power from source to load. We con-
fast comparator and sent to the FPGA-based TDC for digitiza- ducted load-pull measurements to find the optimum load, con-
tion. The 16-b digitized samples were buffered, packetized, and sidering the parasitic effects of the bond wires, IC package, and
sent to the PC through as a stream of data, where the BCI2000 PCB, while trying to keep the power consumption at its min-
GUI demultiplexed them, stored them on the hard disk, and imum level. The load-pull measurement setup has been shown
displayed them on the PC screen, as shown in Fig. 14. The in the form of a block diagram in Fig. 15(a), in which the source
32-channel simultaneously recorded signals in Fig. 14 are wire- tuner was set to a fixed position, and load power was measured
lessly recorded when Ch1~7, Ch15, and Ch32 were grounded, at a variety of randomly located load impedance points ( ).
Ch8~14 received sinusoidal waveforms of at 600 WINeR-6 SoC was supplied by a bias generating system, which
Hz, and Ch16~31 received attenuated artificial ECG signals at was controlled by a PC. The class-AB PA output ( ) was
120 Hz. also connected to the load tuner. Fig. 15(b) shows the selected
The first and second stages of the front-end LNA have mea- random points and constant output power contours in 1-dB
sured gains of 40 dB and 27.8/38 dB, respectively. The lower steps on the Smith chart. The load-pull measurements showed
cutoff frequency (i.e., high-pass filter) was continuously tunable that the maximum output power at a certain bias point is 21.7
from 0.1 Hz to 1 kHz. The higher cutoff frequency (i.e., low-pass dBm when the load impedance is . The matching
368 IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, VOL. 4, NO. 6, DECEMBER 2010

TABLE II
WINER-6 BENCHMARKING

TABLE I
SUMMARY OF WINER-6 SYSTEM SPECIFICATIONS

Fig. 15. (a) Source and load-pull measurement setup. (b) Load-pull measure-
ment results on the Smith chart.

WINeR-6 consumes 7.05 mW from 1.5-V supplies. On the

other hand, when 12 LNAs are on ( 12) at a time and the
other 20 are in the sleep mode by power scheduling, power con-
sumption drops by 17% to 5.85 mW. From a different perspec-
tive, depicted in Fig. 16, with power scheduling, the share of
the LNA block power consumption in the total power consump-
tion reduces from 34% to 20%. Obviously, this power saving
circuit following the PA was then designed to convert the 50- becomes even more significant by decreasing . However, if
antenna to this optimum loading. , LNA outputs will be sampled before they reach
their operational values, and that may cause distortion.
C. Power Scheduling Measurements In order to evaluate the effect of power scheduling on the
WINeR-6 power consumption with and without power sched- quality of the recorded signals, we applied artificial spikes with
uling has been compared in Fig. 16. When all LNAs are active, 0.5-mV amplitude and 1-ms pulsewidth to the LNAs inputs, and
LEE et al.: INDUCTIVELY POWERED SCALABLE 32-CHANNEL WIRELESS NEURAL RECORDING SOC 369

Fig. 16. Comparison between the power consumption of each block in

WINeR-6 SoC as the percentage of the total power with and without power
scheduling, which results in 17% reduction in the total power consumption. (a)
Without power scheduling 7.05 mW. (b) With power scheduling of 5.85 mW.

Fig. 18. (a) Measured waveforms showing the constant rectifier (V = 3.2
V) and regulator (V = 3 V) outputs when the coils’ relative distance varies
from 2.5 cm to 6 cm, and back to 2.5 cm. (b) Measured V versus the rotation
=
angle of L with respect to L at d 3 cm.

as well as the PA supply voltage on the reader side (purple).

When 2.5 cm, the PA supply is 7 V, 3.2 V, and
3 V. In about 600 ms after the beginning of the trace,
is suddenly changed to 6 cm, which results in the reduction
of . In the meantime, the closed-loop system monitors the
reduction in and starts increasing the PA supply voltage
to 10 V to oppose this perturbation and bring back to 3.2
V. The coils are then returned back to their original position at
2.5 cm after 2.4 s, resulting in the PA supply voltage to
return back to 7 V.
The key point here is that during all of these changes, the
regulator voltage was maintained constant at 3 V. Fig. 18(b)
shows the effect of the closed-loop power control on the rotation
Fig. 17. Measured waveforms from the top: Original artificial spike waveform, of with respect to at 3 cm. In this case, it can be seen
zoomed-in spike waveform, recorded waveforms at the LNA output with (blue) that the closed-loop system can tolerate rotations up to 50 with
and without (black) power scheduling, reconstructed signal in the PC. no change in .
E. Noise Measurements and System Resolution
compared the recorded signals with and without power sched- In data-acquisition systems, such as WINeR, the dynamic
uling. Fig. 17 shows the measured waveforms, in which the range of the front-end stage and noise performance of the entire
sampling rate is set to 18 kS/s per channel, and 12. The system affects the system resolution and accuracy [12]. Noise is
upper two waveforms show the LNA inputs. In the third row, the being added to the input signal at every stage along the signal
black trace shows the output signal without using power sched- path in Fig. 2 from the LNA to TDC output. The LNA input-
uling, and the blue trace shows the output signal with power referred noise in the 1 Hz to 10 kHz range was measured to
scheduling. Even though the LNA output seems to be noisy with be 4.08 V and 4.62 V when the system was battery
power scheduling, since the LNA output reaches its operational and inductively powered, respectively. We also measured the
value by the time each sample is taken, the effect of this noise on input-referred noise by directly feeding the PWM-TDM signal
the digitized signal will be negligible. The last row shows the re- to the TDC of the receiver through an isolator and bypassing the
constructed signals from the digitized samples. The correlation RF link. The input-referred noise in this case was 4.18
coefficient between the two reconstructed signals was measured and 4.82 when the system was battery and inductively
to be 0.97, which demonstrates almost a perfect match between powered, respectively. We finally measured the input-referred
the two conditions. noise of the entire 32-channel WINeR-6 system by grounding
all channels and conducting fast Fourier transform (FFT) on
D. Closed-Loop Power Control Measurements the recorded data from all channels for 2 s at 120 cm Tx-Rx
Functionality of the closed-loop induced power was verified separation and 7-cm coil distance. The resulting input-referred
by changing the distance between and . Fig. 18(a) shows noise spectral densities are shown in Fig. 19. Integration of these
(green) and (blue) outputs on the WINeR-6 SoC curves from 1 Hz to 10 kHz resulted in an input-referred noise
370 IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, VOL. 4, NO. 6, DECEMBER 2010

throughput DAQ. Bench-top measurements showed that the

system is fully functional by wirelessly recording 36 signals,
simultaneously, including 32 external sources and 4 internal
monitoring signals, sampled at 680 kS/s with more than 8
b of resolution at 1-m Tx-Rx distance, when WINeR-6 was
inductively powered.

ACKNOWLEDGMENT
The authors would like to thank members of the GT-Bionics
Laboratory for their help with the design and testing of the
WINeR system.

REFERENCES
[1] J. P. Donoghue, “Bridging the brain to the world: A perspective on
neural interface systems,” Neuron, vol. 60, pp. 511–521, Nov. 2008.
[2] R. R. Harrison, R. J. Kier, C. A. Chestek, V. Gilja, P. Nuyujukian, S.
Ryu, B. Greger, F. Solzbacher, and K. V. Shenoy, “Wireless neural
recording with single low-power integrated circuit,” IEEE Trans.
Neural Syst. Rehab. Eng., vol. 17, no. 4, pp. 322–329, Aug. 2009.
[3] A. B. Schwartz, X. T. Cui, D. J. Weber, and D. W. Moran, “Brain-
controlled interfaces: Movement restoration with neural prosthetics,”
Neuron, vol. 52, pp. 205–220, Oct. 2006.
[4] H. Miranda, V. Gilja, C. A. Chestek, K. V. Shenoy, and T. H. Meng,
“HermesD: A high-rate long-range wireless transmission system for
simultaneous multichannel neural recording applications,” IEEE Trans.
Biomed. Circuits Syst., vol. 4, no. 3, pp. 181–191, Jun. 2010.

W channel
[5] A. Avestruz, W. Santa, D. Carlson, R. Jensen, S. Stanslaski, A. Helfen-
Fig. 19. Input-referred noise of the entire WINeR-6 system for two channels, stine, and T. Denison, “A 5  = spectral analysis IC for
when the system is either (a) battery or (b) inductively powered. The Tx-Rx chronic bidirectional brain–machine interfaces,” IEEE J. Solid-State
antenna distance is 120 cm, and the coils separation is about 7 cm. Circuits, vol. 43, no. 12, pp. 3006–3024, Dec. 2008.
[6] J. R. Manns and H. Eichenbaum, “Evolution of declarative memory,”
Hippocampus, vol. 16, no. 9, pp. 795–808, Sep. 2006.
[7] Multichannel acquisition processor. Plexon Inc. [Online]. Available:
of 4.32 and 4.95 on average when WINeR-6 was http://www.plexon.com/products/map.html
[8] M. Yin and M. Ghovanloo, “A flexible 32-channel simultaneous
battery and inductively powered, respectively. Comparing these wireless neural recording system with adjustable resolution,” in Proc.
numbers, we can conclude that the input-referred noise of the Dig. Tech. Papers IEEE Intl. Solid-State Circuits Conf., Feb. 2009, pp.
entire system has been increased by 2.42 V as a result 432–433.
of being inductively powered. This is mainly because of the [9] M. Rizk, C. A. Bossetti, T. A. Jochum, S. H. Callender, M. A.
L. Nicolelis, D. A. Turner, and P. D. Wolf, “A fully implantable
RF link being affected by the higher harmonics of the strong 96-channel neural data acquisition system,” J. Neural Eng., vol. 6, no.
power carrier, shown in the Fig. 7 inset. Also, considering 2.8-V 2, art. 026002, Apr. 2009.
dynamic range at the LNA output and its gain of 2000, the [10] S. B. Lee, H. M. Lee, M. Kiani, U. Jow, and M. Ghovanloo, “An induc-
WINeR-6 system resolution can be estimated to be 8.4 b when tively powered scalable 32-ch wireless neural recording system-on-a-
chip with power scheduling for neuroscience applications,” in Proc.
it is hardwired, and about 8.3 or 8.1 b, when it is wireless and IEEE Intl. Solid State Cir. Conf. Dig. Tech. Papers, Feb. 2010, pp.
battery or inductively operated, respectively. 120–121.
[11] M. Yin and M. Ghovanloo, “A low-noise preamplifier with adjustable
gain and bandwidth for biopotential recording applications,” in Proc.
VI. CONCLUSION IEEE Int. Symp. Circ. Syst., May 2007, pp. 321–324.
[12] M. Yin and M. Ghovanloo, “Using pulse width modulation for wire-
An inductively powered wireless-implantable neural less transmission of neural signals in multichannel neural recording
recording system (WINeR-6), which can simultaneously systems,” IEEE Trans. Neural Syst. Rehab. Eng., vol. 17, no. 4, pp.
354–363, Aug. 2009.
record from 32 channels for an unlimited period of time has [13] BCI2000 Homepage. [Online]. Available: http://www.bci2000.org
been presented. In this system, closed-loop inductive power [14] U. Jow and M. Ghovanloo, “Design and optimization of printed spiral
control with optimal coil designs provides high-power transfer coils for efficient transcutaneous inductive power transmission,” IEEE
efficiency and maintains the received power at the headstage Trans. Biomed. Circuits Syst., vol. 1, no. 3, pp. 193–202, Sep. 2007.
[15] P. Cong, N. Chaimanonart, W. H. Ko, and D. J. Young, “Wireless
despite animal movements. The TDM-PWM-based archi- and batteryless 10-bit implantable blood pressure sensing microsystem
tecture that is used in this system does not need an on-chip with adaptive RF powering for real-time laboratory mice monitoring,”
high-frequency clock and makes it easy to adjust the sampling IEEE J. Solid-State Circuits, vol. 44, no. 12, pp. 3631–3644, Dec. 2009.
rate, dynamic range, and resolution of the system based on [16] M. Kiani and M. Ghovanloo, “An RFID-based closed loop wireless
power transmission system for biomedical applications,” IEEE Trans.
the desired input signals and application. In addition, the total Circuits Syst. II, Exp. Briefs, vol. 57, no. 4, pp. 260–264, Apr. 2010.
power consumption has been reduced using a power scheduling [17] R. R. Harrison and C. Charles, “A low-power low-noise CMOS am-
scheme, which keeps the majority of the LNAs in sleep mode. plifier for neural recording applications,” IEEE J. Solid-State Circuits,
We have also developed all of the external components of the vol. 38, no. 6, pp. 958–965, Jun. 2003.
[18] T. Horiuchi, T. Swindell, D. Sander, and P. Abshire, “A low-power
inductively powered wireless neural recording system including CMOS neural amplifier with amplitude measurements for spike
a wideband receiver, power transmitter (using an RFID reader), sorting,” in Proc. IEEE Int. Symp. Circ. Syst., May 2004, vol. 4, pp.
and computer interfacing hardware/software for real-time high 29–32.
LEE et al.: INDUCTIVELY POWERED SCALABLE 32-CHANNEL WIRELESS NEURAL RECORDING SOC 371

[19] R. H. Olsson, III, M. N. Gulari, and K. D. Wise, “Band tunable and Mr. Lee received the Silver Prize in the 16th Human-Tech Thesis Prize from
multiplexed integrated circuits for simultaneous recording and stimu- Samsung Electronics, Korea, and the Commendation Award in the 4th Out-
lation with microelectrode arrays,” IEEE Trans. Biomed. Eng., vol. 52, standing Student Research Award from TSMC, Taiwan, both in 2010.
no. 7, pp. 1302–1311, Jul. 2005.
[20] M. Ghovanloo and K. Najafi, “A compact large voltage compliance
high output impedance programmable current source for biomedical
implantable microstimulators,” IEEE Trans. Biomed. Eng., vol. 52, no. Mehdi Kiani (S’09) received the B.S. degree at
1, pp. 97–105, Jan. 2005. Shiraz University, Shiraz, Iran, in 2005 and the M.S.
[21] A. Hajimiri and T. H. Lee, “A general theory of phase noise in electrical degree at Sharif University of Technology, Tehran,
oscillators,” IEEE J. Solid-State Circuits, vol. 33, no. 2, pp. 179–194, Iran, in 2008.
Feb. 1998. He joined GT-Bionics Lab at the Georgia Institiute
[22] M. Yin and M. Ghovanloo, “A wideband PWM-FSK receiver for of Technology, Atlanta, in 2009.
wireless implantable neural recording applications,” in Proc. IEEE Int.
Symp. Circuits Syst., May 2008, pp. 1556–1559.
[23] G. Lazzi, “Thermal effects of bioimplants,” IEEE Eng. Med. Biol.
Mag., vol. 24, no. 5, pp. 75–81, Sep./Oct. 2005.
[24] H. Lee and M. Ghovanloo, “An integrated power-efficient active recti-
fier with offset-controlled high speed comparators for inductively-pow-
ered applications,” IEEE Trans. Circuits Syst. I, Reg. Papers, submitted
for publication.
[25] G. Bawa and M. Ghovanloo, “Analysis, design and implementation Uei-Ming Jow (S’07) received the B.E. degree
of a high efficiency fullwave rectifier in standard CMOS technology,” in electrical engineering from Tatung University,
Analog Integr. Circuits Signal Process., vol. 60, pp. 71–81, Aug. 2009. Taiwan, in 1991, the M.S. degree in electronics
[26] M. Kiani and M. Ghovanloo, “A closed loop wireless power transmis- engineering from National Taiwan University of
sion system using a commercial RFID transceiver for biomedical ap- Science and Technology, Taiwan, in 2001, and is
plications,” in Proc. IEEE 31st Eng. Med. Biol. Conf., Sep. 2009, pp. currently pursuing the Ph.D. degree at the Georgia
3841–3844. Institute of Technology, Atlanta.
[27] S. S. Mohan, M. del Mar Hershenson, S. P. Boyd, and T. H. Lee, From 2001 to 2006, he was with the Indus-
“Simple accurate expressions for planar spiral inductances,” IEEE J. trial Technology Research Institute (ITRI), Hsinchu,
Solid-State Circuits, vol. 34, no. 10, pp. 1419–1424, Oct. 1999. Taiwan, working in Electronics Research and Service
[28] Z. Yang, W. Liu, and E. Basham, “Inductor modeling in wireless links Organization as an RF Engineer. He was involved
for implantable electronics,” IEEE Trans. Magn., vol. 43, no. 10, pp. in the analysis and design of electromagnetic compatibility for high-speed
3851–3860, Oct. 2007. digital circuits as well as embedded RF circuits packaging technology. His
[29] C. M. Zierhofer and E. S. Hochmair, “Geometric approach for main research interests are neural and bionic implants, integrated analog circuit
coupling enhancement of magnetically coupled coils,” IEEE Trans. design, and wireless-implantable biomedical systems.
Biomed. Eng., vol. 43, no. 7, pp. 708–714, Jul. 1996.
[30] C. Akyel, S. Babic, and S. Kincic, “New and fast procedures for calcu-
lating the mutual inductance of coaxial circular coils (circular coil-disk
coil),” IEEE Trans. Magn., vol. 38, no. 5, pp. 2367–2369, Sep. 2002. Maysam Ghovanloo (S’00–M’04–SM’10) was born
[31] A. Sodagar, G. Perlin, Y. Yao, K. Najafi, and K. Wise, “An implantable in 1973 in Tehran, Iran. He received the B.S. degree in
64-channel wireless microsystem for single-unit neural recording,” electrical engineering from the University of Tehran,
IEEE J. Solid-State Circuits, vol. 44, no. 9, pp. 2591–2604, Sep. 2009. Tehran, Iran, in 1994, the M.S. degree in biomedical
[32] M. S. Chae, Z. Yang, M. R. Yuce, L. Hoang, and W. Liu, “A 128- engineering from the Amirkabir University of Tech-
channel 6 mW wireless neural recording IC with spike feature extrac- nology, Tehran, Iran, in 1997, and the M.S. and Ph.D.
tion and UWB transmitter,” IEEE Trans. Neural Syst. Rehab. Eng., vol. degrees in electrical engineering from the University
17, no. 4, pp. 312–321, Aug. 2009. of Michigan, Ann Arbor, in 2003 and 2004, respec-
tively
Seung Bae Lee (S’08) received the B.S. degree in From 2004 to 2007, he was an Assistant Professor
electrical engineering from Hanyang University, in the Department of Electrical and Computer Engi-
Seoul, Korea in 2007 and is currently pursuing the neering, North Carolina (NC) State University, Raleigh. In 2007, he joined the
Ph.D. degree at the Georgia Institute of Technology, faculty of Georgia Institute of Technology, Atlanta, where he is currently an As-
Atlanta. sistant Professor and the Founding Director of the GT-Bionics Laboratory in the
He came to the Georgia Institute of Technology School of Electrical and Computer Engineering. He has authored or coauthored
in 2007 and joined the GT-Bionics Lab in 2008. He more than 70 peer-reviewed conference and journal publications.
is working on an ultra-low-power RF receiver for Dr. Ghovanloo is an Associate Editor of the IEEE TRANSACTIONS ON
biomedical and wearable applications as well as a CIRCUITS AND SYSTEMS–II: EXPRESS BRIEFS and a member of the Imagers,
wireless neural recording system. MEMS, Medical, and Displays (IMMD) Subcommittee at the International
Solid-State Circuits Conference (ISSCC). He is the 2010 recipient of a CA-
REER award from the National Science Foundation. He has also received
awards in the 40th and 41st Design Automation Conference (DAC)/ISSCC
Hyung-Min Lee (S’06) received the B.S. degree in Student Design Contest in 2003 and 2004, respectively. He has organized
several special sessions and was a member of Technical Review Committees
electrical engineering (Hons.) from Korea University,
Seoul, Korea, in 2006, the M.S. degree in electrical for major conferences in the areas of circuits, systems, sensors, and biomedical
engineering. He is a member of the Tau Beta Pi, AAAS, Sigma Xi, and the
engineering from Korea Advanced Institute of Sci-
ence and Technology (KAIST), Daejeon, Korea, in IEEE Solid-State Circuits Society, IEEE Circuits and Systems Society, and
IEEE Engineering in Medicine and Biology Society.
2008, and is currently pursuing the Ph.D. degree from
the Georgia Institute of Technology, Atlanta
Since 2009, he has been with the GT-Bionics
Lab in the School of Electrical and Computer Engi-
neering at the Georgia Institute of Technology. His
research interests include analog, mixed-signal, and
power-management integrated circuits for implantable biomedical systems.