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Low-Noise, High-Gain Transimpedance Amplifier Integrated With SiAPD for

Low-Intensity Near-Infrared Light Detection

Article in IEEE Sensors Journal · January 2014

DOI: 10.1109/JSEN.2013.2282624

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258 IEEE SENSORS JOURNAL, VOL. 14, NO. 1, JANUARY 2014

Low-Noise, High-Gain Transimpedance Amplifier

Integrated With SiAPD for Low-Intensity
Near-Infrared Light Detection
Ehsan Kamrani, Member, IEEE, Frederic Lesage, and Mohamad Sawan, Fellow, IEEE

Abstract— A fully integrated near-infrared spectroscopy pho-

toreceiver including two new silicon avalanche photodiodes
(SiAPDs) and a new transimpedance amplifier (TIA) is proposed
in this paper. SiAPDs are designed in p+/n-well structure with
guard-rings realized in different shapes. The TIA front-end has
been designed using distributed-gain concept combined with
resistive-feedback and common-gate topology to reach low-noise,
low-power consumption, high gain-bandwidth product charac-
teristics and it is robust against power-supply variation (1–3 V).
This circuit is developed using 0.35 µm CMOS technology and
the measurement results are compared with other results from Fig. 1. Banana-shaped detected photon path of fNIRS and the block diagram
the literature. The designed rectangular and octagonal SiAPDs of a typical CW- fNIRS Phototransceiver front-end.
have the avalanche gain of 100 and 45 with the breakdown voltage
of 9 and 6 V and the photon absorption efficiency of 45% and
25% at 800 nm. Fabricated TIA offers high-transimpedance gain signal is observed to investigate the brain function (Fig.1). The
(up to 250 MV/A), tunable BW (1√kHz–1 GHz),√ extremely low
input and output noises (100 fA/ Hz, 1.8 µV/ Hz), and low- brain tissue is a highly scattering tissue with high diffusion.
power consumption (0.8 mW). The impact and effects of on-chip However in the NIR region of the electromagnetic spectrum
integration of SiAPD and TIA front-end have been also measured (650nm-950nm), water has relatively low absorption while
and evaluated. oxy- and deoxy-hemoglobin dominate absorption. Lower
Index Terms— Avalanche photodiode, CMOS photoreceiver, absorption and diffusion allow photons to propagate over
medical imaging, fNIRS, transimpedance amplifier. centimeters enabling imaging of brain tissues [2]. Continuous-
wave fNIRS (CW-fNIRS) systems use continuous light to
I. I NTRODUCTION measure the attenuation in amplitude of the incident light.
Relative concentration changes in chromophores can be com-
C LINICAL functional near-infrared spectroreflectometry
(fNIRS) is a non-invasive, minimally intrusive, safe,
and high-temporal resolution imaging technique for real-time
puted according to the Beer–Lambert law. The first interface
with the human body and the main building block of an
fNIRS system is the photo-transceiver front-end. The block
monitoring of the brain function and biological tissues. It is
diagram of a typical CW-fNIRS phototransceiver is depicted in
currently considered as an efficient technique for the evalu-
Fig. 1. It includes NIR light source(s) and detector(s). The light
ation of different neurological diseases, such as stroke and
source is placed on the surface of the head (scalp). In CW sys-
epilepsy seizures that requires continuous monitoring of the
tems they can be either laser or light emitting diodes (LEDs)
patient at the hospital [1]. fNIRS measures information on
that emit NIR light with optical power within a range of 5mW
cerebral oxygenation and blood volume at low-cost. In fNIRS,
to 17mW at discrete wavelengths [3]. Using LEDs increase the
light is injected into the brain tissue and the backscattered
safety and lead to a more cheap and compact instrument to
Manuscript received December 1, 2012; revised April 17, 2013, July be applied for clinical and educational applications [4]. The
23, 2013, and September 1, 2013; accepted September 15, 2013. Date of sensor is a photodetector that monitors the intensity of the
publication September 18, 2013; date of current version November 5, 2013.
This work was supported in part by the Canadian Institutes of Health Research backscattered NIR signal. As the first stage of any optical
and in part by the Heart and Stroke Foundation of Canada. The associate receiver is a photodiode which converts the incident photon
editor coordinating the review of this paper and approving it for publication density into a current signal, the first block of the photoreceiver
was Dr. Shoushun Chen.
E. Kamrani and M. Sawan are with Polystim Neurotechnologies in this case is a TIA. Work is currently being performed in
Laboratories, Electrical Engineering Department, Polytechnique different research groups to improve the performance of NIRS
Montreal, Montreal, QC H3T1J4, Canada (e-mail: [email protected]; system [4], [5]. While fNIRS is compact compared to other
[email protected]).
F. Lesage is with the Optical and Molecular Imaging Laboartory, Electrical brain imaging systems, current commercially available NIRS
Engineering Department, Polytechnique Montreal, Montreal, QC H3T1J4, devices remain too bulky to be wearable or portable. How-
Canada (e-mail: [email protected]). ever some wireless devices have been proposed for portable
Color versions of one or more of the figures in this paper are available
online at http://ieeexplore.ieee.org. near-infrared spectroscopy [2], [6], they are not miniaturized
Digital Object Identifier 10.1109/JSEN.2013.2282624 enough in order to easily be integrated with other medical
1530-437X © 2013 IEEE
KAMRANI et al.: LOW-NOISE, HIGH-GAIN TRANSIMPEDANCE AMPLIFIER INTEGRATED WITH SiAPD 259

imaging systems such as electroencephalogram (EEG) or to limitations so that trade-off between necessary parameters
be used as a wireless and portable device for bedside real- occurs with the cost of losing reliability and performance.
time brain monitoring. So developing a more compact system For example reported variable-gain transimpedance amplifiers
is required for real-time and portable brain imaging using are difficult to stabilize [39], [40]. The key problem with
fNIRS. The main components of fNIRS photodetector front- these designs is that they are based on the traditional two-
end are the photodiode and the amplifier. The photodiode used stage topology consisting of a common-source gain stage
in the photodetector requires being highly sensitive, enabling followed by an output buffer [41], [42]. By combining a
the reliable conversion of the ultra-low amplitude light signal common-gate and resistive-feedback TIA topologies based on
into a detectable electric signal. Conventional photodetectors dynamic-threshold voltage MOSFET (DTMOS), and using
use photon multiplier tubes (PMTs) which are bulky, sensitive distributed gain concept, we have designed an integrated low-
to magnetic fields and require high-voltage supply [7]. Silicon noise, high-gain and low-power photodetector amplifier for
avalanche photodiode (SiAPD) is a candidate for low-level fNIRS imaging. The proposed APDs and their characteristics
light detection in the visible and near-infrared regions due to are presented in section II. In section III the new proposed
its bias dependent internal gain and its ability to amplify the TIA front-end is introduced and the characteristics of the
photogenerated signal by avalanche multiplication [18]. APDs fabricated integrated circuit are presented. Finally the impact
have been commercially available for more than 30 years and characteristics of the integrated APD+TIA are explained
normally with a dedicated process, which do not allow mono- in section IV.
lithic integration with other electronic circuitry [10]. A critical
element for NIRS front-end receiver is to design a low-noise II. CMOS P HOTODETECTOR D ESIGN
and sensitive photodetector to ensure maximum detection of
the reflected NIR light that is strongly attenuated (7-9 orders A. Background and Design Requirements
of magnitude) by the biological tissues. A minimal signal-to- The main design parameters of SiAPD include area, deple-
noise ratio (SNR) of ∼40 dB is needed for NIRS application. tion region thickness, sensitivity, quantum efficiency, SNR,
SiAPDs with dark current in nA range, and the generated fabrication technology and architecture. The SiAPDs fabri-
photocurrent in hundreds of μA range confirms SNR of much cated using dedicated process have two major drawbacks: their
higher than 40dB [3], [9]. But no photodetector with these production cost is too high due to the specialized fabrication
necessary specifications has been reported in the literature yet. process, and it is unfeasible to integrate them with electronic
A miniaturized, low-noise and high-gain CMOS photodiode circuits on the same chip. Optimizing the performance of
with high detection efficiency and low-breakdown voltage is both the CMOS devices and the SiAPD is a non-trivial job.
proposed in this paper using standard CMOS technology. It is To overcome these problems, researchers have investigated
developed using p+/n-well topology with guard-ring realized the design and fabrication of SiAPDs in standard CMOS
by low-doped p-well around p+ active area and low-doped process [22]. The advantages of standard CMOS fabrication
n-ring using relatively low-doped layers available in standard process are: the availability of a fully supported, mature and
0.35μm CMOS technology. reliable technology at reasonably low-cost, and the possibility
In order to design a continuous-wave fNIRS photodetector of developing a complete system on chip with a high degree of
front-end we have introduced several front-ends and reported complexity [9], [22]. The mandatory requirement for SiAPD
their simulated characteristics in [28] as proper candidates fabrication in standard CMOS process is that a suitable subset
to be integrated with the SiAPD on the same chip. The of CMOS fabrication process flow should be able to build a
goal was to develop a compact and cost-effective photo- planar p-n junction without device breakdown at the photodi-
diode and other electronic circuits of a NIRS front-end ode periphery [23]. SiAPD fabricated using standard CMOS
receiver on the same chip using standard CMOS process. In process involves high-doped p or n layer resulting in shallow
recent years, work in this direction has been demonstrated or medium depth depletion region. However, to increase
[10], [11]. There are mainly three Photoreceiver-TIA struc- the use of SiAPD-based front-end receivers for biomedical
tures reported in literature: common-gate TIA, resistive applications, integration of the SiAPD and peripheral circuitry
feedback TIA, and capacitive feedback TIA. Common-gate on the same chip using standard CMOS technology is highly
TIA (CG-TIA), usually used in open-loop topology and desired.
exhibits low-input impedance and high-transimpedance gain, It is challenging to make SiAPDs in standard CMOS
however its input noise current and input bias current are high technology due to lack of special fabrication steps. Several
and its BW is also low. In resistive-feedback TIA (RF-TIA), research groups have fabricated SiAPDs using standard CMOS
the transimpedance gain is high and offers the smallest noise technology [24], [25]. The area and design of the SiAPDs
specially at high frequencies comparing to other structures, but for different CMOS technologies are different which result in
its BW is limited. Capacitive-feedback TIA (CF-TIA) offers a wide range of performance. Photon detection efficiency is
lower noise at low frequencies but it is noisy at higher frequen- better for larger area SiAPDs, but larger area can be more
cies. A common-gate configuration is typically chosen as it can suitably designed using older CMOS technology. Use of older
tolerate a wide range of SiAPD capacitance. However, resistive CMOS technology will increases area and power consumption
feedback architecture has better noise performance and is more for the rest of the electronic circuits of the NIRS front-
attractive when SiAPD models are readily available. Reported end receiver. On the other hand, doping concentration levels
amplifiers for this case [35], [38] are suffering from several in CMOS increases as the technology advances, causing an
260 IEEE SENSORS JOURNAL, VOL. 14, NO. 1, JANUARY 2014

Fig. 2. The cross-sectional view of the proposed APD1 (a) and APD2 (b).
Fig. 3. Device simulation of the APD2 under reverse bias using TCAD.
increase in the peak electric field in the depletion region and
TABLE I
decrease in the breakdown voltage of the diodes. Advanced
E STIMATED C HARACTERISTICS OF THE TSMC CMOS
CMOS technology can yield SiAPDs with low-breakdown
0.35-μm T ECHNOLOGY
voltage ensuring safer operating condition for biomedical
applications [25]. Due to the low-level of detected light in
fNIRS, the area of the photodetector should be large enough
so that it can capture enough optical photon to generate
detectable electric signal. Earlier silicon p-i-n photodiodes
were successfully used for NIRS systems with an active area
of ∼7.5 mm2 [3]. SiAPDs are also commercially available
with comparable active area and are being used in several
NIRS systems (e.g. Hamamatsu C5460-01 device 7 mm2 ).
APD (APD2) is also a p+/n-well APD developed in square
However, these commercial SiAPDs necessitate a dedicated
and octagonal shape (with active area of 100μm×100μm)
fabrication process, and cannot be fabricated on the same
with guard-ring to preventing premature edge breakdown. The
chip with the rest of the front-end circuit. On the other hand,
guard-ring is realized by low-doped p-well around p+ active
the performance of SiAPDs fabricated using standard CMOS
area with 100μm diameter (Fig. 2(b)). Optimization of the
process degrades with area size which limits their active area to
performance of SiAPD is done by device level simulation
0.003 mm2 [3], [9]. Recent progresses in the standard CMOS
using Sentaurus TCAD software. The active junction of the
fabrication process allow producing SiAPDs with active area
photodiode exists between p+ (Na=5×1019/cm3 ) and deep
of up to 0.3 mm2 (∼200 μm diameter) while maintaining
n-well (Nd=1.28×1017/cm3 ). The doping concentrations for
adequate performance. Again, the higher the thickness of
these layers are fixed for 0.35μm CMOS technology. We
depletion region of SiAPD, the better is its photon absorption
created the masks for the SiAPD structure using Ligament
efficiency. However, a thick depletion region increases the
Layout Editor and created an input command file for Ligament
noise of the SiAPD. To ensure reasonable amount of photon
Flow Editor. The input command file emulates the fabrication
absorption (∼70%) in NIR range, it is of primary importance
process and creates the structure and its doping data. The
to design SiAPDs with at least 10 μm thick depletion region
output from Ligament Flow Editor serves as an input for
[3], [22].
Sentaurus Process, which produces doping profile and electric
field distribution of the APD. Fig. 3 shows the electric field
B. New integrated CMOS APD distribution of the APD2 device under reverse bias. Fig. 3 (a)
Here, we propose a new SiAPD structure based on the previ- shows the device simulation of the APD2 structure without
ously proposed structures in [26] and [27] using relatively low- efficient guard-ring. It shows a premature edge breakdown
doped layers available in standard 0.35μm CMOS technology. (high electric field in the periphery of the device), so it will
These APD structures have been simulated and characterized not function as an efficient APD. The avalanche without edge
previously at [3], [28], [29]. However a circular shape is breakdown is shown in Fig. 3 (b). It shows that the maximum
desired for APDs to reduce the possibility of corner breakdown electric field (∼105V/cm) appeared in the active p+-deep
[24], [30], the layout rules for the technology do not allow n-well junction and the device is able to withstand the electric
for a circular shape. Here we have designed the p+/n-well field without breakdown. One of the main difficulties for
SiAPDs with guard-ring in two different square and octagonal optimal CMOS APD design and fabrication is the technolog-
shapes. These provide a trade-off between fill-factor (FF) ical constraints imposed by CMOS chip manufactures (e.g.
and angularity and a feasible way to validate the efficiency AMS, IBM and TSMC). Manufactures do not give out doping
of the applied guard-rings. Schematic of the cross-section profile information for their technologies. Referring to the
and plan view (not to scale) of the first proposed CMOS applied technology layers doping and depth characteristics,
SiAPD (APD1) are depicted in Fig. 2(a). It is a square shape we can point out the weak depths and the high doping values
p+/n-well avalanche photodiode with guard-ring. The guard- applied in the technology. For example Table I shows the main
ring is realized by low-doped n-ring due to n-wells lateral characteristics for TSMC CMOS 0.35-μm technology. The
diffusion [24]. The n-well is splitted into two n-tubs separated general specifications of the developed APDs are shown at
by a small p-sub interval (d≈0.9μm) constituting the guard- Table II. The values which are based on TCAD simulation
ring. We have developed this APD with two different active are somewhat unrealistic. For example in contrast to the
areas of 100μm×100μm and 400μm×400μm. The second gained photon detection efficiency (PDE) values, in general
KAMRANI et al.: LOW-NOISE, HIGH-GAIN TRANSIMPEDANCE AMPLIFIER INTEGRATED WITH SiAPD 261

TABLE II
D ESIGN S PECIFICATIONS OF THE P ROPOSED S I APD S AND C OMPARISON W ITH D IFFERENT SiAPDs

the Photodiodes implemented in standard CMOS will rarely setup used to get these values or the inadequacy of the applied
have peak PDE >70% due to losses in the optical stack, unless device simulation tool. The APD2 showed a significantly lower
using backside illumination and antireflection top coating or current in dark condition comparing to APD1. This can be
adopting a CMOS image sensor [9]. For the measurements, due to the implemented highly doped n-well (deep n-well)
we have coupled a light source through a 1μm fiber optic and in this structure which reduces the substrate leakage noise
illuminated the detector by positioning the fiber on top of the and reduces the dark current. The output impedance of the
APD. The PDE is defined as: SiAPD should be considered for impedance-matching with the
integrated front-end amplifier. The output impedance of APD2
CR − Idark Iph 1.24 × 10−6
P DE = ≈ . (1) under reverse bias was around 0.5 and for the APD1 was
N Pph λ around 600. The capacitance of the photodetector increases
with its area with measured values being 1pF for a 100μm2
where I ph is photocurrent, Pph is the incident optical
SiAPD and 32 pF for 400μm2 SiAPD. The Vbr has been
power and λ is the wavelength of the incident light. PDE
defined as the bias voltage on the reverse I-V characteristic
can be calculated by measuring the count-rate (C R ) at
at which the second derivative of the logarithm of the current
a certain incoming photon rate N = Pλ/hc, where P is
has its maximum. The values found with this method [58], [59]
continuous-wave (CW) optical power focused in a spot in the
correspond to the ones extrapolated from the M-V plot
middle of the APD photosensitive area, λ is the wavelength
(Fig. 4(c)). For APD1 and APD2, the breakdown happened
of the incident light, h is the Planck’s constant, and c is the
at approximately 6V and 9 V respectively. The APD2 with
speed of light. The optical power illuminating the detector
no guard-ring does not have a sharp breakdown profile, indi-
P = P1 × 10(−a/10) is obtained by measuring CW light
cating that edge breakdown is occurring. The APD current is
power (P1 ) with an optical power meter, then attenuating
originated from trap-assisted tunneling, band-to-band tunnel-
the light down to single-photon level with a set of cal-
ing and avalanche impact ionization process respectively, with
ibrated attenuators (variable attenuator and neutral density
increasing reverse bias. In order to operate an APD in Geiger
filters) providing a cumulative attenuation. We remark that
mode the transition between band-to-band tunneling and the
PDE could be further increased slightly by decapsulating
avalanche must be sharp. Small breakdown voltage (<6 V
the APD package, whose entrance window is not antireflec-
for the junction realised on mono-silicon) is more likely due
tion coated [57]. Although the efficiency of the designed
to the tunnelling (Tunnelling or Zener breakdown) instead
APDs verified accurately by simulation, but as we expected
of avalanche breakdown and the more the voltage is raised,
before, there was a discrepancy between the simulated and
the more leakage is due to tunnelling. In order to find out
measured parameters, especially regarding to the PDE, and
if the source of the breakdown is avalanche or it is due to
dark current of the fabricated APDs. This is due to the
the tunnelling (which limits the sensitivity of the APDs), we
inflexibility of the standard CMOS technology regarding to
have measured the breakdown variation in different tempera-
the precise simulation and implementation of the considered
tures. The breakdown voltage of SiAPDs at temperature T is
characteristics. The doping concentrations for layers are fixed
equal to:
for 0.35μm CMOS technology, so implementation of the
Vbr = Vbias [1 + β(T − T0 )] (2)
predefined optimal doping profiles (extracted from analytical
calculation and simulation) is not possible precisely. The other The value of β (temperature coefficient of the breakdown
source of this mismatch can be due to effects of the used voltage) is positive for diodes with avalanche breakdown
bonding pad parasitic capacitance and the passivation layer and negative for diodes with tunnelling breakdown [9], [24].
imposed by fabrication on the performance of the designed The negative value of β shows that the breakdown mechanism
APDs. It also might be due to the limited accuracy of the test of our diode is indeed tunnelling. The Figs. 4(a)-(b) shows
262 IEEE SENSORS JOURNAL, VOL. 14, NO. 1, JANUARY 2014

considered V1=6V, 5V for APD1 and APD2 respectively. The

relationship between multiplication gain and bias voltage of
APD1 (400μm) is depicted in Fig. 4(c). It also compares the
theoretical and experimental relations. It is obvious that the
multiplication gain predicted by Equation 3 is better than one
gained by the experiment. This shows the gain is overestimated
using this formula. Avalanche noise is measured in terms of
excess noise (F). The excess noise with pure hole injection
(Fh ) is equal to:
αn 1 αn
Fh (M) = M + (2 − )(1 − ) (4)
αp M αp
where M is the multiplication factor, αn and α p are the electron
and hole ionization coefficients for the material [31], [32].
This equation has been plotted in Fig. 4(d) and compared
with the experimental values. It shows the noise values are
somehow underestimated using this equation. In table II, the
F@M=20 indicates the noise factor value (F) at specific
multiplication gain of 20 (M=20). For the wavelength specific
applications also the spectral sensitivity of the detector should
be considered. The sensitivity is calculated as the photocurrent
per unit area of the photodiode for a given irradiance. The
sensitivity of a PIN photodiode based optical receiver, as
shown for the proposed APDs in Fig. 4(e), is given by [53]:
Fig. 4. Breakdown voltage variation in different temperatures: The break-
Q λ × Qe
down due to tunneling (a) and avalanche (b). The M-V plot in different temper- S = (qQB + σT ) = × 100 (% ) (5)
atures where T1=–25°C, T2=25°C, T3=75°C (c) and the F-M relationship R 1240
while λ =800nm (d). The spectral sensitivities of APDs (e) and Measured where S is sensitivity (W), Qe is the quantum efficiency, Q is
responsivity as a function of applied reverse bias voltage (f).
desired Q-factor (related to the desired bit error rate or BER),
R is the photodiode responsivity (A/W), q is charge of an
electron (C), B is receiver bandwidth (Hz) and σT is the rms
the breakdown voltage variation with temperatures for differ- thermal noise current (A) and is given by:
ent APDs. For cooling and evaluation of APD in different
temperatures, it has been mounted on a thermoelectric cooler σT2 = (4k B T /R L ) Fn B (6)
(TEC) as introduced in [57]. 3-stage and 4-stage TECs also where k B is Boltzmann’s constant (W/°K), T is tempera-
can be used for lower temperatures. In order to reduce the ture (°K), R L is the receiver load resistance () and Fn is
heat flow via air convection, the TEC-APD assembly was the receiver noise factor. The photoreceiver sensitivity depends
tightly surrounded with cut-to-shape styrofoam. Referring to on its quantum efficiency, the light source power, target
the Figs. 4(a)-(b), the octagonal shape APD works in normal reflectivity, environmental conditions, receiver optical design,
mode, not in avalanche mode and more investigations showed and amplifiers noise. Low excess-noise, large active-area, and
that it is mainly due to effects of the bonding pad parasitic high-speed APDs improve the sensitivity of the Photoreceiver
capacitance on the measurements. The general specifications front-end and consequently allows the use of low-power light
of the proposed APDs are summarized in Table II. It is source to reduce the power consumption and cost. However,
also includes the comparison of the proposed APDs with the Photodetector dark currents and capacitance increase with
other works. The APD multiplication gain (M) is a critical the active area and have adverse effect on receiver sensitivity
requirement for APDs due to the high background and detector and bandwidth. The Photodetector BW is also limited by the
noise. It is calculated using following formula: RC effect in large active area APDs and special efforts are
L V n needed to reduce APD capacitance while maintains the same
M = 1/(1 − ∫ α(x)d x) = 1/(1 − ( ) ) (3) active area [62]. The measured sensitivity has been normalized
0 Vbr
to the same BW, BER, wavelength and bit-rate for all devices.
where L is the space charge boundary for electrons and α is The APDs with lower sensitivity, require higher-gain TIAs,
the multiplication coefficient for electrons (and holes), strongly limiting amplifiers and adaptive equalization. The challenge
depended on the applied electric field strength, temperature, was amplification with low thermal-noise, while ensuring a
and doping profile. The linear gain (M) is characterized using high front-end BW [63]. The modulation frequency (∼100Hz-
dark current and photocurrent values. The dark current present 100MHz) is critical for the choice of bandwidth of the front
when no signal impinges the APD, must be subtracted from the end amplifier which determines the sensitivity of the instru-
measurement for proper gain calculation. The gain is defined ment [64]. The proposed SiAPDs offer small junction/parasitic
as the ratio of the current measured at a given bias voltage to capacitances, and consequently high-BW and low-noise front-
the current measured at a specific voltage (V1<Vbr). We have ends. “Higher sensitivity may be achieved by adding an
KAMRANI et al.: LOW-NOISE, HIGH-GAIN TRANSIMPEDANCE AMPLIFIER INTEGRATED WITH SiAPD 263

anti-reflection coating, improving the optical collection as

well as the residual flux filtering [65]. Responsivity of the
APD characterizes the performance in terms of the generated
photocurrent Iph per incident optical power Popt at a given
wavelength and is:
Pph η.q η λ (μm) A
= = = [ ] (7)
Popt h .v 1.24 W
The Responsivity of the proposed APDs is shown in Fig. 4(f).
It shows that the maximum responsivity of the proposed APDs
is at reverse bias voltage of ∼13-14V.

III. CMOS TIA F RONT-E ND D ESIGN

A. Background and Design Requirements
The optical preamplifier interfacing the photodiode to the
rest of the receiver plays a crucial role in determining many
aspects of the overall performance of the receiver includ-
ing speed, sensitivity, and dynamic range. For linear-mode
operation, SiAPDs require a transimpedance amplifier (TIA)
to convert the input photocurrent into a voltage signal [34].
Due to the ultra-low level and usually high-source impedance
of the photodiode, the amplifier has to meet certain basic
requirements. The basic requirements in designing a proper
TIA for portable fNIRS systems are: High Common Mode Fig. 5. (a) Schematic diagram of the proposed tunable TIA. M1, M6, M7,
Rejection Ratio (CMRR) to reject interference from mains and M9: W/L = 2.5/0.35, M8:W/L = 5/0.35 and for all other transistors
W/L = 1/0.35. (b) Schematic of the OTA (M1, M2, M9, M10:W/L =
boost the SNR, HPF characteristics for filtering differential 2/0.35, M11, M12: W/L = 10/0.35 and for all other transistors W/L =
DC offset, low input-noise (<1 nA) for high signal quality, 1/0.35). (c) The input noise of the TIA front-end at different frequencies.
ultra-low power dissipation (<50 mW) for long-term power The Gain (d), power-consumption (e) and BW (f) variation with different
control voltages.
autonomy, configurable gain and filter characteristics that suit
the needs of different biopotential signals and different appli-
cations, high transimpedance gain (>1 k), narrow Bandwidth is possible to change the gain of the amplifier without varying
(around 100k), high output swing and low-voltage operation the BW. We can use this fact in order to make the intensity of
[34]–[37]. Work on developing such photoreceiver amplifier the photoreceptor independent to the BW variation and also
has not been considered in the literature yet and none of the increase the GBW of the circuit [29]. This is the technique
reported NIRS detectors offer these features all together in applied in many organic photoreceptors [43], [44].
a single design, which is a crucial factor in real- time brain
imaging. Phang et al. [39] have proposed a TIA by combining B. Proposed Tunable High-Gain TIA Front-End
a sub 1-V current mirror [40] and a common-gate TIA [41] The proposed TIA front-end, shown in Fig. 5(a), is formed
based on a current-gain amplifier for optical communication. by four stages. The first stage TIA provides a very low input
Achigui et al. [5] modified this TIA by adding an Operational resistance to handle the large photodiode capacitance (up to
Transconductance Amplifier (OTA) with DTMOS for NIRS 5 pF) and the second TIA is also the same as the first
front-end photoreceiver. These designs all are based on fixed- TIA block. Using distributed gain concept in TIA front-end
gain and only one mode of operation. Reaching high data- design increases the GBW of the circuit and allows changing
rate and high-BW in these designs is also with the cost of the gain of the amplifier without varying the BW [29]. We
small gain, high-noise and power consumption. So the need have used this fact in order to make the intensity of the
for a new design with the ability to overcome these limitations photoreceptor independent to the BW variation. In order to
and meet the requirements of a fNIRS photodetector front- improve the differential input common-mode range (ICMR),
end is a critical issue we aim to solve. Because of the inverse DTMOS transistors have been applied. This proposed TIA
dependency of gain and bandwidth (BW) in a single-stage structure is a combination of CG-TIA and RF-TIA topologies
amplifier, designing a single-stage amplifier with high GBW which we have already characterized it based
is a challenging task. If the GBW of each amplifying stage on the simulation at [28]. The design consists of a current
is constant, then the time-constant for an N-stage amplifier amplifier implemented in a transimpedance configuration. In
√ N√
with identical gains per stage is proportional to N A, this circuit, we have used the combination of three transistors
while it is proportional to A for a single-stage amplifier (M6, M7 and M9) biased in the linear region to act as a
[29], [42]. So a cascade amplifier has a significantly larger feedback resistor. Each transistor is comprised of three pairs
GBW than a single-stage amplifier with the same gain. Using of pass transistors as proposed in [39] in order to realize
distributed gain (DG) amplification and adaptive feedback it the desired gain-BW range. It offers the resitances with the
264 IEEE SENSORS JOURNAL, VOL. 14, NO. 1, JANUARY 2014

values of R AB = gmx /2 = gm9 /2 and R AC = 2gmx =

gm6 between node A and nodes B and C respectively. This
minimize the output ripple and reduce the drained current.
The dc transimpedance gain is given by:
Vout g M5 R f − 1 Ai R f − Rin
=− =− ≈ −R f ≈ 2.5gmx
Iin g M4 + g M5 1 + Ai
(8)
where gM4 and gM5 are the transconductance of transistors
M4 and M5. The transimpedance gain is derived from the
measured S-parameters of the TIA. Fig. 6(b) shows the
comparison of the predicted transimpedance gain for the TIA
obtained from calculated Equations. The gain and bandwidth
predicted by Equation 8 are better than that of a TIA operating
in a matching system which means the transimpedance gain
will be overestimated using the calculated formula. Due to
the rather slow signal variations in CW-fNIRS applications,
usually a narrow BW is sufficient (1kHz for BOLD signal and
10–20kHz for neuronal signal). But offering a tunable high
BW front-end will increase the performance of the overall
system by increasing the speed for real-time monitoring in
wireless device. The closed-loop BW of the TIA is approxi-
mately equal to the unity-gain frequency (the frequency where
the loop gain of the TIA is unity):
1+ A A
BW ≈ ≈ ≈ ωt (9)
R f CD R f CD
CW-fNIRS applications measure rather slow signal changes
(under 1kHz for BOLD signal and 10-20 kHz for neuronal
signal), for this reason the importance of the bandwidth is
relatively low but reaching high GBW value and robustness
against power supply variations are very important. Here the
GBW is equal to:
(gm1 + gs1)(1 − gm5 R f )
G BW = ;
Cin + (gm1 + gs1)(C L + C f )R f /K cm
gm5
(K cm = ) (10)
gm4
where C D , Cin , C L and C f are the photodiode, input, load and
feedback capacitances respectively. BW of TIA increases by
decreasing C D .We have used C D =1pF in simulations as this
is the commonly reported value [21]–[23], [39]. In order to
Fig. 6. The microphotograph of the fabricated IC (a), the transimpedance
boost the voltage swing and match the output impedance to gain (b) and the input current noise density (c) of the integrated front-end at
drive the photoreceiver output (usually a DMUX), we designed different frequencies. The Photodetection frequency responses of the CMOS
a Limiting Amplifier (LA) [29] and an OTA to be added integrated photo- receiver and CMOS-APD only (d) and Comparison of the
Sensitivity/Power consumption of the proposed circuit with other works (e).
to the output of the TIA. The OTA used in the proposed The bit error rate (BER) as function of incident optical power when the
front-end amplifier design (Fig. 5(b)) is a current-mirror OTA, input data has PRBS of 231 − 1(f). The impact of on-chip integration on
which is modified from the OTA reported in [5] and [28]. different APD parameters: (g) Gain, (h) Sensitivity, (i) SNR, and (j) Power
Performance of this OTA highly depends on the bias current consumption.

and the sizing of the transistors. So we have considered these

two parameters in order to reach the best performance. To to using output signal limiting and input current steering
increase the maximum output swing, and improve the stability techniques to extend the dynamic range of amplifier. Using the
of the circuit, we have also used a filtering block followed constant applied voltage of Vcont (0V < Vcont < 2V ), the Gain,
by TIA and LA. Because one of the main requirements of BW, power-consumption and dynamic range of the output
biosignal amplifiers is to have a wide dynamic range, here could be changed in a wide output range (Figs. 5(d)-(f)). We
in order to achieve wide dynamic range, we have considered need low-input noise for high-signal quality. Due to the low-
the proposed photoreceiver circuit as shown in Fig. 5(a) by frequency behavior of the signals, in-band noise of the readout
adding the ability of parameters tuning. This is preferred is dominated by flicker (1/f) noise rather than thermal noise.
KAMRANI et al.: LOW-NOISE, HIGH-GAIN TRANSIMPEDANCE AMPLIFIER INTEGRATED WITH SiAPD 265

TABLE III
P ERFORMANCE C OMPARISON OF THE P ROPOSED TIA WITH O THER W ORKS (C P =1pF)

Combining the effects of all the independent noise components resistance, and the bias noise current injected into output node)
( I 2f lick ), the total input-referred noise current density of the is cancelled as well [54]. Referring to Table III, the input-
TIA front-end can be calculated as [36], [39]: current noise of the proposed TIA (Fig. 5 (c)) at 1 kHz is
 almost an order of magnitude better than other references using
4K T  K gm 2 1  K g2 1
m this technique. This also shows the efficiency of the applied
In,T I A =
2
+ 2
f≈ 2 f
f
Rin W LCox f W LCox topology and using DTMOS accompanyng with optimal tran-
(11) sistor scaling based on the sensitivity analysis. Although there
was a big discrepancy between the simulated and measured
where k is Boltzmann’s constant (1.38 × 10−23JK −1 ), T is the noises, the measured noise is extremely low comparing to all
absolute temperature in Kelvin, W, L, and COX , are width, of the previously reported TIAs. The source of this difference
length, and the oxide capacitance channel of each transis- is not completely clear, but the limited functionality of the
tor respectively. The equivalent input-noise current density applied spectrum analyzer and the capacitance variation due to
(Fig. 5(c)) increases with the increase of capacitance of the the fabrication process can explain this discrepancy. In TIA the
APD. The noise measurements were done on bare chips by transistors M2-M1 forms a two-pole shunt negative-feedback
wafer probing. A low-noise preamplifier has been added before loop that reduces the equivalent M2 source resistance. The
the noise figure analyzer to drive down the noise figure and input and output resistances of the TIA are calculated using:
decrease the measured noise figure uncertainty. Figure 6(c) v in gm5
shows the comparison of predicted equivalent input-noise Rin = = (g + gs1 )−1 ;
i in gm4 + gm5 m1
current density for the proposed TIA by using the Equation 11
vx 1 + gm4 Rf
and the experiment. The equivalent input-noise current density Rout = = . (12)
predicted by Equation 11 is better than measured values, which ix gm4 + gm5
means the equivalent input-noise current density will be under- We used CADENCE schematic editor and Virtuoso layout
estimated using the calculated formula. The proposed TIA editor to design and simulate our proposed TIA in 0.35μm
shows an ultra-low input noise characteristics (Fig. 5(c)). The CMOS technology. This TIA front-end is fabricated using
TIA’s equivalent input-noise current is reduced significantly 0.35μm CMOS technology. The measurements were estab-
using Current Balancing [14] and the noise cancelling [54] lished on-wafer and using air-coplanar probes. The wafer
techniques. The noise probes were calibrated using the Line-Reflect-Match calibra-
cancelling [55] used the fact that a virtual ground for the tion method for S-parameter measurement [60], [61]. The
input-current is located at a point inside the feedback resistor. complete four port S-parameters for the TIA were measured
This node is used to cancel the noise of the TIA. By using using on wafer probing with an HP8510 two-port vector
the noise cancelling a high sensitivity optical receiver can be network analyzer as [61]. Each of the measurements was taken
designed without increasing the power consumption. Noise over a frequency span of 1Hz to 5GHz with a total of 1000
cancelling is used for a low-noise amplifier (LNA) as applied points. The four port S-parameters were loaded into Agilent’s
in [56]. This allows for designing wide-band impedance ADS as a dataset and the circuit outputs were connected to
matching amplifiers with small noise figure, without suffering an oscilloscope to see eye-diagrams as done by [60]. Using
from instability. Any noise source that can be modeled by minimum length transistors we have aimed to increase the
a current source between the drain and source of the input unity-gain current frequency (fT ) of the device by making
device (e.g., 1/f noise, thermal noise of the distributed gate the gm , larger and the input capacitance, smaller and this can
266 IEEE SENSORS JOURNAL, VOL. 14, NO. 1, JANUARY 2014

TABLE IV
D ESIGN S PECIFICATIONS OF THE P ROPOSED I NTEGRATED SiAPD S +TIA F RONT-E ND AND C OMPARISON W ITH D IFFERENT W ORKS

incorporate in a wide band design. However this may introduce low-bias condition imposed a drastic phase-margin degrada-
somehow instability in gain and BW of the TIA due to the tion and output instability, so it is not recommended without
process parameters variation. In order to be sure this is not the using extra compensation circuitry [39], [71].
case in our design, and in order to optimize the performance A large discrepancy is observed between simulation and
of the amplifier, using stability and sensitivity analysis the measurement results of the power consumption and the input-
best values for optimal sizing were selected for the transistors noise as shown in Table III. By considering the ultra low-level
to render the highest GBW while preserving the stability. of the measured noise and power, the cause of this different
The simulated and measured stability analysis shows a Phase is most likely a combination of effects. This can be due
margin of greater than 40°. The measurement results of the to the effects of the used bonding pad parasitic capacitance
proposed circuit verify efficiency and reliability for a fNIRS or the limited accuracy of the test setup used to get these
system. Figs. 5(d-f) show the gain, the power consumption values. There could be coupling between the measurement
and the BW variation of the proposed circuit as a function of probes, as well as effects from the rest of the measurement
frequency and Vcont . For TIA: Z in,dc = 500 k, Vin,dc=0.5V , setup. The final layout of the designed integrated circuit
and for the total front-end: Z in,dc = 300 , Vin,dc = 3 mV . after post-layout simulation and optimization was fabricated
By varying the Vcont in proposed variable-gain front-end by TSMC 0.35 μm via CMC. This 18-pin IC has the die
(Fig. 5(a)), between 0–3V, we reached a very-high GBW value size of 1.5mm×2mm, and includes proposed APDs and the
of 45 × 109 . This value is tunable between 10M-45G for amplifier. The microphotograph of the fabricated IC is depicted
various applications. in Figure 6(a). The fabricated test chip includes several APDs,
We can reach the transimpedance gain in the range of TIAs and also the integration of APD+TIAs in order to verify
5-276 MV/A and BW in the range of 1kHz-1.31GHz using the functionality of different configurations and effects of
this configuration. The power consumption is in the range integration. Here in this paper we have reported the detailed
of 0.57-3.5 mW (Fig. 5(e)), making it suitable for medical measurements after a systematic study over more than 20
wireless/portable applications. In order to verify the effect of different chips. Several packages and wire-bonds were also
the supply voltage, we have also tested the tunable-gain con- made to have access to the different components. The reported
figuration by decreasing the supply voltage to 1V. The general values here show the average value of the results for functional
specifications of the proposed TIA front-end are depicted in circuits. The observed measured variances for each parameter
Table III. In order to validate the robustness of the circuit are also shown in this table. To analyze the variation of
against power supply variation we have examined the TIA measured parameters between different chips, the variances
front-end characteristics for the supply voltages vary between of different parameters of all APDs for evaluated chips
1-3.3V and the results for 1V and 3V supplies are measured. are measured. The observed fluctuations in APD1 (APD2)
Here the M1-M2 and M7-M9 have been biased independently include: The device-device fluctuation for =±1.01V (±1.5V),
at 1-3V power supply operation to insure their functional- PDP=±13% (±18%), Dark current=±15nA (±21nA). The
ity. Thanks to using complementary body driving technique wafer-wafer fluctuation for Vbr = ±0.7V (±0.7V), PDP=±9%
[69], [70] and DTMOS transistors, the circuit functionality (±9%), Dark current=±0.5nA (±0.5nA). The chip-chip fluc-
was guaranteed in 1-3 V bias variation. As the results are tuation for Vbr =±0.9V (±1V), PDP=±11% (±15%), Dark
shown for three different points (1V, 2V and 3V) in table III, current=±2.5nA (±3.3nA).
the performance does not degrade significantly despite power The final measurement results of the proposed TIA front-
supply variation. In 1V bias voltage the front-end circuit end are compared with results from the literature in Table III.
shows better characteristics regarding to power and input This design has the highest transimpedance gain and the lowest
referred current noise. However, low-bias operation implies power consumption and input/output noises accompanying
maintaining the bias of M1-M2 and also M7-M9 transis- with a suitable gained performance regarding to the on-chip
tors independently in different bias values. Furthermore, the integration of APD and TIA.
KAMRANI et al.: LOW-NOISE, HIGH-GAIN TRANSIMPEDANCE AMPLIFIER INTEGRATED WITH SiAPD 267

IV. APD+TIA I NTEGRATION reconfigurable and low-noise light detector has been intro-
To increase the use of photodetector systems for state- duced in this paper. It includes a new TIA integrated with
of-the-art biomedical applications, integration of the SiAPD two new SiAPDs on the same chip using CMOS 0.35μm
and the high-speed peripheral circuitry on the same chip technology. Proposed rectangular and octagonal SiAPDs offer
using standard CMOS technology is highly desired. Here the the avalanche gain of 100 and 45 with the breakdown
proposed SiAPDs and TIA front-ends have been integrated on voltage of 6V and 9V and the photon detection efficiency
the same chip and the measurement results regarding to this of 45% and 25% at 800nm respectively. Fabricated TIA
integration are shown in Table IV. For the wavelength-specific front-end has high transimpedance gain (up to 250MV/A),
applications also the spectral sensitivity of the detector should tunable BW (1kHz-1GHz),
√ extremely
√ low input and out-
be considered. The bit error rate (BER) as function of incident put noise (100fA/ Hz, 1.8μV/ Hz), high stability (phase
optical power is depicted in Figure 6 (f) for different APDs. margin≥40°), robust against power supply variations and low-
The gain, sensitivity, SNR, and power consumption for each power consumption (0.8mW), all the essential requirements for
CMOS-APD separately and for the integrated photoreceiver fNIRS photoreceiver front-end. The proposed TIA front-end
(APD+TIA) are measured and compared in Figs. 6 (g)-(j) also shows efficient results in two different bias voltages. The
in a normalized scale. In order to verify the impact of the on-chip integrated APDs with the proposed TIA preserves the
applied APD structure and scale on these different measured high-performance characteristics of both APDs and TIA while
values, this comparison has been established for different offering a more compact photodetector front-end with high
APDs. Referring to these comparison plots, and regardless of fill factor to be used in arrays of detectors in different optical
the applied APD structure we see a regular variation in each detectors and for low-intensity light detection applications.
examined parameter. A significant improvement in sensitivity,
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Mohamad Sawan (S’89–M’90–SM’96–F’04)
received the Ph.D. degree in electrical engineering
Ehsan Kamrani (M’13) received the B.Sc. degree from Université de Sherbrooke, Sherbrooke, QC,
in biomedical engineering from the Shahid Beheshti Canada, in 1990. He joined Ecole Polytechnique de
Medical University of Tehran, Tehran, Iran, in 2002, Montréal, Montreal, QC, Canada, in 1991, where
and the M.Sc. degree in electrical and control engi- he is currently a Professor of microelectronics and
neering from the Tarbiat Modares University of biomedical engineering. His scientific interests are
Tehran, Tehran, in 2005. From 2005 to 2009, he was the design and test of mixed-signal (analog, digital,
an Academic Member-Instructor in the Department and RF) circuits and systems: design, integration,
of Electrical and Electronics Engineering. He has assembly, and validation. These topics are oriented
published more than 50 papers in peer reviewed toward the biomedical and telecommunications
journals and conference proceedings. Since 2009, he applications. He is a holder of a Canadian Research Chair in Smart Medical
has been pursuing the Ph.D. degree in biomedical Devices. He is leading the Microelectronics Strategic Alliance of Quebec
engineering with the Polystim Neurotechnologies Laboratory, Polytechnique (ReSMiQ). He has published more than 350 papers in peer reviewed journals
Montreal, Montreal, QC, Canada, on design and implementation of an fNIRS and conference proceedings and is awarded six patents. He is a founder of the
photoreceiver for real-time brain monitoring. Since March 2012, he has been International IEEE-NEWCAS conference. He is an editor of Mixed-Signal
with the Harvard Medical School and Wellman Center for Photomedicine, Letters, and a President of the biomedical circuits and systems (BioCAS)
Boston, MA, USA, in an active bio-optics project for developing novel technical committee of the IEEE Circuits and Systems Society. He received
innovative technologies by integration of photonics and biological system the Barbara Turnbull 2003 Award for spinal cord research, the Medal of
aiming at developing a novel diagnostic optical instrument for medical Merit from the Lebanese President, the Bombardier Medal of Merit from
applications. He is a member of IOP, OSA, SPIE, AACC, and IAENG, and the French Canadian Association for the advancement of sciences, and the
he has won the Best Paper Awards in CFSC’03, ACFAS’12, MIOMD’12, and American University of Science and Technology Achievement Award. He is
Polytechnique 2013 Research and Innovation. a fellow of the Canadian Academy of Engineering.

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