Acs770lcb 050B PFF T

ACS770xCB
Thermally Enhanced, Fully Integrated, Hall Effect-Based

High Precision Linear Current Sensor IC with 100 µΩ Current Conductor
Features and Benefits Description

▪ Industry-leading total output accuracy achieved with new The Allegro™ ACS770 family of current sensor ICs provides
piecewise linear digital temperature compensation of economical and precise solutions for AC or DC current sensing.
offset and sensitivity Typical applications include motor control, load detection and
▪ Industry-leading noise performance through proprietary management, power supply and DC-to-DC converter control,
amplifier and filter design techniques inverter control, and overcurrent fault detection.
▪ 120 kHz typical bandwidth
The device consists of a precision, low-offset linear Hall
▪ 4.1 µs output rise time in response to step input current
circuit with a copper conduction path located near the die.
▪ Integrated shield greatly reduces capacitive coupling from
Applied current flowing through this copper conduction
current conductor to die due to high dV/dt signals, and
path generates a magnetic field that is concentrated by a low
prevents offset drift in high-side, high voltage applications
magnetic hysteresis core, then converted by the Hall IC into a
▪ Greatly improved total output error through digitally
proportional voltage. Device accuracy is optimized through the
programmed and compensated gain and offset over the full
close proximity of the magnetic signal to the Hall transducer.
operating temperature range
A precise, proportional output voltage is provided by the
▪ Small package size, with easy mounting capability
low-offset, chopper-stabilized BiCMOS Hall IC, which is
▪ Monolithic Hall IC for high reliability
programmed for accuracy at the factory. Proprietary digital
▪ Ultra-low power loss: 100 µΩ internal conductor resistance
temperature compensation technology greatly improves the
▪ Galvanic isolation allows use in economical, high-side
IC accuracy and temperature stability without influencing the
current sensing in high voltage systems
high bandwidth operation of the analog output.
▪ 4.5 to 5.5 V, single supply operation
▪ Output voltage proportional to AC or DC currents High level immunity to current conductor dV/dt and stray
▪ Factory-trimmed for accuracy electric fields is offered by Allegro proprietary integrated shield
▪ Extremely stable output offset voltage technology for low output voltage ripple and low offset drift
▪ Undervoltage lockout for VCC below specification in high-side, high voltage applications.
▪ AEC Q-100 automotive qualified
The output of the device has a positive slope (>VCC/2 for
▪ UL certified, File No. E316429
bidirectional devices) when an increasing current flows through
Package: 5-pin package (suffix CB) the primary copper conduction path (from terminal 4 to terminal
5), which is the path used for current sampling. The internal
resistance of this conductive path is 100 µΩ typical, providing
pe d
low power loss.
Ty ste
te
The thickness of the copper conductor allows survival of the

device at high overcurrent conditions. The terminals of the
TÜV America
PFF PSF Certificate Number:
Leadform Leadform U8V 13 08 54214 027 Continued on the next page…
Additional leadforms available for qualifying volumes
Typical Application
5V
1
4 VCC
Application 1. The ACS770 outputs an analog signal, IP+ CBYP
VOUT , that varies linearly with the bidirectional AC or DC ACS770 0.1 µF
2
primary sampled current, IP , within the range specified. IP GND
RF and CF are for optimal noise management, with CF
values that depend on the application. 5
IP– 3
VIOUT VOUT
RF
ACS770-DS, Rev. 1
ACS770xCB High Precision Linear Current Sensor IC with 100 µΩ Current Conductor
Description (continued)
conductive path are electrically isolated from the signal leads (pins
1 through 3). This allows the ACS770 family of sensor ICs to be
used in applications requiring electrical isolation without the use of
opto-isolators or other costly isolation techniques.
The device is fully calibrated prior to shipment from the factory.
The ACS770 family is lead (Pb) free. All leads are plated with 100%
matte tin, and there is no Pb inside the package. The heavy gauge
leadframe is made of oxygen-free copper.
Selection Guide
Package Primary Sampled Sensitivity
Current TOP
Part Number1 Current , IP Sens (Typ.) Packing2
Terminals Signal Pins Directionality (°C)
(A) (mV/A)
ACS770LCB-050B-PFF-T Formed Formed ±50 40. Bidirectional
ACS770LCB-050U-PFF-T Formed Formed 50 80. Unidirectional
ACS770LCB-100B-PFF-T Formed Formed ±100 20. Bidirectional –40 to 150
ACS770LCB-100U-PFF-T Formed Formed 100 40. Unidirectional
ACS770LCB-100U-PSF-T Straight Formed 100 40. Unidirectional
ACS770KCB-150B-PFF-T Formed Formed ±150 13.3 Bidirectional
34 pieces
ACS770KCB-150B-PSF-T Straight Formed ±150 13.3 Bidirectional
–40 to 125 per tube
ACS770KCB-150U-PFF-T Formed Formed 150 26.7 Unidirectional
ACS770KCB-150U-PSF-T Straight Formed 150 26.7 Unidirectional
ACS770ECB-200B-PFF-T Formed Formed ±200 10. Bidirectional
ACS770ECB-200B-PSF-T Straight Formed ±200 10. Bidirectional
–40 to 85
ACS770ECB-200U-PFF-T Formed Formed 200 20. Unidirectional
ACS770ECB-200U-PSF-T Straight Formed 200 20. Unidirectional
1Additional leadform options available for qualified volumes.
2Contact Allegro for additional packing options.
Allegro MicroSystems, LLC 2

115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Absolute Maximum Ratings

Characteristic Symbol Notes Rating Unit
Forward Supply Voltage VCC 6 V
Reverse Supply Voltage VRCC –0.1 V
Forward Output Voltage VIOUT 25 V
Reverse Output Voltage VRIOUT –0.1 V
Output Source Current IOUT(Source) VIOUT to GND 2.8 mA
Minimum pull-up resistor of 500 Ω, from VCC to
Output Sink Current IOUT(Sink) 10 mA
VIOUT
Range E –40 to 85 ºC
Nominal Operating Ambient Temperature TOP Range K –40 to 125 ºC
Range L –40 to 150 ºC
Maximum Junction TJ(max) 165 ºC
Storage Temperature Tstg –65 to 165 ºC
Isolation Characteristics
Agency type-tested for 60 seconds per
Dielectric Strength Test Voltage* VISO 4800 VAC
UL standard 60950-1, 2nd Edition
For basic (single) isolation per UL standard 990 VDC or Vpk

Working Voltage for Basic Isolation VWFSI
60950-1, 2nd Edition 700 Vrms
For reinforced (double) isolation per UL standard 636 VDC or Vpk
Working Voltage for Reinforced Isolation VWFRI
60950-1, 2nd Edition 450 Vrms
*60-second testing is only done during the UL certification process. In production, Allegro conducts 1-second isolation testing according to UL
60950-1, 2nd Edition.

Thermal Characteristics may require derating at maximum conditions

Characteristic Symbol Test Conditions* Value Unit
Mounted on the Allegro evaluation board with
2800 mm2 (1400 mm2 on component side and
1400 mm2 on opposite side) of 4 oz. copper con-
nected to the primary leadframe and with thermal
Package Thermal Resistance RθJA 7 ºC/W
vias connecting the copper layers. Performance
is based on current flowing through the primary
leadframe and includes the power consumed by
the PCB.
*Additional thermal information available on the Allegro website
Typical Overcurrent Capabilities1,2

TA = 25°C, 1s duration, 1% duty cycle 1200 A
Overcurrent IPOC TA = 85°C, 1s duration, 1% duty cycle 900 A
TA = 150°C, 1s duration, 1% duty cycle 600 A
1Testwas done with Allegro evaluation board. The maximum allowed current is limited by TJ(max) only.
2For more overcurrent profiles, please see FAQ on the Allegro website, www.allegromicro.com.

Functional Block Diagram
V+ IP+
VCC
To all subcircuits
Programming
Control
Temperature EEPROM and

Sensor Control Logic
C BYP
Sensitivity Control Offset Control
Dynamic Offset
Cancellation
VIOUT
Signal Recovery
CL
IP–
GND
Pin-out Diagram
IP+ 4
3 VIOUT
2 GND
1 VCC
IP– 5
Terminal List Table

Number Name Description
1 VCC Device power supply terminal
2 GND Signal ground terminal
3 VIOUT Analog output signal
4 IP+ Terminal for current being sampled
5 IP– Terminal for current being sampled

COMMON OPERATING CHARACTERISTICS valid at TOP = –40°C to 150°C, CBYP = 0.1 µF, and VCC = 5 V, unless otherwise specified
Characteristic Symbol Test Conditions Min. Typ. Max. Unit
Supply Voltage VCC 4.5 5.0 5.5 V
Supply Current ICC Output open – 10 15 mA
Supply Zener Voltage VZ TA = 25°C, ICC = 30 mA 6.5 7.5 – V
Power-On Delay1,2 tPOD TA = 25°C, CBYP = open – 90 – µs
Temperature Compensation
tTC TA = 25°C, CBYP = open – 90 – µs
Power-On Time1
Undervoltage Lockout (UVLO) VUVLOH TA = 25°C, VCC rising – 3.8 – V
Threshold1 VUVLOL TA = 25°C, VCC falling – 3 – V
tUVLOE TA = 25°C, CBYP = open, VCC Fall Time (5 V to 3 V) = 1 μs – 75 – µs
UVLO Enable/Disable Delay
Time1,2 TA = 25°C, CBYP = Open, – –
tUVLOD 14 µs
VCC Recover Time (3 V to 5 V) = 1 μs
VPORH TA = 25°C, VCC rising – 4 – V
Power-On Reset Voltage1
VPORL TA = 25°C, VCC falling – 2.7 – V
IP step = 60% of IP+, 10% to 90% rise time, TA = 25°C,
Rise Time1,2 tr – 4.1 – µs
CL = 0.47 nF
IP step = 60% of IP+, 20% input to 20% output, TA = 25°C,
Propagation Delay Time1,2 tPROP – 2.4 – µs
CL = 0.47 nF
IP step = 60% of IP+, 80% input to 80% output, TA = 25°C,
Response Time1,2 tRESPONSE – 4.6 – µs
COUT = 0.47 nF
Internal Bandwidth BWi –3 dB; TA = 25°C, CL = 0.47 nF – 120 – kHz
Output Load Resistance RL VIOUT to GND 4.7 – – kΩ
Output Load Capacitance CL VIOUT to GND – – 10 nF
Primary Conductor Resistance RPRIMARY TA = 25°C – 100 – µΩ
VIOUT(QBI) Bidirectional variant, IP = 0 A, TA = 25°C – VCC/2 – V
Quiescent Output Voltage1
VIOUT(QUNI) Unidirectional variant, IP = 0 A, TA = 25°C – 0.5 – V
Ratiometry1 VRAT VCC = 4.5 to 5.5 V – 100 – %
1See Characteristic Definitions section of this datasheet.
2See Timing Data Section of this data sheet

X050B PERFORMANCE CHARACTERISTICS1: TOP = –40°C to 150°C, CBYP = 0.1 μF, VCC = 5 V, unless otherwise specified
Primary Sampled Current IP –50 – 50 A
SensTA Measured using full scale IP , TA = 25°C 39.04 40 40.96 mV/A
Sensitivity2 Sens(TOP)HT Measured using full scale IP , TOP = 25°C to 150°C 39.04 40 40.96 mV/A
Sens(TOP)LT Measured using full scale IP , TOP = –40°C to 25°C 38.6 40 41.4 mV/A
TOP = –40°C to 150°C, shift after AEC Q100 grade 0 qualifica-
Sensitivity Drift Over Lifetime3 ΔSensLIFE –0.72 ±0.24 0.72 mV/A
tion testing
Noise4 VNOISE TA= 25°C, 10 nF on VIOUT pin to GND – 10 – mV
Nonlinearity ELIN Measured using full scale and half scale IP, –1 – 1 %
VOE(TA) IP = 0 A, TA = 25°C –10 ±4 10 mV
Electrical Offset Voltage5,6 VOE(TOP)HT IP = 0 A, TOP = 25°C to 150°C –10 ±6 10 mV
VOE(TOP)LT IP = 0 A, TOP = –40°C to 25°C –20 ±6 20 mV
Electrical Offset Voltage Drift IP = 0 A, TOP = –40°C to 150°C, shift after AEC Q100 grade 0
∆VOE(LIFE) –5 ±2 5 mV
Over Lifetime3 qualification testing
Magnetic Offset Error IERROM IP = 0 A, TA = 25°C, after excursion of 50 A – 120 300 mA
ETOT(TA) Measured using full scale IP , TA = 25°C –2.4 ±0.5 2.4 %
Total Output Error7 ETOT(HT) Measured using full scale IP , TOP = 25°C to 150°C –2.4 ±1.5 2.4 %
ETOT(LT) Measured using full scale IP , TOP = –40°C to 25°C –3.5 ±2 3.5 %
Total Output Error Drift Over TOP = –40°C to 150°C, shift after AEC Q100 grade 0 qualifica-
ΔETOT(LIFE) –1.9 ±0.6 1.9 %
Lifetime3 tion testing
1See Characteristic Performance Data page for parameter distributions over temperature range.
2This parameter may drift a maximum of ΔSensLIFE over lifetime.
3Based on characterization data obtained during standardized stress test for Qualification of Integrated Circuits, including Package Hysteresis. Cannot
be guaranteed. Drift is a function of customer application conditions. Please contact Allegro MicroSystems for further information.
4±3 sigma noise voltage.
5Drift is referred to ideal V
IOUT(QBI) = 2.5 V.
6This parameter may drift a maximum of ΔV
OE(LIFE) over lifetime.
7This parameter may drift a maximum of ΔE
TOT(LIFE) over lifetime.

X050U PERFORMANCE CHARACTERISTICS1: TOP = –40°C to 150°C, CBYP = 0.1 μF, VCC = 5 V, unless otherwise specified
Primary Sampled Current IP 0 – 50 A
tion testing
Nonlinearity ELIN Measured using full scale and half scale IP –1 – 1 %
VOE(TA) IP = 0 A, TA = 25°C –10 ±4 10 mV
ΔETOT(LIFE) –1.9 ±0.6 1.9 %
IOUT(QBI) = 0.5 V.

tion testing
VOE(TA) IP = 0 A, TA = 25°C –10 ±4 10 mV
ΔETOT(LIFE) –1.9 ±0.6 1.9 %
IOUT(QBI) = 2.5 V.

tion testing
VOE(TA) IP = 0 A, TA = 25°C –10 ±4 10 mV
ΔETOT(LIFE) –1.9 ±0.6 1.9 %
IOUT(QBI) = 0.5 V.

SensTA Measured using full scale IP , TA = 25°C 13.01 13.33 13.65 mV/A
Sensitivity2 Sens(TOP)HT Measured using full scale IP , TOP = 25°C to 150°C 13.01 13.33 13.65 mV/A
Sens(TOP)LT Measured using full scale IP , TOP = –40°C to 25°C 12.86 13.33 13.8 mV/A
tion testing
VOE(TA) IP = 0 A, TA = 25°C –10 ±4 10 mV
ΔETOT(LIFE) –1.9 ±0.6 1.9 %
IOUT(QBI) = 2.5 V.

SensTA Measured using full scale IP , TA = 25°C 26.02 26.66 27.30 mV/A
Sensitivity2 Sens(TOP)HT Measured using full scale IP , TOP = 25°C to 150°C 26.02 26.66 27.30 mV/A
Sens(TOP)LT Measured using full scale IP , TOP = –40°C to 25°C 25.73 26.66 27.59 mV/A
tion testing
VOE(TA) IP = 0 A, TA = 25°C –10 ±4 10 mV
ΔETOT(LIFE) –1.9 ±0.6 1.9 %
IOUT(QBI) = 0.5 V.

tion testing
VOE(TA) IP = 0 A, TA = 25°C –10 ±4 10 mV
ΔETOT(LIFE) –1.9 ±0.6 1.9 %
IOUT(QBI) = 2.5 V.

tion testing
VOE(TA) IP = 0 A, TA = 25°C –10 ±4 10 mV
ΔETOT(LIFE) –1.9 ±0.6 1.9 %
IOUT(QBI) = 0.5 V.

Characteristic Performance Data

Data taken using the ACS770LCB-50B
Accuracy Data
Electrical Offset Voltage versus Ambient Temperature Sensitivity versus Ambient Temperature
6 41.0
4 40.8
40.6
Sens (mV/A)
2
40.4
VOE (mV)
0
40.2
-2
40.0
-4 39.8
-6 39.6
-8 39.4
–50 -25 0 25 50 75 100 125 150 –50 -25 0 25 50 75 100 125 150
TA (°C) TA (°C)
Nonlinearity versus Ambient Temperature Magnetic Offset Error versus Ambient Temperature
0 250
-0.1
-0.2 200
-0.3
ELIN (%)
IERROM (mA)
150
-0.4
-0.5
100
-0.6
-0.7
50
-0.8
-0.9 0
–50 -25 0 25 50 75 100 125 150 –50 -25 0 25 50 75 100 125 150
TA (°C) TA (°C)
Total Output Error versus Ambient Temperature

2.5
2.0
1.5
1.0
ETOT (%)
0.5
0
-0.5
-1.0
-1.5
–50 -25 0 25 50 75 100 125 150
TA (°C)
Mean + 3 sigma Mean Mean – 3 sigma


Accuracy Data
8 20.4
6 20.3
4 20.2
Sens (mV/A)
2 20.1
VOE (mV)
0 20.0
-2 19.9
-4 19.8
-6 19.7
-8 19.6
–50 -25 0 25 50 75 100 125 150 –50 -25 0 25 50 75 100 125 150
TA (°C) TA (°C)
0 400
-0.1 350
300
-0.2
250
ELIN (%)
IERROM (mA)
-0.3
200
-0.4
150
-0.5
100
-0.6
50
-0.7 0
–50 -25 0 25 50 75 100 125 150 –50 -25 0 25 50 75 100 125 150
TA (°C) TA (°C)

2.5
2.0
1.5
1.0
0.5
ETOT (%)
0
-0.5
-1.0
-1.5
-2.0
–50 -25 0 25 50 75 100 125 150
TA (°C)


Data taken using the ACS770KCB-150B
Accuracy Data
8 13.60
6 13.55
13.50
Sens (mV/A)
4 13.45
VOE (mV)
2 13.40
13.35
0 13.30
-2 13.25
13.20
-4
13.15
-6 13.10
–50 -25 0 25 50 75 100 125 150 –50 -25 0 25 50 75 100 125 150
TA (°C) TA (°C)
0 450
-0.1 400
-0.2 350
300
-0.3
ELIN (%)
IERROM (mA)
250
-0.4
200
-0.5
150
-0.6
100
-0.7 50
-0.8 0
–50 -25 0 25 50 75 100 125 150 –50 -25 0 25 50 75 100 125 150
TA (°C) TA (°C)

2.0
1.5
1.0
0.5
ETOT (%)
0
-0.5
-1.0
-1.5
-2.0
–50 -25 0 25 50 75 100 125 150
TA (°C)


Data taken using the ACS770ECB-200B
Accuracy Data
6 10.15
4 10.10
Sens (mV/A)
10.05
2
VOE (mV)
10.00
0
9.95
-2
9.90
-4 9.85
-6 9.80
–50 -25 0 25 50 75 100 125 150 –50 -25 0 25 50 75 100 125 150
TA (°C) TA (°C)
0 600
-0.1 500
-0.2 400
ELIN (%)
IERROM (mA)
-0.3 300
-0.4 200
-0.5 100
-0.6 0
–50 -25 0 25 50 75 100 125 150 –50 -25 0 25 50 75 100 125 150
TA (°C) TA (°C)

1.5
1.0
0.5
0
ETOT (%)
-0.5
-1.0
-1.5
-2.0
–50 -25 0 25 50 75 100 125 150
TA (°C)


Timing Data
Response Time
IP = 60 A , 10% to 90% rise time = 1 µs, CBYPASS = 0.1 µF, CL = 0.47 nF
IP = 60 A
VIOUT
80% of input
80% of output
tRESPONSE = 4.56 µs
Rise Time
IP = 60 A
VIOUT
90% of output
tr = 4.1 µs
10% of output

Propagation Time
IP = 60 A
VIOUT
tPROP = 2.4 µs
20% of input 20% of output
Power-On Delay
IP = 60 A DC, CBYPASS = Open, CL = 0.47 nF
VCC
VCC (min)
tPOD = 88 µs
90% of output
VIOUT

UVLO Enable Time ( tUVLOE )

IP = 0 A , CBYPASS = Open, CL = Open, VCC 5 V to 3 V fall time = 1 µs
tUVLOE = 75.3 µs
VCC
VUVLOL
VIOUT
VIOUT = 0 V
UVLO Disable Time ( tUVLOD )

IP = 0 A , CBYPASS = Open, CL = Open, VCC 3 V to 5 V recovery time = 1 µs
tUVLOD = 13.9 µs
VCC
VCC (min)
VIOUT
90% of output

Characteristic Definitions
Definitions of Accuracy Characteristics
Sensitivity (Sens). The change in device output in response to a and the ratiometric change (%) in sensitivity is defined as:
1 A change through the primary conductor. The sensitivity is the Sens(VCC) Sens(5V)
product of the magnetic circuit sensitivity (G / A) and the linear ∆Sens(∆V) = × 100 (%)
IC amplifier gain (mV/G). The linear IC amplifier gain is pro- VCC 5V
grammed at the factory to optimize the sensitivity (mV/A) for the
Quiescent output voltage (VIOUT(Q)). The output of the device
half-scale current of the device.
when the primary current is zero. For bidirectional current flow,
Noise (VNOISE). The noise floor is derived from the thermal and it nominally remains at VCC ⁄ 2. Thus, VCC = 5 V translates into
shot noise observed in Hall elements. Dividing the noise (mV) VIOUT(QBI) = 2.5 V. For unidirectional devices, when VCC = 5 V,
by the sensitivity (mV/A) provides the smallest current that the VIOUT(QUNI) = 0.5 V. Variation in VIOUT(Q) can be attributed to
device is able to resolve. the resolution of the Allegro linear IC quiescent voltage trim,
magnetic hysteresis, and thermal drift.
Nonlinearity (ELIN). The ACS770 is designed to provide a linear
output in response to a ramping current. Consider two current Electrical offset voltage (VOE). The deviation of the device
output from its ideal quiescent value of VCC ⁄ 2 for bidirectional
levels, I1 and I2. Ideally, the sensitivity of a device is the same
sensor ICs and 0.5 V for unidirectional sensor ICs, due to non-
for both currents, for a given supply voltage and temperature. magnetic causes.
Nonlinearity is present when there is a difference between the
Magnetic offset error (IERROM). The magnetic offset is due to
sensitivities measured at I1 and I2. Nonlinearity is calculated
the residual magnetism (remnant field) of the core material. The
separately for the positive (ELINpos ) and negative (ELINneg ) magnetic offset error is highest when the magnetic circuit has
applied currents as follows: been saturated, usually when the device has been subjected to a
full-scale or high-current overload condition. The magnetic offset
ELINpos = 100 (%) × {1 – (SensIPOS2 / SensIPOS1 ) } is largely dependent on the material used as a flux concentrator.
Total Output Error (ETOT). The maximum deviation of the
ELINneg = 100 (%) × {1 – (SensINEG2 / SensINEG1 )} actual output from its ideal value, also referred to as accuracy,
illustrated graphically in the output voltage versus current chart
where: on the following page.
SensIx = (VIOUT(Ix) – VIOUT(Q))/ Ix ETOT is divided into four areas:
and IPOSx and INEGx are positive and negative currents. • 0 A at 25°C. Accuracy at the zero current flow at 25°C, with-
out the effects of temperature.
Then:
• 0 A over Δ temperature. Accuracy at the zero current flow
ELIN = max( ELINpos , ELINneg ) including temperature effects.
Ratiometry. The device features a ratiometric output. This • Full-scale current at 25°C. Accuracy at the full-scale current at
25°C, without the effects of temperature.
means that the quiescent voltage output, VIOUTQ, and the mag-
• Full-scale current over Δ temperature. Accuracy at the full-
netic sensitivity, Sens, are proportional to the supply voltage, VCC.
scale current flow including temperature effects.
The ratiometric change (%) in the quiescent voltage output is
defined as: VIOUT(IP) – VIOUT_IDEAL(IP)
ETOT(IP) = × 100 (%)
VIOUTQ(VCC) VIOUTQ(5V) SensIDEAL × IP
∆VIOUTQ(∆V) = × 100 (%) where
VCC 5V
VIOUT_IDEAL(IP) = VIOUT(Q) + (SensIDEAL × IP )

Definitions of Dynamic Response Characteristics
Power-On Delay (tPOD). When the supply is ramped to its

operating voltage, the device requires a finite time to power its
internal components before responding to an input magnetic field.
Power-On Delay, tPOD , is defined as the time it takes for the out-
put voltage to settle within ±10% of its steady state value under
an applied magnetic field, after the power supply has reached its
minimum specified operating voltage, VCC(min), as shown in the
chart at right.
Temperature Compensation Power-On Time (tTC ). After

Power-On Delay, tPOD , elapses, tTC also is required before a valid
temperature compensated output.
Rise Time (tr). The time interval between a) when the device
reaches 10% of its full scale value, and b) when it reaches 90%
of its full scale value. Both tr and tRESPONSE are detrimentally
affected by eddy current losses observed in the conductive IC
ground plane.
Output Voltage versus Sampled Current
Response Time (tRESPONSE) The time interval between a) when Total Output Error at 0 A and at Full-Scale Current
the applied current reaches 80% of its final value, and b)
when the sensor reaches 80% of its output corresponding to the Accuracy
Over ∆Temp erature
Increasing VIOUT(V)
applied current.
Accuracy
25°C Only
Propagation Delay (tPROP). The time interval between a) when
the input current reaches 20% of its final value, and b) when the Average
VIOUT
output reaches 20% of its final value. Accuracy

Accuracy
25°C Only
IP(min)
(%) Applied Magnetic Field –IP (A) +IP (A)
Half Scale
IP(max)
90
Transducer Output 0A
Decreasing VIOUT(V)
Rise Time, tr
Accuracy
20 25°C Only
10
0 Accuracy
Propagation Delay, tPROP t

Power-On Reset Voltage (VPOR ) At power-up, to initialize to a Undervoltage Lockout Threshold (VUVLO ) If VCC drops below
known state and avoid current spikes, the ACS770 is held in Reset VUVLOL , output voltage will be locked to GND. If VCC starts
state. The Reset signal is disabled when VCC reaches VUVLOH and rising, the ACS770 will come out of the locked state when VCC
time tPORR has elapsed, allowing output voltage to go from a high reaches VUVLOH .
impedance state into normal operation. During power-down, the
Reset signal is enabled when VCC reaches VPORL , causing output UVLO Enable/Disable Delay Time (tUVLO ) When a falling VCC
voltage to go into a high impedance state. (Note that a detailed reaches VUVLOL , time tUVLOE is required to engage Undervoltage
description of POR and UVLO operation can be found in the Lockout state. When VCC rises above VUVLOH , time tUVLOD is
Functional Description section.) required to disable UVLO and have a valid output voltage.
Power-On Reset Release Time (tPORR) When VCC rises to
VPORH , the Power-On Reset Counter starts. The ACS770 output
voltage will transition from a high impedance state to normal
operation only when the Power-On Reset Counter has reached
tPORR and VCC has exceeded VUVLOH .

Functional Description
Power-On Reset (POR) and Undervoltage

Lock-Out (UVLO) Operation
The descriptions in this section assume: • VCC drops below VCC(min) = 4.5 V If VCC drops below VUV-
Temperature = 25°C, LOL [ 4′, 5 ] , the UVLO Enable Counter starts counting. If VCC is
VCC = 5 V, still below VUVLOL when the counter reaches tUVLOE , the UVLO
no output load, and function will be enabled and the ouput will be pulled near
no significant current flow through the sensor IC. GND [ 6 ] . If VCC exceeds VUVLOL before the UVLO Enable
Counter reaches tUVLOE [ 5′ ] , the output will continue to be
Voltage levels shown are specific to a bidirectional ACS770, VCC / 2.
however the POR and UVLO functionality described also applies
to unidirectional sensors.
• Coming Out of UVLO While UVLO is enabled [ 6 ] , if
VCC exceeds VUVLOH [ 7 ] , UVLO will be disabled after
The reference numbers section refer to figures 1 and 2.
tUVLOD , and the output will be VCC / 2 [ 8 ] .
• Power-Up At power-up, as VCC ramps up, the output is in a
high impedance state. When VCC crosses VPORH (location [1] • Power-Down As VCC ramps down below VUVLOL [ 6′, 9 ] , the
in figure 1 and [ 1′ ] in figure 2), the POR Release counter starts UVLO Enable Counter will start counting. If VCC is higher than
counting for tPORR . At this point, if VCC exceeds VUVLOH VPORL when the counter reaches tUVLOE , the UVLO function
[ 2′ ], the output will go to VCC / 2 after tUVLOD [ 3′ ] . will be enabled and the output will be pulled near GND [ 10 ] .
The output will enter a high impedance state as VCC goes below
If VCC does not exceed VUVLOH [2], the output will stay in VPORL [ 11 ] . If VCC falls below VPORL before the
the high impedance state until VCC reaches VUVLOH [3] and UVLO Enable Counter reaches tUVLOE , the output will transition
then will go to VCC / 2 after tUVLOD [ 4 ]. directly into a high impedance state [ 7′ ].

VCC
1 2 3 5 6 7 9 10 11
4 8
5.0
VUVLOH
VUVLOL
VPORH
VPORL
tUVLOE tUVLOE
GND
Time
VOUT Slope =
VCC / 2
2.5
tPORR
tUVLOD tUVLOD
GND
High Impedance High Impedance Time
Figure 1. POR and UVLO Operation: Slow Rise Time case
VCC
1’ 2’ 4’ 5’ 6’ 7’
3’
5.0
VUVLOH
VUVLOL
VPORH
VPORL < tUVLOE
GND
Time
VOUT
tPORR < tUVLOE
Slope = Slope =
VCC / 2 VCC / 2
2.5
tUVLOD
GND
High Impedance High Impedance Time
Figure 2. POR and UVLO Operation: Fast Rise Time case

Chopper Stabilization Technique

When using Hall-effect technology, a limiting factor for sourced signal then can pass through a low-pass filter,
switchpoint accuracy is the small signal voltage devel- while the modulated DC offset is suppressed.
oped across the Hall element. This voltage is dispropor- In addition to the removal of the thermal and stress
tionally small relative to the offset that can be produced related offset, this novel technique also reduces the
at the output of the Hall sensor IC. This makes it diffi- amount of thermal noise in the Hall sensor IC while
cult to process the signal while maintaining an accurate, completely removing the modulated residue result-
reliable output over the specified operating temperature ing from the chopper operation. The chopper stabi-
and voltage ranges. lization technique uses a high-frequency sampling
Chopper stabilization is a unique approach used to clock. For demodulation process, a sample-and-hold
minimize Hall offset on the chip. Allegro employs a technique is used. This high-frequency operation
patented technique to remove key sources of the output allows a greater sampling rate, which results in higher
drift induced by thermal and mechanical stresses. This accuracy and faster signal-processing capability. This
offset reduction technique is based on a signal modula- approach desensitizes the chip to the effects of thermal
tion-demodulation process. The undesired offset signal and mechanical stresses, and produces devices that
is separated from the magnetic field-induced signal in have extremely stable quiescent Hall output voltages
the frequency domain, through modulation. The sub- and precise recoverability after temperature cycling.
sequent demodulation acts as a modulation process for This technique is made possible through the use of a
the offset, causing the magnetic field-induced signal to BiCMOS process, which allows the use of low-offset,
recover its original spectrum at baseband, while the DC low-noise amplifiers in combination with high-density
offset becomes a high-frequency signal. The magnetic- logic integration and sample-and-hold circuits.
Regulator
Clock/Logic
Hall Element
Amp
Anti-Aliasing Tuned
LP Filter Filter
Concept of Chopper Stabilization Technique

Package CB, 5-pin package, leadform PFF

0.5
R1
R3
14.0±0.2 ∅ 0.5 B
R2 4
1.50±0.10
3.0±0.2 4.0±0.2
5 4 1º±2° 3 21.4
A
3.5±0.2
∅ 0.8
∅ 1.5
17.5±0.2
13.00±0.10
1.91
B PCB Layout Reference View

4.40±0.10 Branded
Face
2.9±0.2 NNNNNNN
5º±5° TTT - AAA
1 2 3 +0.060
0.381 –0.030
10.00±0.10
3.5±0.2
LLLLLLL
YYWW
1
7.00±0.10
C Standard Branding Reference View
N = Device part number
T = Temperature code
A = Amperage range
L = Lot number
0.51±0.10 Y = Last two digits of year of manufacture
W = Week of manufacture
1.9±0.2
= Supplier emblem
For Reference Only; not for tooling use (reference DWG-9111, DWG-9110)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Dambar removal intrusion

B Perimeter through-holes recommended
C Branding scale and appearance at supplier discretion
Creepage distance, current terminals to signal pins: 7.25 mm

Clearance distance, current terminals to signal pins: 7.25 mm
Package mass: 4.63 g typical

Package CB, 5-pin package, leadform PSF
14.0±0.2 ∅ 0.8 .031

3.0±0.2 4.0±0.2
∅ 1.5 .059
1.50±0.10
5 4
1.91 .075
Recommended PCB Layout View
A
2.75±0.10
23.50±0.5 NNNNNNN
TTT - AAA
13.00±0.10
LLLLLLL
4.40±0.10 YYWW
Branded
Face 1
2.9±0.2
5º±5° B Standard Branding Reference View
1 2 3 +0.060 N = Device part number

0.381 –0.030
T = Temperature code
A = Amperage range
10.00±0.10
3.5±0.2 L = Lot number
Y = Last two digits of year of manufacture
W = Week of manufacture
= Supplier emblem
For Reference Only; not for tooling use (reference DWG-9111, DWG-9110)
7.00±0.10 Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Dambar removal intrusion

B Branding scale and appearance at supplier discretion
0.51±0.10
1.9±0.2
Creepage distance, current terminals to signal pins: 7.25 mm

Clearance distance, current terminals to signal pins: 7.25 mm
Package mass: 4.63 g typical

Revision History
Revision Revision Date Description of Revision
1 December 8, 2014 Revised Selection Guide
Copyright ©2011-2014, Allegro MicroSystems, LLC

Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
Allegro’s product can reasonably be expected to cause bodily harm.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its use;
nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:

www.allegromicro.com


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ACS770xCB

Thermally Enhanced, Fully Integrated, Hall Effect-Based

Features and Benefits Description

The thickness of the copper conductor allows survival of the

Additional leadforms available for qualifying volumes

Allegro MicroSystems, LLC 2

Absolute Maximum Ratings

For basic (single) isolation per UL standard 990 VDC or Vpk

Allegro MicroSystems, LLC 3

Thermal Characteristics may require derating at maximum conditions

Typical Overcurrent Capabilities1,2

Allegro MicroSystems, LLC 4

Functional Block Diagram

Temperature EEPROM and

Terminal List Table

Allegro MicroSystems, LLC 5

Allegro MicroSystems, LLC 6

Allegro MicroSystems, LLC 7

Allegro MicroSystems, LLC 8

Allegro MicroSystems, LLC 9

Allegro MicroSystems, LLC 10

Allegro MicroSystems, LLC 11

Allegro MicroSystems, LLC 12

Allegro MicroSystems, LLC 13

Allegro MicroSystems, LLC 14

Characteristic Performance Data

Total Output Error versus Ambient Temperature

Mean + 3 sigma Mean Mean – 3 sigma

Allegro MicroSystems, LLC 15

Characteristic Performance Data

Total Output Error versus Ambient Temperature

Mean + 3 sigma Mean Mean – 3 sigma

Allegro MicroSystems, LLC 16

Characteristic Performance Data

Total Output Error versus Ambient Temperature

Mean + 3 sigma Mean Mean – 3 sigma

Allegro MicroSystems, LLC 17

Characteristic Performance Data

Total Output Error versus Ambient Temperature

Mean + 3 sigma Mean Mean – 3 sigma

Allegro MicroSystems, LLC 18

Characteristic Performance Data

Allegro MicroSystems, LLC 19

20% of input 20% of output

Allegro MicroSystems, LLC 20

UVLO Enable Time ( tUVLOE )

UVLO Disable Time ( tUVLOD )

Allegro MicroSystems, LLC 21

Definitions of Accuracy Characteristics

Allegro MicroSystems, LLC 22

Definitions of Dynamic Response Characteristics

Power-On Delay (tPOD). When the supply is ramped to its

Temperature Compensation Power-On Time (tTC ). After

output reaches 20% of its final value. Accuracy

(%) Applied Magnetic Field –IP (A) +IP (A)

Allegro MicroSystems, LLC 23

Allegro MicroSystems, LLC 24

Power-On Reset (POR) and Undervoltage

Allegro MicroSystems, LLC 25