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SN74CBT3257C 4 BIT 1 OF 2 FET MULTIPLEXER/DEMULTIPLEXER 5 V BUS SWITCH WITH 2 V UNDERSHOOT PROTECTION

SCDS137 OCTOBER 2003

D Undershoot Protection for Off-Isolation on D D D D D D D D D D D


A and B Ports Up To 2 V Bidirectional Data Flow, With Near-Zero Propagation Delay Low ON-State Resistance (ron) Characteristics (ron = 3 Typical) Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 5.5 pF Typical) Data and Control Inputs Provide Undershoot Clamp Diodes Low Power Consumption (ICC = 3 A Max) VCC Operating Range From 4 V to 5.5 V Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V) Control Inputs Can be Driven by TTL or 5-V/3.3-V CMOS Outputs Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Performance Tested Per JESD 22 2000-V Human-Body Model (A114-B, Class II) 1000-V Charged-Device Model (C101) Supports I2C Bus Expansion Supports Both Digital and Analog Applications: USB Interface, Bus Isolation, Low-Distortion Signal Gating

D, DB, DBQ, OR PW PACKAGE (TOP VIEW)

S 1B1 1B2 1A 2B1 2B2 2A GND

1 2 3 4 5 6 7 8

16 15 14 13 12 11 10 9

VCC OE 4B1 4B2 4A 3B1 3B2 3A

RGY PACKAGE (TOP VIEW)

16 15 OE 14 4B1 13 4B2 12 4A 11 3B1 10 3B2

1B1 1B2 1A 2B1 2B2 2A

2 3 4 5 6 7 8 9

D D

description/ordering information
ORDERING INFORMATION
TA QFN RGY SOIC D 40 C 85C 40C to 85 C SSOP DB SSOP (QSOP) DBQ TSSOP PW PACKAGE Tape and reel Tube Tape and reel Tape and reel Tape and reel Tube Tape and reel ORDERABLE PART NUMBER SN74CBT3257CRGYR SN74CBT3257CD SN74CBT3257CDR SN74CBT3257CDBR SN74CBT3257CDBQR SN74CBT3257CPW SN74CBT3257CPWR CU257C CBT3257C CU257C CU257C TOP-SIDE MARKING CU257C

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 2003, Texas Instruments Incorporated

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GND

3A

VCC

SCDS137 OCTOBER 2003

SN74CBT3257C 4 BIT 1 OF 2 FET MULTIPLEXER/DEMULTIPLEXER 5 V BUS SWITCH WITH 2 V UNDERSHOOT PROTECTION


description/ordering information (continued)
The SN74CBT3257C is a high-speed TTL-compatible FET multiplexer/demultiplexer with low ON-state resistance (ron), allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBT3257C provides protection for undershoot up to 2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state. The SN74CBT3257C is a 4-bit 1-of-2 multiplexer/demultiplexer with a single output-enable (OE) input. The select (S) input controls the data path of the multiplexer/demultiplexer. When OE is low, the multiplexer/demultiplexer is enabled and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the multiplexer/demultiplexer is disabled and a high-impedance state exists between the A and B ports. This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE INPUTS OE L L H S1 L H X INPUT/OUTPUT A B1 B2 Z FUNCTION A port = B1 port A port = B2 port Disconnect

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SN74CBT3257C 4 BIT 1 OF 2 FET MULTIPLEXER/DEMULTIPLEXER 5 V BUS SWITCH WITH 2 V UNDERSHOOT PROTECTION


SCDS137 OCTOBER 2003

logic diagram (positive logic)


4 1A SW 3 SW 7 2A SW 6 SW 9 SW 10 SW 12 4A SW 13 SW 4B2 14 4B1 3B2 11 2B2 5 2B1 1B2 2 1B1

3A

3B1

1 S

15 OE

simplified schematic, each FET switch (SW)


A B

Undershoot Protection Circuit

EN EN is the internal enable signal applied to the switch.

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SCDS137 OCTOBER 2003

SN74CBT3257C 4 BIT 1 OF 2 FET MULTIPLEXER/DEMULTIPLEXER 5 V BUS SWITCH WITH 2 V UNDERSHOOT PROTECTION


absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Control input voltage range, VIN (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Switch I/O voltage range, VI/O (see Notes 1, 2, and 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Control input clamp current, IIK (VIN < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA I/O port clamp current, II/OK (VI/O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA ON-state switch current, II/O (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Continuous current through VCC or GND terminals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA Package thermal impedance, JA (see Note 5): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73C/W (see Note 5): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82C/W (see Note 5): DBQ package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90C/W (see Note 5): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108C/W (see Note 6): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65C to 150C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltages are with respect to ground unless otherwise specified. 2. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 3. VI and VO are used to denote specific conditions for VI/O. 4. II and IO are used to denote specific conditions for II/O. 5. The package thermal impedance is calculated in accordance with JESD 51-7. 6. The package thermal impedance is calculated in accordance with JESD 51-5.

recommended operating conditions (see Note 7)


MIN VCC VIH VIL VI/O Supply voltage High-level control input voltage Low-level control input voltage Data input/output voltage 4 2 0 0 MAX 5.5 5.5 0.8 5.5 UNIT V V V V

TA Operating free-air temperature 40 85 C NOTE 7: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

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SN74CBT3257C 4 BIT 1 OF 2 FET MULTIPLEXER/DEMULTIPLEXER 5 V BUS SWITCH WITH 2 V UNDERSHOOT PROTECTION


SCDS137 OCTOBER 2003

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VIK VIKU IIN IOZ Ioff ICC ICC Cin Cio(OFF) Cio(ON) Control inputs Control inputs A port B port VI/O = 3 V or 0, VI/O = 3 V or 0, VCC = 4 V, TYP at VCC = 4 V ron VCC = 4.5 V Switch OFF, Switch ON, VI = 2.4 V, VI = 0 VIN = VCC or GND VIN = VCC or GND IO = 15 mA IO = 64 mA IO = 30 mA Control inputs Data inputs Control inputs VCC = 4.5 V, VCC = 5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 0, VCC = 5.5 V, VCC = 5.5 V, VIN = 3 V or 0 TEST CONDITIONS IIN = 18 mA 0 mA > II 50 mA, VIN = VCC or GND, VIN = VCC or GND VO = 0 to 5.5 V, VI = 0, VO = 0 to 5.5 V, II/O = 0, VIN = VCC or GND, One input at 3.4 V, MIN TYP MAX 1.8 Switch OFF 2 1 Switch OFF, VIN = VCC or GND VI = 0 Switch ON or OFF Other inputs at VCC or GND 3.5 8.5 5.5 16.5 8 3 3 12 6 6 10 10 3 2.5 UNIT V V A A A A mA pF pF pF pF

VI = 2.4 V, IO = 15 mA 5 10 VIN and IIN refer to control inputs. VI, VO, II, and IO refer to data pins. All typical values are at VCC = 5 V (unless otherwise noted), TA = 25C. For I/O ports, the parameter IOZ includes the input leakage current. This is the increase in supply current for each input that is at the specified voltage level, rather than VCC or GND. Measured by the voltage drop between the A and B terminals at the indicated current through the switch. ON-state resistance is determined by the lower of the voltages of the two (A or B) terminals.

switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 3)
PARAMETER tpd# tpd(s) ten tdis FROM (INPUT) A or B S S OE S OE TO (OUTPUT) B or A A B A or B B A or B VCC = 4 V MIN MAX 0.24 6 6.3 6.3 6.5 5.9 1.5 1.5 1.5 1.5 1.5 VCC = 5 V 0.5 V MIN MAX 0.15 5.6 5.8 5.8 6 ns 5.9 ns ns ns UNIT

# The propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance).

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SCDS137 OCTOBER 2003

SN74CBT3257C 4 BIT 1 OF 2 FET MULTIPLEXER/DEMULTIPLEXER 5 V BUS SWITCH WITH 2 V UNDERSHOOT PROTECTION


undershoot characteristics (see Figures 1 and 2)
PARAMETER TEST CONDITIONS VIN = VCC or GND MIN 2 TYP VOH0.3 MAX UNIT V VOUTU VCC = 5.5 V, Switch OFF, All typical values are at VCC = 5 V (unless otherwise noted), TA = 25C. VCC Input Generator 50 Ax VS 11 V 100 k DUT Bx 100 k 10 pF Output (VOUTU) Input (Open Socket) 90 % 2 ns 10 % 20 ns VOH VOH 0.3 2 ns 10 % 2 V 90 % 5.5 V

Figure 1. Device Test Setup

Figure 2. Transient Input Voltage (VI) and Output Voltage (VOUTU) Waveforms (Switch OFF)

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SN74CBT3257C 4 BIT 1 OF 2 FET MULTIPLEXER/DEMULTIPLEXER 5 V BUS SWITCH WITH 2 V UNDERSHOOT PROTECTION


SCDS137 OCTOBER 2003

PARAMETER MEASUREMENT INFORMATION


VCC Input Generator VIN 50 VG1 50 DUT 7V Input Generator 50 VG2 VI 50 VO CL (see Note A) RL RL S1 Open GND

TEST CIRCUIT

TEST tpd(s) tPLZ/tPZL tPHZ/tPZH

VCC 5 V 0.5 V 4V 5 V 0.5 V 4V 5 V 0.5 V 4V

S1 Open Open 7V 7V Open Open

RL 500 500 500 500 500 500

VI VCC or GND VCC or GND GND GND VCC VCC Output Control (VIN) tPZL

CL 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF

0.3 V 0.3 V 0.3 V 0.3 V

3V 1.5 V 1.5 V 0V tPLZ 3.5 V 1.5 V VOL + V tPHZ VOH V VOH 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES VOL

Output Control (VIN) tPLH Output

3V 1.5 V 1.5 V 0V tPHL VOH 1.5 V 1.5 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES (tpd(s))

Output Waveform 1 S1 at 7 V (see Note B) tPZH Output Waveform 2 S1 at Open (see Note B)

1.5 V

NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd(s). The tpd propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). H. All parameters and waveforms are not applicable to all devices.

Figure 3. Test Circuit and Voltage Waveforms

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MECHANICAL DATA
MSOI004E JANUARY 1995 REVISED MAY 2002

DBQ (RPDSOG**)

PLASTIC SMALLOUTLINE PACKAGE

0.025 (0,64) 24

0.012 (0,30) 0.008 (0,20) 13

0.005 (0,13)

0.157 (3,99) 0.150 (3,81)

0.244 (6,20) 0.228 (5,80)

0.008 (0,20) NOM

Gauge Plane 1 A 08 0.069 (1,75) MAX 0.035 (0,89) 0.016 (0,40) 12 0.010 (0,25)

Seating Plane 0.010 (0,25) 0.004 (0,10) 0.004 (0,10)

PINS ** DIM A MAX

16 0.197 (5,00) 0.189 (4,80)

20 0.344 (8,74) 0.337 (8,56)

24 0.344 (8,74) 0.337 (8,56)

28 0.394 (10,01) 0.386 (9,80)

A MIN

M0137 VARIATION

AB

AD

AE

AF

4073301/F 02/2002 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). D. Falls within JEDEC MO137.

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MECHANICAL DATA
MSSO002E JANUARY 1995 REVISED DECEMBER 2001

DB (R-PDSO-G**)
28 PINS SHOWN 0,65 28 0,38 0,22 15 0,15 M

PLASTIC SMALL-OUTLINE

0,25 0,09 5,60 5,00 8,20 7,40

Gage Plane 1 A 14 0 8 0,25 0,95 0,55

Seating Plane 2,00 MAX 0,05 MIN 0,10

PINS ** DIM A MAX

14

16

20

24

28

30

38

6,50

6,50

7,50

8,50

10,50

10,50

12,90

A MIN

5,90

5,90

6,90

7,90

9,90

9,90

12,30 4040065 /E 12/01

NOTES: A. B. C. D.

All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150

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MECHANICAL DATA
MTSS001C JANUARY 1995 REVISED FEBRUARY 1999

PW (R-PDSO-G**)
14 PINS SHOWN

PLASTIC SMALL-OUTLINE PACKAGE

0,65 14 8

0,30 0,19

0,10 M

0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 A 7 0 8 0,75 0,50

Seating Plane 1,20 MAX 0,15 0,05 0,10

PINS ** DIM A MAX

14

16

20

24

28

3,10

5,10

5,10

6,60

7,90

9,80

A MIN

2,90

4,90

4,90

6,40

7,70

9,60

4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153

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