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SN54AHCT04, SN74AHCT04

HEX INVERTERS
SCLS232N OCTOBER 1995 REVISED JULY 2003

D Inputs Are TTL-Voltage Compatible


D Latch-Up Performance Exceeds 250 mA Per

D ESD Protection Exceeds JESD 22


2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)

JESD 17
SN54AHCT04 . . . J OR W PACKAGE
SN74AHCT04 . . . D, DB, DGV, N, NS,
OR PW PACKAGE
(TOP VIEW)

12

11

10

1Y
2A
2Y
3A
3Y

14

1Y
1A
NC
VCC
6A

VCC

1
2

13 6A

12 6Y

11 5A

2A
NC
2Y
NC
3A

10 5Y
9 4A

5
6
7

2 1 20 19
18

17

16

15

14
9 10 11 12 13

6Y
NC
5A
NC
5Y

3Y
GND
NC
4Y
4A

13

VCC
6A
6Y
5A
5Y
4A
4Y

4Y

14

1A

GND

1A
1Y
2A
2Y
3A
3Y
GND

SN54AHCT04 . . . FK PACKAGE
(TOP VIEW)

SN74AHCT04 . . . RGY PACKAGE


(TOP VIEW)

NC No internal connection

description/ordering information
The AHCT04 devices contain six independent inverters. These devices perform the Boolean function Y = A.
ORDERING INFORMATION

Tape and reel

SN74AHCT04RGYR

HB04

PDIP N

Tube

SN74AHCT04N

SN74AHCT04N

Tube

SN74AHCT04D

Tape and reel

SN74AHCT04DR

SOP NS

Tape and reel

SN74AHCT04NSR

AHCT04

SSOP DB

Tape and reel

SN74AHCT04DBR

HB04

Tube

SN74AHCT04PW

Tape and reel

SN74AHCT04PWR

TVSOP DGV

Tape and reel

SN74AHCT04DGVR

HB04

CDIP J

Tube

SNJ54AHCT04J

SNJ54AHCT04J

CFP W

Tube

SNJ54AHCT04W

SNJ54AHCT04W

LCCC FK

Tube

SNJ54AHCT04FK

SNJ54AHCT04FK

TSSOP PW

55C
55 C to 125
125C
C

TOP-SIDE
MARKING

QFN RGY

SOIC D
40C to 85C

ORDERABLE
PART NUMBER

PACKAGE

TA

AHCT04

HB04

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLE
(each inverter)
INPUT
A

OUTPUT
Y

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.


Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

On products compliant to MIL-PRF-38535, all parameters are tested


unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

SN54AHCT04, SN74AHCT04
HEX INVERTERS
SCLS232N OCTOBER 1995 REVISED JULY 2003

logic diagram, each inverter (positive logic)


A

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Package thermal impedance, JA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86C/W
(see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96C/W
(see Note 2): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127C/W
(see Note 2): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80C/W
(see Note 2): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76C/W
(see Note 2): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113C/W
(see Note 3): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65C to 150C

Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
3. The package thermal impedance is calculated in accordance with JESD 51-5.

recommended operating conditions (see Note 4)


SN54AHCT04

SN74AHCT04

MIN

MAX

MIN

MAX

4.5

5.5

4.5

5.5

VCC

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

VI

Input voltage

5.5

VO

Output voltage

VCC

IOH

High-level output current

IOL

Low-level output current

t/v

Input transition rise or fall rate

TA

Operating free-air temperature

2
0.8

V
V

0.8

5.5

VCC

55

UNIT

V
mA

mA

20

20

ns/V

85

125

40

NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

SN54AHCT04, SN74AHCT04
HEX INVERTERS
SCLS232N OCTOBER 1995 REVISED JULY 2003

electrical characteristics over recommended operating free-air temperature range (unless


otherwise noted)
PARAMETER

TEST CONDITIONS

VCC

IOH = 50 mA

VOH

45V
4.5

IOH = 8 mA
IOL = 50 mA

VOL

TA = 25C
MIN

TYP

4.4

4.5

SN54AHCT04
MAX

3.94

45V
4.5

IOL = 8 mA

II

VI = 5.5 V or GND

ICC

VI = VCC or GND,

ICC

One input at 3.4 V,


Other inputs at VCC or GND

Ci

VI = VCC or GND

MAX

SN74AHCT04
MIN

4.4

4.4

3.8

3.8

MAX

UNIT
V

0.1

0.1

0.1

0.36

0.44

0.44

0.1

1*

mA

5.5 V

20

20

mA

5.5 V

1.35

1.5

1.5

mA

10

pF

0 V to 5.5 V
IO = 0

MIN

5V

10

* On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V.


This is the increase in supply current for each input at one of the specified TTL voltage levels, rather than 0 V or V .
CC

switching characteristics over recommended operating free-air temperature range,


VCC = 5 V 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
tPLH
tPHL

FROM
(INPUT)

TO
(OUTPUT)

LOAD
CAPACITANCE

CL = 15 pF

CL = 50 pF

TA = 25C
MIN

SN54AHCT04
MAX

SN74AHCT04

TYP

MAX

MIN

MIN

MAX

4.7**

6.7**

1**

7.5**

7.5

4.7**

6.7**

1**

7.5**

7.5

5.5

7.7

8.5

8.5

5.5

7.7

8.5

8.5

UNIT
ns
ns

** On products compliant to MIL-PRF-38535, this parameter is not production tested.

noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25C (see Note 5)


SN74AHCT04
PARAMETER

MIN

TYP

MAX

UNIT

VOL(P)

Quiet output, maximum dynamic VOL

0.8

VOL(V)

Quiet output, minimum dynamic VOL

0.8

VOH(V)

Quiet output, minimum dynamic VOH

4.7

VIH(D)

High-level dynamic input voltage

VIL(D)

Low-level dynamic input voltage

V
0.8

NOTE 5: Characteristics are for surface-mount packages only.

operating characteristics, VCC = 5 V, TA = 25C


PARAMETER
Cpd

TEST CONDITIONS

Power dissipation capacitance

No load,

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

f = 1 MHz

TYP
14

UNIT
pF

SN54AHCT04, SN74AHCT04
HEX INVERTERS
SCLS232N OCTOBER 1995 REVISED JULY 2003

PARAMETER MEASUREMENT INFORMATION


VCC
From Output
Under Test

RL = 1 k

From Output
Under Test

Test
Point

S1

Open

TEST

GND

CL
(see Note A)

CL
(see Note A)

S1

tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain

Open
VCC
GND
VCC

LOAD CIRCUIT FOR


3-STATE AND OPEN-DRAIN OUTPUTS

LOAD CIRCUIT FOR


TOTEM-POLE OUTPUTS

3V
1.5 V

Timing Input

0V

tw
3V
1.5 V

Input

1.5 V

th

tsu

3V
1.5 V

Data Input

1.5 V

0V

0V

VOLTAGE WAVEFORMS
PULSE DURATION

VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3V

1.5 V

Input

1.5 V
0V

tPLH

tPHL
VOH

In-Phase
Output

50% VCC
tPHL

Out-of-Phase
Output

50% VCC
VOL

Output
Waveform 1
S1 at VCC
(see Note B)

1.5 V

VOH
50% VCC
VOL

tPLZ
VCC
50% VCC

Output
Waveform 2
S1 at GND
(see Note B)

VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS

1.5 V
0V

tPZL

tPZH

tPLH
50% VCC

3V

Output
Control

VOL + 0.3 V

VOL

tPHZ
50% VCC

VOH 0.3 V

VOH
0 V

VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING

NOTES: A. CL includes probe and jig capacitance.


B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 , tr 3 ns, tf 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. All parameters and waveforms are not applicable to all devices.

Figure 1. Load Circuit and Voltage Waveforms

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM


www.ti.com

21-Dec-2009

PACKAGING INFORMATION
Orderable Device

Status (1)

Package
Type

Package
Drawing

Pins Package Eco Plan (2)


Qty

Lead/Ball Finish

MSL Peak Temp (3)

5962-9680401Q2A

ACTIVE

LCCC

FK

20

TBD

5962-9680401QCA

ACTIVE

CDIP

14

TBD

5962-9680401QDA

ACTIVE

CFP

14

SN74AHCT04D

ACTIVE

SOIC

14

50

SN74AHCT04DBLE

OBSOLETE

SSOP

DB

14

SN74AHCT04DBR

ACTIVE

SSOP

DB

14

2000 Green (RoHS &


no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

SN74AHCT04DBRE4

ACTIVE

SSOP

DB

14

2000 Green (RoHS &


no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

SN74AHCT04DBRG4

ACTIVE

SSOP

DB

14

2000 Green (RoHS &


no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

SN74AHCT04DE4

ACTIVE

SOIC

14

50

Green (RoHS &


no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

SN74AHCT04DG4

ACTIVE

SOIC

14

50

Green (RoHS &


no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

SN74AHCT04DGVR

ACTIVE

TVSOP

DGV

14

2000 Green (RoHS &


no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

SN74AHCT04DGVRE4

ACTIVE

TVSOP

DGV

14

2000 Green (RoHS &


no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

SN74AHCT04DGVRG4

ACTIVE

TVSOP

DGV

14

2000 Green (RoHS &


no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

SN74AHCT04DR

ACTIVE

SOIC

14

2500 Green (RoHS &


no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

SN74AHCT04DRE4

ACTIVE

SOIC

14

2500 Green (RoHS &


no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

SN74AHCT04DRG4

ACTIVE

SOIC

14

2500 Green (RoHS &


no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

SN74AHCT04N

ACTIVE

PDIP

14

25

Pb-Free
(RoHS)

CU NIPDAU

N / A for Pkg Type

SN74AHCT04NE4

ACTIVE

PDIP

14

25

Pb-Free
(RoHS)

CU NIPDAU

N / A for Pkg Type

SN74AHCT04NSR

ACTIVE

SO

NS

14

2000 Green (RoHS &


no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

SN74AHCT04NSRE4

ACTIVE

SO

NS

14

2000 Green (RoHS &


no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

SN74AHCT04NSRG4

ACTIVE

SO

NS

14

2000 Green (RoHS &


no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

SN74AHCT04PW

ACTIVE

TSSOP

PW

14

90

Green (RoHS &


no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

SN74AHCT04PWE4

ACTIVE

TSSOP

PW

14

90

Green (RoHS &


no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

SN74AHCT04PWG4

ACTIVE

TSSOP

PW

14

90

Green (RoHS &


no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

SN74AHCT04PWLE

OBSOLETE

TSSOP

PW

14

SN74AHCT04PWR

ACTIVE

TSSOP

PW

14

2000 Green (RoHS &


no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

SN74AHCT04PWRE4

ACTIVE

TSSOP

PW

14

2000 Green (RoHS &


no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

A42

N / A for Pkg Type

TBD

A42

N / A for Pkg Type

Green (RoHS &


no Sb/Br)

CU NIPDAU

TBD

TBD

Addendum-Page 1

POST-PLATE N / A for Pkg Type

Call TI

Call TI

Level-1-260C-UNLIM
Call TI

Call TI

PACKAGE OPTION ADDENDUM


www.ti.com

21-Dec-2009

Orderable Device

Status (1)

Package
Type

Package
Drawing

Pins Package Eco Plan (2)


Qty

SN74AHCT04PWRG4

ACTIVE

TSSOP

PW

14

2000 Green (RoHS &


no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

SN74AHCT04RGYR

ACTIVE

VQFN

RGY

14

3000 Green (RoHS &


no Sb/Br)

CU NIPDAU

Level-2-260C-1 YEAR

SN74AHCT04RGYRG4

ACTIVE

VQFN

RGY

14

3000 Green (RoHS &


no Sb/Br)

CU NIPDAU

Level-2-260C-1 YEAR

SNJ54AHCT04FK

ACTIVE

LCCC

FK

20

TBD

SNJ54AHCT04J

ACTIVE

CDIP

14

TBD

A42

N / A for Pkg Type

SNJ54AHCT04W

ACTIVE

CFP

14

TBD

A42

N / A for Pkg Type

Lead/Ball Finish

MSL Peak Temp (3)

POST-PLATE N / A for Pkg Type

(1)

The marketing status values are defined as follows:


ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.

Addendum-Page 2

PACKAGE MATERIALS INFORMATION


www.ti.com

30-Jul-2010

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins


Type Drawing

SPQ

Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)

B0
(mm)

K0
(mm)

P1
(mm)

W
Pin1
(mm) Quadrant

SN74AHCT04DBR

SSOP

DB

14

2000

330.0

16.4

8.2

6.6

2.5

12.0

16.0

Q1

SN74AHCT04DGVR

TVSOP

DGV

14

2000

330.0

12.4

6.8

4.0

1.6

8.0

12.0

Q1

SN74AHCT04DR

SOIC

14

2500

330.0

16.4

6.5

9.0

2.1

8.0

16.0

Q1

SN74AHCT04NSR

SO

NS

14

2000

330.0

16.4

8.2

10.5

2.5

12.0

16.0

Q1

SN74AHCT04PWR

TSSOP

PW

14

2000

330.0

12.4

6.9

5.6

1.6

8.0

12.0

Q1

SN74AHCT04RGYR

VQFN

RGY

14

3000

330.0

12.4

3.75

3.75

1.15

8.0

12.0

Q1

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION


www.ti.com

30-Jul-2010

*All dimensions are nominal

Device

Package Type

Package Drawing

Pins

SPQ

Length (mm)

Width (mm)

Height (mm)

SN74AHCT04DBR

SSOP

DB

14

2000

346.0

346.0

33.0

SN74AHCT04DGVR

TVSOP

DGV

14

2000

346.0

346.0

29.0

SN74AHCT04DR

SOIC

14

2500

346.0

346.0

33.0

SN74AHCT04NSR

SO

NS

14

2000

346.0

346.0

33.0

SN74AHCT04PWR

TSSOP

PW

14

2000

346.0

346.0

29.0

SN74AHCT04RGYR

VQFN

RGY

14

3000

346.0

346.0

29.0

Pack Materials-Page 2

MECHANICAL DATA
MLCC006B OCTOBER 1996

FK (S-CQCC-N**)

LEADLESS CERAMIC CHIP CARRIER

28 TERMINAL SHOWN

18

17

16

15

14

13

NO. OF
TERMINALS
**

12

19

11

20

10

MIN

MAX

MIN

MAX

20

0.342
(8,69)

0.358
(9,09)

0.307
(7,80)

0.358
(9,09)

28

0.442
(11,23)

0.458
(11,63)

0.406
(10,31)

0.458
(11,63)

21

22

44

0.640
(16,26)

0.660
(16,76)

0.495
(12,58)

0.560
(14,22)

23

52

0.739
(18,78)

0.761
(19,32)

0.495
(12,58)

0.560
(14,22)

24

6
68

0.938
(23,83)

0.962
(24,43)

0.850
(21,6)

0.858
(21,8)

84

1.141
(28,99)

1.165
(29,59)

1.047
(26,6)

1.063
(27,0)

B SQ
A SQ

25

26

27

28

4
0.080 (2,03)
0.064 (1,63)

0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)

0.055 (1,40)
0.045 (1,14)

0.045 (1,14)
0.035 (0,89)

0.045 (1,14)
0.035 (0,89)

0.028 (0,71)
0.022 (0,54)
0.050 (1,27)

4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.

All linear dimensions are in inches (millimeters).


This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

MECHANICAL DATA
MPDS006C FEBRUARY 1996 REVISED AUGUST 2000

DGV (R-PDSO-G**)

PLASTIC SMALL-OUTLINE

24 PINS SHOWN

0,40

0,23
0,13

24

13

0,07 M

0,16 NOM
4,50
4,30

6,60
6,20

Gage Plane

0,25
08
1

0,75
0,50

12
A

Seating Plane
0,15
0,05

1,20 MAX

PINS **

0,08

14

16

20

24

38

48

56

A MAX

3,70

3,70

5,10

5,10

7,90

9,80

11,40

A MIN

3,50

3,50

4,90

4,90

7,70

9,60

11,20

DIM

4073251/E 08/00
NOTES: A.
B.
C.
D.

All linear dimensions are in millimeters.


This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
Falls within JEDEC: 24/48 Pins MO-153
14/16/20/56 Pins MO-194

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

MECHANICAL DATA
MSSO002E JANUARY 1995 REVISED DECEMBER 2001

DB (R-PDSO-G**)

PLASTIC SMALL-OUTLINE

28 PINS SHOWN
0,38
0,22

0,65
28

0,15 M

15

0,25
0,09
8,20
7,40

5,60
5,00

Gage Plane
1

14

0,25

08

0,95
0,55

Seating Plane
2,00 MAX

0,10

0,05 MIN

PINS **

14

16

20

24

28

30

38

A MAX

6,50

6,50

7,50

8,50

10,50

10,50

12,90

A MIN

5,90

5,90

6,90

7,90

9,90

9,90

12,30

DIM

4040065 /E 12/01
NOTES: A.
B.
C.
D.

All linear dimensions are in millimeters.


This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

MECHANICAL DATA
MTSS001C JANUARY 1995 REVISED FEBRUARY 1999

PW (R-PDSO-G**)

PLASTIC SMALL-OUTLINE PACKAGE

14 PINS SHOWN

0,30
0,19

0,65
14

0,10 M

0,15 NOM
4,50
4,30

6,60
6,20
Gage Plane
0,25

7
0 8
A

0,75
0,50

Seating Plane
0,15
0,05

1,20 MAX

PINS **

0,10

14

16

20

24

28

A MAX

3,10

5,10

5,10

6,60

7,90

9,80

A MIN

2,90

4,90

4,90

6,40

7,70

9,60

DIM

4040064/F 01/97
NOTES: A.
B.
C.
D.

All linear dimensions are in millimeters.


This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

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