Esd Protection Design Guide: Tvs Diode Arrays: ©2012 Littelfuse, Inc 1
Esd Protection Design Guide: Tvs Diode Arrays: ©2012 Littelfuse, Inc 1
Esd Protection Design Guide: Tvs Diode Arrays: ©2012 Littelfuse, Inc 1
Table of Contents
Introduction:.................................................................................................................................................................................. 3
TVS Diode Array (SPATM) Series Descriptions............................................................................................................................ 4
General Purpose ESD Protection ............................................................................................................................................... 4
Low Capacitance ESD Protection .............................................................................................................................................. 7
Lightning Surge Protection ........................................................................................................................................................ 9
EMI Filter Arrays with ESD Protection ....................................................................................................................................... 11
TVS Diode Array Ordering Guide ................................................................................................................................................ 12
Application Specific Device Selection ......................................................................................................................................... 14
USB1.1 ...................................................................................................................................................................................... 14
USB2.0 ...................................................................................................................................................................................... 15
USB3.0 (Two Device Solution)................................................................................................................................................... 16
USB3.0 (Fully Integrated Solution) ............................................................................................................................................. 17
HDMI ......................................................................................................................................................................................... 18
HDMI (includes protection for Ethernet and 5V power) ............................................................................................................. 19
Display Port ............................................................................................................................................................................... 20
DVI ............................................................................................................................................................................................. 21
10/100/1000 Ethernet, Intra-building Lighting Immunity (GR-1089) ........................................................................................... 22
10/100/1000 Ethernet, Inter-building Lighting Immunity (GR-1089)........................................................................................... 23
10/100/1000 Ethernet, Tertiary Only Lighting Immunity (General)............................................................................................. 24
10/100/1000 Ethernet (ESD only) .............................................................................................................................................. 25
eSATA........................................................................................................................................................................................ 26
1394a/b ...................................................................................................................................................................................... 27
LVDS (Low Voltage Differential Signaling) ................................................................................................................................. 28
Audio (Speaker/Microphone) ..................................................................................................................................................... 29
Analog Video.............................................................................................................................................................................. 30
Keypad/Push Buttons ................................................................................................................................................................ 31
SIM Socket ................................................................................................................................................................................ 32
RS-232 ....................................................................................................................................................................................... 33
RS-485 ....................................................................................................................................................................................... 34
CAN Bus .................................................................................................................................................................................... 35
LCD and Camera Interfaces (Mobile) ......................................................................................................................................... 36
Appendix A ................................................................................................................................................................................... 37
SPA Package Outlines ............................................................................................................................................................. 37
Introduction: Most all manufacturers require that their equipment pass Level 4,
Designers of today’s electronic devices have demanded more or ±8kV, as a minimum, however, some are looking for increased
functionality with greater flexibility and higher levels of user reliability and require that their devices pass a much higher level
interaction. These circumstances have helped in driving the like ±15kV or ±30kV.
development of nanometer chipsets along with a multitude of
user interfaces or ports. The confluence of these two has made
Conclusions:
electronic devices more susceptible to ESD and required the need
The system level ESD test defined by the IEC produces a
for a more robust solution.
substantial increase in peak current compared to the military
standard. If an IC is rated for 0.5kV per the MIL-STD and the
ESD Standards:
equipment manufacturer tests this same IC at 8kV per the IEC
MIL-STD-883, Method 3015
specification, the chip will see nearly a 100 fold increase in peak
Historically, analog and digital designers have been required to
current (i.e. 0.33A vs. 30A)!
have ESD protection “on-chip” to protect the IC during
manufacturing. The most commonly used ESD standard in the Ultimately, hardware or board designers must add supplementary
manufacturing environment is the MIL-STD-883, Method 3015 ESD devices to protect these sensitive chipsets from the high
and it’s also referred to as the Human Body Model (HBM). This level ESD threats seen in the field.
model discharges a 100pF capacitor through a 1500Ω resistor into
the device under test. The table below points out the four test Solutions:
levels as defined in the standard. Littelfuse TVS Diode Arrays (SPATM Family) are an ideal choice for
suppressing ESD as their speed and clamping levels are essential
to protect today’s integrated circuits unlike the previous MLV,
HBM Level Contact Discharge (kV) Peak Current (A)
MOV, and polymer technologies. The SPATM portfolio offers a
1 ±0.5 0.33 wide range of devices to suit the majority of application needs
2 ±1 0.67 available in the market today, and this guide will steer the
3 ±2 1.33 designer toward the appropriate ESD device for the particular
4 ±4 2.67 application they’re trying to protect.
Some of the applications discussed in this guide are:
The maximum level required for a typical IC had been ±2kV up ● USB1.1/2.0/3.0 ● Analog Video
until 2007, but today that level has been drastically reduced to ● HDMI ● SIM Sockets
±0.5kV. Obviously, this has helped chip designers save valuable
● DisplayPort ● RS-232
silicon area for more functionality, but in turn, it has made the IC
● DVI ● RS-485
much more susceptible to damage from ESD.
● 10/100/1000 Ethernet ● CAN Bus
I/O Cap
ESD Level Lightning Number of Package
Series Schematic (Example) VR= 0V VRWM
(Contact) (tP=8/20μs) Channels Options
(@ Bias)
SOT23-3
2
SC70-3
3 SOT143
50pF SOT23-5
SP05 ±30kV 5.5V N/A 4
(30pF @ 2.5V) SC70-5
SOT23-6
5
SC70-6
6 MSOP-8
SC70-3
2
SOT553
12pF SC70-5
SP1001 ±15kV 5.5V 2A 4
(8pF @ 2.5V) SOT553
SC70-6
5
SOT563
1 SC70-3
6pF
SP1002 ±8kV 6V 2A
(5pF @ 2.5V)
2 SC70-5
30pF SOD723
SP1003 ±30kV 5V 7A 1
(17pF @ 2.5V) SOD882
6pF
SP1004 ±8kV 6V 2A 4 SOT953
(5pF @ 1.5V)
I/O Cap
ESD Level Lightning Number of Package
Series Schematic (Example) VR= 0V VRWM
(Contact) (tP=8/20μs) Channels Options
(@ Bias)
30pF 0201
SP1005 ±30kV 6V 10A 1
(23pF @ 2.5V) Flipchip
0201
25pF
SP1006 ±30kV 6V 5A 1 μDFN-2
(15pF @ 2.5V)
0.6x0.3mm
5pF 0201
SP1007 ±8kV 6V 2A 1
(3.5pF @ 5V) Flipchip
6pF μDFN-6
SP1010 ±8kV 6V 1A 4
(3.5pF @ 2.5V) 1.25x1.0mm
μDFN-6
12pF
SP1011 ±15kV 6V 2A 4 1.25x1.0mm
(7pF @ 2.5V)
30V or SOIC-16
SP720 ±4kV 3pF 3A 14
(±15V) PDIP-16
30V or SOIC-8
SP721 ±4kV 3pF 3A 6
(±15V) PDIP-8
30V or SOIC-8
SP723 ±8kV 5pF 7A 6
(±15V) PDIP-8
20V or
SP724 ±8kV 3pF 3A 4 SOT23-6
(±10V)
30V or
SP725 ±8kV 5pF 14A 4 SOIC-8
(±15V)
SC70-6
SOT23-6
SP3002 ±12kV 0.85pF 6V 4.5A 4
μDFN-6
1.6x1.6mm
SC70-5
2
SOT553
SC70-6
SP3003 ±8kV 0.65pF 6V 2.5A 4 SOT563
MSOP-10
8 MSOP-10
μDFN-10
SP3010 ±8kV 0.45pF 6V 3A 4
2.5x1.0mm
μDFN-14
SP3011 ±8kV 0.40pF 6V 3A 6
3.5x1.35mm
μDFN-10
SP3012 ±12kV 0.50pF 5V 4A 4
2.5x1.0mm
SP3021
(2012 ±8kV 0.50pF 5V 1A 1 SOD882
release)
SP3031
(2012 ±10kV 0.80pF 5V 5A 1 SOD882
release)
16pF
SP03-3.3 ±30kV (8pF 3.3V 150A 2 SOIC-8
I/O to I/O)
9pF
SP03A-3.3 ±30kV (4.5pF 3.3V 150A 2 SOIC-8
I/O to I/O)
16pF
SP03-6 ±30kV (8pF 6V 150A 2 SOIC-8
I/O to I/O)
5pF
SP4040 ±30kV (2.5pF 3.3V 75A 2 SOIC-8
I/O to I/O)
µDFN-10
SP4061 ±30kV 3.5pF 2.5V 20A 4
2.6x2.6mm
µDFN-10
SP4062 ±30kV 3.5pF 3.3V 20A 4
2.6x2.6mm
μDFN-8
4
1.7x1.35mm
μDFN-16
8
3.3x1.35mm
μDFN-8
4
1.7x1.35mm
30pF ≥ -30dB @
SP6002 ±30kV 6V
(CDIODE=15pF) 1GHz
μDFN-12
6
2.5x1.35mm
μDFN-8
4
1.7x1.35mm
SP6003
14pF ≥ -20dB @
(not yet ±15kV 6V
(CDIODE=7pF) 1GHz
released)
μDFN-12
6
2.5x1.35mm
SOT23-3 SP0502BAHTG
2
SC70-3 SP0502BAJTG
3 SOT143 SP0503BAHTG
SOT23-5 SP0504BAHTG
SP05 4
SC70-5 SP0504BAJTG
SOT23-6 SP0505BAHTG
5
SC70-6 SP0505BAJTG
6 MSOP-8 SP0506BAATG
SC70-3 SP1001-02JTG
2
SOT553 SP1001-02XTG
SC70-5 SP1001-04JTG
SP1001 4
SOT553 SP1001-04XTG
SC70-6 SP1001-05JTG
5
SOT56 SP1001-05XTG
1 SC70-3 SP1002-01JTG
SP1002
2 SC70-5 SP1002-02JTG
SOD723 SP1003-01DTG
SP1003 1
SOD882 SP1003-01ETG
SOT23-6 SP3002-04HTG
SC70-5 SP3003-02JTG
2
SOT553 SP3003-02XTG
SC70-6 SP3003-04JTG
SP3003
4 SOT563 SP3003-04XTG
MSOP-10 SP3003-04ATG
8 MSOP-10 SP3003-08ATG
SP3004 4 SOT563 SP3004-04XTG
©2012 Littelfuse, Inc 12
ESD PROTECTION DESIGN GUIDE: TVS DIODE ARRAYS
14 PDIP-16 SP720APP
SP720
14 SOIC-16 SP720AB*G
6 PDIP-8 SP721APP
SP721
6 SOIC-8 SP721AB*G
6 PDIP-8 SP723APP
SP723
6 SOIC-8 SP723AB*G
Considerations:
● Each port operates at either 1.5Mbps or 12Mbps (low and full speed respectively)
• Parasitic capacitance should be taken into account although these relatively slow speeds can tolerate tens of picofarads
Application Schematic:
USB Controller
USB Port
VBUS
D+
D+
D-
Outside SP0502
World IC
SP1003
ESD Level
Ordering Number I/O Capacitance @ VR=2.5V # of Channels VRWM Packaging
(Contact)
Considerations:
● Each port can operate up to 480Mbps
• The high data rate requires a low capacitance device to preserve signal integrity
● Requires 2 channels of data line protection per port (i.e. D±) which can be done via array or discretely
• A 4 channel device such as the SP3002-04 can be useful if protecting a USB stack of 2 ports to make the ESD footprint as small as possible
• VBUS can be protected by connecting it to the VCC pin on the diode array or by using a separate single channel device like the SP1003
Application Schematic:
USB Port USB Controller
VBUS
D+
D-
Outside Optional
World IC
SP3003
NC
VBUS
D
D-
Outside
IC
World
SP3031 (x2)
Considerations:
● Each port depending upon what it’s connected to can operate:
• Up to 5Gbps over the new super-speed data pairs, SSTX± and SSRX±
• Up to 480Mbps on the legacy data pair, D±
● Requires 4 channels of ultra-low capacitance protection for the super-speed data pair (i.e. SSTX± and SSRX±)
Application Schematic:
VBUS
D+
D-
SP3003
Optional
Outside NC
IC
World
SSTX+
SSTX-
GND SP3012
SSRX+
SSRX-
*Package is shown as transparent
Considerations:
● Each port depending upon what it’s connected to can operate:
• Up to 5Gbps over the new super-speed data pairs, SSTX± and SSRX±
• Up to 480Mbps on the legacy data pair, D±
● Requires 4 channels of ultra-low capacitance protection for the super-speed data pair (i.e. SSTX± and SSRX±) and 2 channels of protection
for the legacy D± data pair. The SP3011 shown below integrates all 6 channels of protection into a small form factor µDFN-14 package.
Application Schematic:
VBUS
SSTX+
SSTX-
Outside IC
World SSRX+
SSRX-
GND SP3011
D+
D-
*Package is shown as transparent
ESD Level
Ordering Number I/O Capacitance @ VR=0V # of Channels VRWM Packaging
(Contact)
Considerations:
● Each port has 3 differential pairs of data (i.e. D0±, D1±, D2±) plus a clock (CLK±)
• For HDMI 1.1-1.2 the throughput is a total of 4.95Gbps (1.65Gbps per lane)
• For HDMI 1.3-1.4 the throughput is a total of 10.2Gbps (3.4Gbps per lane)
● To maintain the differential impedance per the HDMI Compliance Test Specification (and consequently signal integrity) a very low
capacitance device must be used
● To maintain the differential impedance the designer should avoid using 90º angles and vias
• This can be accomplished by the use of an ESD device that offers a “straight-through” routing scheme
● Requires 12 channels of protection : 8 TMDS data pairs, SDA, SCL, CEC, and HPD
Application Schematic:
Chipset
HDMI Port *Package is shown as transparent
D2+
GND
D2-
SP3010
D1+
GND
D1-
D0+
GND
Outside D0- IC
World SP3010
CLK+
GND
CLK-
SDA
SCL
SP3010
CEC
HPD
Signal
Case GND GND
Considerations:
● Same as noted on previous page except the protection scheme below includes options for protecting additional Ethernet and 5V power pins.
● Other combinations exist such as using 2, 6 channel SP3011 devices along with 2, single channel discrete
Application Schematic:
HDMI Port Chipset
*Package is shown as transparent
D2+
GND
D2-
SP3010
D1+
GND
D1-
D0+
GND
D0- IC
SP3010
Outside CLK+
World GND
CLK-
SDA
SCL
SP3010
CEC
HPD
SP3021
ENET
PWR
SP1003
Considerations:
● Each port has a main link which contains 4 differential pairs or lanes (i.e. ML0±, ML1±, ML2±, and ML3±)
• The total throughput is 10.8Gbps or 2.7Gbps per lane
• The clock signal is embedded in the lanes and does not exist separately as in HDMI
• There is also an auxiliary channel (AUX±), hot plug detect (HPD), and power pin (PWR) as well.
● To maintain the differential impedance (and consequently signal integrity) a very low capacitance device must be used
• To maintain the differential impedance the designer should avoid using 90º angles and vias
• This can be accomplished by the use of an ESD device that offers a “straight-through” routing scheme
● Requires 12 channels of protection per port (ML0±, ML1±, ML2±, ML3±, AUX±, HPD, and PWR)
Application Schematic:
Display Port Chipset
*Package is shown as transparent
ML0+
GND
ML0-
SP3010
ML1+
GND
ML1-
ML2+
GND
Outside ML2- IC
World SP3010
ML3+
GND
ML3-
AUX-
GND
AUX+
SP3010
HPD
PWR
Signal
Case GND GND
Recommended SPA Devices:
Considerations:
● A DVI port may have single or dual link capability
• Each link has 3 differential lanes of data (i.e. D0±, D1±, D2±) plus a clock (CLK±)
• For single link, the maximum throughput can approach a total of 4.95Gbps or 1.65Gbps per lane
• For dual link, the maximum throughput can approach a total of 8Gbps or 2.67Gbps per lane
● To maintain the differential impedance the designer should avoid using 90º angles and vias
• This can be accomplished by the use of an ESD device that offers a “straight-through” routing scheme
Application Schematic:
*Package is shown as
DVI Port transparent
DVI Chipset
SP3003
D2+
GND
D2-
VCC/NC
D1+
GND
Outside D1- IC
SP3003
World D0+
GND
D0-
VCC/NC
CLK+
GND
CLK-
Case GND Case GND
Signal GND
Considerations:
● 10/100/1000 relates to the data rate in Mbps (i.e. 10Mbps, 100Mbps, and 1000Mbps)
• For 10 Base-T, data is transmitted over 2 UTP (unshielded twisted pairs) using a 10MHz clock
• For 100 Base-TX, data is transmitted over 2 UTP using a 125MHz clock
• For 1000 Base-T data is transmitted over 4 UTP using a 125MHz clock
• For these data rates the parasitic capacitance needs to be taken into account to preserve signal integrity
● The 4 data lines below (Tx± and Rx±) are being protected against intra-building (i.e. 100A, tP=2/10µs) lightning transients by a two-stage
protection scheme
● 1000Mbps Ethernet (or 1GbE) will require 8 channels of protection for the 4 differential pair so the below scheme should be replicated for the
remaining 2 data pair
Application Schematic:
J1 Tx+
F2
Tx-
Outside
World
Rx+
F3
J8 Rx-
F4
SP03A (x2)
F1:F4 = 0461 1.25 TeleLink Fuse
Considerations:
● 10/100/1000 relates to the data rate in Mbps (i.e. 10Mbps, 100Mbps, and 1000Mbps)
• For 10 Base-T, data is transmitted over 2 UTP (unshielded twisted pairs) using a 10MHz clock
• For 100 Base-TX, data is transmitted over 2 UTP using a 125MHz clock
• For 1000 Base-T data is transmitted over 4 UTP using a 125MHz clock
• For these data rates the parasitic capacitance needs to be taken into account to preserve signal integrity
● The 4 data lines below are being protected against inter-building (i.e. 500A, tP=2/10µs) lightning transients by a two-stage protection scheme.
The 4 channel, SP4061 or SP4062 should be selected based on the operating voltage of the PHY.
● The standoff voltage of the SEP Series device will be dictated by the use of PoE. If PoE is present the SEP0640 should be used; otherwise,
the SEP0080 is ok for non-PoE applications. Note: Higher voltage options are available for atypical PoE voltages.
● 1000Mbps Ethernet (or 1GbE) will require 8 channels of protection for the 4 differential pair so the below scheme should be replicated for the
remaining 2 data pair
Application Schematic:
RJ-45
*Package is shown as transparent
Connector F1 Ethernet PHY
J1 Tx+
F2 Tx-
Outside
SP4062
World
PHY
F3 GND
Rx+
J8 Rx-
F4
Case GND SEP0xx (x2)
Considerations:
● 10/100/1000 relates to the data rate in Mbps (i.e. 10Mbps, 100Mbps, and 1000Mbps)
• For 10 Base-T, data is transmitted over 2 UTP (unshielded twisted pairs) using a 10MHz clock
• For 100 Base-TX, data is transmitted over 2 UTP using a 125MHz clock
• For 1000 Base-T data is transmitted over 4 UTP using a 125MHz clock
• For these data rates the parasitic capacitance needs to be taken into account to preserve signal integrity
● Some designers choose to use a robust transformer in their design to act as the first line of protection against an incoming surge event.
This is usually done to minimize the parasitic capacitance on the data line and to save on the cost of the primary protector
● Using such a technique will require a robust PHY side protection device and one such option is the SPLV2.8-4 shown below. It should be
noted that this device will only provide differential protection between the data pairs.
● If longitudinal and differential protection are required, the SP3050-04HTG (with 2 I/O’s tied per line) or SP4060/SP4061/SP4062 can be
considered as alternatives
● Protection for 100Mbps Ethernet (or Fast Ethernet) is shown below. For 1000Mbps (or 1GbE) interfaces two, SPLV2.8-4BTG are required
Application Schematic:
RJ-45
Connector Ethernet PHY
J1
Tx+
Tx-
Rx+
Rx-
Outside
Ethernet
World
PHY
SPLV2.8-4
J8
*Package is shown as transparent
Case GND
Considerations:
● Some Ethernet ports only need be protected for ESD and not for lightning induced transients
• These are sometimes referred to as “2M” ports or 2 Meter ports that have very short CAT5 cable installations
● The 4 data lines below (Tx± and Rx±) are being protected against ESD by a low capacitance SP3002 which is suitable for all
Ethernet data rates
• In fact, any low capacitance SP30xx device is suitable for any “ESD only” Ethernet application
● 1000Mbps Ethernet (or 1GbE) will require 8 channels of protection for the 4 differential pair so the below scheme can be replicated or the 8
channel SP3003-08ATG can be used.
Application Schematic:
RJ-45
Connector Ethernet PHY
J1 Tx+
Tx-
Outside
World
Rx+
J8 Rx-
Case GND NC
Considerations:
● eSATA is a subset of the SATA protocol that uses 2 differential pairs for communication
• Four lines need to be protected per port (i.e. TX± and RX±)
• Currently eSATA is capable of running raw data rates of 1.5Gbps (Gen 1) and 3.0Gbps (Gen 2)
● These high bus speeds require very low capacitance devices to prevent signal degradation
● To maintain the line impedance the designer should avoid using 90º angles and vias
Application Schematic:
eSATA Port
GND
eSATA Interface
TX+
*Package is shown as transparent
TX-
Outside IC
World GND
RX-
SP3012
RX+
GND
Case GND
ESD Level
Ordering Number I/O Capacitance @ VR=1.65V # of Channels VRWM Packaging
(Contact)
Considerations:
● 1394a (FireWire 400 or S400) was the original (1st generation) implementation
• Allowed for two connectors, powered (6 pin) and unpowered (4 pin)
• Data rates up to 400Mbps using 2 differential pair
● 1394b also had provisions for 1600Mbps and 3200Mbps (or S1600 and S3200)
• Uses same 9 pin connector as S800
● S800, S1600, and S3200 require very low capacitance devices for the high speed data rates
• Protection of 4 data lines is needed (i.e. TPB± and TPA±) and can be done with an array or with discrete low capacitance devices
Application Schematic:
*Package is shown as transparent
1394b Port SP3003 1394 Interface
TPB-
TPB+
TPA-
TPA+
Outside
World GNDS IC
TPA Shield GND
GND
NC
PWR
GNDS
ESD Level
Ordering Number I/O Capacitance @ VR=1.65V # of Channels VRWM Packaging
(Contact)
Considerations:
● LVDS is a low noise, low-voltage signal scheme that uses a small current (typically 3.5mA) to generate a voltage drop across a 100Ω resistor
to convey information or data
• Data rates can vary per application but the ANSI/TIA/EIA-644-A standard recommends a maximum of 655Mbps
● The medium/high speed bus requires a low capacitance device in 1-6pF range (typically)
• LVDS schemes will vary in terms of the total number of channels used
• Protection of 8 data lines is shown below (i.e. CLK± and Ax±)
Application Schematic:
CLK+
CLK-
A0+
A0-
Outside
World A1+ IC
A1-
A2+
A2-
Signal GND
Case GND
SP4060
Case GND
Considerations:
● Audio ports typically have signals that swing above and below GND (i.e. ±2.5V)
• If no DC bias is applied, a bidirectional protection device should be used as these devices will not clip the analog signal
• Protection of 2 data lines is shown below (i.e. Left and Right) with an array and with discrete 0201s
● Some audio ports will bias the data bus so that the signal never swings below GND (i.e. 0-5V)
• If a bias is applied, a unidirectional OR bidirectional protection device could be used as neither device would clip the analog signal
• The SP1001-02XTG is a good option in this case (not shown for Left and Right but is listed below)
Application Schematic:
Audio Codec
Audio Port
Left
Right
Outside IC
World
SP1002-02
Case GND
Audio Codec
Audio Port
Left
Right
Outside IC
World
Considerations:
● Analog video ports typically have signals that swing above and below GND (i.e. ±2V)
• A bidirectional protection device should be used as these devices will not clip the analog signal
● S-Video, Composite, and RF/Coaxial are a few of the common low-speed analog video signals in use today
• Typical bus speeds will not exceed 5MHz so capacitance is not much of a concern
• Protection of the three are shown below (Y, C, Video, and RF)
Application Schematic:
Video Port Video ADC
Y Luminance
C Chrominance
IC
SP1004
Case GND
Considerations:
● Keypads and push buttons on electronic devices are particularly susceptible to ESD due to constant human interaction
• Most are DC switches that operate at less than 5V, and for most applications capacitance will not be a concern
● The number of ports will vary with the particular application, but as an example, 4 data lines are shown below (i.e.Px)
● For space constrained applications the SP1003 or SP1005 may be considered as they are 0402 and 0201 footprints, respectively
Application Schematics:
Keypads
P1
P2
Outside P3 IC
World P4
SP1006 (x4)
Case GND
P1
P2
Outside P3 IC
World P4
SP1001
Case GND
Considerations:
● The SIM (Subscriber Identification Module) card has 3 data lines that are low-speed and low-voltage
• Given the low speed of the signals, the capacitance will not be a concern
● The low-voltage signal lines are best protected by a device which has a low standoff voltage or VRWM
● Protection of the 3 data lines is shown below (i.e. CLK, DATA, and RESET)
Application Schematics:
VBUS
DATA
CLK
Outside RESET IC
World SP3002
Case GND
GND
Signal GND
Case GND
Considerations:
● There are numerous implementations of RS-232
• Most involve 6 wires (as shown below) though some may only include 2, 3, or 5 wires
• The maximum data rate is 20kbps
• Typically bus voltages are bipolar and can swing as high as ±24V though most installations are limited to ±12V or even lower
• For ±12V systems the SP72x Series is recommended and shown below
● Some implementations are a unipolar (i.e. 0-3.3V or 0-5V) or use bus voltages generally below 6V
• In this event the SP1001 Series can be used for ESD protection or the SP03 Series could be used if lightning is the primary threat
● Every application should be evaluated thoroughly before using the recommended devices below
Application Schematics:
RD
TD
RTS IC
Outside
World CTS
DSR
DTR VBUS
SP723
Case GND
Case GND
-V
Considerations:
● There are numerous implementations and applications of RS-485
• Most applications involve two wires (i.e. A and B) while a few are four wire (i.e. full duplex)
• Depending on cable length, data rates can vary from 100kbps-10Mbps
• Bus voltages can be unipolar (i.e. 0-6V) or bipolar (i.e. ±3V) and every application should be evaluated thoroughly before using the
recommended devices below
● For differential protection between A and B, the GND connection can be removed from the schematics below
Application Schematic:
A
B
Outside
World IC
SP1001
Case GND
Outside IC
World
B
SP03
Case GND
Considerations:
● There are numerous implementations and applications of a CAN bus
• Most applications involve two wires (i.e. CANH and CANL)
• Depending on cable length, data rates can vary from 10kbps-1Mbps
• Most applications do not exceed 0-5V to transmit a Low/High signal, however, every application should be evaluated thoroughly before
using the recommended devices below
● For the described application of unipolar bus with voltages between 0 and 5V:
• The SP1001 Series is shown for ESD protection only
• The SP03 Series is shown for lightning/surge protection
● For differential protection between CANH and CANL, the GND connection can be removed from the schematics below
Application Schematic:
CANH
CANL
Outside IC
World
SP1001
Case GND
CANH
Outside IC
World
CANL
SP03
Case GND
Considerations:
● LCD and camera interfaces in mobile devices are vulnerable to EMI from the cellular band
• Frequencies between 800-3000MHz should be attenuated to prevent distortion on the display
● The pixel clocks vary depending upon the display size but the frequency will typically fall between 5-65MHz
• This corresponds to data rates between 10-60Mbps and with these speeds line capacitances need to be considered
• In the majority of applications line capacitances of 20-40pF will not cause signal integrity issues
● The protection schemes below for data lines Dx are only examples and will vary with the particular application
Application Schematic:
PCB Connector *Packages are shown as transparent
for LCD Display SP6002-04 Baseband
D1
D2
IC
D3
D4
D1
D2
D3 IC
D4
D5
D6
Appendix A
SPA Package Outlines
PDIP-8
PDIP-16
SOIC-8
SOIC-16
MSOP-8
MSOP-10
SOT23-3
SOT143
SOT23-5
SOT23-6
SC70-3
SC70-5
SC70-6
SOT553
SOT563
SOT953
SOD723
SOD882
0201
Flip chip
(0.62x0.32)
0201
µDFN-2
(0.60x0.30)
μDFN-6
(1.25x1.0)
μDFN-6
(1.6x1.6)
μDFN-8
(1.7x1.35)
μDFN-10
(2.5x1.0)
μDFN-10
(2.6x2.6)
μDFN-12
(2.5x1.35)
μDFN-14
(3.5x1.35)
Littelfuse, Inc.
8755 West Higgins Road
O’Hare Plaza, Suite 500
Chicago, IL 60631 USA
Phone: (773) 628-1000
[email protected]
Authored by:
Chad Marak
Technical Marketing Manager
Semiconductor Business Unit