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® ECTC: 3-D IC Hybrid Bonding Developments
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July 2022
CURRENT EVENTS —
Design Charts for Sizing Electrical Traces
4 OSPs Are Not All the Same

4 Packing Your PCBs
4 Controlling Impedance
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PCBWE ST.COM
JULY 2022 • VOL. 39 • NO. 7
FIRST PERSON
6 THE ROUTE PRINTED CIRCUIT

Staff retention.
Mike Buetow DESIGN & FAB
MONEY MATTERS
18 ROI
Enabling (disruptive) tech. FEATURES
Peter Bigelow 31 TRACE HEATING cover story
Making Technology-Specific Design Charts
19 BOARD BUYING Companies should perform their own testing or develop
their own thermal models to determine conductor current
Perfect packaging.
carrying capacity in any given technology. An explanation
Greg Papandrew of IPC-2152 and the information it provides to get started.
by MIKE JOUPPI
37 STANDARDS
OSP Myths Dispelled
TECH TALK After many years of debate, a specification for organic solderability preservatives is
22 ON THE FOREFRONT finally here. IPC-4555 sets the record straight: OSPs are not all the same, and they
have regained their leadership role as a final finish.
More chips per panel.
by MICHAEL CARANO
E. Jan Vardaman
41 ACQUISITIONS
28 DESIGNER’S NOTEBOOK A Royal Summit

In May, Summit Interconnect announced its acquisition of Royal Circuit Solutions,
Specifying impedance. expanding the fabricator’s capacity of rigid and flex PCBs. But it was the behind-the-
John Burkhert, Jr. scenes technologies and assembly capacity that convinced Summit president and
CEO Shane Whiteside to make the deal.
by MIKE BUETOW
46 GETTING LEAN
Industry 4.0 AOI.
Filemon Sagrero
47 SEEING IS BELIEVING
Swindlers’ lists.
ON PCB CHAT (pcbchat.com)
RIT PCB DESIGN COURSE RECAP
Robert Boguski with DR. KIRSCH MACKEY and DR. JAMES LEE
53 TECHNICAL ABSTRACTS BEST PRACTICES FOR PURCHASING X-RAY EQUIPMENT

with KEITH BRYANT, DR. DAVID BERNARD,
DAVID KRUIDHOF and ROBERT BOGUSKI
PEOPLE MANAGEMENT SKILLS

with JOHN BURKHERT JR.
DEPARTMENTS
8 AROUND THE WORLD
16 MARKET WATCH
50 OFF THE SHELF
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4 PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY JULY 2022

Bi AlloyBi Alloy Low-Temp SolderSolder
Low-Temp Paste Paste
PROVEN SOLUTION
PROVEN SOLUTION
Th e tough c hoi ccehothi caet ’st heaat ’ss y etaos m

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The Ultimate
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About About
20% of20%
manufactured
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44g ball at
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Shock vs. SAC305
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Durafuse 4ml Durafuse 4ml
TM TM
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18.8 18.8 27.6 27.6

0 0
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Ductile Ductile TM
LT TM
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BiSn1AgBiSn1Ag
BiSnAg BiSnAg 600 1,000
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shock resistance Drop shock
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>2 orders of magnitude
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THE ROUTE
Training Begets Retaining
F
OXCONN WAS IN the news (again) last month, actionable.” It all started, he acknowledged, with him
this time for alleging competitors are poaching and his leadership team getting priorities in place,
MIKE its employees. then getting the priorities down to the workforce.
BUETOW The complaints were levied specifically at rivals This tracks with studies performed by Harvard
PRESIDENT
in Vietnam, where the world’s largest ODM/EMS is Business School professor Robert Kaplan, who has
expanding its factories as major customers like Apple shown that among publicly traded companies, those
shift production away from China, in part to avoid that best communicated their goals and objectives
being a pawn in the geopolitical tug-of-war between throughout the entire organization were more prof-
the US and China. itable over time than those that fell short. Kaplan
Foxconn, which currently employs about 60,000 arrived at his conclusions through interviews of upper
workers in Vietnam, asserts its EMS competitors are and middle management and hourly personnel, where
establishing their own operations near Foxconn’s to he studied whether the message as conceived and
make it easier to entice workers to jump ship. intended by the ranking officers was understood and
Poaching complaints are hardly new, of course. internalized at the lower levels.
Mexico is notorious for workers relocating en masse Oscar Gonzalez, vice president of operations,
from company to company in pursuit of everything Mexico at Mack Technologies agrees. In an interview
from higher pay to better food in the plant cafeteria. on the PCB Chat podcast this spring, Gonzalez said,
Audrey McGuckin, who spent 10 years as chief “I think the best companies [in Mexico] are retaining
talent officer for Jabil and now consults to Kimball talent. … There’s been studies on the key elements
Electronics, among others, points out the top stress people look for. Competitive salary. Tasty food in the
point for CEOs is talent. And a McKinsey study cafeteria. Being treated with dignity and respect. And
found only 5% of CEOs feel their organizations’ tal- training, the amount of hours you provide employees
ent management has been very effective at improving training.”
company performance. In my experience, middle management is where
Covid-related issues have raised the profile of communications break down. Often those promoted
workers and increased their bargaining power, at least to lower-level management positions are thrust into
in the current term. And for their part, staffers at all the role due to an unanticipated need and based on
levels are taking advantage of the situation. their skills and performance in operations or sales.
The issue isn’t whether employees can or should They are not trained for their new responsibilities,
switch jobs. It’s what steps companies can and should nor are they given time to acclimate to the role under
take to ensure valued workers want to stay put. In the watch of a skilled mentor. They are handed a bud-
short, what can companies do to keep workers? get, a handful of direct reports, and basically told to
Having a culture that respects and promotes make it work. Those who lack flexibility and acuity
employees is often cited, of course. But how do you quickly find themselves in tricky situations, without
get there? the tools to resolve them appropriately.
Don Charron, CEO of Kimball Electronics, says Workers, for their part, have a once-in-a-gen-
developing the EMS company’s bench was a point of eration opportunity where they don’t need to hang
emphasis upon its spinoff from its parent company around waiting and hoping for an internal change.
in 2014. In an interview on McGuckin’s podcast, As Gonzalez says, training helps retain valued
he said, “We literally were one deep in several really employees. The best printed circuit engineering train-
important positions, not just in the leadership level ing program of the year is PCB West, which takes
but in middle management as well. And I thought place Oct. 4-7 at the Santa Clara (CA) Convention
about our practices around talent, and it was a con- Center. Registration is open at pcbwest.com.
cern to other leaders on the team, but we really didn’t The greater economy is outside our control, but
know how to approach it.” every company can study their internal goals and
Kimball, which has more than 6,400 employees objectives, and put into place bidirectional communi-
today, realized it needed a combination of formality, cations systems that ensure those priorities are heard
rigor and science for its talent acquisition. and met throughout the organization. •
Charron says Kimball put a framework in place
in order “to have a tougher conversation, a better
conversation with people about their personal devel- [email protected]
opment, and it ended up with insights that were more @mikebuetow

AROUND THE WORLD
PCDF People Technical Conference Program Set for PCB West

Averatek appointed Michael V. 2022
Carano vice president of qual-
ity. Carano brings 40 years of PEACHTREE CITY, GA – The PCEA Conferences Task Group announced the technical
electronics industry experience
program for PCB West 2022, featuring nearly 50 presentations and more than 110
to Averatek, with expertise in
manufacturing, chemicals, met- hours of in-depth electronics engineering training.
als, semiconductors, medical devices and Among the industry experts on tap for this year’s show are Rick Hartley, Susy
printing. Webb, Thomas Chester and Dan Beeker. The conference will be held October 4 to 7
Fresh Consulting named Rob Blomstrom at the Santa Clara Convention Center and features classes for every level of experi-
PCB design engineer. ence, from novice to expert.
The scope of classes ranges from basics on design engineering and DfM, to
SEMI named Joe Stockunas Americas
president. Before joining SEMI, he served designing and building advanced HDI and routing high I/O count chip packages,
as executive vice president and corpo- board stackup, circuit grounding, low layer-count (IoT) board design, high-frequency
rate officer of Nordson, overseeing the design, thermal management, and a complete virtual plant tour of a flexible circuit
company’s worldwide electronics systems manufacturing facility. New courses this year include RF and microwave design, PCB
business.
layout of DDR memory, mechanical design, and raw material selection.
To drive engagement between experts and attendees, three panel discussions have
been arranged on topics ranging from leading-edge component packaging drivers,
PCDF Briefs emerging technologies, and discussions on careers in electronics engineering. These
Altair in June acquired Concept Engineer- open forums are designed to spur lively interactive discussions on what electronics
ing for an undisclosed sum. Concept Engi- engineers can expect over the next 12 to 24 months.
neering provides automatic schematic gen- “Printed circuit engineers are ready to get back to face-to-face events, and the PCB
eration tools, electronic circuit and wire West technical conference has all the reasons they need to make their return to live inter-
harness visualization platforms, and elec-
action more than worth their time,” said Mike Buetow, conference director, PCB West.
tronic design debug tools.
Registrants who sign up by Sept. 6 can take advantage of the Early Bird Special
Atotech sold its 1,000th horizontal electro- discounts for the conference, which features 49 presentations and panel discussions
lytic copper plating line.
spanning 114 hours of classroom time.
Eltek in June reported a fire in one of the For the first time, the program was developed by committee, as more than 70
production rooms in its plant in Petach- abstracts were reviewed by the PCEA Conferences Task Group. The task group is made
Tikva, Israel. The fire damaged part of the
up of nine industry veterans with more than 270 years
production line in that room and was extin-
guished without harming staff. of cumulative experience in the printed circuit industry.
An exhibition featuring more than 100 leading
The European Union and Taiwan have set
suppliers to the electronics design and manufacturing
up a platform to work together on semi-
conductor supply chains. industry will be held October 5. For more informa-
tion, visit pcbwest.com.
Prototron Circuits added two PHI lamina-
tion presses.
The SEMI Foundation has been awarded PCB West Keynoter
$1.5 million to design and develop the
SEMI Career and Apprenticeship Network Dr. Brian Toleno to Focus on Where
(SCAN) in Michigan.
TPCA is publishing a roadmap for PCB

Electronics Meets Virtual Reality
PEACHTREE CITY, GA – The metaverses offer myriad opportunities not just for users
smart manufacturing in Taiwan. Chairman
Maurice Lee, a senior consultant at Uni- but for developers of computing devices. As that market takes off, what novel innova-
micron, says “member cohesion, industry tions in materials and production will be needed for printed circuit designs to meet
competitiveness enhancement, and sus- the requirements for weight, size, and functionality?
tainable new value” and a high-value, Those are the questions Dr. Brian Toleno, manager, Applied Materials at Meta’s
low-carbon Taiwanese PCB industry are the
Reality Labs, will tackle when he keynotes this year’s PCB West conference. His talk,
main goals for his term.
Augmented and Virtual Reality, the Next Computer Revolution, will describe the
Westak Circuits installed four Tagarno digi- current market, use cases, and the technology all around AR/VR, with a focus on the
tal microscopes.
printed circuit board aspects.
WUS Printed Circuit plans to spend $280 At Meta, Dr. Toleno leads a multi-disciplinary team that works on the mate-
million on a new production facility in rial challenges in Meta’s consumer electronics hardware. These devices include VR
Thailand.
headsets (Quest 2), smart glasses (Ray-Ban Stories), Portal smart screens and other
exciting devices that help bring people together.
Dr. Toleno is a leading expert in materials science for electronics applications. Prior
to Meta, Dr. Toleno was director of new technology at Microsoft, working on the

AROUND THE WORLD
CA People Hololens and director of global product management for underfills and encapsulants at
Arch Systems appointed Ben- Henkel. He was also a director of SMTA. He has a doctorate in chemistry from Penn
jamin Freeman vice president State University and a bachelor’s of science in chemistry from Ursinus College.
of engineering. Freeman spe- His talk takes place Oct. 5 from 11 a.m. to 12 p.m. at the Santa Clara (CA)
cializes in analytics and tech-
Convention Center. There is no fee to attend Dr. Toleno’s presentation, but advanced
nology-assisted optimization
of physical processes. registration at pcbwest.com is required.
“Virtual reality is much further along than many people realize,” said Mike
Restronics Mid Atlantic named Matthew
Buetow, conference director, PCB West. “It has more daily transactions than the two
Osborne managing partner.
largest digital currencies combined. Dr. Toleno has a deep knowledge of electronics
Sanmina promoted Rodrigo Sierra Avila to manufacturing, and I can’t think of a better person to explain the computing require-
acting plant manager, Guadalajara.
ments from the cloud, the edge and localized devices this future will require.”
Yamaha Motor Europe SMT Section
appointed Kamil Stasiak product market-
ing manager. PCD&F’s Annual Designers’ Salary Survey
Yamaha named Andy Witt-
brodt key account manager.
Open
He joins Yamaha with 27 years
PEACHTREE CITY, GA – PRINTED CIRCUIT DESIGN & FAB is undertaking its annual salary
of technical sales and service
operations experience in elec- survey of printed circuit board designers, design engineers and other layout specialists.
tronics. Results will be published in an upcoming issue of PCD&F. The data collected are
revealed only in the aggregate, and no individual data will be revealed.
Zestron Americas appointed
John Neiderman US and Can- Designers for years have taken advantage of the results to benchmark their
ada sales manager. Neiderman salaries, benefits and credentials against peers. The survey link is here: https://www.
has over 20 years of sales and surveymonkey.com/r/N989JS3.
technical experience in elec- Because this is a survey, not a poll, the audience being surveyed is not selected
tronics manufacturing.
or controlled.
CA Briefs Vector Fabrication to Invest $60M in Vietnam

Absolute EMS installed a VJ Electronix
XQuik II Plus.
PCB Plant
DA NANG, VIETNAM – Vector Fabrication has received an investment license for a PCB
AIM Solder signed Cabiotec as distributor
for its full line of products in Italy. and MEMS factory, with plans to invest $60 million, according to reports.
The factory is expected to be 40,000 sq. m., and the first phase is expected to
Alpha Circuit purchased and installed two
begin in the first quarter of 2025. The plant plans to begin manufacturing MEMS as
Galaxy 30µ AOI machines.
of the first quarter of 2027.
Cobham Mission Systems purchased a The fabricator will build two-, four-layer and multilayer PCBs, probe cards and
photon steam aging system from Hentec
IC burn-in boards.
Industries/RPS Automation.
Vector reportedly develops substrates for Intel.
Cogent Technology installed a YJ Link
YLM laser marker.
Compal and Pegatron are reportedly

Ampel Acquires US Circuit, RMC
expanding production in Vietnam, while ELK GROVE VILLAGE, IL – Ampel has acquired fellow fabricators Rocky Mountain
Vietnam is poised to increase minimum
Circuits and US Circuit for an undisclosed sum.
wage amid rising inflation.
Production at Boulder, CO-based Rocky Mountain Circuits is shutting down, and
DICA Electronics deployed a Pleora Tech- existing orders will be moved to Ampel and US Circuit.
nologies visual inspection system.
RMC will maintain a sales and engineering support office, however.
Flex is building a new 145,000 sq. ft. facil- Ampel was founded in 1983 and also owns Lazer-Tech, Image Circuits, Tritech
ity in Jalisco, Mexico. The site will serve PCB, PC Specialties, Crimp Circuits and Texas Circuitry.
as an in-region automotive manufacturing
hub.
GJD Manufacturing invested in a Hanwha Nitto Acquires Bend Labs

Techwin SM482Plus SMT line.
FARMINGTON, UT – Nitto Denko acquired Bend Labs for an undisclosed sum.
Incap Slovakia added a selective solder- The sensor device technology company merged into Nitto, starting business as
ing machine and a new SMT line to its Nitto Bend Technologies.
Námestovo factory.
Bend’s flexible sensor measures bend, stretch and force. The flexible sensor is
expected to meet automation demands in the automotive field and remote monitoring

AROUND THE WORLD
in the digital healthcare field. Nitto anticipates this technology to be used in sports
Infestos Sustainable Solutions said it
would initiate buyout proceedings for all and robotics as well.
outstanding ordinary shares of Neways The impact of this acquisition on Nitto's consolidated earnings forecast for 2022
Electronics. Infestos currently owns more is insignificant.
than 95% of the company’s shares. Nitto develops new products and services in three domains: information inter-
iNEMI was awarded $290,865 from the face, next-generation mobility and human life.
National Institute of Standards and Tech-
nology's Advanced Manufacturing Tech-
nology Roadmap Program to develop a PCB Technologies Launches SiP Subsidiary
5G/6G roadmap.
IPC established a subsidiary in Munich.

iNPACK
Jabil announced a manufacturing collabo- OCEAN TOWNSHIP, NJ – PCB Technologies is launching a subsidiary to provide system-
ration with Cardo Systems, a maker of in-package solutions. Beginning this month, iNPACK will focus on high-end technology
wireless group communications and enter- that contributes to improved signal integrity and reduces unwanted inductance effects.
tainment systems for motorcycle riders.
iNPACK will provide SiP, semiconductor packaging, organic substrates (25µm lines
Jaltek opened a new EMS facility near and 25µm spacing), and 3-D, 2.5-D and 2-D packaging solutions for aerospace, defense,
Luton, UK, that increases its manufactur- medical, consumer electronics, automotive, energy and communications industries.
ing space by 50%.
“The new company incorporates innovative interconnects as part of its substrates
Omega EMS is producing Eguana Tech- and micro-assembly process capabilities,” said Jeff De Serrano, PCB Technologies’ presi-
nologies products in San Jose. dent for North America. “Our technological solutions can more than double the elec-
PDR Rework Systems hired Restronics as tronic functionality in the same form factor and create substrate-like PCBs. To top it off,
manufacturers’ representative in Southern our lead times are only six months long. The goal is to support our customers from design
California. concept to production, all under the same roof, while utilizing unified design rules.”
Pektron purchased 15 Yamaha YRM20
placement machines.
Pro-Active Engineering integrated an ASM

GPV, Enics to Merge, Creating Europe's 2d
DEK NeoHorizon screen printer and three
Siplace TX placement platforms at its EMS
Largest EMS
plant. VEJLE, DENMARK – Europe’s EMS industry was shaken up in June as GPV and Enics
PVA received a patent in Japan for an opti- announced a pending merger to form the continent’s second-largest EMS company
cal bonding machine with cure in place with more than 7,500 employees and annual revenue of more than DKK 7 billion
and visual feedback. ($990 million).
A Sky One France subsidiary has acquired The transaction values the combined business at more than DKK 4 billion ($566
EMS provider Malaga Aerospace Defense million). Closing is subject to customary approvals, including from antitrust officials.
& Electronics Systems SAU (MADES) Danish industrial conglomerate Schouw & Co., listed on Nasdaq Copenhagen,
from American Industrial Acquisition
will hold 80% of the merged entity, while the current owner of Enics, Ahlström Capi-
Corp. (AIAC). Terms were not disclosed.
tal will hold 20%. Additionally, as a result of the transaction, Ahlström Capital will
SMarTsol Technologies added Austin receive approximately EUR 60 million ($63.1 million) in cash. The merger will create
American Technology to its line card in
an international electronics group with more than 7,500 employees .
Mexico.
“This is a combination of two equally strong and very competent companies,” said
Stewart Technology added two Nordson Bo Lybæk, CEO, GPV. “With the merger, we take yet another significant step on our
Cerno 300.1S selective soldering systems
growth journey. In 2018, we successfully acquired the Swiss electronics manufacturer
to its production facility in Tweedbank,
Scotland. CCS, which had revenue of DKK 1.6 billion. That lifted GPV into the top 10 of EMS
companies in Europe, and we have since delivered solid results. Based on our track-
Spain's government has approved a plan
record from the integration of CCS, we’re now looking to repeat the success. Together
to spend €12.25 billion on the semiconduc-
tor and microchip industry by 2027, Econo- with Enics, we’re creating the second-largest EMS group headquartered in Europe.”
my Minister Nadia Calvino said, including Lybæk will lead the integration of the two businesses into the new combined
€9.3 billion to fund the building of plants. company.
ViTrox Technologies named Ostec-SMT “Schouw & Co. and Ahlstrom Capital share similar values and both companies’
sales channel partner in the Russia region. legacy and long-term strategic outlook provided an excellent climate for negotia-
tion,” said Jens Bjerg Sørensen, chairman, GPV. Sørensen will become chairman of
VJ Electronix appointed Southwest Sys-
tems Technology to represent its com- the merged company.
ponent counting systems in Texas, Okla- “At Schouw & Co., we have a clear strategy of making long-term investments in
homa, Arkansas and Louisiana. market-leading companies. With the merger between GPV and Enics, we will now create
Yekani closed its manufacturing facility in a leading player that can measure up to even the largest EMS companies, and which with-
South Africa and auctioned off the assets. in a foreseeable number of years can reach DKK 10 billion in revenue,” Sørensen added.
Following the deal, the merged entity will be Europe's second largest EMS com-

AROUND THE WORLD
pany, behind Zollner. to reduce impacts and improve the safety of cleaning products.
Enics is among the industrial leaders in design, lean manu- IPC encourages personnel whose company uses chemical
facturing, and development of test systems for some of the cleaners on electronic products or components, or on machines
world’s largest customers, while GPV is a full-service EMS and tooling used during operations and maintenance, to
provider specializing in managing high-mix product portfo- review the draft standard and provide comments to the author-
lios, application design and engineering for a strong range of ing task group.
market-leading customers. The draft document is freely available, and reviewers can
“Enics and GPV are a perfect match. I look forward to lay- participate in the process by submitting comments about this
ing the foundation for this strong European industrial platform. draft industry standard by mid-July. Reviewers can request a
Together, both companies have even stronger capabilities to copy of the draft document and instructions on how to submit
provide turnkey offerings that will make the combined company comments by emailing [email protected].
a success in the fast-changing EMS market. I’m confident that At the end of the public review period, comments will be
together we will be driving the sustainable success of our custom- consolidated, and the standards development team will work
ers and leading the way to change how EMS companies operate toward resolution of comments. Then, the final document
in complex ecosystems,” said Elke Eckstein, CEO, Enics. will move to the ballot group for consensus vote. IPC-1402 is
Enics has seven factories in Europe and Asia across Fin- expected to be released in mid-December.
land, Sweden, Estonia, Slovakia, China, and Malaysia, while
GPV has 12 factories located in Denmark, Switzerland, Ger-
many, Austria, Slovakia, Mexico, Sri Lanka, and Thailand. PG Technoplast to Invest $41M
Enics is focused on electronics manufacturing and test, while
GPV also specializes in product application design, in-house
in Maharashtra, India
mechanics, and cable-harness assemblies. GPV has been par- UTTAR PRADESH, INDIA – PG Technoplast signed a memorandum
ticularly successful with its box-build mechatronics products, of understanding with the government of Maharashtra to invest
an area where both Eckstein and Lybæk see great potential Rs 3.15 billion (US$41 million) in the state, according to reports.
going forward, including for Enics’ current customers. The electronics manufacturing services provider has eight
Most of Enics’ and GPV’s customers are in the industrial production sites in India. The company will work with Maha-
segment. rashtra Industrial Development Corp. to create the region’s
largest room AC manufacturing capacity.
“We are grateful to the government of Maharashtra
Align Capital Partners Acquires
for facilitating PG’s push to provide its customers turnkey
StenTech solutions for all home appliances,” said Vikas Gupta, MD-
MARKHAM, CANADA – Align Capital Partners has acquired Operations, PG Group. “The move will help bring room AC
StenTech for an undisclosed sum. manufacturing to the Western region of the country, which
StenTech provides surface mount technology stencils, pal- historically has been concentrated in the Northern, and now
lets, tooling and related components. Southern, parts of the country.”
The company boasts more than 2,000 customers across In the fiscal third quarter, the firm’s net profit declined
North America. 2.6% to Rs 63.3 million, and sales increased 45% to Rs 2.7
billion compared to the same period last year.
Proposed IPC Standard for

Green Cleaners Open for GPV to Construct Mechanics
Public Review Factory in Thailand
BANNOCKBURN, IL – A draft version of IPC-1402, Standard PHRAEKSA, THAILAND – GPV Mechanics is constructing a
for Green Cleaners Used in Electronics Manufacturing, is now 12,000m2 mechanics manufacturing factory in Thailand. The
open for public review. The draft standard has been progressing facility will be built with room to grow, say reports.
through the standards process since fall of 2021 and, despite “We are very much looking forward to serving our custom-
some minor delays in the draft development timelines – as is ers from the new factory in 2023. The main piling ceremony is
common during consensus-based standards development pro- an important first step in going forward with the construction
cesses – the draft is now ready for public review through Jul. 15. work. Safety of our employees is key, and so is the safety of
The draft IPC-1402 standard has been developed by vol- all involved in the construction of our new production facility.
unteers and key governmental agencies from Asia, Europe and Our ambition is to execute the building construction with zero
North America. This first-of-its-kind standard for the electronics LTIs,” said Bjørn Fiskers, managing director.
manufacturing industry defines and sets minimum criteria for GPV currently has 7,100m2 mechanics production and
green cleaners – chemical cleaners meeting a defensible set of 15,000m2 electronics production in Bangkok.
green chemistry requirements – used in electronics manufactur- The company is also building a new 11,300m2 electronics
ing processes. Also, this standard provides a core set of founda- manufacturing facility in Sri Lanka. •
tional environmental, health and safety requirements that aim
JULY 2022 PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY 13

Is Your Current PCB Supplier
Pushing Out Lead Times That
Are Unthinkable?
APCT Values Being A Partner,

Not Just A Supplier
• Operational Support to Assure Availability & Required QTA Lead Times
• Engineering Expertise to Advise on New & Emerging Technologies
• Customer Service “That Is Best In Class”
The Solution Is APCT
Work With A Partner, Work With APCT

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APCT CAPABILITIES
TECHNOLOGIES
RIGID
Standard: 2 – 28 Layers
Advanced: 30 – 38 Layers
Development (NPI only): 40+ Layers
HDI; BLIND/BURIED/STACKED VIA
Lam Cycles: Up to 8x
Micro BGA Pitch: .2 Millimeters
FLEX / RIGID-FLEX
Standard Flex: 1 – 6 Layers
Rigid Flex: 4 – 22 Layers
Rigid Flex HDI Lam Cycles: Up to 2x
LEAD TIMES
RIGID
Standard: 20 Days
2 – 10 Layers: 24 Hours
12 - 24 Layers: 48 Hours
HDI; BLIND/BURIED/STACKED VIA
Via in Pad: 72 Hours
HDI : 5 – 15 Days*
* Depending upon # of Lam Cycles
FLEX / RIGID-FLEX
Flex 1 – 6 Layers: 5 – 15 Days
Rigid Flex 4 – 22 Layers: 7 – 15 Days
Rigid Flex HDI 2x Lam Cycles 20+ Days
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• Production Orders - with offshore solutions offered by APCT Global
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APCT Santa Clara HQ APCT Anaheim APCT Orange County APCT Wallingford APCT Global
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MARKET WATCH EDITED by CHELSEY DRYSDALE
Report: 70%+ of Electronics Hot Takes

Supply Chain Lead Times to ■ Global semiconductor equipment billings grew 5% year-
Increase into 2023 over-year to $24.7 billion in the first quarter. Sequential
billings in the seasonally soft first quarter declined 10%.
PASADENA, CA – Through the first quarter of 2023, more (SEMI)
than 70% of lead times are forecast to increase, according ■ Total semiconductor sales in 2022 are forecast to increase
to Supplyframe. During that time frame, analog, complex 11%, the same growth rate that was forecast in January.
semiconductor (ASICs, MCUs, MPUs, PLDs), flash memory, (IC Insights)
non-ceramic capacitor, resistor and standard logic devices are ■ Tech manufacturing plants are operating at 87% capacity,
forecast to rise in price with very limited exceptions. Most of and that’s expected to increase 5.8% throughout 2022.
the same devices will also remain at or exceed already elevated Capital expenditures are forecast to grow 7.2% during the
lead times. same period. (Institute for Supply Management)
From analog power to standard logic to ASICs and sen- ■ The worldwide infrastructure as a service (IaaS) market
sors, the active components market will be swimming in a sea grew 41% in 2021 to total $90.9 billion, up from $64.3 bil-
of red indicators for the next four quarters. This is happening lion in 2020. Amazon retained the No. 1 position in the IaaS
as strong demand continues; production is at capacity; there market in 2021, followed by Microsoft, Alibaba, Google
are extended lead times; and rising prices plague most devices. and Huawei. (Gartner)
Passive components are not as constrained as active ones. ■ Despite chip demand showing signs of a downturn since the
However, like active components, passive commodities also start of 2022, the capacity expansion spree at foundry hous-
suffer from raw material challenges and labor shortages. • es seems unstoppable, sparking concerns that overcapacity
may hit the global foundry market in 2024. (DigiTimes)
■ Samsung remained the world’s largest DRAM supplier in
PERIPHERAL PLUMMET
2021, with sales of nearly $41.9 billion and 44% market
Trends in the US electronics % CHANGE share. (IC Insights)
equipment market (shipments only) FEB. MAR. APR. YTD%
■ Seventy-eight percent of CFOs plan to maintain or increase
Computers and electronics products 1.3 -0.3 0.5 4.6
enterprise-wide digital investments in the next two years.
Computers 4.2 -2.9 1.5 -2.0 (Gartner)
Storage devices 1.8 -0.7 5.2 11.0 ■ The augmented reality market was worth $9 billion in 2021
Other peripheral equipment 6.3 7.2 -10.8 3.0 and is estimated to grow to $150 billion by 2030. (Research
Nondefense communications equipment 1.3 -3.1 1.1 9.2 and Markets)
Defense communications equipment -1.9 -3.3 5.9 9.3
■ Sixty-three percent of executives plan to make compensa-
tion adjustments in response to high inflation. (Gartner)
A/V equipment 0.0 5.0 0.9 46.5
■ Smartphone production fell 13% sequentially in the March
Components1 2.2 -0.1 0.1 13.8 quarter to 310 million units. (TrendForce)
Nondefense search and navigation equipment 0.4 -1.8 2.5 1.2 ■ Smartphone shipments will decline 3.5% to 1.31 billion
Defense search and navigation equipment 1.5 -1.7 0.4 0.2 units in 2022. (IDC)
Medical, measurement and control 0.6 0.3 1.4 1.3 ■ The automotive testing inspection and certification market
rRevised.*Preliminary. 1Includes semiconductors. Seasonally adjusted. was valued at $22.9 billion in 2020 and is expected to grow
Source: U.S. Department of Commerce Census Bureau, June 2, 2022
at a CAGR of 4.7% over the forecast period to reach $31.6
billion by 2027. (Research and Markets)
US MANUFACTURING INDICES
JAN. FEB. MAR. APR. MAY
PMI 57.6 58.6 57.1 55.4 56.1 KEY COMPONENTS
New orders 57.9 61.7 53.8 53.5 55.1 DEC. JAN. FEB. MAR. APR.
Production 57.8 58.5 54.5 53.6 54.2 EMS (North America)1 1.55 1.58 1.52 1.44 1.36
Inventories 53.2 53.6 55.5 51.6 55.9 Semiconductors2 28.3% 26.8% 26.2% 23%r 21.1%p
Customer inventories 33.0 31.8 34.1 37.1 32.7 PCBs3 (North America) 1.17 1.18 1.16 1.05 1.03
Backlogs 56.4 65.0 60.0 56.0 58.7 Computers/electronic products4 5.32 6.46 6.38 6.45r 6.39p
Source: Institute for Supply Management, June 1, 2022 Sources: 1IPC, 2SIA (3-month moving average growth), 3IPC, 4Census Bureau, ppreliminary, rrevised

ROI
Innovative Technology: Enabling or Disruptive?

Fabricators and designers must communicate about new technology to verify
its viability.
MORE OFTEN THAN not over the past couple of “enabling” technologies available to the industry.
decades, new technologies, processes and options we Enabling? Not to me. That is when the communication
fabricators have been asked, begged or threatened to gap between design application and manufacturing
add to our repertoire of offerings were ones that could competence became evident. As this conversation con-
be best considered disruptive. What’s disruptive to a tinued, I heard a different spin as to why a particular
manufacturer may seem benign to the casual eye, as new technology was being specified. Understanding
often the technology – or process – that is most disrup- the benefits from the end-product perspective began
tive is a simple one. to make sense and explained why this customer would
Indeed, sometimes that technology is nothing have specified it, as well as why its use may become
more than the rebirth of an older, tried-and-true, albeit widespread in the future. The tutorial was strictly from
significantly tweaked, process. REACH, and the prior a value-add design perspective, and it was compelling.
RoHS, caused much disruption, and yet most of the When asked if the design community knew of the
plating chemistries and surface finishes in use today fabrication challenges the new technology caused that
are essentially highly refined formulas of older plating impacted yield and lead times, in addition to cost, the
technologies such as ENIG, silver and tin. answer was honest: “Probably not.”
Old or new, disruptive technologies tend to be What’s enabling to one party can be disruptive
challenges for several reasons. First is understanding to another. Fabricators often do not understand the
the technology and how to process it so it works as nuances of pushing design to meet challenging per-
intended. Second is determining what equipment is formance objectives but do fully understand robust,
needed to cost-effectively and robustly apply the new time-proven manufacturing techniques. Equally, when
technology. Finally, finding enough customers to con- a designer chooses to move toward a new technology,
sistently order product that uses the technology, so they may be excited by the functionality it offers but
everyone remembers what it is and how to process it! most likely is unaware manufacturing the board could
Truly new paradigm-shifting technologies hit the lead to lower yield, longer lead times and ultimately
scene as “must haves” so a product can function. higher costs.
While disruptive to manufacturers, in some ways the The real issue is understanding the risks involved
more off-the-wall a technology seems, the easier it is with embracing – or ignoring – new technology. The
to decide whether to embrace it or wait to see if it risks include, “Will it work, or will it only work if
sinks under the weight of its own hype. These disrup- executed flawlessly? Will the new technology pass
tive technologies more typically challenge everyone to the test of time? Most important, will widespread use
understand not only how to apply them, but how to of the technology lead to cost-effective processes or
measure success or failure so yields and costs can be equipment to ensure consistency from one application
determined. to another and from one supplier to another?”
In all cases, what makes disruptive technologies so As a fabricator, it is more important now than ever
unruly boils down to two issues: First is the learning to be in touch with customers’ designers to understand
curve and capital investment needed to provide the what they are attempting to accomplish. Equally for
technology, and second is gaining consensus among designers, it is essential they are in contact with all
customers that the technology is a better alterna- their PCB suppliers, especially the behind-the-scenes
tive to more traditional technologies, and they will process gurus, so everyone understands the manufac-
PETER BIGELOW
is president and
purchase enough to warrant the human and capital turability of new technology in the real world of the
CEO of IMI Inc.; investment. Probably most frustrating for fabricators shop floor.
pbigelow@imipcb. is when a buyer provides no apparent reason other This gets back to the need for suppliers knowing
com. His column than “because” for specifying a new technology. The their customer and customers knowing their suppli-
appears monthly. fabricator’s goal is to supply quality product they ers – and not just at the buyer/sales rep level but at
understand and can safely and consistently produce, the designer/manufacturing engineer level. Knowing
not (inadvertently) become a customer’s R&D center, the intended end-result a new technology enables, as
with the concurrent risks and costs. well as how disruptive that technology may be when
Every new technology has at least two sides. At
a recent industry gathering, a supplier mentioned a
current disruptive technology we had difficulty work- continued on pg. 49
ing our way through was only one of a slew of new

BOARD BUYING
All Wet: PCB Packaging, Shipping and Storage

Limiting PCB moisture absorption is the full responsibility of the supplier.
How to pack boards right.
PCB SUPPLIERS WHO use good packaging methods tifying its contents, including the part number, pur-
are keeping their products safe from physical damage chase order number, date code and number of pieces
incurred during transit from the manufacturing facility within the box.
to customers’ warehouses. Equally important, these Each part number shipped should come with a
packaging practices help ensure shelf-life expectancy packing slip and “proof of quality” documentation,
by preventing moisture absorption. including (but not be limited to):
To protect their orders, PCB buyers should require ■ The certificate of compliance
suppliers strictly follow corporate shipping specifica- ■ A first article or dimensional report
tions. Nothing is more frustrating than waiting for ■ A microsection report to include a solderability test
quality product to be built, only to have it damaged with a cross-section
because of poor packaging practices. It’s just as frus- ■ An electrical test report
trating when boards become useless while sitting on ■ An ionic contamination report
the shelf. ■ A TDR report (controlled impedance, when appli-
PCBs can be very heavy. Their sharp corners some- cable)
times wreak havoc on the corrugated cardboard boxes ■ Any material certifications
in which they are shipped. A good freight spec should ■ Any other documentation required by the purchase
state boards are to be vacuum-packed with a bubble order.
wrap base, with no more than 25 boards to a stack. When the product is shipped, the supplier should
When a board is oversized or heavier than normal, 10 notify the customer’s purchasing, receiving and
to 15 pieces is the best option. Whatever number is accounting departments of shipment method and
used, the packaging should be consistent in count for tracking number. The commercial invoice and elec-
a particular shipment. tronic copies of the quality paperwork should be
Extra care should be taken for flexible or very included in case such documentation for the shipment
thin, rigid PCBs less than 0.028" thick. They should is lost in transit.
be packaged with stiffening material on the top and As crucial as proper PCB packaging is, the storage
bottom of the bundle to help prevent warping. of the boards once they reach the customer is just as
A humidity indication card (HIC) and desiccant vital. Other than opening one of the packages to verify
are to be placed within the package as well. The HIC the PCBs meet the criteria of the print and the docu-
should be placed inside on top of the PCBs for easy mentation received, the best bet is to leave the boards
review. The desiccant should be placed along the side in their original packaging.
or edge of the bundle, so it doesn’t contribute to bend- A bare board begins to absorb moisture immedi-
ing or warping caused by the stress of the vacuum ately upon leaving the factory. The amount of moisture
packaging. absorbed depends on a variety of factors, including: GREG
Each PCB bundle should have a sticker affixed ■ Base material used in manufacturing PAPANDREW
detailing the part number, date code and number of ■ Manufacturing environment has more than 25
pieces per bundle. More than one date code of the ■ Packaging method years’ experience
same product may be shipped together if they are seg- ■ Shipping temperatures (from the cold bellies of air- selling PCBs
regated and marked as such. craft or the humid transit of a sea shipment to hot directly for various
fabricators and
X’d-out panels, if allowed by your PCB fabrica- delivery trucks)
as founder of a
tion specifications, should be packaged separately and ■ Customer storage and inventory procedures.
leading distributor.
clearly marked. Vacuum sealing and the use of desiccant only delay
He is cofounder of
The individual packages of PCBs should be placed or lessen moisture absorption. They do not prevent it. Better Board Buying
tightly in a box, with Styrofoam or other shock- The longer a PCB is stored on a shelf, the greater (boardbuying.com);
absorbing material placed between the packages and the chance it will absorb moisture, which can manifest [email protected].
the wall of the shipping container. The PCB corners in the assembly operation as delamination. Delamina-
should be protected, as they can be easily dinged or tion is caused either by moisture or manufacturing
dented while in transit. defects. If a problem PCB is determined to be structur-
The weight of each box should not exceed 30 lb.
Boxes may have exterior strapping applied when the
PCBs are oversized or heavier than normal. continued on pg. 49
Each box should have a sticker on either end iden-

For Information or Registration:
The Printed Circuit Engineering Professional curriculum teaches
a knowledge base and develops a competency for the profession of https://pcea.net/pce-edu-design-engineer-curriculum/
printed circuit engineering layout, based on current technology trends.
Upcoming Class Openings: More added each month!
It also provides ongoing reference material for continued development
in the profession. The 40-hour course was developed by leading experts July 11-15
in printed circuit design with a combined 250 years of industry experience
and covers approximately 67 major topics under the following headings:
Basics of the profession, materials, manufacturing methods and processes;
circuit definition and capture; board layout data and placement; circuit
routing and interconnection; signal-integrity and EMI applications; flex
PCBs; documentation and manufacturing preparation; and advanced
electronics (energy movement in circuits, transmission lines, etc.).
Class flow: Books sent to students prior to an instructor lead review.
This is followed by an optional exam with a lifetime certification that
is recognized by the PCEA Trade Association.
The course references general CAD tool practices and is vendor-agnostic.

Instructors include Mike Creeden, CID+, who has over 44 years of
industry experience as an educator, PCB designer, applications engineer
and business owner; and Tomas Chester, P.Eng., CPCD, who has
designed over 100 circuit boards through all phases of the product
lifecycle, and managed a variety of multifaceted, interdisciplinary projects,
from simple interconnect designs to complex microprocessors.
Printed Circuit Engineering Professional
Table of Contents:
Chapter 1: Professional Overview Chapter 5: Flex Printed Circuits (FPC)

1.1 Printed Circuit Engineering Layout Overview – 5.1 Flex and Rigid-Flex Technology – Overview and
Profession overview Introductions to FPC
1.2 Basic Fabrication of a Printed Circuit Board – 5.2 Flexible Printed Circuit Types – IPC definition
Materials and construction 5.3 Flexible Circuits Applications – Industry sectors and
1.3 Basic Assembly of a Printed Circuit Board – usage
Materials and process 5.4 Materials for Flexible Circuits – Properties and
1.4 Basic Electronics in a PCB – Fundamental process
understanding and concepts 5.5 Design Start Considerations – Physical and electrical
1.5 Basic Printed Circuit Engineering Layout 5.6 FPC Stackup Constructions – Usage and process
Overview – Layout process 5.7 Flex Design Practices – Physical and electrical
1.6 Project Management (PM) – Enabling project aspects
success and accountability 5.8 Production Process Consideration – Process flow
1.7 Communication –throughout the process 5.9 Conductive Surface Finishes – Overview of types and
process
Chapter 2: Circuit Definition & Capture 5.10 Stiffeners – Types and applications
2.1 Libraries to Bill of Material (BOM) – Integrated 5.11 Shielding Material – EMI and EMC considerations
library: symbols, land patterns 5.12 Design for Manufacturability and Assembly – Unique
2.2 Surface Mount and Thru-Hole Technology – concerns building FPC
Components and process
2.3 Schematic Types and Conventions– Functional, Chapter 6: Documentation & Manufacturing Preparation
logic, flat and hierarchal 6.1 Documentation Overview – Prepare for the final
2.4 Schematic Symbol Placement – Orderly circuits design effort
improve comprehension 6.2 Resequencing Reference Designators – Back-
2.5 Schematic Review – Complete and accurate annotation
2.6 Circuit Board Types – Rigid, Flex and Printed 6.3 Silkscreen – Providing visual intelligence
Electronics 6.4 Industry Standards – Design, document and build
2.7 IPC – MIL Standards and Specifications – compliance
Reference listing of standards 6.5 Post-processing Procedure – Know what to expect at
2.8 Verification, Testing, Compliance & Qual. your company
Assurance 6.6 Manufacturing Deliverables – Documentation
2.9 Mechanical Board Information –Physical 6.7 Fabrication Drawing – Instructions to fabricate the
requirements bare board
2.10 Database Links and Iterative Data Exchange – 6.8 Assembly Drawing – Reference drawing used to
Development iterations assemble the PCA
6.9 Schematic Database and Drawing – Circuit capture
Chapter 3: Board Layout Data & Placement and BOM origin
3.1 Board Parameters Set-up – CAD – environment 6.10 Bill of Materials (BOM) – Controlling document
3.2 Stackup Design – Z-Axis relationship 6.11 Final Deliverables – Formats and creation process
3.3 Constraints and Rules – Define and implement 6.12 Transfer to Manufacturer – Manufacturing interface
accurate reliability
3.4 Placement for Assembly – Performance and Chapter 7: Advanced Electronics, EM Applications
buildability (During the review class only cursory coverage of Chapter 7
3.5 Placement of Components – Solvability, will be provided due to the advanced nature of this
performance, and manufacturing content.)
3.6 Schematic Driven Placement – Cross-probing 7.1 Energy Movement in Circuits –EM Theory
3.7 Placement Dense Digital Circuits – (LSI) Large 7.2 Critical Frequencies in Circuits on PC Boards
Scale Integration Frequency and Rise Time (Tr)
3.8 Placement Power Delivery – Source, distribution, 7.3 Transmission Lines in PC Boards – Relational nature
and usage in electronics
3.9 Placement Mixed Circuit (RF/HSD) – Together 7.4 Understanding Impedance of Transmission Lines –
3.10 Placement Review Milestone – Approval for routing Modification from layout
7.5 Impedance Control of Transmission Lines –
Chapter 4: Circuit Routing & Interconnection Controlling impedance in layout
4.1 General Overview of Routing – Fundamental 7.6 Controlling Impedance of Digital ICs – Controlled and
parameters set to specific values
4.2 Routing Dense Digital Circuits – Modular approach 7.7 Controlling Noise Margin – Critical lengths
4.3 Routing with Signal Integrity Applications – understanding
Managing energy fields 7.8 Crosstalk and Cross-coupling – Capacitive and
4.4 Routing Power Delivery – Source, Distribution, and inductive coupling
Usage 7.9 Controlling Timing of High-speed Lines – Timing
4.5 Routing RF Circuits – Managing dissipation and matched, not length
loss
4.6 Routing Review Milestone – Approval of routing
ON THE FOREFRONT
ECTC Highlights Next-Generation

Packaging Challenges
Large crowds mulled the latest substrate trends and new developments
in 3-D IC hybrid bonding.
The IEEE Electronics Components and Technology panel concluded that, with increased use of chiplets,
Conference (ECTC) returned to an in-person confer- continued work is required in the areas of test and
ence at the end of May with more than 1,500 attend- known good die (KGD), thermals, power deliver and
ees, domestic and international. Attendance in San system-level integrity. Adoption of standards such as
Diego matched pre-pandemic numbers. While some the recently introduced UCIe is important to align the
presentations remained virtual, using video recording, industry around an open platform to enable chiplet-
many were onsite. A variety of electronics packaging based solutions. Thermal management remains one of
topics were discussed. Judging by the crowded rooms, the major bottlenecks with 3-D.
this year’s hot topic was 3-D IC hybrid bonding. A special night session focused on the US Depart-
ment of Defense (DoD) in the state-of-the-art heteroge-
Advanced packaging. A pre-conference Hetero- neous integration (SHIP) program. The opening state-
geneous Integration Roadmap workshop discussed ment from the office of the Undersecretary of Defense
trends in networking for the future and new develop- for Research and Engineering explained the backdrop
ments in advanced packaging for high-performance of the program. Speakers from Intel and Qorvo,
computing and data centers. The workshop concluded recipients of US government funding, described their
with a panel of presenters discussing the latest trends activities. Qorvo is focused on RF, and Intel is focused
in medical health and wearables. on high-performance computing with its embedded
Plenary sessions covered some of the latest top- multi-die bridge (EMIB) technology. The panel admit-
ics. The MicroLED display session focused on high- ted that, in the absence of a volume supplier of buildup
volume manufacturing progress and challenges. In a substrates, the DoD depends on a global substrate
session on the evolution of IC substrate technology, procurement strategy.
panelists from Intel, Amkor, Ajinomoto, AT&S and A session on diversity and career growth provided
Atotech discussed the latest substrate trends. advice from a panel of experts, including representa-
The special session – Meeting Next Generation tives from IBM, Lam Research, Edwards and Cadence.
Packaging Challenges from Chiplets to Co-packaged The plenary session covered digital transformation
Optics – included panelists from AMD, Cisco, Mar- with participation from Intel, TSMC, Yole, Onto
vell and Synopsys (FIGURE 1). Panelists discussed the Innovation and Samsung. A late-night session focused
importance of co-design and changing the approach to on Interconnect Technologies for Chiplets with par-
design, including system-level design. The combination ticipants from Intel, IBM, Unimicron, TSMC, SPIL
of digital and photonics is coming. Integrating this in and Furukawa Electric. Participants from Taiwan and
3-D will include the laser, modulator, filters and detec- Japan dialed into the session to discuss topics includ-
tors. Interfaces and the design platform are important ing embedded bridge, the incorporation of memory in
for robust manufacturing, including product quality, advanced package developments in optical packaging,
debug and traceability, and in-field optimization. The 3-D packaging and substrates.
Adapting to substrate shortages.

With the continued substrate shortage,
E. JAN
companies focused on the potential for a
VARDAMAN
fan-out wafer level package (FO-WLP).
is president
of TechSearch
Numerous presentations covered several
International options, with new applications for fan-
(techsearchinc.com); out discussed. SK Hynix discussed the
jan@techsearchinc. potential for memory applications. IME
com. A*Star discussed FO-WLP antenna-
in-package (AiP) for automotive radar
applications. Researchers at UCLA
described their work on FO for micro
FIGURE 1. A special panel on packaging challenges. Panelists included displays. RFcore discussed FO-AiP for
(from left) Kevin O’Buckley (Marvell), Raja Swaminathan (AMD), Ming 5G mmWave applications. Amkor, ASE
Zhang (Synopsys), Ravi Mahajan (Intel), Sandeep Razdan (Cisco Sys- and Samsung presented package options
tems), and moderator Jan Vardaman (TechSearch).
for FO-WLP.

ON THE FOREFRONT
Processing FO
in a panel has been
proposed as a way
to lower the cost by
increasing the num-
ber of parts with
large-area process-
ing. Fraunhofer
and the Technical
University of Berlin
discussed the tech-
nology limits of
panel processing,
describing warp-
age and die shift
as the major issues.
Layout adaptation
is promoted to
overcome die-shift
challenges on large FIGURE 2. The Nepes nPLP 600mm x 600mm fanout panel line reportedly can produce five times as many chips
panels. Samsung as one 300mm round panel.
Electronics dis-
cussed the reliabil-
ity of the via structure in its FOPLP line. Amkor introduced its the wafer. Adeia’s (formerly Xperi) study of the influence of
650mm x 650mm panel line. Nepes provided reliability data Cu microstructure on the thermal budget shows the possibil-
on FO packages fabricated on its new panel line based on Deca ity of a 20° to 40° reduction in the final anneal temperature.
M-Series technology (FIGURE 2). Deca Technologies described CEA-Leti presented research conducted with Intel on a new
20µm device pad pitch with its M-Series process. The use of die-to-wafer (D2W) collective bonding self-assembly process
adaptive patterning provides a way to handle die shift. Dai using water droplets with high alignment accuracy and high
Nippon Printing introduced its panel-based RDL interposer throughput. SK Hynix reported the work on wafer-to-wafer
with a 2µm pitch semi-adaptive process for chiplet integration. (W2S) DRAM stacking for DRAM. Samsung presented several
Several presentations focused on new substrate options, papers on hybrid bonding, including research on controlling
including glass as a substrate and RDL interposers. Develop- bonding voids. AMD described its V-Cache, now in com-
ments in glass substrates were introduced with papers from mercial production for servers, desktops and gaming, using
Korea Electronics Technology Institute and Georgia Tech. TSMC’s SoIC process. TSMC described an extension of its
TSMC introduced its organic interposer CoWoS-R+ technol- SoIC process.
ogy that replaces the silicon interposer with an RDL structure.
The plus indicates the integration of a large amount of high- Co-packaged optics. Several presentations focused on co-
density integrated passive devices (IPDs) that serve as decou- packaged optics (CPO). Rockley Photonics introduced a fan-
pling capacitors. The integrated de-cap capacitors suppress the out silicon photonics module for next-generation CPO. Rain
power domain noise and enhance HBM3 signal integrity at a Tree and IME A*STAR described a heterogeneous integration
high data rate. Optional silicon connection blocks (bridges) package using FO-WLP for a hyperscale data center. IBM Can-
provide high-density die-to-die connections. IBM provided ada, GlobalFoundries and others discussed optical fiber pigtail
updated work on its direct bonded heterogeneous integration integration for CPO. Cisco described its vision for CPO and
(DBHi) silicon-bridge package, in which the Si bridge is con- challenges in the use of through-silicon vias, including high
nected to the die and then mounted on the laminate substrate. warpage, optical fiber coupling, and chip-on-substrate assem-
SPIL provided recent reliability data for its embedded bridge bly. Reliability requirements were also highlighted. A joint
package. Unimicron discussed its hybrid substrate with a paper from EV Group, Tyndall National Institute, IMEC and
buildup film. Ghent University described a high-speed Si photonic switch
with a micro-transfer-printed III-V amplifier. ASE described its
3-D hybrid bonding. Three years ago, many ECTC papers CPO assembly.
focused on R&D activities in hybrid bonding. This year, more
than 30 papers discussed hybrid bonding process improve- Emerging areas. Presentations also covered additive manu-
ments and new developments. While image sensors have been facturing, 3-D printing, developments in packaging and assem-
using hybrid bonding for many years, Sony described their bly for wearables, and micro LEDs.
recent work to develop 1µm face-to-face bonding and a new Next year’s ECTC will be held in Orlando May 30 to Jun. 2. •
thinning process that minimizes Si thickness variation across

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How to Fight Magnetic Noise Gremlins Keven Coates, Fluidity Technologies
Industry Best Practices for Hardware IP Reuse Stephen Chavez, Siemens
From DC to AC – Power Integrity and Decoupling Primer for PCB Designers, Ralf Bruening, Zuken
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Technologies- Flip-Chip, WLP, FOWLP, 2D, 2.5D and 3D
Circuit Grounding to Control Noise and EMI Rick Hartley, RHartley Enterprises
An Intuitive Approach to Understanding Basic High Speed PCB Layout Keven Coates, Fluidity Technologies
Effective PCB Design: Techniques to Improve Performance Daniel Beeker, NXP Semiconductor
Printed Circuit Fabrication Today: A More Complex Process Gary Ferrari, Ferrari Technical Services
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1:30 p.m. - 5:00 p.m. PCB Antennas for Everyone Benjamin Jordan, JordanDSP
Part Placement Choices and Consequences Susy Webb, Design Science
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10:00 a.m. - 11:00 a.m. Dynamic Guidelines for Design with SAP (Semi-Additive Processes) Tomas Chester, CED, and Tara Dunn, Averatek
Understanding High Frequency Materials Test Methods for Dk and Df John Coonrod, Rogers Corp.
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The 21 Most Common Design Errors Caught by Fabrication (and How to Ray Fugitt, DownStream Technologies,
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2:30 p.m. - 3:30 p.m. Leveraging CFX-QPL to Integrate Equipment and Create a Smart Factory Ivan Aduna, Koh Young
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IPC-2581’s Bi-directional Electronically Executable DFx Exchange Hemant Shah, IPC-2581 Consortium,
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and Chris Hunrath, Insulectro
PCB Layout of Switch Mode Power Supplies Rick Hartley, RHartley Enterprises
Electromagnetic Fields for Normal Folks: Show Me the Pictures and Hold the Daniel Beeker, NXP Semiconductor
Equations, Please!
Ask the Flexperts–Design-Test with Lessons Learned Mark Finstad, Flexible Circuit Technologies,
and Nick Koop, TTM Technologies
Improving Circuit Design and Layout for Accessibility and Success Tomas Chester, Chester Electronic Design
10:00 a.m. - 7:00 p.m. A Guide to RF and Microwave PCB Design Benjamin Jordan, JordanDSP
12:00 p.m. - 1:00 p.m. LUNCH-N-LEARN with Polar Instruments
1:00 p.m. - 2:00 p.m. Panel: Emerging Technologies and Their Impact on Manufacturing Tara Dunn, Averatek
2:00 p.m. - 3:00 p.m. HDI Via Design: Planning the Energy Pipelines Daniel Beeker, NXP Semiconductor
2:00 p.m. - 5:30 p.m. Where Does Today’s Designer/Engineer Start? Has The Industry Really Gary Ferrari, Ferrari Technical Services
Changed That Much?
IoT and Low Layer Count PC Board Design Rick Hartley, RHartley Enterprises
Heat Management for SMD, LED, and systems 1W to 50W Keven Coates, Fluidity Technologies
Designing Boards with Today’s BGAs Susy Webb, Design Science
FRIDAY OCTOBER 7, 2022

Time Title Speaker
10:00 a.m. - 12:00 p.m. Principles of Building a PCB Stackup Susy Webb, Design Science
Mechanical Design to Control EMI Rick Hartley, RHartley Enterprises
Fan-Out Wafer/Panel-Level Packaging (FOW/PLP) John H. Lau, Unimicron
and System-in-Package (SiP)
12:00 p.m. - 1:00 p.m. LUNCH-N-LEARN
1:00 p.m. - 3:00 p.m. The Mechanical Side of PCBs Tomas Chester, Chester Electronic Design
1:00 p.m. - 4:30 p.m. Circuit Design Principles for Flexible and Rigid Flex Circuits- Planning, Design, Vern Solberg, Solberg Technical Consulting
Fabrication and Assembly Processing
A Multilayered Crash Course in PCB Design Kirsch Mackey, HaSofu
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WHO’S EXHIBITING
Accurate Circuit Engineering HZO, Inc. Polyonics
AGC Multi Material America, Inc ICAPE Group Printed Circuits LLC
All Flex Flexible Circuits & Heaters Imagineering, Inc. Rogers Corporation
AllSpice.io Insulectro San Diego PCB Design
American Standard Circuits, Inc. IPC-2581 Consortium San-ei Kagaku Co., Ltd.
APCT Ironwood Electronics Screaming Circuits
Archer Circuits ISOLA SEP Co., Ltd.
Arlon EMD JetPCB USA Shenzhen Kinwong Electronic Co., Ltd.
Bay Area Circuits, Inc. Leader Tech, Inc. Siemens
Binary Process Solutions MFS Technology (S) Pte Ltd. Sierra Circuits
Bittele Electronics Inc. MicroConnex, A Carlisle Company Summit Interconnect
Cadence Design Systems Micro Systems Technologies Management GmbH Sunshine Global Circuits
Cicor Group MVINIX Corporation Sunstone Circuits
DownStream Technologies, Inc. Nano Dimension SVTronics, Inc.
DuraTech Industries Notion Systems GmbH Taiyo America Inc.
Dynamic Electronics Co. Ltd. Oak-Mitsui Technologies LLC Tempo Automation
EM Solutions Inc. Ohmega Technologies/Ticer Technologies Trilogy-Net Inc.
EMA Design Automation OKI Circuit Technology Co., Ltd. Ultra Librarian
Emerald EMS Optiprint AG Vayo (Shanghai) Technology Co., Ltd
Fischer Technology, Inc. Panasonic Electronic Materials Ventec International Group
Flexible Circuit Technologies PCB Technologies - USA Victory Giant Technology
Fujipoly America PFC Flexible Circuits Limited Xiamen Bolion Tech Co., Ltd.
GS Swiss PCB AG Polar Instruments, Inc. Zuken USA Inc.
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DESIGNER'S NOTEBOOK
How to Specify Impedance on a PCB

Determining your optimum geometry, plus two methods for providing data to
the fabricator.
CONTROLLING IMPEDANCE (RESISTANCE) is almost a geometry. On balance, the line is normally thinner
given with today’s technology. One day we are adding on the innerlayers, but you’re compelled to provide a
a wireless option to a common object and calling it the continuous ground plane on the layer above and below
Internet of Things. The next day we’re simply keeping the innerlayer transmission lines.
up with the competition on processing the code. The The presence of solder mask can affect routing on
trend is toward a greater percentage of the connections the outer layers to some degree. Any kind of coating or
falling under the domain of impedance control. large ferrous metal objects can affect an analog signal.
Controlled impedance has two main branches: The final line width and construction adjust for those
Single-ended transmission lines are the backbone of RF factors.
technology, while differential pairs do the heavy lifting
for digital circuits. We’ll start with the single-ended Differential pairs in the real world. Turning to the
lines. They have a start and an end point. The signal is digital logic side, our favorite way to spew ones and
sent one way on the transmission line, and the circuit zeros is to calculate the difference between two match-
is completed over the adjacent ground plane. ing lines, rather than trying to read a single line that
The main factor influencing impedance is the is subject to momentary instances of noise as a voltage
width of the trace relative to the thickness of the dielec- spikes across the landscape.
tric material between the trace and the ground plane – This is how differential pairs are different. Too
or planes – used as a reference. What is a reference? It much can go wrong with a long enough transmission
is usually a metal plane with zero volts – “ground” but line, and dropped packets are followed by check-sum
can have a few volts of its own, either positive or nega- bytes that do not add up to the number of bytes actu-
tive relative to what’s happening on the trace itself. ally received. Whatever those instructions were, they
A basic rule of thumb is the width of the trace is must be repeated. The user gets beachballs, hour-
nearly equal to the thickness of the dielectric material glasses or, heaven forbid, stalled video!
JOHN BURKHERT to achieve a 50Ω impedance on the line. The exact A good microphone cord has the triple connec-
JR. is a career PCB number is a product of
designer experienced a number of factors that
in military, telecom,
define the optimum trace
consumer hardware
width.
and, lately, the
Two primary factors
automotive industry.
Originally, he was
determining the trace
an RF specialist but geometry are the thick-
is compelled to flip ness of the copper and
the bit now and then the dielectric constant
to fill the need for of the material (Dk or
high-speed digital r). Exotic materials are
design. He enjoys known for their thermal
playing bass and stability, their tight con-
racing bikes when
trol over the dk and for
he's not writing
a low-loss tangent. Those
about or performing
properties come at a cost.
PCB layout. His
column is produced
The ceramic materials are
by Cadence Design typically found in high-
Systems and runs frequency and very high-
monthly. speed applications. Good
design practices with
FR-4 usually do the trick.
Additional PCB lay-
ers above the trace have
an impact, as they require
a transition between FIGURE 1. A mixed-signal board is always a stretch, with the various functions vying
for limited space.
stripline and microstrip

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DESIGNER'S NOTEBOOK
tion, so it doesn’t pick up so much noise from the alternating rules not in use, it’s one question they don’t have to ask at
current fields that flow around wherever they will. My guitar tape-out time. Target the information they need by obscuring
hits with a stronger signal, so the two-wire cord is fine. That’s what is not in play if your flow uses a standard template for
pretty much the two essential methods of data transport. impedance.
This plays out on the PCB as well. The second line, along
with the ground, forms a balanced circuit. We can use a low Method 2: Provide an unwavering set of conditions. The
voltage and still transmit good data over a fair distance. The other way is a little more authoritarian in that it establishes an
common approach is to use edge-coupled lines. They are exact type of material through slash sheets and listing other
routed side by side, and the gap between them is a major vari- criteria deemed necessary. Then, there is no negotiation on the
able. Loosely coupled lines are noted by the spacing between impedance control, only on the timeline and price for obtain-
them being wider than the traces. Conversely, tightly coupled ing the material that meets the specifications.
differential pairs have This model served
an airgap that is less us well at a certain fab-
than the trace width. less chipmaker where
So, after determin- we could not be sure
ing the optimum geom- every type of material
etry for your purpose, was suitable for the
it’s the fabricator’s demands of Snapdrag-
job to carry this out. on chips. When a PCB
They have material is sent out for fabrica-
and equipment that is tion, the vendor may
hopefully aligned with want to reduce the
your goals. Otherwise, amount of copper in
keep shopping. Giving the via or somehow cut
the PCB fabricator the corners. We had data!
data can take one of There were exactly the
two forms. right number of vias
and copper width to
FIGURE 2. The noted dimensions create the space for the digital waveforms
Method 1: Provide to propagate. The stuff between the metal is the medium whose properties
get the job done as
a target and let the determine the rest of the values. (Source: Maxfield EEWeb) designed. More than
vendor come up with enough would make
a plan. First and most the chipset bigger.
common is to have a Marketing sets that
set of instructions or boundary. It’s our job
a table on the fabrica- to make it work. We
tion drawing describ- thus required a solid
ing the target imped- representation of
ance of traces broken the data, rather than
down layer by layer using it as a jumping
for each impedance off point. The words
type in use. Provide the “or equivalent” were
line width and spac- strictly enforced.
ing where applicable, A good number of
as well as the reference vendors are still out
layer(s) for calculating there; it’s beneficial
the impedance based to keep your options
on specific materials open. If you have a
and processes. solid relationship with
The note/table FIGURE 3. Stacking the traces calls for a tight layer-to-layer registration a vendor, they will
requirement. Missing by 25µm on a 100µm trace throws off the alignment be able to generate a
often reflects what is
25%. (Source: Maxfield EEWeb)
embedded in the PCB proposed stackup that
design software as the meets your needs. That
design rules. It’s com- information is applica-
mon to have a callout for every type on any controlled imped- ble to that vendor at that time. Not much else is guaranteed in
ance layer designated in the constraints to fill in the blanks. this business. Whether you design to their spec or keep using
The board may or may not have used every kind of trace the same rules as always is your business. •
on every available layer. If you cross out the subset of design

TRACE HEATING
Making Technology-Specific
DESIGN CHARTS
IPC-2152 is an important baseline for determining current
carrying capacity, but further work must be done for
individual applications. by MIKE JOUPPI
In response to recent chatter about IPC-2152 in multiple data for 0.5oz, 1oz, 2oz and 3oz copper internal conductors,
online articles, I believed it necessary to reiterate the purpose as well as 2oz and 3oz external conductors. In addition, we
behind the IPC design standard for sizing electrical traces. included test results for testing in air and in a vacuum environ-
IPC 1-10b is a task group of volunteers from several com- ment (space and high-altitude applications).
panies in the electronics industry. I was task group chairman All this testing was performed with a polyimide test board
from 1999 to 2016. We designed test boards and wrote IPC- that was 14" long, 7" wide and 0.07" thick. We tested the
2152, Standard for Determining Current-Carrying Capacity in board suspended vertically and horizontally in still air for the
Printed Board Design. The standard is intended to describe the air/Earth environments and suspended in a vacuum chamber
test data used to define trace heating in a specific configuration for the space environments. No copper planes were in the
through conductor sizing design charts. Testing was performed board. The appendix includes measured thermal properties for
following IPC-TM-650, method 2.5.4.1A, “Conductor Tem- the board materials we tested.
perature Rise Due to Current Changes in Conductors.” The In the appendix, we included thermal modeling results to
design charts are only applicable to that configuration. Designs illustrate the temperature gradients around the traces in the
with different board sizes, thicknesses, and materials, includ- polyimide test board while suspended in still air. The intention
ing copper planes – when mounted by bolted fasteners or was to bring attention to the parallel conductor rule for sizing
wedgelocks – have different trace temperatures for an applied traces in proximity to each other. This rule is not practical.
current. People and corporations have to create their own A better way to estimate the temperature rise for multiple
charts if they want to have an accurate temperature for a given conductors is to manage power and power density, although
trace size and applied current. The information included in power and power density are meaningless without design
IPC-2152 provides that information. (Accurate temperatures charts that represent the technology.
can only occur from a design chart if that chart represents the We created many thermal models of printed circuit boards.
specific technology.) The models were correlated to the test data with excellent
We created an appendix in IPC-2152 to help users under- results. We then used those thermal models to simulate the
stand a single design chart cannot be expected to describe the presence of copper planes. We varied the copper-plane thick-
temperature rise of traces in all printed circuit board applica- ness and the distance from the copper plane to the trace.
tions. Circuit boards vary in size and shape, have different Results showed what we expected: a significant drop in the
dielectric materials, and vary in the number of layers and cop- trace temperature rise when the plane is close to the trace and
per thicknesses, as well as mounting configurations. not as much when the plane is moved away from the trace.
It is not practical to perform current carrying tests to We provided guidance regarding board size and the expected
derive design charts that will be useful for all technologies. reduction in trace temperature when a full copper plane exists
The intent of IPC-2152 is to provide enough information for at a specific distance from the trace, but it was not followed
companies to run their own testing or develop thermal models up with any testing.
to determine conductor current carrying capacity in a given We wanted to include mounting configurations as well. We
technology. Correlating a thermal model to IPC-2152 baseline wanted to simulate bolted connections and wedgelocks, but
data is a start. Correlating a thermal model to a known value we didn’t get to that. The mounting configurations will likely
validates the model. It is a practice to compare against a stan- show a significant impact.
dard: in this case, IPC-2152. We collected trace heating data for FR-4 boards that were
The IPC-2152 Appendix includes baseline charts from test 14" long, 7" wide and 0.038" thick, as well as 0.059" thick.

TRACE HEATING
TABLE 1. Unpublished Design Charts

These data were not published. Models were created for
these configurations, and charts were created for these
Board Length Board Trace
and Width Thickness Board Material Thickness Configuration boards with no copper planes, a 1oz copper plane 0.005"
(inches) (inch) (inch)
from the trace, and a 2oz copper plane 0.005" from the
3x3 0.038 FR-4 1oz Baseline trace. We then expanded the data set of charts to include
3x3 0.038 FR-4 1oz 1oz plane the configurations listed in TABLE 1.
3x3 0.038 FR-4 1oz 2oz plane The configuration column represents three board
5x5 0.038 FR-4 1oz Baseline configurations. The baseline has no copper planes. The
5x5 0.038 FR-4 1oz 1oz plane 1oz plane designation represents a chart developed for
5x5 0.038 FR-4 1oz 2oz plane when a single 1oz copper plane is included in the stackup
7x7 0.038 FR-4 1oz Baseline that is 0.005" from the trace. The 2oz plane configuration
7x7 0.038 FR-4 1oz 1oz plane is a chart with a 2oz copper plane that is 0.005" from
7x7 0.038 FR-4 1oz 2oz plane the trace. We ran studies to investigate if the location of
10x10 0.038 FR-4 1oz Baseline the internal trace (through the stack) had any significant
10x10 0.038 FR-4 1oz 1oz plane impact on the temperature rise; it did not. We ran studies
10x10 0.038 FR-4 1oz 2oz plane to see the impact of moving the trace to the edge; it did
3x3 0.059 FR-4 1oz Baseline have an impact. We also ran studies varying the distance
3x3 0.059 FR-4 1oz 1oz plane from the trace to the plane but didn’t develop charts from
3x3 0.059 FR-4 1oz 2oz plane those studies.
5x5 0.059 FR-4 1oz Baseline
5x5 0.059 FR-4 1oz 1oz plane Managing Currents and High-Power Densities
5x5 0.059 FR-4 1oz 2oz plane To educate users on IPC-2152 and its predecessor IPC-
7x7 0.059 FR-4 1oz Baseline 2221, I recently participated in a couple webinars and a
7x7 0.059 FR-4 1oz 1oz plane HackChat. As a result of those appearances, I received a
7x7 0.059 FR-4 1oz 2oz plane number of questions about managing currents up to 300A
10x10 0.059 FR-4 1oz Baseline and managing high-power densities. For example, one
10x10 0.059 FR-4 1oz 1oz plane student was designing a bridge rectifier with four Mosfets
10x10 0.059 FR-4 1oz 2oz plane that each dissipated 15W of power and had a peak cur-
3x3 0.07 Polyimide 1oz Baseline rent of up to 80A. The student had questions regarding
3x3 0.07 Polyimide 1oz 1oz plane thermal vias and how to size them. I created a spreadsheet
3x3 0.07 Polyimide 1oz 2oz plane to calculate the thermal resistance through the board and
5x5 0.07 Polyimide 1oz Baseline estimate a temperature rise through the board for the
5x5 0.07 Polyimide 1oz 1oz plane power he was managing. I included a way to calculate
5x5 0.07 Polyimide 1oz 2oz plane the power losses in the conductors that were bringing in
7x7 0.07 Polyimide 1oz Baseline
the 80A of current. In this particular design, the power
7x7 0.07 Polyimide 1oz 1oz plane
was managed on the backside of the board. This design
required handling 60W of power from the FETs and the
conductor losses from the 80A through the board. This
would be a challenge. We identified areas for him to con-
centrate on to improve the design.
When managing high current in any application,
3x3 0.07 Bismaleimide Triazine (BT) 1oz Baseline
I start by looking at the power dissipated (I2R losses
3x3 0.07 BT 1oz 1oz plane
or Joule heating) by the conductors in addition to the
components. It is easier to account for conductor losses
5x5 0.07 BT 1oz Baseline
in a thermal model for high current applications than
rely on estimated temperature rise from the IPC-2221 or
IPC-2152 design charts for two main reasons. The design
charts don’t take into consideration copper planes or the
mounting configuration. These two aspects have a sig-
nificant impact on the thermal results in a PCB design. In
addition, when we created the IPC design charts, our test
data went only to 25A. Any calculations above 25A are
an extrapolation. Small deviations or extrapolations of a
few amps are reasonable, but up to 60A – and as much as
300A – require additional work. The charts are not valid
14x1 0.07 Polyimide 1oz 2oz plane for those applications.

6949: 2
F1
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01
6
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I F I C AT I
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TRACE HEATING
The History of Conductor Sizing

At some point, when multilayer boards were being con-
Until publication of IPC-2152, people were using conductor structed, a decision was made to create an internal trace heat-
sizing design charts published in IPC-D-275 and its successor, ing chart. The internal chart shows up in the MIL-STD-275E
IPC-2221, Generic Standard on PCB Design. Those charts standard that preceded IPC-D-275, which eventually became
were the source of motivation to create IPC-2152. It took a IPC-2221. The internal trace sizing chart was defined by using
few years (1998 to 2000) before we understood no one had half the current from the external trace chart, not from test
actually collected and published internal trace heating data data. The logic behind that choice was never documented.
before. This was a revelation since there was a design chart for The IPC-2221 external trace sizing chart originated from
internal conductors (traces) in IPC-2221. work at the National Bureau of Standards from 1954-56.
TABLE 2. NBS Data for External Conductor Sizing
Materials, Processing and Conditions Used to Determine the Temperature Rises of Various Etched Conductor
Code Material and Core Thickness (in) Copper Thickness (in)* Additional Processing Test Temp °C Test Method**
A 5-7 XXXP 1/16 0.0027KK None 50 IR & TC
B 2-7 XXXP 1/16 0.004K None 50 IR & TC
C 4-7 XXXP 1/16 0.00135K None 50 IR
D 4-10 Epoxy 1/16 0.00135K None 50 IR & TC
E 5-7 XXXP 1/16 0.0027K None 60 IR & TC
F 2-7 XXXP 1/16 0.0027K None 60 IR
G 4-7 XXXP 1/16 0.00135KK None 60 IR
H 5-7 XXXP 1/16 0.0027KK None 25 IR
I 2-7 XXXP 1/16 0.004K None 25 IR & TC
J 5-10 Epoxy 1/8 0.0027K None 25 IR
K 4-7 XXXP 1/16 0.00135KK None 25 IR
L 5-10 Epoxy 1/32 0.00135K None 25 IR
M 4-10 Epoxy 1/16 0.00135K None 25 TC
N 2-7 XXXP 1/16 0.00067K None 25 IR
O 5-10 Epoxy 1/32 0.00135KK None 25 IR
P 4-10 Epoxy 1/16 0.00135K Coated with 0.005" Epoxy Resin 25 IR
Q 2-7 XXXP 1/16 0.00135K Coated with 0.002" Insulating Varnish 25 IR
R 5-7 XXXP 1/16 0.0027K Coated with 0.001" Silicone Spray 25 IR
S 4-7 XXXP 1/16 0.00135K Coated with 0.003" Insulating Varnish 25 IR
T 2-7 XXXP 1/16 0.0027K Coated with 0.006" Silicone Resin 25 IR
U 2-7 XXXP 1/16 0.00135K Dip Soldered 10 sec. 250°C 25 IR
V 2-7 XXXP 1/16 0.0027K Dip Soldered 10 sec. 250°C 25 IR
W 10-7 XXXP 1/16 0.00135K Dip Soldered 10 sec. 250°C 25 IR
X 5-10 Epoxy 1/8 0.0027K Dip soldered and Coated with 0.005" Epoxy Resin 25 IR & TC
Y 4-7 XXXP 1/16 0.00135K Dip Soldered 10 sec. 250°C 25 IR
Z 2-7 XXXP 1/16 0.0027K Dip Soldered 10 sec. 250°C 25 TC
1 5-7 XXXP 0.00135 Core Removed Conductor in Free Air 25 IR
2 6-16 G-5 0.00135 Core Removed Conductor in Free Air 25 IR
7 4-10 Epoxy 0.00135 Core Removed Conductor in Free Air 25 IR
*K denotes single-clad and KK denotes double-clad material. *IR = IR drop measurement. *TC = Thermocouple measurement

TRACE HEATING
Several reports describe the efforts used to define the electrical materials: phenolic (XXXP), epoxy and G5. The boards var-
characteristics of printed circuits and the dielectrics. Current ied in thickness: 1/32 (0.0312", 0.793mm), 1/16 (0.0625",
carrying capacity was documented in NBS Report 4283. The 1.588mm), and 1/8 (0.125", 3.175mm). Some boards had
first design chart was for external traces because they had only copper planes on the backside.
two-sided boards then (FIGURE 1). (Notice the word “Tenta- The boards with copper planes are of interest because they
tive.”) show the variance in current level for a given Delta T as a func-
TABLE 2 describes the datasets that went into creating that tion of the distance from trace to a copper plane.
chart. The overall dataset results in a mix of variables that Either thermocouple or the IR drop method measured the
impact trace temperature rise include different board materi- trace temperature rise. The IR drop method is best. They tested
als, different board thicknesses,
and different board widths – as
well as without copper planes.
Board material, board thick-
ness, and the presence of cop-
per planes all have a major
impact on the resulting trace
temperature rise. A design
chart comprised of a mix of
variables used to assess the
current carrying capacity of an
external trace is misleading.
Each line of constant tem-
perature rise in Figure 1 rep-
resents a dataset. Each data
point in the set represents the
amount of current required to
raise given size traces to 10°C,
or the temperature level for
the specific curve (10°C up
to 100°C). These data points FIGURE 1. Tentative NBS chart.
were graphed by hand on log
paper, and a French curve was
likely used to define what was
considered a best fit.
Table 2 contains a list of
all the boards tested to create
these design curves. There are
four groupings. The group of
boards used to create the curve
for the final chart is from those
labeled “None” in the addi-
tional processing column.
Many engineers did prin-
cipal hand calculations, as
well as computer modeling, in
an effort to obtain results to
match these curves. Not know-
ing where the data came from
made it impossible to obtain
a reasonable correlation, espe-
cially for the internal conduc-
tor sizing charts. (This is why
we included as much informa-
tion as possible in the IPC-
2152 Appendix.)
The list of NBS boards
includes different dielectric FIGURE 2. 20°C rise curve.

TRACE HEATING
TABLE 3. Design Chart vs. Test Data
Maximum Trace
Design Chart/Test Board Notes
Temperature Rise (°C)
Chart #1 IPC-2221 365 Calculated using the parallel conductor rule.
Chart #2 IPC-2152 68 Calculated using the parallel conductor rule.
Chart #3 TSDC – 0.038" thick FR4, 5" x 5" 98 Calculated using the parallel conductor rule. (Thin boards run hotter than thick boards.)
Chart #4 TSDC – 0.038" thick FR4, 5" x 5", 24 Calculated using the parallel conductor rule. (Thin boards with copper planes)
with 1oz copper plane 0.005" from trace
Test Data – 0.06" thick FR4, 5.5" x 8", no copper planes 53 Measured
Test Data – 0.06" thick FR4, 5.5" x 8", 4 copper planes 14 Measured
1oz, 2oz and 3oz copper traces, some with coatings and some Testing should be performed to understand all the afore-
stripped completely off the board. The traces stripped from the mentioned items. Parallel conductors are an area we accom-
board are my favorites. plished some testing. The parallel conductor test measured
Ironically – or perhaps by design – the traces stripped seven 10-mil traces spaced 10 mils apart, all running 1A. Two
from the board and tested in air come close to matching the boards were tested, one with no copper planes and one with
IPC-2221 internal conductor sizing chart. A lot of information four 1oz planes evenly spaced in the stackup. Both boards
in that data aids understanding trace heating and validates the were 5.5" wide, 8" long and 0.06" thick. The traces were 1oz
studies performed to develop IPC-2152. and were calculated to be 0.001" thick when 10 mils wide. (A
The NBS 20°C rise curve data set is shown in FIGURE 2. It resistance measurement is made with low current. Using the
shows the variation in current level for a given cross-sectional resistance and length of the trace, the cross-sectional area can
area and the resulting 20°C temperature rise. be calculated. We did not get coupons.)
Technology-Specific Design Charts Parallel Conductor Test Results

Accurate design charts, incorporated in an easy-to-use soft- Let’s examine the temperature rise of the seven parallel traces.
ware application, are one step toward a better predesign Seven 10-mil traces are spaced 10 mils apart, 0.001" thick, all
process for sizing electrical traces. As the industry becomes running 1A. TABLE 3 shows the results.
educated in the fundamentals of heat transfer, it will become
obvious design charts that match a technology add more func- Conclusion
tionality than what we see today. Many conductor issues in the predesign phase, aside from
Many PCB design issues are unsolved. Vias aren’t difficult trace temperatures, become apparent after the board is made.
to assess until multiple vias are used to pass current from one Understanding conductor temperature rise for micro technol-
layer to another. If the vias do not share current equally, the ogy, as well as managing 300A of continuous current, can be a
design is more complex. key element to successful designs. Thermal analysis and testing
Flex circuits are essentially thin boards, some with copper do a reasonable job of evaluating the end results, but it would
planes and some without. I recommend the old internal trace minimize respins if we were a little closer in our predesign
sizing chart for flex without copper planes. When multiple- phase of printed circuit design.
layer flex is made and the layers are booked, that becomes a Creating conductor sizing design charts for a given tech-
really different problem. I like seeing the conductors sized to nology provides many insights that clear up old rules of thumb
minimize the power loss. Calculating total power loss in the and the fallacy of internal traces running hotter than external
flex circuits assesses the thermal design. traces. Many areas of design could benefit from better conduc-
Wagon wheels and neckdown areas can also be assessed tor design charts. IPC-2152 has all the information needed to
by using power and power density as a criterion for assessing make your own technology-specific design charts. •
thermal limitations. Accurate temperature assessments can
only happen with charts that represent the technology. MIKE JOUPPI, recently retired, spent his career as a thermal
Another great use of technology-specific design charts analyst. At Lockheed Martin, he performed thermal analysis of
(TSDC) and design criteria based on power and power density electronics used on spacecraft and space systems; mjouppi.
(to estimate trace temperature rise) is managing parallel con- [email protected].
ductors. Parallel conductors are traces running current at the
same time, all closely spaced side by side and in the stackup.

STANDARDS
OSP MYTHS Dispelled

A new specification tackles the application and
performance of organic solderability preservatives.
by MICHAEL CARANO
After many years of starts, stops and debate, an industry com- undertook. The group also recognized the following:
mittee has finally developed a standard for organic solderabil- ■ OSP (organic solderability preservative) technology is envi-
ity preservatives (OSPs). IPC-4555, Performance Specification ronmentally friendly, provides a coplanar surface, and
for High Temperature Organic Solderability Preservatives requires very low equipment maintenance. The process is
(OSP) for Printed Boards, is out now, and it was a long time designed for horizontal, conveyorized processing. However,
coming. vertical immersion systems are easily integrated into the
With the electronics industry fully entrenched in lead-free printed wiring board fabrication process.
soldering, a standard for OSP is critical. There are more strin- ■ Third- and fourth-generation OSP formulations are robust
gent requirements for solder joint reliability, resistance to cor- and provide excellent protection against oxidation of the
rosion, as well as additional requirements related to complex underlying copper through multiple IR reflows under lead-
substrate designs. free assembly conditions.
The development and acceptance of IPC-4555 dispels the ■ Various industry studies and OEM interviews as late as
myth all OSPs are the same. With circuit boards fabricated 2020 revealed that well over 55% of the circuit board sub-
around the globe, and small chemical firms attempting to strates manufactured (by surface area) are produced with
introduce “new OSP processes,” buyers must be aware. Great- OSP technology. OSP is not going away any time soon. And
er solderability requirements – measured as joint strength, with increased use of QFNs, IC packaging substrates, BGAs,
paste spreadability and hole fill – and higher temperatures of etc., OSP use will continue to find additional applications.
lead-free soldering have greatly diminished use of conventional That said, it is prudent to dispel some of the pervasive
(standard substituted benzimidazole-based) OSPs. With the OSP myths.
development of third- and fourth-generation organic solder-
ability preservatives based on a novel aryl-phenylimidazole OSP Myths and Truths
compound, however, OSP has regained its leadership role as a Myth #1: “An OSP is an OSP. They are all the same.”
final finish, particularly in Asia and Europe. In addition, the This is not only a myth; it is categorically false. The world
technology shift to bare copper PWBs with selectively plated of lead-free assembly has separated the low-level OSP pro-
gold features requires OSPs that do not tarnish or deposit on cesses from those formulated and engineered for optimum
the gold. performance. A simple look at formulations and molecular
structures provides further insight into OSP technology. Part of
The Genesis of IPC-4555 the confusion stems from the name of the organic compound
Input from OEMs, EMS companies, PCB fabricators and that is the main ingredient in OSP processes: azole. These five
chemical suppliers paved the way for the development and letters are attached to various formulations and often appear
acceptance of IPC-4555. Several years ago, an IPC task group ideal for solderability preservation to the uninformed. As an
attempted to develop a standard governing OSPs. For a mul- example, conventional OSP processes based on long-chain
titude of reasons, perhaps lack of understanding, politics, alkylimidazole compounds and substituted benzimidazole
etc., the proposed standard never reached the ballot stage, compounds functioned adequately to protect the bare cop-
a requirement for publication. A few years later, a new task per. These worked well for lead-based assembly, which takes
group convened to bring an IPC standard for OSP to the indus- place at lower temperatures. However, higher temperatures of
try. TABLE 1 shows the charter of that group. lead-free assembly (including longer dwell times), along with
The charter shaped the work the IPC-4555 task group a multitude of lead-free solder pastes, exposed many of these

STANDARDS
temperatures required for lead-free solders. How will the

lower-level azole processes. Ushering a new class of azole mol- surface finish react to these greater temperature and time
ecules based on complex reaction products, known collectively stresses? What will be the effect on solder paste spread and
as aryl-phenylimidazole, these compounds are very stable up hole fill after thermal excursion? This is the critical success
to 350°C. This formulation provides higher heat stability and factor/integrity of the final finish and its ability to preserve
can easily withstand the peak temperature of reflow for typical solderability. Certainly the end-user often specifies the finish
lead-free solders. due to personal preference, history, cost, reliability, fit with
certain PWB designs, and so on. Regardless, a walk through
Myth #2: “One can always improve solderability of an any EMS company will provide the visitor with the full range
OSP by increasing the OSP thickness over the copper of finishes, depending on the various requirements of the
surface.” Again, this is not true. The critical nature of an customer.
OSP is the coating should be as uniform as possible over the
copper surface. In addition, excessively thick OSP films make The IPC-4555 task group members submitted statistically
it more difficult for no-clean fluxes and solder pastes to dis- significant data to support solderability requirements as out-
solve the OSP coating during lined in the standard. The
the assembly process. When data further supported that
this occurs, the solder paste latest generation OSP tech-
spread may not complete nology was indeed an excel-
wet-out over the SMT pad. lent finish for complex cir-
The team addressed cuit designs, including BGA
these issues in IPC-4555. substrates, and compatible
Thickness ranges were not with many lead-free solder
set, as they sometimes are materials and fluxes.
in the metal finish type stan- The primary function of
dards. Instead, it is left to OSP is to provide a solder-
the expertise of the indi- able surface finish capable of
vidual OSP suppliers to providing a coating durabil-
provide the optimum thick- ity rating of B, per J-STD-
ness ranges for solderabil- 003C, Solderability Tests
ity performance. Thickness for Printed Boards. Coating
is not critical. Rather, it is durability B is “intended for
the uniformity of the OSP boards likely to experience
over the base copper and the multiple soldering processes
OSP film’s ability to reduce and/or other process steps
oxygen penetration to the FIGURE 1. PTH solder requirement, per IPC-A-600H. using SnPb or Pb-free assem-
copper. bly profiles.”2 This surface
finish is suitable for all sur-
Myth #3: “OSP technology does not have sufficient face-mount, hybrid and through-hole assembly applications.
lubricity to function as a coating for press-fit.” This is also The solderability requirement is for all OSP-plated SMT
a myth. The IPC-4555 task group addressed press-fit with mul- features tested to wet with solder covering at least 95% of
tiple stakeholders from connector and OEM end-users. OSP each feature. It is noted, if a static solder float test is utilized,
technology is in widespread use for press-fit applications. The factors including board thickness, feature hole aspect ratio,
published standard now addresses press-fit as follows: number of internal copper planes, etc., will have an impact
on solderability testing results. For challenging designs, it is
Press-fit (inserted pin). Press-fit requirements shall recommended to use the assembly soldering method for solder-
meet Telcordia GR-1217-CORE and IEC 60352-5, ability testing. For through-hole solderability, the solder shall
Solderless Connections – Part 5: Press-In Connec-
tions – General Requirements. Also refer to IPC-9797
flow up through the via and wet the pad on the top side of the
(evaluation guidance document).1 board (FIGURE 1).
Review visuals are as shown in IPC-A-600H, Acceptability
Additional Information of Printed Boards.
A major challenge for OSP is providing a printed wiring Storage, Handling and Shelf Life of OSP
board finish that will maintain solderability and provide a
highly reliable joint with lead-free solders. This is no easy No discussion – or a standard – would be complete without
task. A multitude of different lead-free formulations and a full understanding of the storage, handling and shelf life of
interactions with fluxes influence reliability. The surface fin- OSP-coated circuit boards.
ish must foster the optimum wetting and intermetallic forma- The committee understood shelf life of OSP-coated circuits
tion under multiple thermal excursions and higher soldering may not be as long as some metallic-finished boards. That said,

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STANDARDS
TABLE 1. IPC-4555 Committee Charter1
Design Chart/Test Board Notes
Mission Statement Provide industry standard for the use of OSP (organic solderability preservatives) in the electronics industry
Goals and Objectives Identify appropriate content and provide input to IPC-4555 OSP specification efforts
a. Distinguish between multiple formulations and provide uniformity to quality inspection of boards prior to assembly
b. Define flux compatibility key parameters and data
c. Define metrology for thickness measurements
d. Define copper surface finish conditions for use (cleanliness, roughness, etc.)
Develop metrology to nondestructively measure OSP thickness and uniformity of coating on incoming boards to assembly
Develop performance measurement criteria for acceptance
Customers/Partners IPC
Success Indicators Publish lead-free performance characterization methodology and criteria
Complete IPC specification documents with identified inputs included or processed
New non-destructive OSP measurement metrology developed
Feedback Plan Email to distribution
Scope/Priority OSP surface finish in a lead-free assembly environment
Chartered Sub-Teams As needed
Procedures/Meeting Frequency One-hour meeting every two weeks
• Minutes including ARs and decisions within 48 hrs (not including weekends)
• Two-week horizon schedule
Decision-Making Process Individual agreement to take on tasks
Consensus approval on WG outputs
Decision Ratifying Body Review and ratification of specification input content
Review and ratification of metrology development plans
IPC-4555 lists the shelf life as a “minimum of six months.” a box for shipping. Desiccant should be added to the box and
Such coatings have been shown in real-time testing by the IPC- the box sealed. End-users should keep boards in the shrink-
4555 task group to demonstrate a shelf life minimum of six wrapped package until ready for assembly.
months. With proper storage and handling, OSP coatings have We finally have an industry-recognized and accepted stan-
been shown to have a 12-month shelf life. dard for the use of organic solderability preservatives. This
It is recommended to perform either a classic solderability should help level the playing field with respect to the reliability
edge dip/solder float test or a solder paste print and reflow on and performance of circuit boards fabricated with OSP fin-
the assembly production line prior to using OSP-coated prod- ishes. IPC-4555 clearly sets the bar high for anyone wishing to
uct that is older than six months. supply or implement OSP finish. •
Storage and Handling of OSP-Processed PWBs

Before OSP-coated PWBs are packaged, the boards shall be REFERENCES
free of moisture, particularly for small vias. The dry boards 1. IPC-4555, Performance Specification for High Temperature Organic
can then be packaged for shipping to the end-user. Operators Solderability Preservatives (OSP) for Printed Boards, April 2022.
2. J-STD-003C, Solderability Tests for Printed Boards, September 2017.
should handle the dried boards on the edges and protect hands
with impermeable gloves. This is necessary to prevent oils and
ionic contamination from affecting the PWB performance. An MICHAEL CARANO is a recognized subject matter expert in
outer slip sheet made of sulfur-free material should be placed printed circuit, semiconductor, surface finishing and medical
on the top and bottom of the stack. Shrink wrap should be device industries. His focus is on process control and bring
new technologies to market.
applied to seal the package. Sealed packages can be placed in

ACQUISITIONS
A ROYAL Summit
Summit Interconnect’s chief executive explains the PCB

fabricator’s latest buy. by MIKE BUETOW
Summit Interconnect in May announced the acquisition of mercial market.

fellow printed circuit board fabricator Royal Circuit Solutions The support from India provides a very broad advantage
for an undisclosed sum. for non-ITAR products, and is something we’re going to be
But while the deal at first glance looks like the latest in a able to scale across our entire company. Of course, we will
long string of capacity buys for the second-largest fabricator in continue to support ITAR products internally in the US at the
North America, there is more to it than meets the eye. site level.
For its part, Royal has engineering tools and staff that
Summit can leverage to speed its own operations. MB: It’s interesting because it wasn’t just a capacity buy;
Royal also includes an electronics assembly operation, it was a technology buy as well.
Aurora, CO-based Advanced Assembly. The EMS outfit’s
quickturn production capabilities fit well with Summit’s com- SW: That’s correct. The acquisition of Royal Circuits added
mercial prototype programs. That the fab and assembly sides not just PCB technology in the conventional sense, although
are integrated adds one more appealing facet to the acquisi- there is a lot of that as well. It was really everything I’ve
tion. described, with the software technology, automation, and just
Summit chief executive Shane Whiteside broke down the the velocity of its operations.
latest acquisition in an interview with Mike Buetow.
MB: Summit is weighted pretty well toward defense.
Mike Buetow: Besides the obvious capacity increase, Where does Royal align with that?
what made Royal Circuit an attractive buy?
SW: Defense is a large market for Summit, but commercial
Shane Whiteside: The more we learned about Royal Circuits, prototyping is a very large market as well, with the addition
the more we saw the benefits of adding its capabilities to Sum- of Streamline to our platform in 2018 and Eagle Electronics
mit’s portfolio of PCB services. Not only does Royal Circuits’ last year. We have positioned ourselves to serve the US com-
speed and factory automation align well with our other facili- mercial prototyping market, and the addition of Royal Circuit
ties, but it adds more software expertise and interconnected enhances that with additional quickturn capabilities.
systems to what we have now. It also has developed offshore At Summit, we want to be one of the leading commer-
support in India, which adds additional speed to its model and cial prototype providers in the United States. In the market
provides 24/7 front-end engineering support for operations in research we’ve done, we’ve identified the two highest growth
Hollister, Santa Ana and Denver. markets in North America as aerospace and defense and com-
mercial prototyping, so we’ve aligned our company to meet the
MB: Are there things Royal is doing that you could adapt PCB needs of those growth industries.
for your other facilities?
MB: Summit has some flex capacity and rigid-flex capa-
SW: Royal Circuits’ processes were developed from the bilities. How does Royal’s compare? Are they doing any-
ground up to fabricate PCBs fast. It’s very good at delivering thing you previously were not?
very quickturns. There is definitely an opportunity to take
what they’ve developed and deploy it more broadly across all SW: Royal Circuits has interesting flex and rigid-flex custom-
the Summit sites, particularly to address the needs of the com- ers, but it doesn’t significantly add to Summit’s current capac-

ACQUISITIONS
ity in that area. We have two factories that already support MB: Should we draw any conclusions insofar as Summit
quite a bit of flex and rigid-flex. looking at more assembly capacity, or is this a one-off?
MB: The addition of Advanced Assembly is interesting. SW: In terms of our strategic priorities, this really fits the bill
What do you plan to do with that operation? You didn’t for what we wanted. We have always wanted a higher capac-
have any assembly in house prior to this, correct? ity, more robust assembly capability, and with the location and
the facility of Advanced Assembly, I see a lot of opportunities
SW: We previously supported more assembly than you might to grow this operation. It has a great team, and we want to see
think using turnkey partners. Advanced Assembly will allow how far we can take it.
us to continue to work with partners at higher volumes and
longer lead times, but also to internalize a lot of the quickturn MB: Royal’s California base adds to Summit’s capac-
assembly opportunities. Additionally, Advanced Assembly is a ity there, which has its pros and cons. What are your
very robust new customer development engine that has con- thoughts on the geographic balance of Summit’s sites?
tributed to the rapid growth of Royal Circuits. We’re looking
to take advantage of that internal synergy as well and support SW: There’s no particular strategy to diversify geographically
some of the new customer work with our broader Summit within North America. It is nice to have shops in the Midwest,
factory footprint. and in Toronto in the Eastern time zone. Adding more facili-
ties in California is not Plan A, but California does have a bit
MB: So Advanced Assembly made the deal more attrac- of an advantage in commercial prototyping because it’s in the
tive, not less. last time zone on the continent. Designers can send their data
that many hours later, and Fedex picks up later than elsewhere
SW: Absolutely. in the country, so it’s easier to support prototyping from the
Western time zone. But, it isn’t like we are pointing to a map
on the wall.
The acquisition of Royal Circuits adds flex and rigid-flex capacity and high-end engineering. (Source: stock photo)

ACQUISITIONS
Advanced Assembly gives Summit new quickturn assembly capabilities.
MB: I would add, if you’re looking for an acquisition, and of semiconductors for producing more tanks, is having
you’re not looking greenfield, then you have to go where any influence on the US government right now insofar as
the plants already are. its attention to the domestic supply chain?
SW: Yes, that’s right. We’re looking to partner with high-quali- SW: I think so. In last year’s US Partnership for Assured Elec-
ty companies, and like you said, we have to go where they are. tronics [USPAE] meeting, people from [the US Department of
Defense] were pretty clear that for the past 15 years they have
MB: H.R.7677, The American Printed Circuit Boards Act been under-concerned about the resilience and robustness of
of 2022, has just been introduced in the US House, and the supply chain that supports the DoD, including printed cir-
one of the provisions is a 25% text credit for domestically cuit boards, but other areas of microelectronics as well.
purchased circuit boards. If the bill gets passed, that has I think they now understand that a lot of our asymmetri-
to be seen as very advantageous to the folks onshore. cal military advantage in the US – and our future advantage
– has been enabled by our superiority in electronics. Moving
SW: I think it would certainly be favorable, and it will be forward, electronics is going to be a more significant part of
interesting to see who actually banks that credit: Is it the OEM our national defense, and we have to salvage some of these
or the EMS company? I’m just wondering aloud on that, but I industries that have atrophied. I’m excited to see that the
think it would certainly have a stimulative effect toward favor- government is concerned on multiple fronts, but it needs to be
ing US PCB manufacturers. done the right way. The [Printed Circuit Board Association of
Any sort of stimulus is interesting to me. It’s one thing to America] has made a tremendous impact in a year-and-a-half
try to get some Title III funding or a piece of the CHIPS Act of existence, and we’ve gotten a lot of attention. IPC govern-
to help modernize factories building printed circuit boards. ment relations have aligned with a lot of what the PCBAA is
That’s great, but boards in the US are still going to be made doing, and having everyone working in the same direction is
in a high-cost region, unless we put some sort of boundaries making a lot of difference. •
on the market, which I think this bill attempts to do. We must
shape the market somehow to make the free-market economy MIKE BUETOW is president of PCEA (pcea.net); [email protected].
work and put more business in the United States. I wouldn’t
want to spend taxpayer money if we can’t shape the market to
push the equilibrium toward domestic manufacturing.
MB: Do you think the current events, specifically what’s

going on in Russia and reports that they are running out

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GETTING LEAN
An Industry 4.0 Approach to Employing 3-D AOI

on an SMT Line
Correlating inspection trending with test data to fine-tune accept/reject
parameters.
INDUSTRY 4.0 AUTOMATED inspection technology ■ Marginal = a tolerance or study variance percentage
opens the door to enhanced levels of process control. of 20 to 30% or less, with a contribution percentage
In addition to having to upgrade equipment, however, of 5 to 9%
fully leveraging the power of this technology requires ■ Poor = a tolerance or study variance percentage of
a strong team, an accurate program validation data- 30% or greater, with a contribution percentage of
base, and a methodology to track trends in continuous 10% or greater
improvement activities. Here is a look at an imple- CP and Cpk ratios were also calculated to measure
mentation process for inline 3-D solder paste inspec- the process capability against the voice of the customer
tion and 3-D automated optical inspection following (standards/requirements). In this analysis:
reflow on SigmaTron’s SMT lines in Tijuana. ■ Very good = Infinity, CP(Cpk) > 1.67
A planned phase two of this implementation includes ■ Good = 1.33 < CP(Cpk) < 1.67
adding 3-D AOI to secondary assembly operations post- ■ Need to manage = 1.00 < CP(Cpk) < 1.33
SMT, plus correlating AOI trending with final test data ■ Need to improve = 0.67 < CP(Cpk) < 1.00
to fine-tune AOI acceptance/rejection parameters. The ■ Poor management state = CP(Cpk) < 0.67
facility is currently averaging 50ppm defect rates across The studies and calculations showed the specifica-
its SMT lines. The goal of this greater inspection process tion limits for all 3-D AOI were in acceptable GR&R
is to drop that to zero defects; although, given material condition and very good CP/Cpk condition. The pro-
constraints are driving a defective component rate that gram validation is used for machine verification every
represents a third of that 50ppm level on some pro- six months. Once control limits were established, pro-
grams, zero ppms may be unachievable until material gramming parameters were adjusted for each printed
availability returns to normal. circuit board assembly to assess acceptability based
The inspection stations communicate with the on IPC-A-610 and customer documentation require-
screen printer and adjust paste deposition based on ments.
defects identified, creating a closed-loop system. They Following implementation, the team is focusing on
also track trends data, enabling the team to pare- two improvement tracks. The first deals with improv-
to top-five defects, and where indicated, implement ing first-pass yields on product identified through
continuous improvement initiatives beyond process weekly trends tracking. In one example, trends data
adjustments. The systems communicate to a database led to the discovery a fixture had warped and was no
accessible via remote computers available to techni- longer seating correctly, which caused flex cable ter-
cal personnel. Trending analysis has already driven minations to shift off pads. The fixture was replaced,
changes to stencil maintenance frequency and greater correcting the issue.
focus on monitoring pick-and-place machine place- The second improvement track is focused on
FILEMON ment variation. From a Lean perspective, the machine- improving the overall inspection process. One area
SAGRERO to-machine communication aspect reduces process being analyzed is the accuracy of operator decisions
is continuous variability and represents a better use of resources by to override AOI decisions. Customers are evaluating
improvement eliminating the need for human intervention within a more efficient labeling strategy to provide full trace-
engineer and set parameters. Using the data to determine optimum ability. Test data have been transformed from raw,
a Six Sigma maintenance activity frequency eliminates defects that delimited data to formatted columns. Now remote
Black Belt at
would otherwise occur as stencils or tooling gradually computers are running a dashboard that visually con-
SigmaTron
slips out of acceptable parameters. veys real-time SPC/Cpk and first-pass yield data, and
International’s
Setting up the systems, a team with a Six Sigma allows remote debugging.
facility in
Tijuana, Mexico;
Black Belt and two mechatronic technicians performed This Industry 4.0 approach is creating a system
filemon.sagrero@ gage R&R studies for repeatability and reproducibility that autocorrects solder-deposition-related issues in
sigmatronintl.com. using the Automotive Industry Action Group’s accept- real time and provides the trends data to enable the
ability definition, where: team to monitor tooling, equipment accuracy and
■ Ideal = a tolerance or study variance percentage of customer design issues that may be causing defect
10% or less, with a contribution percentage of 1% opportunities. The comparison of AOI trending with
or less test data is increasing AOI programming accuracy,
■ Acceptable = a tolerance or study variance percent- and better understanding of equipment operational
age of 10 to 20% or less, with a contribution per- trends is helping fine-tune maintenance and calibration
centage of 1-4% intervals. •

SEEING IS BELIEVING
Swindlers’ Lists
Engineers know a snow job when they hear it.
DEAR MR. CHRIST, Long Beach Convention & Entertainment Center,

Knowing you’re a busy man, we’ll cut to the chase: Long Beach, USA
Our firm is offering you an exclusive list of the five Registrant Counts: 4,280
million attendees to your recent motivational speech Each record of the list contains: Contact Name,
on the mountain. Our proprietary Digitaldisciple algo- Email Address, Company Name, URL/Website, Phone
rithms identify those most receptive to your message, No, Title/Designation
broken down by district in Judea, so you can focus on
the finer points of conversion, based on leaders and Seems tempting. But wait, there’s more:
laggards, attendance-wise. We’ve done the work, so
you don’t have to, for a very – dare we say it – revela- I am following up to confirm if you are interested in
tory price. Others promise salvation in the form of acquiring the Visitors/Attendees List.
prescreened customer lists, but only we deliver. Accept Space Tech Expo
no substitutes! Click the link at the bottom of this May 23-25, 2022
email, and a customer service representative will con- Long Beach, California, USA
tact you soon about how we can make the Beatitudes Registrant Counts: 10,000
work for you!
Different ads on different days but almost the same
You know those lists? Of course you do. script. Different company (allegedly), same speech-
They’re the ones whose salespersons relentlessly writer. Probably the output of one server in someone’s
appeal to our inner greed, breathlessly promising bedroom in a remote corner of Sumatra.
delivery to the recipient of a complete roster of attend- Bigger registration count. One highlighted a battal-
ees to one’s favorite trade show. Or equipment users’ ion, the other a regiment. This is a business model with
group. Or industry association annual meeting. All a decidedly dim view of human nature. Bigger num-
guaranteed. bers mean bigger appeal. Don’t forget that greed thing.
The unspoken and alluring premise is a name on a These are inflationary times, after all.
list is simply a customer you have yet to contact. Who One of those 10,000 might hold the key to my retire-
doesn’t want a new customer? Better yet, a complete ment. (Then again, so would the lottery.) Except I have
list of vetted customers? These services furnish the list. many other competing pitches for Space Tech, with pro-
All you have to do is follow up. jected quantities of attendees ranging all over the map:
Their pitch probably lands in your inbox or spam 2,000; 3,842; 11,000; 13,445; and 20,099. (Why didn’t
folder regularly. For many, that means weekly. For they just round that last number up to 20,100? Does
a “privileged” cohort, daily. Usually deleted upon 20,099 somehow look more authentic?) The regiment
arrival. Too good to be true. has grown to a brigade, even a full division. Which to
Is it? choose?
Ever wonder how they work? I tried an experi- Another Space Tech cold email badgered me 26
ment. times in a one-month span, gradually reducing its price
Beginning Feb. 7, 2022, and ending Jun. 10, 2022, as I remained nonresponsive, from a starting $800 to
I saved every email appeal for list services. In those 88 an ending $400. Endure an extra month of digital
ROBERT
business days (no holidays included), 206 unsolicited harassment, and, by projection, it should fall to the
BOGUSKI is
pitches arrived in my inbox. That’s 2.34 per working quite-affordable rate of zero. president of Datest
day, a sample size sufficiently large to assess the range Another sample from the inbox: Corp. (datest.com);
and depth of what is being offered. rboguski@datest.
So, what is being offered? Dear Exhibitor, com. His column
Not much range and very little depth. I am following up to confirm if you are interested runs bimonthly.
Like this: in acquiring the Attendee List.
Houston Expo & Tech Forum
Hi, Mar. 24, 2022
I am following up to confirm you are interested in Stafford Centre, Stafford, USA
acquiring the Visitors/Registrants List. Counts: 2,560
Space Tech Expo Each Record of the Attendee Includes: Client
May 23-25, 2022 Name, Business Name, Title, Email Address, Phone

SEEING IS BELIEVING
Number, Web Address, etc. codes, counties, etc.)

Let me know your thoughts, so I can send discount cost ■ A fully managed multi-touch, multichannel lead manage-
and additional information. ment program
■ Dedicated Sales Development Representative who will be
And this: making the calls
■ Client Success Manager who will be your point of contact
Hope you are doing well! ■ Quality Assurance Analyst to qualify every lead submitted
We are following up to see if you would be interested in meets your criteria
the Attendee list of: ■ Script, email templates, social and website marketing setup,
Houston Expo & Tech Forum which you will pre-approve prior to the start of the program
Date: Mar. 24, 2022 ■ Access to our web-based lead management platform, where
Stafford Centre, Stafford, USA you can monitor and organize, in real time, all the leads that
Are you interested in acquiring the Attendees’ info? have been qualified for you
(19,300+ Attendees)
Attendees’ information fields: Company Name, Company I’m sure this is what Jeff Bezos and Elon Musk use every day
URL, Contact Names, Title, Phone Number, Email Address before breakfast, once the rich zip codes are fully saturated
Let me know your thoughts, so I can send the cost and with sales. A bit beyond my pay grade and budget, but nice
additional information. to know this service is available once I make my first billion.
We have a Special 50% Discount offer for this month. Back on Earth, here is the more prosaic, poor person’s
We are looking forward to hearing from you! approach:
Six identical pitches, each requesting my thoughts (thank you It’s a half-price sale!
very much), received on the same day, two each from three We are offering a 50% discount.
different companies. Supposedly. All of them equally wrong in You can now acquire the info at $400.
their attendance projections. The 2022 SMTA Houston Expo
and Tech Forum, held on one day, Mar. 24, had attendance Maybe they offer a payment plan.
considerably south of 19,300, a small city. Actual attendance
resembled a small neighborhood. Or there’s the middle-of-the road, semi-tailor-made approach,
Then there’s this: filling space with words, revealing little:
Thank you for showing interest in our listings, and below are What we do for each client is customized, so it really depends
the details for list acquisition: on exactly what your objectives are. However, based on what
Project Details: your website says, I think we would probably look at our
Show Name: Automotive Testing Expo Europe 2022 automated outbound systems to very targeted prospects that
Total Counts: 20,000+ opt-in contacts would be a good fit for your business, using our process of
Discounted Price: €1,300 rapid sales communication testing, combined with your expe-
■ Data Fields: Contact Name, Title, Phone Number, Fax rience, to identify the best messages to communicate to your
Number, Physical address, State/City, Company Name, buyers. Ultimately our objective is to set up a steady flow of
Company URL, and verified email addresses new high-quality sales meetings for you each month.
■ 90%+ accuracy and deliverability on all data fields Let me know if that resonates with you, and we could look
■ Data will be provided in an Excel spreadsheet for unlimited at trying to find a time for a quick chat.
list usage
■ All the contacts are permission-based and authorized to Automated outbound systems?
receive the third-party information. Soundwaves generally resonate with me. Businesspeople
Let me know if you need more details, and I await your have conversations. They don’t “chat.”
response. Thank you! Here’s the thing: AI-inspired attendee databases are a
mass-marketing approach that is unsuitable for small engi-
It’s reassuring the process is permission-based (what’s the alter- neering businesses like ours. Our sales pitch is too technical. It
native, coercion-based?) and that it’s 90% accurate (relative to can’t be faked. Engineers know a snow job when they hear it.
what?). Pity the 10%, banished to Inaccuracy Purgatory. Test parameters, specifications and detailed requirements like
Samples sampled randomly, and thus enticed, time to bite. power-on testing, JTAG, 4-wire tests and 1149.1/1149.6 rules
So, I took the plunge and replied to a handful. The response don’t lend themselves to a spreadsheet with 20,099 potential
was like blood sprinkled on a shark-strewn sea. Except some contacts. There may not have been that many JTAG users in
sharks are more discriminating than others. the whole of human history. Nor does an x-ray inspection
For example, this is the five-figure approach: requirement stipulating resolution, focal length, scan energy,
field of view, area of interest and desired pixel/voxel size find
■ Target List of prospects based on your specifications (zip clear expression in a shotgun approach to marketing. At our

SEEING IS BELIEVING
level, one needs to listen to the customer. After listening and better defined and more focused. Obviously some small
digesting the need, you either provide the service or you don’t. single-digit percentage of your cold calls succeeds; otherwise, I
This includes supporting nontechnical customers who crave wouldn’t get 206 inquiries in 88 days. It’s just that you and my
honest guidance on prudent use of their test dollars. A superfi- company aren’t a match. Yet.
cial, cold-calling approach to sales risks being more off-putting
than enticing. Reputational risk is real. Our clients tend to Until then, the imagination still wanders and wonders:
have specific problems in need of very specific solutions. Test
and inspection parameters, and their results, get scrutinized; Senator McCarthy, your recent speech in Wheeling, West
often they’re second-guessed once the data are known. A high Virginia, would have had a more accurate list of communists
degree of customer contact and handholding is essential. One in government had you taken advantage of our Commienet
can’t afford to be dismissive or reluctant to explain (often services. Why be satisfied with only 205 names? For one low
repeatedly). Antagonize such prospects for any reason, and fee, our patented statistical analysis would have given you a list
you’ll never hear from them again. of 5,280 embedded subversives in the State Department and
Thank you, database and list folks, for your time, atten- elsewhere in Washington. Consider the advantages of one-stop
tion (a lot of that, once interest is shown) and education. Not shopping and make technology your patriotic ally.
now, but maybe in the future, as your systems get smarter,
Mr. Haldeman, our Paranoiacom custom database will
significantly expand your enemies list, virtually and liter-
ally, overnight. Why limit your outreach to The Washing-
ton Post and certain precincts in Manhattan? Data, like
grudges, can be driven anywhere, and all the world’s fair
game. Fortunately, for your sake, there’s us. Our firm
provides the numbers – every name a prospective enemy
– you can simmer over.
For us, refined application of the technology would

appear to be in its infancy. Of such developments is prog-
ress made, knowing full well that infants’ adherence to a
script is, well, unpredictable.
And the folks who offer the declining balance? (See
above.) This morning they renewed acquaintances with
yet another discount offer: 28 days left for no fee. •
Do all those spam emails offering huge contact lists that don't exist
come from the same group?
ROI, continued from pg. 18 Board Buying, continued from pg. 19
introduced to manufacturing, the product is the best way for ally sound, the cause most likely is moisture-related. A bake-
customers and suppliers, working together, to accomplish a out process before any additional assembly can remove most
cost-effective design. Too often this communication is wrongly of the moisture, if not all of it. This permits the board to be
assumed to occur. As much as frequent two-way communica- assembled without issue.
tion should be happening when all is moving along with tradi- IPC-1602, Standard for Printed Board Handling and Stor-
tional technologies, it is critical the communication takes place age, provides suggestions for proper handling, packaging and
when a new approach is contemplated that may be enabling storage of PCBs. It puts the full responsibility for PCB moisture
for one but not necessarily for others. content on the supplier, even after the finished product has left
The difference as to whether a technology is enabling the manufacturing facility.
or disruptive is determined only by the degree in which cus- The way PCB suppliers package their products indicates
tomer and supplier decide to work together. As our industry their commitment to quality and reliability. It is the final step
finds ways to tweak older, reliable technologies or develop in the manufacturing process, and PCB buyers have a respon-
paradigm-changing ones, understanding the enabling benefits sibility to ensure it is done right. •
and the disruptive nature will make the journey mutually
rewarding. •

MACHINES MATERIALS TOOLS SYSTEMS SOFTWARE
AVERATEK ACL, range of -55° to +105°C. package. Features high capacitance from
CBF MATERIALS FOR A-SAP 2,700µF to 48,000µF in B case code and
Hirose
Aluminum clad laminate and catalyzed 3,600µF to 72,000µF in C case code.
hirose.com
buildup film use Toyo catalyzed alumi- Voltage ratings range from 25VDC to
num foil that provides well-controlled 125VDC. Capacitance is 9,000µF at 80V
surface texture and uniformly coated pal- NI TESTSCALE FUNCTIONAL TESTER and 58,000µF at 35V in C case size.
ladium metal. Developed for outer and TestScale modules can be combined in Features standard capacitance tolerance
buildup layers, ACL and CBF enhance custom configurations to meet coverage of ±20%, with ±10% tolerance available.
use of HDI PCB and package substrate needs and slot into small industrial chas- Optimized for pulse power and energy
manufacturing technology A-SAP. Fill sis that connects to host PC using USB. holdup applications in laser guidance,
technical gap between mSAP HDI PCB TestScale Chassis can be rack-mounted radar and avionics systems. All-tantalum,
and package substrates. A-SAP can be or mounted within fixture. Hardware con- hermetically sealed case. Features high
used for materials with thin electroless nects to NI and third-party software such vibration (high frequency: 20g; random:
base copper layer. Liquid metal ink forms as TestStand, LabVIEW and Python using 19.64g) and mechanical shock (50g) capa-
palladium catalyst, which permits less NI-DAQmx driver. Optimizes coverage bilities. Operates over temp. range of -55°
than 10nm of uniform metal coating. with flex modular design and daisy-chain to +85° to +125°C with voltage derating,
chassis. Reportedly reduces footprint up and provides max. ESR down to 0.017Ω
Averatek to 50%. Speeds fixture design with stan- at 1kHz and +25°C. Is available with tin/
averatekcorp.com dard 37-pin connectors and production- lead and is RoHS-compliant.
optimized form factor.
CADENCE ONCLOUD SAAS SOFTWARE Vishay Intertechnology
National Instruments
OnCloud SaaS software provides tool- Vishay.com
ni.com
sets for PCB design, multiphysics system
analysis and computational fluid dynam- ABB HIGH SPEED
ics; direct and secure access to Cadence ROGERS RO3003G2 LAMINATES ALIGNMENT SOFTWARE
software and cloud data storage, without RO3003G2 laminates now include a 9µm High Speed Alignment software report-
installation and licensing; and online sup- electrodeposited HVLP foil option. Are edly can increase speed of six-axis robots
port resources, including thousands of for antenna outer layers for millimeter 70% and improve accuracy 50%. PC-based
training courses and rapid adoption kits. wave (mWave) radar PCBs, for example. software includes visual servoing technol-
Can reduce copper reduction steps need- ogy using one or more cameras, com-
Cadence Design Systems ed to meet final PCB copper thickness bined with computer vision system, to
cadence.com requirements after filled via formation. control position of robot relative to work-
Unbalanced cladding options permit piece. As robot moves, cameras capture
HIROSE KW30 CONNECTOR thicker copper to remain on ground layer. images continuously; computer vision
KW30 1mm-pitch wire-to-board connec- system takes information and cross-
Rogers Corp.
tor comes in two to eight positions. checks and adjusts robotic movements,
Miniature single-row connector offers rogerscorp.com
delivering 0.01 to 0.02mm precision. Mini-
reliability via a two-point contact design, mal programming experience is required.
combined with crimp contact deflection UCAMCO UCAMX STENCIL SEAT Is compatible with range of cameras, IRC5
UcamX Stencil seat includes all standard
and OmniCore robot controllers, and IRB
UcamX functionalities, supplemented with
1100 and IRB 120 industrial robots.
Stencil Toolbox. Stencil Toolbox reportedly
offers streamlined workflow; recognition ABB Robotics
of pad shapes; support for stencil specific new.abb.com/products/robotics
shapes. Is independent from incoming
data quality. Features instant overview on
critical apertures; reshaping pads for opti-
mal paste cohesion; nanocoating support;
technical drawing.
prevention. Rib design provides secure
Ucamco
fit when mating plug and receptacle.
ucamco.com
Center lock prevents incomplete mating,
mis-insertion and lock damage. Is offered
VISHAY EP2 TANTALUM CAPACITOR
in straight or right-angle interface types;
EP2 tantalum capacitor comes with radi-
28, 30 or 32AWG; and gold plating. Is BOWMAN A SERIES MICRO XRF
al through-hole terminations with stud-
for home appliances/white goods, medi- A Series Micro XRF measures smallest
mount option in B and C case codes.
cal devices, office equipment, industrial features on semiconductors and micro-
Reportedly is a drop-in replacement for
robots, FA controllers and servo motors. electronics. Accommodates large PCB
competing parts or as higher capacitance
Has current rating up to 3.0A, voltage rat- panels and wafers of any size for full sam-
alternative in mechanically equivalent
ing of 100V AC/DC and operating temp. ple coverage and multi-point programma-

MACHINES MATERIALS TOOLSMACHINESSYSTEMS MATERIALSSOFTWARE
TOOLS SYSTEMS SOFTWARE
ble automation. Poly-capillary optics focus small parts (008004 and 0201) and tall
x-ray beam to 7.5µm FWHM. 140x mag- parts. Features camera resolution of
nification camera measures features on 8µm, height measurement 25mm, and
that scale; secondary low-magnification imaging speed of 4,500mm2/s.
camera provides live-viewing of samples
Saki Corp.
and bird’s-eye macro-view imaging. Dual-
sakicorp.com/en/
camera system lets operators see entire
part, click image to zoom, and identify fea-
ture of interest. Programmable x-y stage STACKPOLE TCR FOR CSSK0612
tive to traditional water-cleaning process- RESISTORS
with movement of 23.6" (600mm) in each es. Offers high tackiness to eliminate die TCR for CSSK0612 four terminal current
direction can handle large samples; preci- tilting or shifting during reflow; consistent sense shunt resistors has been improved
sion down to +/-1µm for each axis; used to flux deposition and wetting; compatibility down to 100ppm for resistance range
select and measure multiple points. Pat- with variety of underfills; reduced warp- from 0.5mΩ to 5mΩ. Are for power moni-
tern recognition software and auto-focus age of package and lower thermal stress. toring, management and control for a
features also do this automatically. 3-D
range of end-products.
mapping capability can be used to view Indium Corp.
topography of ENIG, ENEPIG, EPIG and indium.com Stackpole Electronics
other processes. Has molybdenum anode seielect.com
tube (chromium and tungsten also avail-
able) and high-res, large-window silicon INSITUWARE SM-100 SMART MIXER
drift detector that processes more than SM-100 smart mixer provides solder
two million counts per sec. paste mixing with real-time quality con-
trol and materials traceability. Automati-
Bowman
cally mixes solder paste jars to fit-for-use
bowmanxrf.com
state. Monitors temperature, mixing time
and fitness. Can mix solder paste directly
DELO-DOT PN5 JET VALVE
from cold storage to bring to room tem-
Delo-Dot PN5 microdispensing valve has INSPECTIS HD-025-B perature. Provides red, yellow and green
dispensing frequency up to 300Hz. Plung- UV LED RING LIGHT light indicators of paste quality with
er speed reportedly reaches twice the Flicker-free HD-025-B UV LED ring light reusable lid that attaches to solder paste
max. value of Delo-Dot PN3. Pneumatic jet has homogeneous illumination at λ365nm jar. Reportedly eliminates hand mixing,
valve features tool-free maintenance fluid wavelength range. Powered via AUX out- reduces mix time and ensures repeatabil-
system. Offers contactless application, put of Inspectis digital microscope or ity. Mixing cycle provides SPC and doc-
preventing collisions between dispensing via optional power supply (HD-024-S) for umentation. Provides insight on paste
valve and component. High-viscous mate- compatibility with other devices. Mounts quality before printing. Measurements
rials and difficult media can be dispensed. securely onto digital camera and includes correlate to J-STD-005 and IPC-TM-650.
Offers interchangeable nozzles with dif- UV protective glasses. Features integrated
ferent diameters, as well as adjustable ON-OFF switch and brightness control. Insituware
plunger stroke. Reproducible using differ- insituware.com
ent drop sizes in nanoliter range. Plunger Inspectis
is made of ceramic and carbide. Suitable inspect-is.com INSITUWARE CC-100

for prolonged use. When plunger wears THICKNESS TESTER
out, nozzle and fluid plunger need replac- SAKI 3DI AOI CC-100 thickness tester provides nonde-
ing. Actuator has lifetime of more than one 3Di inline AOI system is for inspection structive and contactless conformal coat-
billion cycles. Measures 68mm x 28mm x of high-density printed circuit boards ing thickness measurements. Measures
99.5mm. Cartridge retainer can be posi- and boards with combinations of small dry thickness of conformal coatings to
tioned in 90° increments; permits media to verify against IPC-A-610. Measures wet
be fed from all four sides of device. thickness of conformal coatings to pro-
vide insight for process adjustments.
Delo
No ground plane required. No measure-
delo-adhesives.com
ments of uncoated boards required.
Multi-coating support: acrylic, polyure-
INDIUM NC-809 FLUX thane, silicone, epoxy and UV. Less than
NC-809 halogen-free, ultra-low residue,
5 sec. measurement time. Reportedly
flip-chip flux is designed to hold die or
eliminates need for coating test coupons.
solder spheres in place without risk of die and tall components. Is equipped with Local and cloud data storage for trace-
shift during assembly. Reportedly leaves new camera that reduces cycle and pro- ability and process control.
minimal residue after reflow and exhibits duces ultra-sharp high-res 3-D images;
superior wetting performance. Is qualified Insituware
can simultaneously inspect extremely
for ball grid array ball for packages sensi- insituware.com

The CIRCUITS ASSEMBLY
DIRECTORY OF EMS COMPANIES
• Build your EMS database

• 3,000+ facilities worldwide
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circuitsassembly.com/dems
TECHNICAL ABSTRACTS
In Case You Missed It
Flexible Wireless Electronics processing are discussed, along with various algo-
rithms and hardware architectures. The integration of
“Room-Temperature High-Precision Printing of Flex- ultrathin neuromorphic chips for local computation
ible Wireless Electronics Based on MXene Inks” and the printed electronics on soft substrates used for
Authors: Yuzhou Shao, et al. the development of e-skin over large areas are expect-
Abstract: Wireless technologies-supported printed ed to advance robotic interaction, as well as open
flexible electronics are crucial for the Internet of new avenues for research in medical instrumentation,
Things, human-machine interaction, and wearable wearables, electronics and neuroprosthetics. (Science
and biomedical applications. However, the challenges Robotics, Jun. 8, 2022, vol. 7, no. 67, https://www.
to existing printing approaches remain, such as low science.org/doi/10.1126/scirobotics.abl7344)
printing precision, difficulty in conformal printing,
complex ink formulations and processes. Here the
authors present a room-temperature direct printing
strategy for flexible wireless electronics, where distinct Soldering
high-performance functional modules (e.g., antennas,
micro-supercapacitors and sensors) can be fabricated “Effect of Remelting Heat Treatment on the Micro-
with high resolution and further integrated on vari- structure and Mechanical Properties of SnBi Solder
ous flat/curved substrates. The additive-free titanium Under High-Speed Self-Propagation Reaction”
carbide (Ti3C2Tx) MXene aqueous inks are regulated Authors: Yang Wan, Longzao Zhou and Fengshun
with large single-layer ratio (>90%) and narrow flake Wu
size distribution, offering metallic conductivity (~6, Abstract: The heat source based on the self-propa-
900 S cm−1) in the ultrafine-printed tracks (3µm line gation reaction of Al/Ni thin foil has the characteristics
gap and 0.43% spatial uniformity) without annealing. of concentrated heat, fast temperature rise/fall rate
In particular, the authors built an all-MXene-printed and small heat-affected zone. It can complete the melt-
integrated system capable of wireless communication, ing and solidification crystallization of solder within
energy harvesting and smart sensing. This work opens milliseconds to realize solder interconnection, which
a door for high-precision additive manufacturing can solve the problems of damage to heat-sensitive
of printed wireless electronics at room temperature. materials and components caused by monolithic heat-
(Nature Communications, Jun. 9, 2022, https://www. ing of package structure. However, due to the highly
nature.com/articles/s41467-022-30648-2) nonstationary interconnection process, the resulting
microstructure morphology may affect the service per-
formance of the interconnected joints. In view of this,
Sensors to investigate the post-solder microstructure of solder
based on the self-propagation reaction, this paper
“Neuro-inspired Electronic Skin for Robots” analyzes the effect of the initial microstructure on the
Authors: Fengyuan Lei, et al. post-solder microstructure by heating 300-µm-thick
Abstract: Touch is a complex sensing modality SnBi solder with a 40-µm Al/Ni thin foil. The results
owing to a large number of receptors (mechano, ther- indicated the short melting time could result in the
mal, pain) nonuniformly embedded in the soft skin all incomplete melting of heterogeneous phases and the
over the body. These receptors can gather and encode nonuniform distribution of elements during the melt-
the large tactile data, allowing humans to feel and ing process, which had a significant effect on the mor-
perceive the real world. This efficient somatosensa- phology and composition distribution of the solidified
tion far outperforms the touch-sensing capability of microstructure, as well as the hardness distribution
most of the state-of-the-art robots today and suggests of the melted zone. The above conclusions have the
the need for neural-like hardware for electronic skin potential to improve the interconnection process based
This column provides
(e-skin). This could be attained through either innova- on the self-propagation reaction, which is critical for
abstracts from recent
tive schemes for developing distributed electronics or both theoretical guidance and engineering application.
industry conferences
repurposing the neuromorphic circuits developed for (Scientific Reports, Jun. 9, 2022, https://www.nature.
and company white
other sensory modalities such as vision and audio. com/articles/s41598-022-13776-z) papers. Our goal is
This review highlights the hardware implementations to provide an added
of various computational building blocks for e-skin opportunity for readers
and the ways they can be integrated to potentially to keep abreast of
realize human skin-like or peripheral nervous system- technology and
like functionalities. The neural-like sensing and data business trends.

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The History of Conductor Sizing

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