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    EE-231 Electronics I: Engr. Dr. Hadeed Ahmed Sher

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    1. The document discusses biasing techniques for transistors including emitter follower bias configuration and common base bias configuration. Circuit diagrams and equations are provided for each. 2. Examples are provided to demonstrate calculating biasing voltages and currents for various transistor circuits using the biasing techniques and equations. Components like resistors are solved for. 3. The document is a lecture on biasing techniques from Dr. Hadeed Ahmed Sher for the EE-231 Electronics I course at Ghulam Ishaq Khan Institute of Engineering Sciences and Technology.

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    EE-231 Electronics I: Engr. Dr. Hadeed Ahmed Sher

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    HadeedAhmedSher
    563 views15 pages
    1. The document discusses biasing techniques for transistors including emitter follower bias configuration and common base bias configuration. Circuit diagrams and equations are provided for each. 2. Examples are provided to demonstrate calculating biasing voltages and currents for various transistor circuits using the biasing techniques and equations. Components like resistors are solved for. 3. The document is a lecture on biasing techniques from Dr. Hadeed Ahmed Sher for the EE-231 Electronics I course at Ghulam Ishaq Khan Institute of Engineering Sciences and Technology.

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    Biasing techniques of BJT . GIK Institute

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    Week8

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    1. The document discusses biasing techniques for transistors including emitter follower bias configuration and common base bias configuration. Circuit diagrams and equations are provided for each. 2. Examples are provided to demonstrate calculating biasing voltages and currents for various transistor circuits using the biasing techniques and equations. Components like resistors are solved for. 3. The document is a lecture on biasing techniques from Dr. Hadeed Ahmed Sher for the EE-231 Electronics I course at Ghulam Ishaq Khan Institute of Engineering Sciences and Technology.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    563 views15 pages

    EE-231 Electronics I: Engr. Dr. Hadeed Ahmed Sher

    Uploaded by

    HadeedAhmedSher
    1. The document discusses biasing techniques for transistors including emitter follower bias configuration and common base bias configuration. Circuit diagrams and equations are provided for each. 2. Examples are provided to demonstrate calculating biasing voltages and currents for various transistor circuits using the biasing techniques and equations. Components like resistors are solved for. 3. The document is a lecture on biasing techniques from Dr. Hadeed Ahmed Sher for the EE-231 Electronics I course at Ghulam Ishaq Khan Institute of Engineering Sciences and Technology.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 15

    EE-231 Electronics I

    Engr. Dr. Hadeed Ahmed Sher

    Ghulam Ishaq Khan Institute of Engineering Sciences and Technology, TOPI 23460
    [email protected]

    March 16, 2018

    Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 8 Resources March 16, 2018 1 / 15
    1 Biasing Techniques
    Emitter follower Bias configuration
    Common base bias configuration

    2 Examples

    3 PNP transistors
    Example

    Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 8 Resources March 16, 2018 2 / 15
    Biasing Techniques Emitter follower Bias configuration

    Emitter follower Bias configuration

    Output is taken from the emitter terminal.


    Output voltage follows the input voltage thats why it is called emitter bias.

    Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 8 Resources March 16, 2018 3 / 15
    Biasing Techniques Emitter follower Bias configuration

    Emitter follower Bias configuration


    The dc equivalent of emitter bias
    circuit is shown below. Applying KVL.

    −IB RB − VBE − IE RE + VEE = 0 (1)

    Converting IE into IB
    VEE − VBE
    IB = (2)
    RB + (β + 1)RE

    For output network applying KVL,

    −VCE − IE RE + VEE = 0 (3)

    VCE =VEE − IE RE

    Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 8 Resources March 16, 2018 4 / 15
    Biasing Techniques Common base bias configuration

    Common base bias configuration

    Two supplies are used with base terminal as common terminal between the
    input and output terminal.

    Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 8 Resources March 16, 2018 5 / 15
    Biasing Techniques Common base bias configuration

    Common base bias configuration

    The dc equivalent of input circuit is VEE − VBE


    shown below. IE = (5)
    RE
    Applying KVL on the outer loop.

    Applying KVL
    −VEE +IE RE +VCE +IC RC −VCC = 0
    VEE − IE RE − VBE (4) (6)

    Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 8 Resources March 16, 2018 6 / 15
    Biasing Techniques Common base bias configuration

    Common base bias configuration

    Converting IE into IC using α=1

    VCE = VEE + VCC − IE (RC + RE ) (7)

    For output network applying KVL,

    VCB + IC RC + VCC = 0 (8)

    VCB =VCC − IC RC

    Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 8 Resources March 16, 2018 7 / 15
    Examples

    Example 4.18

    Determine ICQ ,VCEQ , VB ,VC ,VE and I is given as


    B
    VBC
    VCC − VBE
    IB = = 15.51µA (9)
    RB + βRC
    Using β IC Q=1.86mA.
    VCEQ is calculated as

    VCEQ = VCC −IC RC = 11.26V (10)

    VB =VBE =0.7 V
    VC =VCE =11.26 V
    Note that this is a collector feedback VBC =VB -VC =0.7-11.26=-10.56 V
    biasing with RE =0. VE =0 V

    Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 8 Resources March 16, 2018 8 / 15
    Examples

    Example 4.19

    Determine VC and VB .
    IB is given as
    VEE − VBE
    IB = = 83µA (11)
    RB
    Using β IC =3.735mA.
    VC is calculated as

    VC = VCC − IC RC = −4.48V (12)

    VB is calculated as

    Applying KVL on the base emitter VB = VB − IB RB = −8.3V (13)


    loop.

    Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 8 Resources March 16, 2018 9 / 15
    Examples

    Example 4.20
    To find Eth , consider the figure below
    Determine VC and VB . and apply KVL.

    Eth = IR2 − VEE (14)


    where
    VCC + VEE
    Using exact method I = = 3.85mA (15)
    R1 + R2
    Rth = RR11+R
    R2
    2
    =1.73kΩ
    Eth is -11.53V
    Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 8 Resources March 16, 2018 10 / 15
    Examples

    Example 4.20
    Substituting the thevenin’s
    equivalent the base emitter loop
    becomes,

    IB =35.39µA and IC =4.25mA.


    VC is calculated as

    VC = VCC − IC RC = 8.53V (17)

    VB is calculated as

    VB = −Eth −IE RE = −11.59V (18)


    Applying KVL and converting IE into
    IB and then rearranging the terms ,
    VEE − Eth − VBE
    IB = (16)
    Rth + (β + 1)RE
    Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 8 Resources March 16, 2018 11 / 15
    Examples

    Example 4.21
    Given the device characteristics, find
    the resistance values for fixed bias Using the equation for IB , the base
    circuit. Also find the biasing voltage. resistance is calculated as
    VCC − VBE
    RB = = 482.5kΩ (20)
    IB

    From the load line it is evident that


    VCC =20V. Also using the conditions
    for saturation,
    VCC
    RC = = 2.5kΩ (19)
    IC
    Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 8 Resources March 16, 2018 12 / 15
    Examples

    Example 4.22
    For the circuit shown if ICQ =2mA
    and VCEQ =10V find R1 and RC .
    VB = VBE + VE = 3.1V (22)

    R2 VCC
    VB = (23)
    R1 + R2
    (18kΩ)(18V )
    = 3.1V (24)
    R1 + 18kΩ
    R1 =86.52kΩ. Also,
    VRC VCC − VC
    RC = = (25)
    IC IC

    Here, IC is given in the question, VC = VCE + VE = 10 + 2.4 = 12.4V


    assuming alpha equal to 1, (26)
    18 − 12.4
    RC = = 2.8kΩ (27)
    VE = IE RE ≈ IC RE = 2.4V (21) 2mA
    Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 8 Resources March 16, 2018 13 / 15
    PNP transistors

    PNP transistors
    The procedure to determine the
    unknown is same except that the VCC + VBE − IB RB − IE RE = 0 (28)
    current directions are reversed.
    Consider this figure Converting IE into IB using β.
    VCC + VBE
    IB = (29)
    RB + (β + 1)RE

    Note that in this case VBE is -0.7V.


    At the output loop

    VCC + VCE − IC RC − IE RE (30)

    Using α

    Applying KVL to base emitter loop VCE = −VCC + IC (RC + RE ) (31)

    Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 8 Resources March 16, 2018 14 / 15
    PNP transistors Example

    Example 4.31
    Determine VCE for the circuit shown.
    Applying KVL on the base emitter
    loop

    VB − VBE − VE = 0 (33)

    VE = VB − VBE = −2.46V (34)


    IE = V
    RE =2.24mA. For the collector
    E

    emitter loop

    VCE = VCC − IC (RC + RE ) (35)

    Using approximate method, the The value of VC is negative


    condition βRE ≥ 10R2 is satisfied. therefore, VCE =-10.16V.
    For NPN only the sign change for
    R2 VCC
    VB = = −3.16V (32) the required values.
    R1 + R2
    Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 8 Resources March 16, 2018 15 / 15

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