Geeta Pasrija

Geeta Pasrija
Senior Staff Systems Engineer at Broadcom
Summary
- MS in EE. Experience in research, design, and development of communication systems. -Worked on various stages of a product lifecycle including architecture and C-model development, Pre-silicon verification, chip bring-up, firmware development, and performance tuning for interoperability. -Experience with DSL, Satellite Communication, and Optical Communication technologies. -Strong understanding of DSP Architectures, hardware software co-design. -Experience in design, simulation, and implementation of signal processing algorithms. -Extensive implementation experience in C and Assembly. Proficient in MATLAB. -Experience in design and implementation of multi-threaded software on a Real Time Operating System (RTOS). -Hands-On lab experience. -Self-motivated; work with minimal supervision. Work well with team members to improve overall team productivity. -Excellent communication skills demonstrated through several publications.
Specialties
- Languages: C, C++, MATLAB, Maple, Assembly ((TMS320C62x, ADSP-21161, Freescale DSP56321) - Operating Systems, RTOS: Unix (Linux, Solaris), Windows, CMX-RTOS for DSP563xx. - DSP Processors: TI TMS320C62x DSP, Freescale DSP56321, ADSP-21161 SHARC DSP. - DSP Tools: Code Composer, Tasking DSP56xxx Suite, VisualDSP++, Code Composer, SIA-Smaart. - Lab Equipment: Oscilloscopes, Spectrum Analyzer, Logic Analyzer, Signal Generator, Power Meter, DSLAMs, Line Simulators.
Experience
Senior Staff Systems Engineer at Broadcom August 2009 - Present (2 years 9 months) Senior Software Engineer at Intel October 2008 - August 2009 (11 months) Systems Software Engineer at Infineon Technologies August 2007 - September 2008 (1 year 2 months) 1) Architecture/C-models for Next Generation DSL Chipsets. -C-models for Convolutional Interleaver and DeInterleaver, RS Decoder with Erasure Decoding, RX-PMD including Boxing, Trellis Decoder, and Constellation Demapper.
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-Erasure Decoder Architecture Specification: Algorithm development and optimization for Erasure decoding on the DSL chipset. Performance analysis in the presence of Impulse Noise. Proposed enhancements in the RS Decoder and Erasure algorithm for the next-generation chipset. 2) Pre-Silicon Verification for Next Generation DSL chipsets: Development of Test Plans for verifying various hardware blocks. Software implementation to exercise the test plans. 3) Firmware Development for ADSL1/2/2+ including implementation of DSP algorithms and Control Software in C and Assembly. 4) Performance tuning for interoperability with multiple DSLAMs. 2 recommendations available upon request DSP Engineer at Texas Instruments, Inc September 2005 - August 2007 (2 years) 1) Erasure decoder Contribution for the DSL standard commitee. Erasure performance analysis in the presence of Impulse Noise of varying widths and frequency. Algorithm tuning to improving the Impulse Noise Protection (factor of 2 improvement) without changing the data rate, or increasing the data rate without increasing the Impulse Noise Protection. 2) Firmware Development for ADSL1/2/2+ including implementation of DSP algorithms and Control Software including ISRs, Cache/Overlay Management, DMA Management in C and Assembly. 3) Diagnostic Tool Development - Development of AFE Diagnostics for the CPEs analog chip. - Development of a diagnostic tool to determine if a non-linear noise source is present in the channel. 1 recommendation available upon request DSP Engineer at SR Technologies September 2004 - September 2005 (1 year 1 month) Embedded System Design and Development for Satellite Communications. 1) Design and implementation of multi-threaded transceiver software on the DSP on CMX-RTOS. Used RTOS features such as memory pools, mailboxes, semaphores, resources, signals, ISRs and thread priorities. Created a thread-tracer and profiler using GPIOs, hardware timers and LEDs. 2) Porting and optimization of the baseband encoding/decoding algorithms including CRC, Convolutional encoding and Viterbi decoding, Interleaving, Scrambling and Multiplexing. 3) Transceiver Bring-Up
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4) AGC Algorithm Development 1 recommendation available upon request
Education
University of Utah MS, Electrical Engineering, 2001 - 2004 1 recommendation available upon request Delhi University BE, Manufacturing and Automation Engineering, 1997 - 2001 Springdales DK
Honors and Awards

- Awarded the annual best paper award by the European Association for Signal Processing (EURASIP) for paper published in the Journal on Advances in Signal Processing (JASP), 2005. http://www.hindawi.com/GetArticle.aspx?doi=10.1155/ASP.2005.1485 - Awarded the University Teaching Assistantship award for teaching Real Time DSP systems and Signals & Systems courses at the University of Utah, 2004.
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Geeta Pasrija
Senior Staff Systems Engineer at Broadcom
5 people have recommended Geeta

"I hired Geeta three years ago into a team of very experienced systems and software engineers. From the start, Geeta proved to be a fast learner who quickly gained the skills and trust to take on the most difficult assignments in our team. Whether she worked on the architecture and algorithms for a new CPE platform, on performance simulations, pre-silicon verification, or interoperability of existing CPE platforms, Geeta has been consistently thorough and speedy in her work. Her perseverance in difficult assignments, her reliable judgment on engineering tradeoffs, and the clarity of her documentation have all earned her the respect of the most senior engineers in our team. In addition to her strong engineering skills, Geetas drive and always-positive attitude make it a pleasure to work with her. In short Geeta has become the rising star in our team and I am happy to give her my strongest recommendations!" Konrad K., Sr. Manager, Signal Processing Group, Infineon Technologies, managed Geeta at Infineon Technologies "I had the opportunity to work closely with Geeta during the past 10 months to verify and fine tune an important DSP/channel coding algorithm in an existing platform and to enhance the algorithm for our next generation platform. It was a challenging and complex task. Geeta was able to come up to speed and focus on the main issues shortly after she started. In addition to verifying the algorithm in hardware, Geeta was able to put together quickly a software model of the algorithm and hardware. This, together with her persistence and insight, have led to quick resolution of the problem at hand, as well as important enhancement for our next generation product. During this time period, I was amazed by the her extraordinary speed in developing and debugging software/firmware programs, as well as her ability to break down complex problems into smaller more manageable parts. It was truly a joy for me to work with her, and be influenced by her optimism." Po T., Manager, Digital Systems Architecture, Infineon Technologies, managed Geeta indirectly at Infineon Technologies "Geeta is very sharp and easy going engineer. Working with her is really fun. Her contributions at TI as a junior engineer were impressive and on par with those with much more experience." Dragan L., DSP Software engineer, Texas Instruments, worked directly with Geeta at Texas Instruments, Inc "While at SR Technologies Geeta was a member of the engineering team responsible for the design, development and testing of an L-band base, portable, satellite communications device. She was a member of the DSP development team and responsible for the development of software based modem functions. Geeta
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was dependable and self motivated. She required minimum supervision and was an excellent team member." Luis L., Director of Engineering, SR Technologies, managed Geeta at SR Technologies "Geeta may have been my best Master's research student to date. Even though she didn't start with a strong background in optics, she quickly got up to speed and became quite productive with her project involving DSP and nonlinear optical filters. Her work produced all or part of three journal publications, one of which won the best paper award for the journal. I would welcome her back for a PhD anytime." Steve B., Associate Professor, University of Utah, advised Geeta at University of Utah
Contact Geeta on LinkedIn
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Geeta Pasrija

Senior Staff Systems Engineer at Broadcom

4) AGC Algorithm Development 1 recommendation available upon request

Honors and Awards

5 people have recommended Geeta

Contact Geeta on LinkedIn

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