STTN6050H-12M1Y

Datasheet

60 A 1200 V thyristor controlled bridge leg in ACEPACK SMIT module

Features

• AEC-Q101 qualified
• 1200 V symmetrical blocking voltage
• High junction temperature: 150 °C
• High noise immunity, static dV/dt: 1000 V/μs
• Embed two TN6050HP-12 dies in series
• Module qualified according to AQG324 recommendation
• SMD with isolated top cooled tab
• 4000 V insulated tab-to-lead package
– UL recognized, File E81734
• Terminal pins opposite to cooling side
– Fully automatic PCB mounting to heat sink
• Large creepage distance to meet IEC 60664-1
– 250 VAC, material group 2, pollution degree 3
– 600 VAC, material group 2, pollution degree 2
• ECOPACK2 compliant component

Applications
• Single and tri-phase controlled rectifier bridge
Product status • AC phasing half bridge of a totem pole PFC
STTN6050H-12M1Y • On-board and stationary chargers
• AC / DC converter for motor drive, UPS and SMPS
Product summary
• Output full wave DC current up to 75 AAV
IT(RMS) 60 A • AC Input converter current up to 85 ARMS
IOUT(AV) 75 A • Solid-state relay in heating control, by pass switch and motor starter
IIN_AC(RMS) 85 A

VDRM/VRRM 1200 V Description

VDSM/VRSM 1400 V
The STTN6050H-12M1Y achieves a 1200 V 60 A full controlled SCR bridge leg in
ACEPACK SMIT module, and it can control an AC current up to 85 ARMS when
IGT 50 mA connected to an AC line network. Thus, it allows to design a single or three-phase
Tj
AC / DC rectifier bridge, a phase recombination branch of a totem pole PFC up to
-40 to +150 °C
75 A(AV) output current, the AC phasing arm of a line inverter or even an back-to-
back SCR based AC switch for a heating controller or the by pass relay of an UPS.
With its top cooling pad opposite to the printed circuit board this device allows the
PCB-module-heat sink stack to be automatically assembled. This provides a low
profile and compact converter in the field of on-board charger, charging station, motor
drive, UPS and AC / DC power supplies.
Based on the ST high temperature automotive ASD technology, it offers higher
specified noise immunity of 1000 V/µs at the 150 °C junction temperature Tj, and
an over-voltage robustness VDSM up to 1400 V.

DS13748 - Rev 2 - February 2023 www.st.com

For further information contact your local STMicroelectronics sales office.
 STTN6050H-12M1Y
Characteristics

1 Characteristics

Table 1. Absolute maximum ratings (limiting values, per single SCR)

Symbol Parameter Value Unit

IT(RMS) RMS on-state current, sine half wave 60 A

TC = 106 °C
IT(AV) Average on-state current, sine half wave 38 A

Non repetitive surge peak on-state current, VR = tp = 8.3 ms 660

ITSM Tj initial = 25 °C A
0 V, IG = 100 mA tp = 10 ms 600

I2t I2t value for fusing tp = 10 ms Tj = 25 °C 1800 A2s

Critical rate of rise of on-state SCR current
dl/dt f = 50 and 60 Hz Tj = 150 °C 200 A/µs
IG = 2 x IGT , tr ≤ 100 ns

VDRM / VRRM Repetitive off-state voltage Tj = -40 °C to 150 °C 1200 V

VDSM / VRSM Non repetitive surge peak off-state voltage tp = 10 ms Tj = 25 °C 1400 V

VGM Peak forward SCR gate voltage tp = 20 µs Tj = 150 °C 10 V

IGM Peak forward SCR gate current tp = 20 µs Tj = 150 °C 8 A

IGCM Peak cathode drive current, C1 and C2 pins tp = 20 µs Tj = 150 °C 8 A

VRGM Peak SCR gate voltage Tj = 25 °C 5 V

PG(AV) Average SCR gate power dissipation Tj = 150 °C 1 W

Tstg Storage junction temperature range -40 to +150 °C

Tj Operating junction temperature range -40 to +150 °C

VINS RMS tab-to-pin lead insulation voltage, 1 minute 4 kV

DS13748 - Rev 2 page 2/18

 STTN6050H-12M1Y
Characteristics

Table 2. SCR electrical characteristics, per single SCR

Symbol Test Conditions Value Unit

SCR triggering characteristics

Min. 10
IGT VD = 12 V, RL = 33 Ω Tj = 25 °C mA
Max. 50
VGT VD = 12 V, RL = 33 Ω Tj = 25 °C Max. 1.3 V

VGD VD = 2/3 VDRM, RL = 3.3 kΩ Tj = 150 °C Min. 0.2 V

IH IT = 500 mA, gate open Tj = 25 °C Max. 100 mA

IL IG = 1.2 x IGT Tj = 25 °C Max. 125 mA

SCR dynamic characteristics

IT = 60 A , VD = 800 V, IG = 100 mA,
tGT Tj = 25 °C Typ. 1 µs
dIG/dt = 0.2 A/µs

IT = 38 A, VD = 800 V, dIT/dt = 10 A/µs,

tQ Tj = 150 °C Typ. 150 µs
VR = 75 V, dVD/dt = 20 V/µs, tp = 100 µs

dV/dt VD = 800 V, gate open Tj = 150 °C Min. 1000 V/µs

SCR static characteristics

Tj = 25 °C Max. 1.3 V
VTM ITM = 60 A, tP = 380 µs
Tj = 150 °C Max. 1.3 V

VTOT SCR on-state threshold voltage Tj = 150 °C Max. 0.8 V

RDT SCR on-state dynamic resistance Tj = 150 °C Max. 7.35 mΩ

Tj = 25 °C Max. 5 µA
IDRM/IRRM VD = VDRM, VR = VRRM
Tj = 150 °C Max. 7.5 mA

IDSM/IRSM VD = VDSM, VR = VRSM Tj = 25 °C Max. 10 µA

SCR losses evaluation

PLT VTOT x IT(AV) + RDT x IT(RMS)2 W

Table 3. Thermal characteristics

Symbol Parameter Value Unit

Rth(j-c) Junction to case (DC), per SCR(1) Max. 0.75 °C/W

1. The case temperature is measured right underneath the device die on cooling pad

DS13748 - Rev 2 page 3/18

 STTN6050H-12M1Y
Characteristics (curves)

1.1 Characteristics (curves)

Figure 1. SCR on-state characteristics (maximum value), Figure 2. SCR maximum average power dissipation
Tj = 25 °C and 150 °C versus average half-wave on-state current, a = 30° to 180°
ITM(A) P(W)
1000 60
55 α = 120 °
Tj max:
VT0T = 0.80 V 50 α = 90 °
Tj = 150 °C α = 180 °
RDT = 7.35 mΩ 45 α = 60 °
100 40 α = 30 °
35
30
25
10 20
15 360 °
10
Tj = 25 °C 5
VTM(V) α IT(AV) (A)
1 0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 0 10 20 30 40 50

Figure 4. SCR relative variation of thermal impedance

Figure 3. SCR average on-state current versus case
junction to case and junction to ambient versus pulse
temperature
duration, 1 ms to 1 s
IT(AV) (A)
K = [Z / R ]
50 th th
1.0E+00

40 α = 180 ° Zth(j-c)
α = 120 °
30 α = 90 °

α = 60 °
20
α = 30 °

10

Tc(°C) tP(s)
0
1.0E-01
0 25 50 75 100 125 150
1.0E-03 1.0E-02 1.0E-01 1.0E+00

Figure 6. SCR relative variation of holding current and

Figure 5. SCR relative variation of gate trigger voltage and
latching current versus junction temperature (typical
current versus junction temperature (typical values)
values)
IGT, VGT [ Tj ] / IGT, VGT [ Tj = 25 °C]
IH, IL [ Tj ] / IH, IL [ Tj = 25 °C]
1.5
IGT 1.6

IH
1.2 IL
1.0
VGT

0.8

0.5

0.4

Tj(°C)
0.0
Tj(°C)
0.0
-50 -25 0 25 50 75 100 125 150
-50 -25 0 25 50 75 100 125 150

DS13748 - Rev 2 page 4/18

 STTN6050H-12M1Y
Characteristics (curves)

Figure 7. SCR non repetitive surge peak on-state current Figure 8. SCR surge peak forward current versus number
for a sinusoidal pulse (tp < 10 ms), VR = 0 V of half cycles, VR = 0 V

I (A) ITSM(A)
TSM 700
10000 650
T initial = 25 °C 600 Non repetitive Tj = 25 °C
j
550
500
I
1000 TSM 450
dl/dt limitation: 200 A/µs 400
350
300
100 250
200 Repetitive Tc = 106 °C
150
t (ms) 100
p
10 50
Number of cycles
1.E-02 1.E-01 1.E+00 1.E+01
0
1 10 100 1000

Figure 10. SCR junction capacitance versus reverse

Figure 9. SCR relative variation of the static dV/dt
voltage applied, gate open (typical values)
immunity versus junction temperature (typical values
C(pF)
dV/dt [T j] / dV/dt [T j = 150 °C] 1000.0
6 F = 1 MHz
Vosc = 30 mV RMS
VD = V R = 2/3 VDRM Tj = 25 °C
5

100.0
4

2 10.0

1
Tj(°C)
0 VR(V)
1.0
25 50 75 100 125 150
10 100 1000

Figure 11. SCR relative variation of leakage current versus junction temperature for max blocking voltage
(typical values)

IDRM ,IRRM[Tj , VDRM , VRRM] / IDRM , IRRM[150 °C , 1200 V]

1.0E+00

1.0E-01

1.0E-02

1.0E-03

1.0E-04

T j (°C)
1.0E-05

25 50 75 100 125 150

DS13748 - Rev 2 page 5/18

 STTN6050H-12M1Y
Application

2 Application

2.1 Solid state Inrush current limitation (ICL) using STTN6050H-12M1Y

SCRs can be used in single and three phase applications as AC line polarity switches with an active current
limitation at power up or line recovery.
For more information, refer to the application note:
• AN4606: Inrush-current limiter circuits (ICL) with Triacs and thyristors (SCR) and controlled bridge design
tips.
Solid-state topologies with SCR allow the applications to easily comply to the following standard:
1. IEC61000-3-3 (voltage fluctuations and flicker in public low-voltage supply systems, for equipment with rated
current ≤ 16 A). the high current powered from the grid may lead to voltage fluctuations and drops due to
the line impedance. Those mains voltage disturbances have an impact on any other equipment connected to
the same circuit and cause undesired brightness variation of lamps or displays (commonly called flickering
phenomenon).
2. IEC61000-4-11 (voltage dips, short interruptions, and voltage variations immunity tests) As any appliance
connected to the mains can be subject to line voltage dips or interruptions, a high input current may
occur when the line voltage suddenly comes back to its nominal value. This high current may damage the
front-end circuit components and can trigger an AC fuse for example.

2.1.1 Single- phase applications

Figure 12 and Figure 13 define an active inrush current limiter in single-phase application with SCRs respectively
in full wave SCRs bridge and in PFC totem pole bridgeless topology.

Figure 12. Single-phase full wave SCRs bridge rectifier Figure 13. Single-phase PFC Totem Pole bridgeless
D_BP HVDC
G2
L S2
STTN6050H-12M1Y HVDC
T2
D2
G1 G3
D1 VAC
T1 T3 L
C +

C +
S1
S1
VAC
D1
G1
G2 G4
T1
T2 T4

STTN6050H-12M1Y STTN6050H-12M1Y

SCRs are controlled in phase angle to smoothly increase the PFC output capacitor voltage up to peak AC line
voltage. The pre-charging peak current value is controlled by a microcontroller which smartly synchronize the
SCRs gate driving signal angle step (referred as Δt in the Figure 14 here below). Limiting resistor like a negative
temperature coefficient resistor (NTC) is no more needed.

DS13748 - Rev 2 page 6/18

 STTN6050H-12M1Y
Solid state Inrush current limitation (ICL) using STTN6050H-12M1Y

Figure 14. Inrush current controlled by SCRs principle

VAC HVDC

ILine
t

G1 / G4 t

G2 / G3 t

∆t 2x∆t 3x∆t 4x∆t 5x∆t

2.1.2 Three-phase applications

Figure 15 and Figure 16 define an example of active inrush current limiter in three-phase application with SCR
respectively in three-phase SCRs bridge rectifier and in three-phase VIENNA with 6 totem-pole SCRs topology.

Figure 15. Three-phase SCRs bridge rectifier

Figure 16. Three-phase VIENNA with 6 Totem-Pole SCR

HVDC
STTN6050H-12M1Y STTN6050H-12M1Y D1
HVDC

G5 G3 G1 +

v(L1,N) i(L1)

T5 T3 T1
VAC C +
i(L2)
M
v(L2,N)
N

i(L3)

+
v(L3,N)

G6 G4 G2

T6 T4 T2

STTN6050H-12M1Y

DS13748 - Rev 2 page 7/18

 STTN6050H-12M1Y
Solid state relay (SSR) using STTN6050H-12M1Y

2.2 Solid state relay (SSR) using STTN6050H-12M1Y

Solid-state relays (SSR) can perform same tasks as electromechanical relay. SSR provides a high reliability, a
long service life, an electromagnetic interference reduction, a fast response. Moreover, the SSR has no moving
parts to wear out or arcing contacts to deteriorate that are cause of failure about the electromechanical relay.
As defined by the Figure 17 , when a control current is applied to the input of the opto-TRIAC, the SCRs are
turned on. When the control current is removed from the input of the opto-TRIAC, SCRs are turned off when the
load current falls to the zero. Note the SSR can be used as contactor for 2-phase motor (see Figure 18) or as
bypass relay (see Figure 19).

Figure 17. SSR as AC load control Figure 18. SSR as contactor

L1
T3
T1
L2 MOTOR
T2

L3

Figure 19. SSR as relay bypass

Relay

LOAD

G1
VAC

T2
T1

G2

DS13748 - Rev 2 page 8/18

 STTN6050H-12M1Y
Dissipated power and junction temperature calculation at steady state

2.3 Dissipated power and junction temperature calculation at steady state

2.3.1 Dissipated power definition

Dissipated power of the SCR is defined by the following equation with VTOT the SCR on-state threshold voltage,
RDT the SCR on-state dynamic resistance, IT(AV) the SCR average current and IT(RMS) the SCR RMS current:
2
Pd = VTOT × IT AV + RDT × IT RMS (1)

Table 4 gives the average and RMS current of SCR according to the topology defined in the previous section by
considering the RMS current of the AC line IL(RMS) is a sinus waveform.

Table 4. IT(AV) and IT(RMS) definition

Topology Current definition

Single-phase full wave SCRs bridge

rectifier 2
IT(AV) IT AV = π × IL RMS
Single-phase PFC Totem Pole
bridgeless
SSR
IL RMS
Three-phase VIENNA with 6 Totem-Pole IT(RMS) IT RMS =
2
SCRs

DS13748 - Rev 2 page 9/18

 STTN6050H-12M1Y
Dissipated power and junction temperature calculation at steady state

2.3.2 Junction temperature definition

Figure 20. Die assembly representation

When Tc value is known, silicon junction temperature can be calculated as follows:

T j = TC + PD  ×  RTH j − c
Otherwise, starting from ambient temperature measurement, junction temperature can be calculated as follows:
T j = TA + PD × RTH j − a

Note: Rth(j-c) value is given in the datasheet above.

with:
RTH j − a = RTH j − c + RTH c − ℎ + RTH ℎ − a
and where RTH(c-h) is the thermal interface resistance (grease or foil) and RTH(h-a) is the heatsink thermal
resistance.
For more information about the thermal management and power dissipation calculation, refer to the application
note:
• AN533: SCRs, TRIACs, and AC switches, thermal management precautions for handling and mounting

DS13748 - Rev 2 page 10/18

 STTN6050H-12M1Y
Package information

3 Package information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.

3.1 ACEPACK SMIT package information

• Lead-free package leads finishing
• Halogen-free molding compound resin meets UL94 standard level V0

Figure 21. ACEPACK SMIT package outline

DM00447519_Rev.6

DS13748 - Rev 2 page 11/18

 STTN6050H-12M1Y
ACEPACK SMIT package information

Table 5. ACEPACK SMIT package mechanical data

mm Inches (for reference only)

Dim.
Min. Typ. Max. Min. Typ. Max.

A 19.50 20.00 20.50 0.7677 0.7874 0.8071

B 21.50 22.00 22.50 0.8465 0.8661 0.8858
C 22.80 23.00 23.20 0.8976 0.9055 0.9134
D 24.80 25.00 25.20 0.9764 0.9843 0.9921
E 32.20 32.70 33.20 1.2677 1.2874 1.3071
b 9.00 0.3543
b1 4.00 0.1575
b2 6.75 0.2657
b3 9.50 0.3740
c 0.95 1.00 1.10 0.0374 0.0394 0.0433
c1 1.95 2.00 2.10 0.0768 0.0787 0.0827
d 0.00 0.15 0.0000 0.0000 0.0059
d1 0.45 0.55 0.65 0.0177 0.0217 0.0256
e 1.30 1.50 1.70 0.0512 0.0591 0.0669
e1 4.65 4.85 5.05 0.1831 0.1909 0.1988
L 3.95 4.00 4.05 0.1555 0.1575 0.1594
L1 5.40 5.50 5.60 0.2126 0.2165 0.2205
m 1.30 1.50 1.80 0.0512 0.0591 0.0709
m1 1.30 1.50 1.80 0.0512 0.0591 0.0709
V 0° 2° 4° 0° 2° 4°
aaa 0.01 0.05 0.0004 0.0020
bbb 0.00 0.10 0.0000 0.0039

Figure 22. ACEPACK SMIT recommended footprint (dimensions are in mm)

2.75 (x4)

4.00 (x9)
9.00 (x2)

4.00 (x2)
1.40 (x6)
2.40 (x3)

30.10
DM00447519_FP_Rev.5

Note: Recommended pressing force on package to the heatsink: 50 N as described in application note AN5384.

DS13748 - Rev 2 page 12/18

 STTN6050H-12M1Y
ACEPACK SMIT package insulation information

3.2 ACEPACK SMIT package insulation information

Figure 23. ACEPACK SMIT package insulation information

Table 6. ACEPACK SMIT package insulation characteristics

Symbol Parameter Value Unit

L2 Pin-to-pin creepage distance Terminal to terminal: 3 to 4, 7 to 8, 8 to 9 Min. 6.6 mm

L3 Pin-to-backside creepage distance Min. 4 mm
IINS RMS tab-to-pin lead insulation current Duration = 1 s., VINS = 4.8 kV Max. 1 mA

Note: Recommended pressing force on package to the heatsink: 50 N as described in application note AN5384.

DS13748 - Rev 2 page 13/18

 STTN6050H-12M1Y
ACEPACK SMIT terminal description

3.3 ACEPACK SMIT terminal description

Table 7. ACEPACK SMIT STTN6050H-12M1Y module pinout description

Pin # Name Description

1 C2 T2 cathode drive
2 NC Not connected
3 G2 T2 gate
4 G1 T1 gate
5 NC Not connected
6 C1 T1 cathode drive
7 DC1 DC output 1
8 DC2 DC output 2
9 AC AC line

Figure 24. ACEPACK SMIT STTD6050H-12M2Y module pinout

DS13748 - Rev 2 page 14/18

 STTN6050H-12M1Y
ACEPACK SMIT packing information

3.4 ACEPACK SMIT packing information

Figure 25. ACEPACK SMIT carrier tape outline, bottom view

Table 8. ACEPACK SMIT carrier tape dimensions

Carrier tape typical dimension (mm)

A0 B0 C D0 D1 E1 F G K0 K1 P0 P1 P2 T W

26.00 33.30 0.40 2.00 1.50 1.75 26.20 24.10 7.10 5.80 4.00 36.00 2.00 0.35 56.00

Figure 26. ACEPACK SMIT reel outline

Table 9. ACEPACK SMIT reel dimensions

Reel dimension (mm)

Base qty.
A B (max.) C D (min.) E (max.) F (min.) G T1 (max.)

200 16.4 ±0.3 22.4 13.2 ±0.2 20.2 ±0.25 330 20.2 2.0 ±0.5 0.1

DS13748 - Rev 2 page 15/18

 STTN6050H-12M1Y
Ordering information

4 Ordering information

Figure 27. Ordering information scheme

ST T N 60 50 H - 12 M1 Y

Devices Type
TN = Thyristor SCR

RMS SCR current

60 = 60 A

Gate triggering Current

50 = 50 mA

High Temperature
H = 150 °C rated

Blocking Voltage
12 = 1200 V
Package
M1 = ACEPACK SMIT module with one embedded leg

Quality grade
Comply with automotive AQG324

Table 10. Ordering information

Order code Marking Package Weight Base qty. Delivery mode

STTN6050H-12M1Y STTN6050H12M1Y ACEPACK SMIT 8.1 g 200 Tape and reel

DS13748 - Rev 2 page 16/18

 STTN6050H-12M1Y

Revision history

Table 11. Document revision history

Date Revision Changes

15-Jun-2021 1 Initial release.

15-Feb-2023 2 Updated product summary table on cover page.

DS13748 - Rev 2 page 17/18

 STTN6050H-12M1Y

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DS13748 - Rev 2 page 18/18