Lg+la5gg 40lx770h-Ua+lcd PDF

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LED TV
SERVICE MANUAL
CHASSIS : LA5GG
MODEL : 40LX770H 40LX770H-UA

CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL69373701 (1510-REV00) Printed in Korea

CONTENTS
CONTENTS ............................................................................................... 2
SAFETY PRECAUTIONS ......................................................................... 3
SERVICING PRECAUTIONS..................................................................... 4
SPECIFICATION......................................................................................... 6
ADJUSTMENT INSTRUCTION................................................................. 8
TROUBLE SHOOTING GUIDE................................................................ 19
BLOCK DIAGRAM................................................................................... 27
EXPLODED VIEW ................................................................................... 28
SCHEMATIC CIRCUIT DIAGRAM ............................................ APPENDIX
Copyright © LG Electronics. Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5 mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1 W), keep the resistor 10 mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed

metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service 2. After removing an electrical assembly equipped with ES
manual and its supplements and addenda, read and follow the devices, place the assembly on a conductive surface such as
SAFETY PRECAUTIONS on page 3 of this publication. aluminum foil, to prevent electrostatic charge buildup or expo-
NOTE: If unforeseen circumstances create conflict between the sure of the assembly.
following servicing precautions and any of the safety precautions 3. Use only a grounded-tip soldering iron to solder or unsolder ES
on page 3 of this publication, always follow the safety precautions. devices.
Remember: Safety First. 4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as “anti-static” can generate
General Servicing Precautions electrical charges sufficient to damage ES devices.
1. Always unplug the receiver AC power cord from the AC power 5. Do not use freon-propelled chemicals. These can generate
source before; electrical charges sufficient to damage ES devices.
a. Removing or reinstalling any component, circuit board mod- 6. Do not remove a replacement ES device from its protective
ule or any other receiver assembly. package until immediately before you are ready to install it.
b. Disconnecting or reconnecting any receiver electrical plug or (Most replacement ES devices are packaged with leads electri-
other electrical connection. cally shorted together by conductive foam, aluminum foil or
c. Connecting a test substitute in parallel with an electrolytic comparable conductive material).
capacitor in the receiver. 7. Immediately before removing the protective material from the
CAUTION: A wrong part substitution or incorrect polarity leads of a replacement ES device, touch the protective material
installation of electrolytic capacitors may result in an explo- to the chassis or circuit assembly into which the device will be
sion hazard. installed.
2. Test high voltage only by measuring it with an appropriate CAUTION: Be sure no power is applied to the chassis or circuit,
high voltage meter or other voltage measuring device (DVM, and observe all other safety precautions.
FETVOM, etc) equipped with a suitable high voltage probe. 8. Minimize bodily motions when handling unpackaged replace-
Do not test high voltage by "drawing an arc". ment ES devices. (Otherwise harmless motion such as the
3. Do not spray chemicals on or near this receiver or any of its brushing together of your clothes fabric or the lifting of your
assemblies. foot from a carpeted floor can generate static electricity suf-
4. Unless specified otherwise in this service manual, clean ficient to damage an ES device.)
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable General Soldering Guidelines
non-abrasive applicator; 10 % (by volume) Acetone and 90 % 1. Use a grounded-tip, low-wattage soldering iron and appropriate
(by volume) isopropyl alcohol (90 % - 99 % strength) tip size and shape that will maintain tip temperature within the
CAUTION: This is a flammable mixture. range or 500 °F to 600 °F.
Unless specified otherwise in this service manual, lubrication of 2. Use an appropriate gauge of RMA resin-core solder composed
contacts in not required. of 60 parts tin/40 parts lead.
5. Do not defeat any plug/socket B+ voltage interlocks with which 3. Keep the soldering iron tip clean and well tinned.
receivers covered by this service manual might be equipped. 4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
6. Do not apply AC power to this instrument and/or any of its bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
electrical assemblies unless all solid-state device heat sinks are Do not use freon-propelled spray-on cleaners.
correctly installed. 5. Use the following unsoldering technique
7. Always connect the test receiver ground lead to the receiver a. Allow the soldering iron tip to reach normal temperature.
chassis ground before connecting the test receiver positive (500 °F to 600 °F)
lead. b. Heat the component lead until the solder melts.
Always remove the test receiver ground lead last. c. Quickly draw the melted solder with an anti-static, suction-
8. Use with this receiver only the test fixtures specified in this type solder removal device or with solder braid.
service manual. CAUTION: Work quickly to avoid overheating the circuit
CAUTION: Do not connect the test fixture ground strap to any board printed foil.
heat sink in this receiver. 6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
Electrostatically Sensitive (ES) Devices (500 °F to 600 °F)
Some semiconductor (solid-state) devices can be damaged eas- b. First, hold the soldering iron tip and solder the strand against
ily by static electricity. Such components commonly are called the component lead until the solder melts.
Electrostatically Sensitive (ES) Devices. Examples of typical ES c. Quickly move the soldering iron tip to the junction of the
devices are integrated circuits and some field-effect transistors component lead and the printed circuit foil, and hold it there
and semiconductor “chip” components. The following techniques only until the solder flows onto and around both the compo-
should be used to help reduce the incidence of component dam- nent lead and the foil.
age caused by static by static electricity. CAUTION: Work quickly to avoid overheating the circuit
1. Immediately before handling any semiconductor component or board printed foil.
semiconductor-equipped assembly, drain off any electrostatic d. Closely inspect the solder area and remove any excess or
charge on your body by touching a known earth ground. Alter- splashed solder with a small wire-bristle brush.
natively, obtain and wear a commercially available discharging
wrist strap device, which should be removed to prevent poten-
tial shock reasons prior to applying power to the unit under test.
IC Remove/Replacement 3. Solder the connections.
Some chassis circuit boards have slotted holes (oblong) through CAUTION: Maintain original spacing between the replaced
which the IC leads are inserted and then bent flat against the cir- component and adjacent components and the circuit board to
cuit foil. When holes are the slotted type, the following technique prevent excessive component temperatures.
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique Circuit Board Foil Repair
as outlined in paragraphs 5 and 6 above. Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
Removal board causing the foil to separate from or "lift-off" the board. The
1. Desolder and straighten each IC lead in one operation by following guidelines and procedures should be followed whenever
gently prying up on the lead with the soldering iron tip as the this condition is encountered.
solder melts.
2. Draw away the melted solder with an anti-static suction-type At IC Connections
solder removal device (or with solder braid) before removing To repair a defective copper pattern at IC connections use the
the IC. following procedure to install a jumper wire on the copper pattern
Replacement side of the circuit board. (Use this technique only on IC connec-
1. Carefully insert the replacement IC in the circuit board. tions).
2. Carefully bend each IC lead against the circuit foil pad and
solder it. 1. Carefully remove the damaged copper pattern with a sharp
3. Clean the soldered areas with a small wire-bristle brush. knife. (Remove only as much copper as absolutely necessary).
(It is not necessary to reapply acrylic coating to the areas). 2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
"Small-Signal" Discrete Transistor 3. Bend a small "U" in one end of a small gauge jumper wire and
Removal/Replacement carefully crimp it around the IC pin. Solder the IC connection.
1. Remove the defective transistor by clipping its leads as close 4. Route the jumper wire along the path of the out-away copper
as possible to the component body. pattern and let it overlap the previously scraped end of the
2. Bend into a "U" shape the end of each of three leads remaining good copper pattern. Solder the overlapped area and clip off
on the circuit board. any excess jumper wire.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding At Other Connections
leads extending from the circuit board and crimp the "U" with Use the following technique to repair the defective copper pattern
long nose pliers to insure metal to metal contact then solder at connections other than IC Pins. This technique involves the
each connection. installation of a jumper wire on the component side of the circuit
board.
Power Output, Transistor Device
Removal/Replacement 1. Remove the defective copper pattern with a sharp knife.
1. Heat and remove all solder from around the transistor leads. Remove at least 1/4 inch of copper, to ensure that a hazardous
2. Remove the heat sink mounting screw (if so equipped). condition will not exist if the jumper wire opens.
3. Carefully remove the transistor from the heat sink of the circuit 2. Trace along the copper pattern from both sides of the pattern
board. break and locate the nearest component that is directly con-
4. Insert new transistor in the circuit board. nected to the affected copper pattern.
5. Solder each transistor lead, and clip off excess lead. 3. Connect insulated 20-gauge jumper wire from the lead of the
6. Replace heat sink. nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Diode Removal/Replacement Carefully crimp and solder the connections.
1. Remove defective diode by clipping its leads as close as pos- CAUTION: Be sure the insulated jumper wire is dressed so the
sible to diode body. it does not touch components or sharp edges.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor

Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range 3. Test method

This specification is applied to the LED TV used LA5GG (1) Performance: LGE TV test method followed
chassis. (2) Demanded other specification
- Safety : UL, CSA, IEC specification
- EMC: FCC, ICES, IEC specification
2. Test condition - Wireless : WirelessHD Specification (Option)
Each part is tested as below without special appointment.
(1) Temperature: 25 °C ± 5 °C, CST: 40 °C ± 2 °C
(2) Relative Humidity: 65 % ± 10 %
(3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.
(4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
(5) The receiver must be operated for about 5 minutes prior to
the adjustment.
4. General Specification
No Item Specification Result Remark
1 Receiving System ATSC / NTSC-M / 64 & 256 QAM
2 Available Channel 1) VHF : 02~13
2) UHF : 14~69
3) DTV : 02-69
4) CATV : 01~135
5) CADTV : 01~135
3 Input Voltage AC 100 ~ 240V 50/60Hz Mark : 110V, 60Hz (N.America)
4 Market NORTH AMERICA
5 Screen Size 40/43/49/55/65 inches
6 Aspect Ratio 16:9
7 Tuning System FS
8 Module LC320DUE-FHA3 LGD 32LX770M-UA
HC400DUN-VCKN5 Heesung 40LX770H-UA
LC430EUE-FHM3 LGD 43LX770H-UA
43LX770M-UA
LC650EUF-FHM3 LGD 65LX770H-UA
9 Operating Environment 1) Temp : 0 ~ 40 deg
2) Humidity : ~ 80 %
10 Storage Environment 1) Temp : -20 ~ 60 deg
2) Humidity : ~ 85 %
5. Supported video resolutions
5.1. Component 2D input(Y, CB/PB, CR/PR)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed
1 720*480 15.73 60.00 13.5135 SDTV ,DVD 480I
2 720*480 15.73 59.94 13.50 SDTV ,DVD 480I
3 720*480 31.50 60.00 27.027 SDTV 480P
4 720*480 31.47 59.94 27.0 SDTV 480P
5 1280*720 45.00 60.00 74.25 HDTV 720P
6 1280*720 44.96 59.94 74.176 HDTV 720P
7 1920*1080 33.75 60.00 74.25 HDTV 1080I
8 1920*1080 33.72 59.94 74.176 HDTV 1080I
9 1920*1080 67.50 60.00 148.50 HDTV 1080P
10 1920*1080 67.432 59.94 148.352 HDTV 1080P
5.2. HDMI Input (PC/DTV)

No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed
PC DDC
1 640*350 31.468 70.09 25.17 EGA X
2 720*400 31.469 70.08 28.32 DOS O
3 640*480 31.469 59.94 25.17 VESA(VGA) O
4 800*600 37.879 60.31 40.00 VESA(SVGA) O
5 1024*768 48.363 60.00 65.00 VESA(XGA) O
6 1152*864 54.348 60.053 80.002 VESA O
7 1360*768 47.712 60.015 85.50 VESA (WXGA) X
8 1280*1024 63.981 60.020 108.00 VESA (SXGA) O
9 1920*1080 67.50 60.00 148.5 HDTV 1080P O
DTV
1 640*480 31.46 59.94 25.175 SDTV 480P
2 640*480 31.50 60.00 25.200 SDTV 480P
3 720*480 31.50 60.00 27.027 SDTV 480P
4 720*480 31.47 59.94 27.00 SDTV 480P
5 1280*720 45.00 60.00 74.25 HDTV 720P
6 1280*720 44.96 59.94 74.176 HDTV 720P
7 1920*1080 33.75 60.00 74.25 HDTV 1080I
8 1920*1080 33.72 59.94 74.176 HDTV 1080I
9 1920*1080 67.500 60.00 148.50 HDTV 1080P
10 1920*1080 67.43 59.94 148.352 HDTV 1080P
11 1920*1080 27.000 24.000 74.25 HDTV 1080P
12 1920*1080 26.97 23.97 74.176 HDTV 1080P
13 1920*1080 33.75 30.000 74.25 HDTV 1080P
14 1920*1080 33.716 29.976 74.176 HDTV 1080P
ADJUSTMENT INSTRUCTION
1. Application 4. MAIN PCBA Adjustments
This spec. sheet applies to LA5GG Chassis applied LED TV 4.1. ADC Calibration
all models manufactured in TV factory - A n ADC calibration is not necessary because MAIN SoC
(LGExxxx) is already calibrated from IC Maker
2. Specification 4.2. M AC Address, ESN Key and Widevine

(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation Key, DTCP Key, HDCP1.4, HDCP2.0
transformer will help protect test instrument. download
(2) Adjustment must be done in the correct order. 4.2.1. Equipment & Condition
(3) The adjustment must be performed in the circumstance of (1) Play file: keydownload.exe
25 ±5 ºC of temperature and 65±10% of relative humidity if
there is no specific designation 4.2.2. Communication Port connection
(4) The input voltage of the receiver must keep 100~240V, (1) Key Write: Com 1,2,3,4 and 115200 (Baudrate)
50/60Hz (2) Barcode: Com 1,2,3,4 and 9600 (Baudrate)
(5) At first Worker must turn on the SET by using Power Only
key.
(6) The receiver must be operated for about 5 minutes prior to
4.2.3. Download process
(1) Select the download items.
the adjustment when module is in the circumstance of over
(2) Mode check: Online Only
15 ºC
(3) Check the test process
In case of keeping module is in the circumstance of 0°C, it
- U S, Canada models: DETECT -> MAC_WRITE ->
should be placed in the circumstance of above 15°C for 2
WIDEVINE_WRITE
hours
(4) Play : START
In case of keeping module is in the circumstance of below
(5) Check of result: Ready, Test, OK or NG
-20°C, it should be placed in the circumstance of above
(6) Printer out (MAC Address Label)
15°C for 3 hours.
※ Caution 4.2.4. Communication Port connection

When still image is displayed for a period of 20 minutes or (1) Connect: PCBA Jig -> RS-232C Port == PC -> RS-232C
longer (especially where W/B scale is strong. Port
Digital pattern 13ch and/or Cross hatch pattern 09ch), there
can some afterimage in the black level area
3. Adjustment items
3.1. Main PCBA Adjustments
(1) ADC adjustment: Component 480i, 1080p
(2) EDID downloads for HDMI
* Remark 4.2.5. Download

Above adjustment items can be also performed in Final (1) US, Canada models (15Y LCD TV + MAC + Widevine +
Assembly if needed. Adjustment items in both PCBA and final ESN Key + DTCP Key + HDCP1.4 and HDCP2.0)
assembly stages can be checked by using the INSTART Menu
-> 1.ADJUST CHECK.
3.2. Final assembly adjustment

▪ White Balance adjustment
▪ RS-232C functionality check
▪ Factory Option setting per destination
▪ Ship-out mode setting (In-Stop)
▪ GND and HI-POT test
3.3. Appendix
▪ Tool option menu, USB Download (S/W Update, Option and
Service only)
▪ Manual adjustment for ADC calibration and White balance
▪ Shipment conditions, Channel pre-set 4.2.6. Inspection
- In INSTART menu, check these keys.
(2) Mexico models (15Y LCD TV + MAC + Widevine + ESN 4.4. LAN PORT INSPECTION(PING TEST)
Key + HDCP1.4 and HDCP2.0)
4.4.1. Equipment setting
(1) Play the LAN Port Test PROGRAM.
(2) Input IP set up for an inspection to Test Program.
*IP Number : 12.12.2.2
Connect SET → LAN port == PC → LAN Port
SET PC
4.4.2. LAN PORT inspection(PING TEST)

(1) Play the LAN Port Test Program.
(2) Connect each other LAN Port Jack.
(3) Play Test (F9) button and confirm OK Message.
(4) Remove LAN cable.
4.2.6. Inspection
- In INSTART menu, check these keys. 4.5. Model name & Serial number Download
4.5.1. Model name & Serial number D/L
▪ Press "Power on" key of service remote control.
4.3. LAN Inspection (Baud rate : 115200 bps)
4.3.1. Equipment & Condition ▪ Connect RS-232C Signal to USB Cable to USB.
▪ Each other connection to LAN Port of IP Hub and Jig ▪ Write Serial number by use USB port.
▪ Must check the serial number at Instart menu.
4.5.2. Method & notice

(1) Serial number D/L is using of scan equipment.
(2) S etting of scan equipment operated by Manufacturing
Technology Group.
(3) Serial number D/L must be conformed when it is produced
in production line, because serial number D/L is mandatory
by D-book 4.0.
4.3.2. LAN inspection solution * Manual Download (Model Name and Serial Number)
▪ LAN Port connection with PCB If the TV set is downloaded by OTA or service man, sometimes
▪ Network setting at MENU Mode of TV (Installer Menu -> 119 model name or serial number is initialized.(Not always)
-> 253 -> Menu) It is impossible to download by bar code scan, so It need
▪ setting automatic IP Manual download.
▪ Setting state confirmation 1) Press the "Instart" key of Adjustment remote control.
- If automatic setting is finished, you confirm IP and MAC 2) Go to the menu "16.Model Number D/L" like below photo.
Address. 3) Input the Factory model name or Serial number like photo.
4) Check the model name Instart menu. → Factory name
displayed.
5) Check the Diagnostics.(DTV country only) → Buyer model
displayed.
4.6. EDID Download

4.6.1 Overview
▪ I t is a VESA regulation. A PC or a MNT will display an
optimal resolution through information sharing without any
necessity of user input. It is a realization of “Plug and Play”.
4.6.2 Equipment
▪ Since embedded EDID data is used, EDID download JIG,
HDMI cable and D-sub cable are not need.
▪ Adjust remocon
4.6.3. EDID DATA 4.4.3.2. 2D_8bit_PCM(US) _ xvYCC : off (For Direct TV)
4.6.3.1. 22D_8bit_PCM(US) _ xvYCC : off HDMI EDID 2D_8bit_PCM(US)_xvYCC : off
͑
HDMI EDID 2D_8bit_PCM(US)_xvYCC
͑
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͡Ωͥ͑͡ ͥͦ͑ ͑͡͡ ͥ͑͡ ͩͥ͑ ͧͤ͑ ͑͡͡ ͑͡͡ ͢Ͷ͑ ͧͧ͑ ͣ͑͢ ͦ͑͡ ͳ͑͡ ͦ͑͢ ͑͡͡ ͢ͳ͑ ͤ͑͡
͡Ωͤ͑͡ ͑͢͡ ͑͢͡ ͑͢͡ ͑͢͡ ͑͢͡ ͑͢͡ ͣ͑͡ ͤͲ͑ ͩ͑͡ ͩ͑͢ ͨ͑͢ ͤͩ͑ ͣ͵͑ ͥ͑͡ ͦͩ͑ ͣʹ͑
͡Ωͦ͑͡ ͥ͑͡ ͨ͑͡ ͤͧ͑ ͑͡͡ ͥ͑͡ ͩͥ͑ ͧͤ͑ ͑͡͡ ͑͡͡ ͢Ͷ͑ ͑͡͡ ͑͡͡ ͑͡͡ ͷ͵͑ ͑͡͡ ͤͲ͑
͡Ωͥ͑͡ ͥͦ͑ ͑͡͡ ͥ͑͡ ͩͥ͑ ͧͤ͑ ͑͡͡ ͑͡͡ ͢Ͷ͑ ͧͧ͑ ͣ͑͢ ͦ͑͡ ͳ͑͡ ͦ͑͢ ͑͡͡ ͢ͳ͑ ͤ͑͡
͡Ωͧ͑͡ ͤͶ͑ ͢Ͷ͑ ͦͤ͑ ͑͢͡ ͑͡͡ ͡Ͳ͑ ͣ͑͡ ͣ͑͡ ͣ͑͡ ͣ͑͡ ͣ͑͡ ͣ͑͡ ᐖ͑
͡Ωͦ͑͡ ͥ͑͡ ͨ͑͡ ͤͧ͑ ͑͡͡ ͥ͑͡ ͩͥ͑ ͧͤ͑ ͑͡͡ ͑͡͡ ͢Ͷ͑ ͑͡͡ ͑͡͡ ͑͡͡ ͷ͵͑ ͑͡͡ ͤͲ͑
͡Ωͨ͑͡ ᐖ͑ ͑͢͡ ᐗ͑͢
͡Ωͧ͑͡ ͤͶ͑ ͢Ͷ͑ ͦͤ͑ ͑͢͡ ͑͡͡ ͡Ͳ͑ ͣ͑͡ ͣ͑͡ ͣ͑͡ ͣ͑͡ ͣ͑͡ ͣ͑͡ ᐖ͑
͡Ω͑͡͡ ͣ͑͡ ͤ͑͡ ͢͵͑ ͷ͑͢ ͥͩ͑ ͪ͑͡ ͣͣ͑ ͣ͑͡ ͦ͑͡ ͥ͑͡ ͤ͑͡ ͣ͑͡ ͑͢͡ ͣͤ͑ ͪ͑͡ ͦͨ͑
͡Ωͨ͑͡ ᐖ͑ ͑͢͡ ᐗ͑͢
͡Ω͑͢͡ ͨ͑͡ ᐘ͑ Ͷͤ͑ ͦ͑͡ ͑͡͡ ͑͡͡ ͣ͑͡ ͤͲ͑ ͩ͑͡
͡Ω͑͡͡ ͣ͑͡ ͤ͑͡ ͢͵͑ ͷ͑͢ ͥͩ͑ ͪ͑͡ ͣͣ͑ ͣ͑͡ ͦ͑͡ ͥ͑͡ ͤ͑͡ ͣ͑͡ ͑͢͡ ͣͤ͑ ͪ͑͡ ͦͨ͑
͡Ωͣ͑͡ ͩ͑͢ ͨ͑͢ ͤͩ͑ ͣ͵͑ ͥ͑͡ ͦͩ͑ ͣʹ͑ ͥ͑͡ ͦ͑͡ Ͳ͑͡ ͦͲ͑ ͑͡͡ ͑͡͡ ͑͡͡ ͢Ͷ͑ ͑͢͡
͡Ω͑͢͡ ͨ͑͡ ᐘ͑ Ͷͤ͑ ͦ͑͡ ͑͡͡ ͑͡͡ ͣ͑͡ ͤͲ͑ ͩ͑͡
͡Ωͤ͑͡ ͢͵͑ ͩ͑͡ ͩ͑͢ ͨ͑͢ ͢ʹ͑ ͧ͑͢ ͣ͑͡ ͦͩ͑ ͣʹ͑ ͣͦ͑ ͑͡͡ ͥ͑͡ ͩͥ͑ ͧͤ͑ ͑͡͡ ͑͡͡
͡Ωͣ͑͡ ͩ͑͢ ͨ͑͢ ͤͩ͑ ͣ͵͑ ͥ͑͡ ͦͩ͑ ͣʹ͑ ͥ͑͡ ͦ͑͡ Ͳ͑͡ ͦͲ͑ ͑͡͡ ͑͡͡ ͑͡͡ ͢Ͷ͑ ͑͢͡
͡Ωͥ͑͡ ͪͶ͑ ͑͢͡ ͢͵͑ ͑͡͡ ͨͣ͑ ͦ͑͢ ͵͑͡ ͢Ͷ͑ ͣ͑͡ ͧͶ͑ ͣͩ͑ ͦͦ͑ ͑͡͡ ͥ͑͡ ͩͥ͑ ͧͤ͑
͡Ωͤ͑͡ ͢͵͑ ͩ͑͡ ͩ͑͢ ͨ͑͢ ͢ʹ͑ ͧ͑͢ ͣ͑͡ ͦͩ͑ ͣʹ͑ ͣͦ͑ ͑͡͡ ͥ͑͡ ͩͥ͑ ͧͤ͑ ͑͡͡ ͑͡͡
͡Ωͦ͑͡ ͑͡͡ ͑͡͡ ͢Ͷ͑ ͩʹ͑ ͡Ͳ͑ ͵͑͡ ͩͲ͑ ͣ͑͡ Ͷ͑͡ ͣ͵͑ ͑͢͡ ͑͢͡ ͤͶ͑ ͪͧ͑ ͑͡͡ ͥ͑͡
͡Ωͥ͑͡ ͪͶ͑ ͑͢͡ ͢͵͑ ͑͡͡ ͨͣ͑ ͦ͑͢ ͵͑͡ ͢Ͷ͑ ͣ͑͡ ͧͶ͑ ͣͩ͑ ͦͦ͑ ͑͡͡ ͥ͑͡ ͩͥ͑ ͧͤ͑
͡Ωͧ͑͡ ͩͥ͑ ͧͤ͑ ͑͡͡ ͑͡͡ ͩ͑͢ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡
͡Ωͦ͑͡ ͑͡͡ ͑͡͡ ͢Ͷ͑ ͩʹ͑ ͡Ͳ͑ ͵͑͡ ͩͲ͑ ͣ͑͡ Ͷ͑͡ ͣ͵͑ ͑͢͡ ͑͢͡ ͤͶ͑ ͪͧ͑ ͑͡͡ ͥ͑͡
͡Ωͨ͑͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ᐗͣ͑
͡Ωͧ͑͡ ͩͥ͑ ͧͤ͑ ͑͡͡ ͑͡͡ ͩ͑͢ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡
͡Ωͨ͑͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ᐗͣ͑
▪ Reference
▪ Reference - HDMI1 ~ HDMI3
- HDMI1 ~ HDMI3 - In the data of EDID, bellows may be different by S/W or Input
- In the data of EDID, bellows may be different by S/W or Input mode.
mode.
ⓐ Product ID
ⓐ Product ID HEX EDID Table DDC Function
HEX EDID Table DDC Function 0001 0100 Analog
0001 0100 Analog 0001 0100 Digital
0001 0100 Digital
ⓑ Serial No: Controlled on production line.
ⓑ Serial No: Controlled on production line. ⓒ Month, Year: Controlled on production line:
ⓒ Month, Year: Controlled on production line: ex) Monthly : ‘01’ -> ‘01’
(ex) Monthly : ‘01’ -> ‘01’ Year : ‘2015’ -> ‘19’
Year : ‘2015’ -> ‘19’ ⓓ Model Name(Hex): LGTV
ⓓ Model Name(Hex): LGTV Chassis MODEL NAME(HEX)
Chassis MODEL NAME(HEX) LA5GG 00 00 00 FC 00 4C 47 20 54 56 20 52 56 55 0A 20 20 20
LA5GG/J 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
ⓔ Checksum(LG TV): Changeable by total EDID data.
ⓔ Checksum(LG TV): Changeable by total EDID data. ⓔ1 ⓔ2 ⓔ3
ⓔ1 ⓔ2 ⓔ3 HDMI1 49 E0 X
HDMI1 E6 E0 X HDMI2 49 D0 X
HDMI2 E6 D0 X HDMI3 49 C0 X
HDMI3 E6 C0 X
ⓕ Vendor Specific(HDMI)
ⓕ Vendor Specific(HDMI) INPUT MODEL NAME(HEX)
INPUT MODEL NAME(HEX) HDMI1 67 03 0C 00 10 00 80 1E
HDMI1 67 03 0C 00 10 00 80 1E HDMI2 67 03 0C 00 20 00 80 1E
HDMI2 67 03 0C 00 20 00 80 1E HDMI3 67 03 0C 00 30 00 80 1E
HDMI3 67 03 0C 00 30 00 80 1E
Copyright © LG Electronics. Inc. All rights reserved. - 10 - LGE Internal Use Only
4.4.3.3. 2D_10bit_PCM(US) _ xvYCC : off 4.4.3.4. 2D_10bit_PCM(US) _ xvYCC : off (For Direct TV)
HDMI EDID 2D_10bit_PCM(US)_xvYCC : off HDMI EDID 2D_10bit_PCM(US)_xvYCC : off
͑ ͑
͑ ͡Ω͑͡͡ ͡Ω͑͢͡ ͡Ωͣ͑͡ ͡Ωͤ͑͡ ͡Ωͥ͑͡ ͡Ωͦ͑͡ ͡Ωͧ͑͡ ͡Ωͨ͑͡ ͡Ωͩ͑͡ ͡Ωͪ͑͡ ͡Ω͡Ͳ͑ ͡Ω͡ͳ͑ ͡Ω͡ʹ͑ ͡Ω͡͵͑ ͡Ω͡Ͷ͑ ͡Ω͡ͷ͑ ͑ ͡Ω͑͡͡ ͡Ω͑͢͡ ͡Ωͣ͑͡ ͡Ωͤ͑͡ ͡Ωͥ͑͡ ͡Ωͦ͑͡ ͡Ωͧ͑͡ ͡Ωͨ͑͡ ͡Ωͩ͑͡ ͡Ωͪ͑͡ ͡Ω͡Ͳ͑ ͡Ω͡ͳ͑ ͡Ω͡ʹ͑ ͡Ω͡͵͑ ͡Ω͡Ͷ͑ ͡Ω͡ͷ͑
͡Ω͑͡͡ ͑͡͡ ͷͷ͑ ͷͷ͑ ͷͷ͑ ͷͷ͑ ͷͷ͑ ͷͷ͑ ͑͡͡ ͢Ͷ͑ ͧ͵͑ ᐓ͑ ᐔ͑ ͡Ω͑͡͡ ͑͡͡ ͷͷ͑ ͷͷ͑ ͷͷ͑ ͷͷ͑ ͷͷ͑ ͷͷ͑ ͑͡͡ ͢Ͷ͑ ͧ͵͑ ᐓ͑ ᐔ͑
͡Ω͑͢͡ ᐕ͑ ͑͢͡ ͤ͑͡ ͩ͑͡ Ͳ͑͡ ͦͲ͑ ͨͩ͑ ͡Ͳ͑ ͶͶ͑ ͪ͑͢ Ͳͤ͑ ͦͥ͑ ͥʹ͑ ͪͪ͑ ͣͧ͑ ͡Ω͑͢͡ ᐕ͑ ͑͢͡ ͤ͑͡ ͩ͑͡ Ͳ͑͡ ͦͲ͑ ͨͩ͑ ͡Ͳ͑ ͶͶ͑ ͪ͑͢ Ͳͤ͑ ͦͥ͑ ͥʹ͑ ͪͪ͑ ͣͧ͑
͡Ωͣ͑͡ ͡ͷ͑ ͦ͑͡ ͦͥ͑ Ͳ͑͢ ͩ͑͡ ͑͡͡ ͤ͑͢ ͥ͑͡ ͥͦ͑ ͥ͑͡ ͧ͑͢ ͥ͑͡ ͨ͑͢ ͥ͑͡ ͩ͑͢ ͩ͑͡ ͡Ωͣ͑͡ ͡ͷ͑ ͦ͑͡ ͦͥ͑ Ͳ͑͢ ͩ͑͡ ͑͡͡ ͤ͑͢ ͥ͑͡ ͥͦ͑ ͥ͑͡ ͧ͑͢ ͥ͑͡ ͨ͑͢ ͥ͑͡ ͩ͑͢ ͩ͑͡
͡Ωͤ͑͡ ͑͢͡ ͑͢͡ ͑͢͡ ͑͢͡ ͑͢͡ ͑͢͡ ͣ͑͡ ͤͲ͑ ͩ͑͡ ͩ͑͢ ͨ͑͢ ͤͩ͑ ͣ͵͑ ͥ͑͡ ͦͩ͑ ͣʹ͑ ͡Ωͤ͑͡ ͑͢͡ ͑͢͡ ͑͢͡ ͑͢͡ ͑͢͡ ͑͢͡ ͣ͑͡ ͤͲ͑ ͩ͑͡ ͩ͑͢ ͨ͑͢ ͤͩ͑ ͣ͵͑ ͥ͑͡ ͦͩ͑ ͣʹ͑
͡Ωͥ͑͡ ͥͦ͑ ͑͡͡ ͥ͑͡ ͩͥ͑ ͧͤ͑ ͑͡͡ ͑͡͡ ͢Ͷ͑ ͧͧ͑ ͣ͑͢ ͦ͑͡ ͳ͑͡ ͦ͑͢ ͑͡͡ ͢ͳ͑ ͤ͑͡ ͡Ωͥ͑͡ ͥͦ͑ ͑͡͡ ͥ͑͡ ͩͥ͑ ͧͤ͑ ͑͡͡ ͑͡͡ ͢Ͷ͑ ͧͧ͑ ͣ͑͢ ͦ͑͡ ͳ͑͡ ͦ͑͢ ͑͡͡ ͢ͳ͑ ͤ͑͡
͡Ωͦ͑͡ ͥ͑͡ ͨ͑͡ ͤͧ͑ ͑͡͡ ͥ͑͡ ͩͥ͑ ͧͤ͑ ͑͡͡ ͑͡͡ ͢Ͷ͑ ͑͡͡ ͑͡͡ ͑͡͡ ͷ͵͑ ͑͡͡ ͤͲ͑ ͡Ωͦ͑͡ ͥ͑͡ ͨ͑͡ ͤͧ͑ ͑͡͡ ͥ͑͡ ͩͥ͑ ͧͤ͑ ͑͡͡ ͑͡͡ ͢Ͷ͑ ͑͡͡ ͑͡͡ ͑͡͡ ͷ͵͑ ͑͡͡ ͤͲ͑
͡Ωͧ͑͡ ͤͶ͑ ͢Ͷ͑ ͦͤ͑ ͑͢͡ ͑͡͡ ͡Ͳ͑ ͣ͑͡ ͣ͑͡ ͣ͑͡ ͣ͑͡ ͣ͑͡ ͣ͑͡ ᐖ͑ ͡Ωͧ͑͡ ͤͶ͑ ͢Ͷ͑ ͦͤ͑ ͑͢͡ ͑͡͡ ͡Ͳ͑ ͣ͑͡ ͣ͑͡ ͣ͑͡ ͣ͑͡ ͣ͑͡ ͣ͑͡ ᐖ͑
͡Ωͨ͑͡ ᐖ͑ ͑͢͡ ᐗ͑͢ ͡Ωͨ͑͡ ᐖ͑ ͑͢͡ ᐗ͑͢
͡Ω͑͡͡ ͣ͑͡ ͤ͑͡ ͢͵͑ ͷ͑͢ ͥͩ͑ ͪ͑͡ ͣͣ͑ ͣ͑͡ ͦ͑͡ ͥ͑͡ ͤ͑͡ ͣ͑͡ ͑͢͡ ͣͤ͑ ͪ͑͡ ͦͨ͑ ͡Ω͑͡͡ ͣ͑͡ ͤ͑͡ ͢͵͑ ͷ͑͢ ͥͩ͑ ͪ͑͡ ͣͣ͑ ͣ͑͡ ͦ͑͡ ͥ͑͡ ͤ͑͡ ͣ͑͡ ͑͢͡ ͣͤ͑ ͪ͑͡ ͦͨ͑
͡Ω͑͢͡ ͨ͑͡ ᐘ͑ Ͷͤ͑ ͦ͑͡ ͑͡͡ ͑͡͡ ͣ͑͡ ͤͲ͑ ͩ͑͡ ͡Ω͑͢͡ ͨ͑͡ ᐘ͑ Ͷͤ͑ ͦ͑͡ ͑͡͡ ͑͡͡ ͣ͑͡ ͤͲ͑ ͩ͑͡
͡Ωͣ͑͡ ͩ͑͢ ͨ͑͢ ͤͩ͑ ͣ͵͑ ͥ͑͡ ͦͩ͑ ͣʹ͑ ͥ͑͡ ͦ͑͡ Ͳ͑͡ ͦͲ͑ ͑͡͡ ͑͡͡ ͑͡͡ ͢Ͷ͑ ͑͢͡ ͡Ωͣ͑͡ ͩ͑͢ ͨ͑͢ ͤͩ͑ ͣ͵͑ ͥ͑͡ ͦͩ͑ ͣʹ͑ ͥ͑͡ ͦ͑͡ Ͳ͑͡ ͦͲ͑ ͑͡͡ ͑͡͡ ͑͡͡ ͢Ͷ͑ ͑͢͡
͡Ωͤ͑͡ ͢͵͑ ͩ͑͡ ͩ͑͢ ͨ͑͢ ͢ʹ͑ ͧ͑͢ ͣ͑͡ ͦͩ͑ ͣʹ͑ ͣͦ͑ ͑͡͡ ͥ͑͡ ͩͥ͑ ͧͤ͑ ͑͡͡ ͑͡͡ ͡Ωͤ͑͡ ͢͵͑ ͩ͑͡ ͩ͑͢ ͨ͑͢ ͢ʹ͑ ͧ͑͢ ͣ͑͡ ͦͩ͑ ͣʹ͑ ͣͦ͑ ͑͡͡ ͥ͑͡ ͩͥ͑ ͧͤ͑ ͑͡͡ ͑͡͡
͡Ωͥ͑͡ ͪͶ͑ ͑͢͡ ͢͵͑ ͑͡͡ ͨͣ͑ ͦ͑͢ ͵͑͡ ͢Ͷ͑ ͣ͑͡ ͧͶ͑ ͣͩ͑ ͦͦ͑ ͑͡͡ ͥ͑͡ ͩͥ͑ ͧͤ͑ ͡Ωͥ͑͡ ͪͶ͑ ͑͢͡ ͢͵͑ ͑͡͡ ͨͣ͑ ͦ͑͢ ͵͑͡ ͢Ͷ͑ ͣ͑͡ ͧͶ͑ ͣͩ͑ ͦͦ͑ ͑͡͡ ͥ͑͡ ͩͥ͑ ͧͤ͑
͡Ωͦ͑͡ ͑͡͡ ͑͡͡ ͢Ͷ͑ ͩʹ͑ ͡Ͳ͑ ͵͑͡ ͩͲ͑ ͣ͑͡ Ͷ͑͡ ͣ͵͑ ͑͢͡ ͑͢͡ ͤͶ͑ ͪͧ͑ ͑͡͡ ͥ͑͡ ͡Ωͦ͑͡ ͑͡͡ ͑͡͡ ͢Ͷ͑ ͩʹ͑ ͡Ͳ͑ ͵͑͡ ͩͲ͑ ͣ͑͡ Ͷ͑͡ ͣ͵͑ ͑͢͡ ͑͢͡ ͤͶ͑ ͪͧ͑ ͑͡͡ ͥ͑͡
͡Ωͧ͑͡ ͩͥ͑ ͧͤ͑ ͑͡͡ ͑͡͡ ͩ͑͢ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͡Ωͧ͑͡ ͩͥ͑ ͧͤ͑ ͑͡͡ ͑͡͡ ͩ͑͢ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡
͡Ωͨ͑͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ᐗͣ͑ ͡Ωͨ͑͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ͑͡͡ ᐗͣ͑
▪ Reference ▪Reference
- HDMI1 ~ HDMI3 - HDMI1 ~ HDMI3
- In the data of EDID, bellows may be different by S/W or Input - In the data of EDID, bellows may be different by S/W or Input
mode. mode.
ⓐ Product ID ⓐ Product ID
HEX EDID Table DDC Function HEX EDID Table DDC Function
0001 0100 Analog 0001 0100 Analog
0001 0100 Digital 0001 0100 Digital
ⓑ Serial No: Controlled on production line. ⓑ Serial No: Controlled on production line.
ⓒ Month, Year: Controlled on production line: ⓒ Month, Year: Controlled on production line:
ex) Monthly : ‘01’ -> ‘01’ ex) Monthly : ‘01’ -> ‘01’
Year : ‘2015’ -> ‘19’ Year : ‘2015’ -> ‘19’
ⓓ Model Name(Hex): LGTV ⓓ Model Name(Hex): LGTV
Chassis MODEL NAME(HEX) Chassis MODEL NAME(HEX)
LA5GG/J 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 LA5GG 00 00 00 FC 00 4C 47 20 54 56 20 52 56 55 0A 20 20 20
ⓔ Checksum(LG TV): Changeable by total EDID data. ⓔ Checksum(LG TV): Changeable by total EDID data.
ⓔ1 ⓔ2 ⓔ3 ⓔ1 ⓔ2 ⓔ3
HDMI1 E6 99 X HDMI1 49 99 X
ⓕ Vendor Specific(HDMI) ⓕ Vendor Specific(HDMI)

INPUT MODEL NAME(HEX) INPUT MODEL NAME(HEX)
HDMI1 67 03 0C 00 10 00 B8 2D HDMI1 67 03 0C 00 10 00 B8 2D
HDMI2 67 03 0C 00 20 00 B8 2D HDMI2 67 03 0C 00 20 00 B8 2D
HDMI3 67 03 0C 00 30 00 B8 2D HDMI3 67 03 0C 00 30 00 B8 2D
5. Final Assembly Adjustment 5.1.4. Adjustment Command (Protocol)
(1) RS-232C Command used during auto-adj.
5.1. White Balance Adjustment
RS-232C COMMAND
5.1.1. Overview Explanation
5.1.1.1. W/B adj. Objective & How-it-works CMD DATA ID
(1) Objective: To reduce each Panel’s W/B deviation Wb 00 00 Begin White Balance adj.
(2) How-it-works: When R/G/B gain in the OSD is at 192, it
means the panel is at its Full Dynamic Range. In order to Wb 00 ff End White Balance adj.
prevent saturation of Full Dynamic range and data, one of (internal pattern disappears )
R/G/B is fixed at 192, and the other two is lowered to find
the desired value. (2) Adjustment Map
(3) Adj. condition: normal temperature Adj. item Command Data Range Default
- Surrounding Temperature: 25±5 °C (lower (Hex.) (Decimal)
- Warm-up time: About 5 Min caseASCII)
- Surrounding Humidity: 20% ~ 80% CMD1 CMD2 MIN MAX
- Before White balance adjustment, Keep power on status,
don’t power off Cool R Gain j g 00 C0 TBD
G Gain j h 00 C0 TBD
5.1.1.2. Adj. condition and cautionary items B Gain j i 00 C0 TBD
(1) Lighting condition in surrounding area surrounding lighting
should be lower 10 lux. Try to isolate adj. area into dark R Cut TBD
surrounding. G Cut TBD
(2) Probe location: Color Analyzer (CA-210) probe should be
B Cut TBD
within 10cm and perpendicular of the module surface
(80°~ 100°) Medium R Gain j a 00 C0 TBD
(3) Aging time G Gain j b 00 C0 TBD
- After Aging Start, Keep the Power ON status during 5
B Gain j c 00 C0 TBD
Minutes.
- In case of LCD, Back-light on should be checked using no R Cut TBD
signal or Full-white pattern. G Cut TBD
B Cut TBD
5.1.2. Equipment Warm R Gain j d 00 C0 TBD
(1) Color Analyzer: CA-210 (NCG: CH 9 / WCG: CH12 / LED:
CH14) G Gain j e 00 C0 TBD
(2) A dj. Computer (During auto adj., RS-232C protocol is B Gain j f 00 C0 TBD
needed)
R Cut TBD
(3) Adjust Remocon
(4) V ideo Signal Generator MSPG-925F 720p/204-Gray G Cut TBD
(Model: 217, Pattern: 49)
※ Color Analyzer Matrix should be calibrated using CS-1000 5.1.5. Adjustment method
5.1.5.1. Auto WB calibration
5.1.3. Equipment connection (1) Set TV in ADJ mode using P-ONLY key (or POWER ON
key)
Co lo r Analyzer (2) Place optical probe on the center of the display
Probe RS -232C - It need to check probe condition of zero calibration before
adjustment.
Co m p ut er
(3) Connect RS-232C Cable
RS -232C
RS -232C (4) Select mode in ADJ Program and begin a adjustment.
Pat t ern Generat o r (5) When WB adjustment is completed with OK message,
Signal Source
check adjustment status of pre-set mode (Cool, Medium,
Warm)
* If TV internal pattern is used, not needed (6) Remove probe and RS-232C cable.
▪ W/B Adj. must begin as start command “wb 00 00” , and
finish as end command “wb 00 ff”, and Adj. offset if need
5.1.5.2. Manual adjustment ▪ S tandard color coordinate and temperature using
(1) Set TV in Adj. mode using POWER ON CA-210(CH-14) – by aging time
(2) Zero Calibrate the probe of Color Analyzer, then place it on (2) Normal line (From March to December) : LGD
the center of LCD module within 10cm of the surface.. Cool Medium Warm
(3) Press ADJ key -> EZ adjust using adj. R/C à 9. White- Aging time
Balance then press the cursor to the right (KEY►). When X Y X Y X Y
(Min)
KEY(►) is pressed 206 Gray internal pattern will be 271 270 286 289 313 329
displayed.
1 0-2 282 289 297 308 324 348
(4) Adjust Cool modes
(i) F ix the one of R/G/B gain to 192 (default data) and 2 3-5 281 287 296 306 323 346
decrease the others. 3 6-9 279 284 294 303 321 343
(If G gain is adjusted over 172 and R and B gain less than
4 10-19 277 280 292 299 319 339
192 , Adjust is O.K.)
(ii) If G gain is less than 172, 5 20-35 275 277 290 296 317 336
Increase G gain by up to 172, and then increase R gain and 6 36-49 274 274 289 293 316 333
G gain same amount of increasing G gain.
7 50-79 273 272 288 291 315 331
(iii) If R gain or B gain is over 255,
Readjust G gain less than 172, Conform to R gain is 255 or 8 80-119 272 271 287 290 314 330
B gain is 255 9 Over 120 271 270 286 289 313 329
(5) Adjust two modes (Medium / Warm) Fix the one of R/G/B
gain to 192 (default data) and decrease the others. ▪ Standard color coordinate and temperature using CA-210(CH
(6) Adj. is completed, Exit adjust mode using “EXIT” key on 14)
Remote controller. O/S Module (AUO, INX, Sharp, CSOT, BOE)
▪ If internal pattern is not available, use RF input. In EZ Adj.
menu. 6.White Balance, you can select one of 2 Test-pattern: cool med warm
ON, OFF. Default is inner (ON). By selecting OFF, you can x y x y x y
adjust using RF signal in 206 Gray pattern. spec 271 270 286 289 313 329
target 278 280 293 299 320 339
5.1.6. Reference (White Balance Adj. coordinate and
color temperature)
▪ Luminance: 204 Gray, 80IRE 5.2. Tool Option setting & Inspection per
▪ Standard color coordinate and temperature using CS-1000 countries
(over 26 inch)
5.2.1. Overview
Coordinate (1) Tool option selection is only done for models in Non-USA
Mode Temp △uv
X Y North America due to rating
(2) Applied model: LA46H Chassis applied to CANADA and
Cool 0.271 0.270 13,000K 0.0000
MEXICO
Medium 0.286 0.289 9,300K 0.0000
Warm 0.313 0.329 6,500K 0.0000 5.2.2. Country Group selection
(1) Press ADJ key on the Adj. R/C, and then select Country
▪ S tandard color coordinate and temperature using Group Menu
CA-210(CH-14) – by aging time (2) Depending on destination, select US, then on the lower
(1) Normal line (From January to February) LGD Country option, select US, CA, MX.
Cool Medium Warm Selection is done using +, - KEY
Aging time
X Y X Y X Y
(Min)
271 270 286 289 313 329
5.2.3. Tool Option inspection
▪ Press Adj. key on the Adj. R/C, then select Tool option
1 0-2 286 295 301 314 328 354 * Tool option can be reconstructed by Software
2 3-5 284 290 299 309 326 349
3 6-9 282 287 297 306 324 346
4 10-19 279 283 294 302 321 342
5 20-35 276 278 291 297 318 337
6 36-49 274 275 289 294 316 334
7 50-79 273 272 288 291 315 331
8 80-119 272 271 287 290 314 330
9 Over 120 271 270 286 289 313 329
5.3. Magic Motion remote controller Check 5.4. Wi-Fi Test
5.3.1. Test equipment (Step 1) Turn on TV
▪ R F-remote controller for check, IR-KEY-CODE remote (Step 2) Select Network Connection option in Network Menu.
controller. Installer menu -> 119 -> 253 -> Menu -> Network
▪ Check AA battery before test. A recommendation is that a
tester change battery every lots.
5.3.2. Test
(1) Make pairing with TV set by pressing “Start key(Wheel
key)” on RCU.
(2) Check a cursor on screen by pressing ‘Wheel key” of RCU
(3) Stop paring with TV set by pressing “Back+ Home” key of
RCU
5.3.3. Applied models

Chassis Model Name Magic RF receiver (Step 3) Select Start Connection Button in Network Setting ->
LA5GG 40LX770H-UA Built-in Wi-Fi Connection
43LX770H-UA
49LX770H-UA
55LX770H-UA
65LX770H-UA
LA5GJ 32LX770M-UA
43LX770M-UA
5.4. Wi-Fi MAC Address Check (Step 4) If the system finds any AP like below PIC, it is working
5.4.1. Using RS232 Command well.
Command Set ACK

Transmission [A][l][][Set ID][][20][Cr] [O][K][x] or [N][G]
5.4.2. Check the menu on in-start
5.5. HDMI ARC Function Inspection 6. Check Commercial features
5.5.1. Test equipment Model LX770H-UA LX770M-UA
- Optic Receiver Speaker
- MSHG-600 (SW: 1220 ↑) inch 40/43/49/55/65 32/43
- HDMI Cable (for 1.4 version) IR Out X X
DC Power Out (12V) X X
5.5.2. Test method
(1) Insert the HDMI Cable to the HDMI ARC port from the Ext SPK Out O O
master equipment (HDMI1) RJP (RJ-45 interface) O X
Pro:Idiom O O
b-LAN O O
6.1. External SPK Out
(2) Check the sound from the TV Set
(3) Check the Sound from the Speaker or using AV & Optic
TEST program (It’s connected to MSHG-600)
6.1.1. Equipment & Condition
▪ Jig (Speaker out JIG) or Oscilloscope
▪ Power only mode
6.1.2. Check the speaker out

(1) Connect the External Speaker : check the sound
Connect oscilloscope, you can see this waveform
* Remark: Inspect in Power Only Mode and check SW version

in a master equipment
6.2. RJP/MPI Check 6.4. b-LAN Main board Check
6.2.1. Initial setting Press the Still key of Adjust Remocon for checking MPI port in
(1) Select Power switch ( up ) as the picture Power Only Mode.
(2) Set the Switch No.5 to ON (up) as the picture (Display “b-LAN On” message.)
Others should be set to OFF (down)
6.4.1. Overview
6.2.2. Checking Guide It is LNET RF modem & FTG card
(1) Press the P-ONLY key of R/C
(2) Press the Exit key of R/C 6.4.2. Equipment
(3) Connect with the TV through RJP cable (wait for the JIG (1) b-LAN Checker: UTC-1000 (with Cable accessory)
on) (2) Computer(for test result monitoring)
(4) RJP Pin check is carried out automatically (3) Connection JIG
(5) The result is shown as below
(6) If RJP Pin check finished or you check other function, must 6.4.3. Equipment connection map & b-LAN Check
remove the RJP cable from TV
S/W switch direction: RJP <-->

MAIN ASSY make sure that the
insertion direction is right.
When checking the RJP(<-->)

be sure to use a direct cable.
6.3. Pro:Idiom Check

(1) Connect the RF Cable
(2) Turn to the Pro:Idiom channel (No. 96-1)
(3) Check the video & sound
** Only displayed at “POWER ONLY” mode
6.4.4. Check 7. AUDIO output check
6.4.4.1. Setting Procedure
(1) Setting JIG 7.1. Audio input condition
1) Connect UTC-1000 Equipment to JIG device as a like left (1) RF input: Mono, 1KHz sine wave signal, 100% Modulation
picture (2) CVBS, Component: 1KHz sine wave signal (0.4Vrms)
- Connection Line: 7.2. Specification

UTC-1000 TOP1 <--> Game port(RJ21)
Audio practical max Output, L/R
-> TV-LINK CFG (Phone Jack) Item
(Distortion=10% max Output)
UTC-1000 TOP2 -> JIG 11pin Connection
UTC-1000 RF1 <--> b-LAN RF IN 9.0 4.5
Min
UTC-1000 LAN <--> PC LAN Port 8.5 4.0
10.0 5.0
Typ
6.4.4.2. Working procedure 8.9 4.4
(1) Connection 12.0 6.0
UTC-1000 LAN <--> PC LAN Port Max
9.9 5.4
UTC-1000 TOP1 <--> Game port(RJ21)
W W
-> TV-LINK CFG (Phone Jack) Unit
Vrms Vrms
UTC-1000 RF1 <--> b-LAN RF IN
(2) Power on JIG : Switch on front of the JIG (1) Measurement condition
(3) Test Start - EQ/AVL/Clear Voice: Off
Remark (2) Speaker (6Ω Impedance)
UTC-1000 TOP2 <--> JIG 11pin Connection
(4) Checking b-LAN MAC Address ALL MODEL LX770M-UA ONLY
Check whether it is same their address numbers or not
between b-LAN Label and on the pc address numbers.
8. GND and HI-POT Test

8.1. GND & HI-POT auto-check preparation
(1) Check the POWER CABLE and SIGNAL CABE insertion
condition
8.2 GND & HI-POT auto-check

(1) Pallet moves in the station. (POWER CORD / AV CORD is
tightly inserted)
(2) Connect the AV JACK Tester.
(3) Controller (GWS103-4) on.
(4) GND Test (Auto)
* Checking JIG contents
- If Test is failed, Buzzer operates.
(1) Check whether displaying all “Pass” or not at the number
- If Test is passed, execute next process (Hi-pot test).
3.4.6.7.9 contents of UTC-1000 on the PC
(Remove A/V CORD from A/V JACK BOX)
(2) Check “Version 6.27” of the 1. b-LAN Application version
(5) HI-POT test (Auto)
(3) Check whether it is same their address numbers or not
- If Test is failed, Buzzer operates.
between b-LAN Label and
- If Test is passed, GOOD Lamp on and move to next
(4) MAC Address on the pc.
process automatically.
6.5. Ship-out mode check (In-stop) 8.2.2. Checkpoint

▪ after final inspection, press In-Stop key of the Adj. R/C and ▪ TEST voltage
check that the unit goes to Stand-by mode. - GND: 1.5 KV / min at 100 mA
- SIGNAL: 3 KV / min at 100 mA
▪ TEST time: 1 second
▪ TEST POINT
- G ND TEST = POWER CORD GND & SIGNAL CABLE
METAL GND
- Hi-pot TEST = POWER CORD GND & LIVE & NEUTRAL
▪ LEAKAGE CURRENT: At 0.5 mArms
9. PILLOW SPEAKER 11. Optional adjustments
9.1. Pillow speaker test method 11.1. Manual White balance Adjustment
(1) Connect pillow speaker on the pillow speaker jack 11.1.1. Adj. condition and cautionary items
(2) Press channel Up/Down, Volume Up/Down key (1) Lighting condition in surrounding area surrounding lighting
(3) If operate Pillow speaker Key, It is OK should be lower 10 lux. Try to isolate adj. area into dark
surrounding.
(2) Probe location: Color Analyzer (CA-210) probe should be
within 10cm and perpendicular of the module surface
(80°~ 100°)
(3) Aging time
i) After Aging Start, Keep the Power ON status during 5
Minutes.
ii) In case of LCD, Back-light on should be checked using no
signal or Full-white pattern.

11.1.2. Equipment
(1) Color Analyzer: CA-210 (NCG: CH 9 / WCG: CH12 / LED:
CH14)
(2) A dj. Computer (During auto adj., RS-232C protocol is
needed)
(3) Adjust Remocon
(4) V ideo Signal Generator MSPG-925F 720p/216-Gray
(Model: 217, Pattern: 78)
10. USB S/W Download(Service only)
(1) Put the USB Stick to the USB socket
(2) Automatically detecting update file in USB Stick 11.1.3. Adjustment
- If your downloaded program version in USB Stick is (1) Set TV in Adj. mode using POWER ON
Lower, it didn’t work. (2) Zero Calibrate the probe of Color Analyzer, then place it on
B ut your downloaded version is Higher, USB data is the center of LCD module within 10cm of the surface.
automatically detecting (Download Version High & Power (3) Press ADJ key -> EZ adjust using adj. R/C -> 6. White-
only mode, Set is automatically Download) Balance then press the cursor to the right (KEY►). When
(3) Show the message “Copying files from memory” KEY(►) is pressed 216 Gray internal pattern will be
displayed.
(4) One of R Gain / G Gain / B Gain should be fixed at 192,
and the rest will be lowered to meet the desired value.
(5) Adj. is performed in COOL, MEDIUM, WARM 3 modes of
color temperature.
▪ If internal pattern is not available, use RF input. In EZ Adj.

menu 6.White Balance, you can select one of 2 Test-pattern:
(4) Updating is starting. ON, OFF. Default is inner(ON). By selecting OFF, you can
adjust using RF signal in 216 Gray pattern.
(5) Updating Completed, the TV will restart automatically.

(6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage)
* If downloading version is more high than your TV have,
TV can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didn’t
have a DTV/ATV test on production line.
* After downloading, have to adjust Tool Option again.

(1) Push "IN-START" key in service remote control.
(2) Select "Tool Option 1" and push "OK" key.
(3) Punch in the number. (Each model has their number)
TROUBLE SHOOTING GUIDE
1. Power-Up Boot Fail Trouble Shooting guide
Check power connector and RL_ON
Check P2300/1 Voltage Level N Y Replace Power board
signal OK ?
(13.2V, L2303) (L2030, Pin 1)
Y
Check IC8701 N Check switch SW8700, SW8701

RESET and UPDATE pin
Check X8700 Clock N Check X8700 application circuit or

32.768KHz Replace X8700
Check IC8701 IIC N Check IIC line or replace IC8701

communication state
Check IR input state of IC8701 N Check IR board

57pin
Re-download PTC Micom
2. No OSD Trouble Shooting guide

Check P2300/1 Voltage Level N Check power connector and Y Replace Power board
(13.2V, L2303) RL_ON(pin1) signal OK ?
N Check Q2302 application circuit or

Check Q2302 output Voltage(13.2V) replace Q2302
N Replace Cable
Check LVDS Cable
Check LCD Module

Control board
3. Analog RF Video Trouble Shooting guide
Check RF cable & signal
YES
NO NO
Check TU8900 Pin5(Video output) Could you measure voltage of TU8900 & IIC lines? You should check power line
Can you see the normal signal? Are they all normal? & IIC lines.
YES
YES
You should replace TUNER.
NO
NO
Check tuner 5V power L8906 Check IC2304 Replace IC2304
YES
YES Replace L8906
NO
Check tuner 3.3V power L8904 Replace L8904
NO
Check tuner 1.8V power L8907 Replace L8907 or IC8900
YES
NO
Replace Main IC(IC101) or main
Check Mstar LVDS output
board
4. Digital RF Trouble Shooting guide
Y
Check RF Cable Replace L8906
N Check L8906 N
Check tuner 5V power L8906 Replace IC2304
Check IIC Signal N

Check IIC line and level shifter circuit
TU8900 #4, 12Pin
Check IF Signal N Check tuner application circuit or

TU8900 #6, 8, 16 Pin replace tuner.
Check X101 N Replace X101

and application circuit
Replace IC101
5. AV/Component Trouble Shooting guide
Check input signal is supported format
Check AC cable for damage or open

conductor
Check JK3402 N JK3402 may have problem.

Can you see the normal waveform? Replace this Jack.
This board has big problem because

Check the input of Main IC(IC101).
N Main chip (M14+) have some troubles.
Measure waveform at C3404, C3405,
After checking thoroughly all path once
C3406 because it’s more easy to check.
again, You should decide to replace
Can you see the normal waveform?
M14+ or not.
6. HDMI Video Trouble Shooting guide

Check input signal format.
Is it supported?
Check AC cable for damage

For damage or open conductor
Check JK3200/JK3202/JK3203 N JK3200/JK3202/JK3203 may have

Can you see the normal waveform? problem. Replace this Jack.
This board has big problem because

Main chip (M14+) have some troubles.
After checking thoroughly all path once
again, You should decide to replace
M14+ or not.
7. Analog RF Audio Trouble Shooting guide
Check RF Cable & Signal You should replace TUNER.
Y Y
Check TU8900 Pin2 (SIF Output) N Could you measure voltage of TU8900& IIC lines? N You should check power line & IIC lines.
Can you see the normal signal? Are they all normal?
Check Audio AMP output N

L5602,L5603,L5604,L5605 Replace L5602,L5603,L5604,L5605
N Replace IC5600
Check IC5600
After checking audio signal line, you should decide to replace item or not.
8. AV/Component Audio (in) Trouble shooting guide
Is it supported?

Check JK3402 N
Replace JK3402
Check the input of M14+(IC101).

Measure waveform at C3404, C3405, C3406 because it’s more easy to check.
Y

This board has big problem because Main chip (M14+) have some troubles.
After checking thoroughly all path once again, You should decide to replace M14+ or not.
9. HDMI Audio (in) Trouble shooting guide
Is it supported?

Check JK3200/JK3202/JK3203 N
Replace JK3200/JK3202/JK3203

This board has big problem because Main chip (M14+) have some troubles.
After checking thoroughly all path once again, You should decide to replace M14+ or not.
10. Audio out Trouble shooting guide
Check the output of Main IC(IC101). This board has big problem because Main chip
Measure waveform at IC5600(Pin7, 8, 10, 11, 14). N (M14+) have some troubles.
because it’s more easy to check. Can you see the After checking thoroughly all path once again,
normal signal? You should decide to replace M14+ or not.
Y
Check Audio AMP output

N After checking the Power & I2C & Reset of this chip,
L5503,L5504,L5505,L5506
you should decide to replace this or not.
Y
Check the speaker output wafer P5600. N After checking audio signal line, you should decide
Can you see the normal waveform? to replace item or not.
Check the connector & Speaker
Copyright ©
SYSTEM
DDR3 X 4 RF
EMMC 2Gb(2ea) SYSTEM
(4GB) 4Gb(2ea) EEPROM X 1
I2C
(256Kb)
USB2
b-LAN TV-LINK CFG

DIF
(Side) USB1 USB
Internal CVBS Demod. IF
Wi-Fi Combo
Demod. SIF Game Control /
MPI
(Side) HDMI3 IC101
HDMI
(Side, ARC) HDMI2 M14+
S/W
HDMI1
LG Electronics. Inc. All rights reserved.

HDCP
To Magic
g WOL PHY Ethernet
MICOM Realtek WOL Chip Data_TS
TS_MUX
LAN
Ethernet
- 27 -
Serial
Pro:idiom
AUX HUB IC Parellel
LAN Serial
Parellel
Y/Cb/Cr / CVBS
Component/ MPI / SPI
Audio L/R
Component /
Composite
BLOCK DIAGRAM
Service Only
Composite
UART S/W MICOM Upgrade
SPDIF SPDIF
(Tx/Rx) MICOM
Service
UART (Tx/Rx) CPU Upgrade
Ext. SPK Ext. Speaker R/L Ext SPK IR&Key

AMP
L/R OUT
Line Out MICOM
EEPROM X 1 RJP
(64Kb)
Audio
Speaker AMP LVDS
KPEJ
*\
KPEJ6*\
KPEJ6*\
LGE Internal Use Only

EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
910
900
400
120
521
121
540
800
810
530
500
502
820
LV1
570
* Stand Screw
A10
200
A2
LX770H-UA:webOS 2.0 JTAG_SOC_RESET
IC101
+3.3V_NORMAL LG1311-C1
EAX66791501:LA5GG R123
10K XTAL_IN
B23
A23
XIN_MAIN USB2_0_DP0
AN9
AM9
WIFI_DP
XTAL_OUT XO_MAIN USB2_0_DM0 WIFI_DM
AN8
USB2_0_TXRTUNE
R124 100 AG21 1% 200 R171
PORES_N
H32
C Q100 USB2_1_DP0 USB_DP3
MMBT3904(NXP) AJ18 J31
R122 10K B BOOT_MODE BOOT_MODE USB2_1_DM0 USB_DM3
SOC_RESET H33
R121 USB2_1_TXRTUNE
AB8 1% 200 R172
33K PLLSET0 PLLSET0
E AC8 N31
OPT PLLSET1
PLLSET1 USB3_DP0
N32
System Configuration R125 OPT
OPM0
AD8
OPM0
USB3_DM0
USB3_TXP0
P33
AE8 P32
C108 OPM1 OPM1 USB3_TXM0
M32
0.1uF USB3_RXP0
16V AR101
IC103-*2 IC103-*1 33 Y7 M33
BR24G256FJ-3 M24256-BRMN6TP
L/DIM0_VS USB3_RXM0
Clock for M14+ NVRAM A0
1 8
VCC E0
1 8
VCC L/DIM0_SCLK
Y6
W7
L_VSOUT_LD/TRST0_N
DIM0_SCLK/TMS0 USB3_RESREF0
P31
MAIN Clock(24Mhz) A1 WP E1 WC
TCK0 W6
DIM1_SCLK/TCK0
K33
2 7 2 7
TDI0 R178 33 W5
DIM1_MOSI/TDI0 USB3_DP1
K32
USB_DP2
X-TAL_1
A2 SCL E2 SCL
3 6 3 6
L/DIM0_MOSI DIM0_MOSI/TDO0 USB3_DM1 USB_DM2
GND_1
L32
C101 10pF XTAL_IN IC103 +3.3V_NORMAL GND
4 5
SDA VSS
4 5
SDA USB3_TXP1
AG30 L31
AT24C256C-SSHL-T SPI_CS0 USB3_TXM1
AG28 K31
NVRAM_ST SPI_SCLK0 USB3_RXP1
2
R118
NVRAM_ROHM AG29 J32

24MHz
X101
1M
A0 VCC SPI_DO0 USB3_RXM1

1 8 AH29 M31
C107 Write Protection TRST_N1 SPI_DI0/TRST1_N USB3_RESREF1
0.1uF AJ27 1% 200 R174
3
R180
A1
2 7
WP
16V - Low : Normal Operation
IRB_SPI_SS/TMS1 AH27
SPI_CS1/TMS1
W28
X-TAL_2
GND_2
C102 10pF 560 AR105 - High : Write Protection IRB_SPI_CK/TCK1 SPI_SCLK1/TCK1 HUB_PORT_OVER0
XTAL_OUT 33
AG26 W29
A2
3 6
SCL
IRB_SPI_MOSI/TDO1 AH26
SPI_DO1/TDO1 HUB_VBUS_CTRL0
I2C_SCL5 IRB_SPI_MISO/TDI1 SPI_DI1/TDI1
H28
GND SDA I2C_SDA5 EB_CS3 /USB_OCD2
4 5 FORCED_JTAG_0 R182 OPT AJ12 J30
R183 10K AJ13
EXT_INTR0 EB_CS2
J28
USB_CTL2
System Clock for Analog block(24Mhz)
R184 10K AH12
EXT_INTR1 EB_CS1
J29
/USB_OCD3
NVRAM_ATMEL
R185 10K AG12
EXT_INTR2 EB_CS0 USB_CTL3
EXT_INTR3
G30
AH23
EB_WE_N
F30
EB_WE_N
SOC_RX AG22
UART0_RXD EB_OE_N
H29
EB_OE_N
SOC_TX AH7
UART0_TXD EB_WAIT
G29
M_REMOTE_RX AJ7
UART1_RXD EB_BE_N1
G28
EB_BE_N1
PLL SET[1:0] : internal pull up M_REMOTE_TX UART1_TXD EB_BE_N0 EB_BE_N0
"00" : CPU(1200Mhz),M0 / M1 DDR(792,792 Mhz)
"01" : CPU(1056Mhz),M0 / M1 DDR(672,672 Mhz) AG8 P28
"10" : CPU(1056Mhz),M0 / M1 DDR(792,792 Mhz) AH8
UART1_RTS_N CAM_CD1_N
P27
CAM_CD1_N
"11" : CPU( 960Mhz),M0 / M1 DDR(792,792 Mhz) UART1_CTS_N CAM_CD2_N
U28
CAM_CD2_N
AH11
CAM_CE1_N
R29
/PCM_CE1
I2C_SCL1 AG11
SCL0 CAM_CE2_N
V27
/PCM_CE2
Extenal test only I2C_SDA1 AH9
SDA0 CAM_IREQ_N
T28
CAM_IREQ_N
I2C_SCL3 AG9
SCL1 CAM_RESET
T29
PCM_RESET
R103 3.3K
PLLSET1
I2C_SDA3 AG10
SDA1 CAM_INPACK_N
R28
CAM_INPACK_N
OPT I2C_SCL2 SCL2 CAM_VCCEN_N PCM_5V_CTL
R104 3.3K AJ9 U27 TP104 EB_WE_N
PLLSET0 I2C_SDA2 SDA2 CAM_WAIT_N CAM_WAIT_N
OPT AH22 N29 TP105 EB_OE_N
I2C_SCL4 AJ22
SCL3 CAM_REG_N CAM_REG_N
I2C_SDA4 AH10
SDA3 TP106 EB_BE_N1
I2C_SCL5 AJ10
SCL4
K30 EB_ADDR[0] TP107 EB_BE_N0
I2C_SDA5 AG23
SDA4 EB_ADDR0
E30 EB_ADDR[1]
I2C_SCL6 AH24
SCL5 EB_ADDR1
M30 EB_ADDR[2] TP108 CAM_CD1_N
I2C_SDA6 SDA5 EB_ADDR2
N28 EB_ADDR[3] TP109 CAM_CD2_N
EB_ADDR3
AC6
PWM0 EB_ADDR4
M28 EB_ADDR[4] TP110 /PCM_CE1
+3.3V_NORMAL R107 33 AC7 M29 EB_ADDR[5] TP111 /PCM_CE2
PWM_DIM2 33 PWM1 EB_ADDR5
OP MODE[1:0] R108 R179 AD7 L29 EB_ADDR[6] TP112 CAM_IREQ_N
PWM_DIM 10K PWM2 EB_ADDR6
"00" : Normal Mode BOOT MODE AB7
PWM_IN EB_ADDR7
K29 EB_ADDR[7] TP113 PCM_RESET
"01/10/11" : Internal Test mode K28 EB_ADDR[8] CAM_INPACK_N
3.3K
"0 : EMMC 1/16W TP114

R127
"1 : TEST MODE EB_ADDR8

5% L28 EB_ADDR[9] TP115 PCM_5V_CTL
OPT
+3.3V_NORMAL EB_ADDR9
G32 D30 EB_ADDR[10] TP116 CAM_WAIT_N
EMMC_CLK EMMC_CLK EB_ADDR10
OPT BOOT_MODE
G33 F29 EB_ADDR[11] TP117 CAM_REG_N
R101 3.3K EMMC_CMD G31
EMMC_CMD EB_ADDR11
C32 EB_ADDR[12]
3.3K
OPM1 EMMC_RST EMMC_RESETN EB_ADDR12

R128
R102 3.3K EMMC_DATA[7] D31 C33 EB_ADDR[13]

EMMC_DATA7 EB_ADDR13
OPM0 EMMC_DATA[6] F33 C31 EB_ADDR[14]
OPT EMMC_DATA6 EB_ADDR14
EMMC_DATA[5] F32 B33
Extenal test only EMMC_DATA5 EB_ADDR15
EMMC_DATA[4] E32
EMMC_DATA4
EMMC_DATA[3] F31
EMMC_DATA3
BOOT_MODE0 EMMC_DATA[2] D33
EMMC_DATA2 EB_DATA0
B32 EB_DATA[0] EB_ADDR[0-14]
EMMC_DATA[1] D32 A32 EB_DATA[1]
EMMC_DATA1 EB_DATA1
EMMC_DATA[0] E31
EMMC_DATA0 EB_DATA2
B31 EB_DATA[2] TP102 EB_ADDR[0-14]
A31 EB_DATA[3]
EB_DATA3
A30 EB_DATA[4]
EB_DATA4
EMMC_DATA[0-7] EB_DATA5
B30 EB_DATA[5]
C30 EB_DATA[6]
EB_DATA6
C29 EB_DATA[7]
EB_DATA7
EB_DATA[0-7]
TP103 EB_DATA[0-7]
Jtag-0 I/F Jtag-1 I/F
+3.3V_NORMAL
I2C +3.3V_NORMAL +3.3V_NORMAL
+3.3V_TU
P103 P104
I2C_1 : AMP 12505WS-10A00
I2C_2 : T-CON,L/DIMING 12505WS-10A00
I2C PULL UP I2C_3 : Pro:idiom , Demod JTAG_CPU OPT
I2C_4 : RGB Sensor
I2C_5 : NVRAM
I2C_6 : b-LAN / Tuner 1
R113
3.3K
R114
3.3K
R109
3.3K
R110
3.3K
R155
3.3K
R156
3.3K
R157
3.3K
R158
3.3K
R161
3.3K
R162
3.3K
L/DIM0_VS (TRST0_N) 1
3.3K
3.3K
TRST_N1
KR_PIP_NOT
KR_PIP_NOT
2
TDI0 2
IRB_SPI_MISO/TDI1 R112
R111
R146
R148
10K 10K
3 OPT OPT
L/DIM0_MOSI(TDO0) 3
IRB_SPI_MOSI/TDO1
I2C_SDA1
R146-*1 1.5K
R148-*1 1.5K
I2C_SCL1 4
L/DIM0_SCLK (TMS0) 4
IRB_SPI_SS/TMS1
KR_PIP
KR_PIP
I2C_SDA2 5
TCK0 5
IRB_SPI_CK/TCK1
I2C_SCL2
6
JTAG_SOC_RESET 6
JTAG_SOC_RESET
I2C_SDA3 7
R130 0 FORCED_JTAG_0 7
I2C_SCL3 I2C_SDA3 I2C_SDA_MICOM
OPT
R131 0
I2C_SDA5 I2C_SCL3
OPT
I2C_SCL_MICOM 8 8
I2C_SCL5 R132 0
I2C_SDA4 9 9
OPT
I2C_SDA4 I2C_SCL4
R133 0
OPT 10
I2C_SCL4 10
11 11
I2C_SDA6
I2C_SCL6
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS LX770H 2015.3.11
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. M14+ Symbol A 1 24
M14-Peripheral
Copyright 2015 LG Electronics Inc. All rights reserved. LGE Internal Use Only
SOC <- Ext. Demod.
IC101 TPO_CLK BIT [6/7] EU/CIS AJJA TAIWAN/COL CHINA/HONG KOREA NORTH AMERICA BRAZIL JAPAN
LG1311-C1 TPO_SOP 0 / 0 T/C T/C T/C Default ATSC NIM+T2 Default(ATV_EXT) ISDB PIP Default
TS_S_IN_1_CLK TPO_VAL
TS_S_IN_1_SYNC 0 / 1 T2/C/S2/ATV_EXT T2/C/ATV_EXT T2/C PIP Half NIM+T2(ATV_EXT) Default(ATV_EXT) ISDB
TPO_ERR TPO_ERR
TS_S_IN_1_VAL 1 / 0 T2/C T2/C/ATV_SOC T2/C Half NIM(ATV_INT) ATV_INTERNAL
AH30 D28
TS_S_IN_1_DATA TP_DVB_CLK TPIO_CLK 1 / 1 T2/C/S2/ATV_SOC T2/C/S2 ATSC PIP
AH32 E29
AH31
TP_DVB_SOP TPIO_SOP
E28
TPO_DATA[0-7]
TP_DVB_VAL TPIO_VAL
R235 10K AH33 F28
AM33
TP_DVB_ERR TPIO_ERR
D27 TPO_DATA[0] +3.3V_NORMAL
TP_DVB_DATA7 TPIO_DATA0
AL32 E27 TPO_DATA[1]
AL33
AK32
TP_DVB_DATA5
TP_DVB_DATA4
TPIO_DATA2
TPIO_DATA3
F27
E26
TPO_DATA[2]
TPO_DATA[3] Model Option
AK33 F26 TPO_DATA[4]
AK31 E25 TPO_DATA[5]
TPO_DATA[6]
NON_EXTERNAL_EDID
AJ30 D25
AJ31 F25 TPO_DATA[7]
DDR3_1.5GB
ODT_55_ohm
DDR3_DDP
AL31 AA5
BIT4_1
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
BIT0_1
BIT3_1
BIT1_1
BIT2_1
BIT6_1
BIT7_1
DDR_3G
10K
10K
BIT5_1
TPI_CLK EPI_SOE EPI_SOE
10K
SS_DDR
STPI0_CLK EPI_SOE
AN32 AB5
Serial TP Input TPI_SOP STPI0_SOP EPI_MCLK MCLK_SOC
AM32 AA7
From Pro:Idiom TPI_VAL STPI0_VAL EPI_GCLK GCLK_SOC
R200 10K AN31 AA6
STPI0_ERR EO_SOC
R201
R203
R205
R207
R209
R211
R213
R215
R217
R219
R221
EPI_EO
R229
R237
R227
AM31 AB6
TPI_DATA[0] AH28
STPI0_DATA EPI_VST GST_SOC
STPI1_CLK
AJ28 AK8
Serial TP Output TS_S_OUT_CLK AK30
STPI1_SOP TX_0N
AL8
TXB4N/TX0N
To Pro:Idiom TS_S_OUT_SYNC AJ29
STPI1_VAL TX_0P
AK7
TXB4P/TX0P
R234 33
TS_S_OUT_VAL AG27
STPI1_ERR TX_1N
AL7
TXB3N/TX1N BIT0
TS_S_OUT_DATA STPI1_DATA TX_1P TXB3P/TX1P
AM6 BIT1
TX_2N TXBCLKN/TX2N
TPI_ERR A28 AN6
MODEL_OPT_11
TPI_CLK B28
TPI_CLK TX_2P
AK6
TXBCLKP/TX2P BIT2
TPI_SOP TPI_SOP TX_3N TXB2N/TX3N MODEL_OPT_12
B29 AL6 BIT3
TPI_DATA[0-7] TPI_VAL TPI_VAL TX_3P TXB2P/TX3P
C28 AK5 MODEL_OPT_13
TPI_ERR TPI_ERR TX_4N TXB1N/TX4N BIT4
TPI_DATA[0] A27 AL5
TPI_DATA0 TX_4P TXB1P/TX4P
TPI_DATA[1] B27 AN4 BIT5
TPI_DATA1 TX_5N TXB0N/TX5N
TPI_DATA[2] C27 AN3
TPI_DATA2 TX_5P TXB0P/TX5P BIT6
TPI_DATA[3] B26 AM2
TPI_DATA3 TX_6N TXA4N/TX6N MODEL_OPT_8
TPI_DATA[4] C26 AM1 BIT7
TPI_DATA4 TX_6P TXA4P/TX6P
TPI_DATA[5] B25 AM4
MODEL_OPT_9
MICOM Option +3.3V_NORMAL TPI_DATA[6] A25
TPI_DATA5 TX_7N
AM3
TXA3N/TX7N
TPI_DATA6 TX_7P TXA3P/TX7P MODEL_OPT_10
TPI_DATA[7] C25 AL4
High LOW TPI_DATA7 TX_8N
AL3
TXACLKN/TX8N
AG13
TX_8P
AK2
TXACLKP/TX8P
MODEL_OPT_11 TXA2N/TX9N
EXTERNAL_EDID
GPIO31 TX_9N
DDR3_NON_DDP
PTC NEC AJ19 AK1
NON_SS_DDR
ODT_46_ohm
INV_CTL TXA2P/TX9P
NON_DDR_3G
R224 GPIO30 TX_9P
AG14 AK4
DDR3_2GB
33K
/LGDT3305_RESET TXA1N/TX10N
10K
10K
10K
GPIO29 TX_10N
BIT0_0
BIT3_0
BIT1_0
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
BIT2_0
BIT4_0
BIT6_0
BIT7_0
AG15 AK3
BIT5_0
2D/3D_CTL AJ15
GPIO28 TX_10P
AJ4
TXA1P/TX10P
/TU_RESET AH19
GPIO27 TX_11N
AJ3
TXA0N/TX11N
RESET_BY_CPU GPIO26 TX_11P TXA0P/TX11P
R230
R238
R204
R206
R208
R210
R212
R214
R216
R218
R220
R222
R228
AH18 AH2
R202
R225 /UPDATE_BY_CPU GPIO25 TX_12N TXD4N/TX12N
33K AG19 AH1
OPT BT_RESET AH5
GPIO24 TX_12P
AH4
TXD4P/TX12P
SOC_TX_PTC AJ5
GPIO23 TX_13N
AH3
TXD3N/TX13N
SOC_RX_PTC AJ6
GPIO22 TX_13P
AG4
TXD3P/TX13P
OPC_EN AH6
GPIO21 TX_14N
AG3
TXDCLKN/TX14N
Near AMP
DEBUG AG6
GPIO20 TX_14P
AF2
TXDCLKP/TX14P
R236 33
R226 100
EDID_WP
AG5
GPIO19 TX_15N
AF1
TXD2N/TX15N
AMP_RESET_N AF7
GPIO18 TX_15P
AF4
TXD2P/TX15P
R231
C200 PTC_WOL AG7
GPIO17 TX_16N
AF3
TXD1N/TX16N
1000pF R233 33
4.7K 50V EXT_SPK_DET AG24
GPIO16 TX_16P
AE4
TXD1P/TX16P AREA OPTION BACK-END OPTION
MODEL_OPT_12 AH16
GPIO15 TX_17N
AE3
TXD0N/TX17N
BIT0 V29
GPIO14 TX_17P
AD2
TXD0P/TX17P
PANEL_CTL AJ21
GPIO13 TX_18N
AD1
TXC4N/TX18N
COMP1_DET AH21
GPIO12 TX_18P
AD4
TXC4P/TX18P
AV1_CVBS_DET V28
GPIO11 TX_19N
AD3
TXC3N/TX19N
MODEL_OPT_13 GPIO10 TX_19P TXC3P/TX19P BIT [0/1] DVB ATSC JP BIT[2/3/4/5] TYPE FHD FRC PANEL TYPE LOW HIGH
AG16 AC4
BIT1 AJ24
GPIO9 TX_20N
AC3
TXCCLKN/TX20N 0 / 0 TAIWAN/COLOM N/AMERICA 0 / 0 / 0 / 0 EPI FHD, 120Hz, V14 (8 lane) MODEL_OPT_8 DDR3 NON_DDP DDP
BIT2 AH17
GPIO8 TX_20P
AB2
TXCCLKP/TX20P CHINA/HONGKONG KOREA 0 / 0 / 0 / 1
0 / 1 JAPAN EPI FHD, 120Hz, v14_32inch (6 lane)
BIT3 AG17
GPIO7 TX_21N
AB1
TXC2N/TX21N MODEL_OPT_9 DDR3 2GB 1.5GB
BIT4 GPIO6 TX_21P TXC2P/TX21P 1 / 0 EU/CIS , S/AMERICA/PH 0 / 0 / 1 / 0 EPI FHD, 120Hz, V13 (6 lane)
AH13 AB4 MODEL_OPT_10 FOR UD NON_DDR3 3G DDR3 3G
BIT5 AH15
GPIO5 TX_22N
AB3
TXC1N/TX22N 1 / 1 ASIA/AFRICA Sri Lanka 0 / 0 / 1 / 1 EPI FHD, 120Hz, V12 (6 lane)
BIT6 AG18
GPIO4 TX_22P
AA4
TXC1P/TX22P 0 / 1 / 0 / 0 EPI FHD, 60Hz, V14_32 inch (6lane)
Support
BIT7 AH14
GPIO3 TX_23N
AA3
TXC0N/TX23N 0 / 1 / 0 / 1
MODEL_OPT_11 EXTERNAL EDID EXTERNAL NON_EXTERNAL
LVDS FHD, 120Hz FOR HDMI2.0
MODEL_OPT_8 AJ16
GPIO2 TX_23P TXC0P/TX23P
MODEL_OPT_9 GPIO1 0 / 1 / 1 / 0 LVDS FHD, 60Hz MODEL_OPT_12 SS_DDR
AH20 AM8 NON_SS_DDR SS_DDR
MODEL_OPT_10 GPIO0 TX_LOCKN EPI_LOCK8/6 0 / 1 / 1 / 1 LVDS HD, 60Hz
ODT
MODEL_OPT_13 ODT_46_ohm ODT_55_ohm
1 / 0 / 0 / 0 LVDS FHD, 60Hz, CP BOX
1 / 0 / 0 / 1 LVDS HD, 60Hz SMALL SMART
1 / 0 / 1 / 0 Vby1 FHD, 120Hz OLED
1 / 0 / 1 / 1 LVDS FHD, 120Hz OLED
1 / 1 / 0 / 0
1 / 1 / 0 / 1
1 / 1 / 1 / 0
1 / 1 / 1 / 1
+3.3V_NORMAL
TPI_DATA[0-7] TP212
TPI_CLK TP213
TPI_SOP TP214
3.3K
TPI_VAL TP215
R223
SW201
JTP-1127WEM
TPO_DATA[0-7] TP221 2 1
TPO_CLK TP218 4 3
TPO_SOP TP219 DEBUG
TPO_VAL TP220
For ISP

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. M14+ Symbol B 2 24
M14-Display In/Out
PLACE AT JACK SIDE OPT
R319
OPT
R320 IC101
390 390 C11011 0.1uF 16V LG1311-C1
SOC_CVBS_OUT
OPT
OPT OPT
C11009 C11010
68pF 68pF AL27 CVBS_IN1 E22
TU_CVBS_SOC SD_CLK SMARTCARD_CLK/SD_EMMC_DATA[0]
50V 50V AK26 CVBS_IN2 D22
SC_CVBS_IN_SOC SD_CMD SMARTCARD_RST/SD_EMMC_DATA[2]
AM27 CVBS_IN3 F22
AV1_CVBS_IN_SOC SD_CD_N SMARTCARD_VCC/SD_EMMC_CMD
TP308 SC_CVBS_IN_SOC SD_WP_N
F24
SMARTCARD_PWR_SEL/SD_EMMC_DATA[1]
R356 68 C343 0.047uF AL26 D24
TP310 SC_FB_SOC CVBS_VCM
Place JACK Side Place SOC Side TP311 SC_ID_SOC TP320 DTV/MNT_V_OUT_SOC
SD_DATA3
SD_DATA2
E24
DDR3_OPT1
DDR3_OPT2
R353 0 AN27 BUF_OUT1 F23
DTV/MNT_V_OUT_SOC SD_DATA1 SMARTCARD_DET/SD_EMMC_DATA[3]
TP312 COMP1_PB_IN_SOC C339 EU OPT R11031 E23
10K SD_DATA0 SMARTCARD_DATA/SD_EMMC_CLK
TP313 COMP1_Y_IN_SOC OPT 100pF AL25
SC_ID_SOC SC1_SID
50V AM25 AK14
TP314 COMP1_Y_IN_SOC_SOY SC_FB_SOC SC1_FB
RMII_REF_CLK EPHY_REFCLK
R11032 AK12
TP315 COMP1_PR_IN_SOC OPT 10K AN23
RMII_CRS_DV
AL12
EPHY_CRS_DV
COMP1_Y_IN_SOC_SOY SOY1_IN EPHY_MDIO
RMII_MDIO
TP316 AUAD_L_CH2_IN AL22 AK13
AV1_CVBS/COMP1_Y Circuit was moved to 34Page COMP1_Y_IN_SOC
AK21
Y1_IN
RMII_MDC
AL13
EPHY_MDC
TP317 AUAD_R_CH2_IN COMP1_PB_IN_SOC PB1_IN
RMII_TXEN EPHY_EN
AK22 PR1_IN AM13
COMP1_PR_IN_SOC RMII_TXD1 EPHY_TXD1
AN13
SMARTCARD_DATA/SD_EMMC_CLK RMII_TXD0 EPHY_TXD0
TP302 AL24 AL14 R315 33
COMP2_Y_IN_SOC_SOY SOY2_IN EPHY_RXD1
TP303 SMARTCARD_VCC/SD_EMMC_CMD RMII_RXD1
AK23 Y2_IN AK15 R316 33
SMARTCARD_DET/SD_EMMC_DATA[3] COMP2_Y_IN_SOC RMII_RXD0 EPHY_RXD0
TP304 AL23 PB2_IN 5V_HDMI_1
SMARTCARD_RST/SD_EMMC_DATA[2] COMP2_PB_IN_SOC
TP305 AK24 AE27
R333 33 C322 0.047uF COMP2_PR_IN_SOC PR2_IN DDC_SCL_1
TP306 SMARTCARD_PWR_SEL/SD_EMMC_DATA[1] HDMI_1_SCL
COMP1_Pb COMP2_PB_IN_SOC HDMI_1_SDA
AF28
DDC_SDA_1 R372
TP307 SMARTCARD_CLK/SD_EMMC_DATA[0] R357 68 C344 0.047uF AL21 AE29 R300 33 10
ADC1_COM HDMI_HPD_1
HDMI_1_HPD
R358 68 C345 0.047uF AM23 ADC2_COM AF27
AVDD25 R359 68 C346 0.047uF AN25
HDMI_1_5V_DET
AE28
R335 33 C324 0.047uF ADC3_COM
HDMI_1_ARC SPDIF_OUT_ARC C356
COMP1_Pr COMP2_PR_IN_SOC R376
R318 1% 75
1uF
R326 1% 75
BLM15BD121SN1 10V 5.1K

AM21 AVSS25_COMP_REF AF33
HDMI_1_RX_0 D0+_HDMI1
L305 C349 AN21 AVDD25_COMP_REF AF32
1005
1005
L304 0.1uF HDMI_1_RX_0B D0-_HDMI1

BLM15BD121SN1 AE31
16V D1+_HDMI1
HDMI_1_RX_1
R354 0 AK16 AUDA_SCART_OUTL AE30
HDMI_1_RX_1B D1-_HDMI1
R355 OPT 0 AL16 AUDA_SCART_OUTR AD31
OPT AD30
AL19 AUAD_L_CH1_IN AF31
R329 100 C318 0.047uF HDMI_1_RX_C CK+_HDMI1
AK19 AUAD_R_CH1_IN AF30
TU_CVBS TU_CVBS_SOC HDMI_1_RX_CB CK-_HDMI1
C303 AN19 AUAD_L_CH2_IN 5V_HDMI_2
AUAD_L_CH2_IN
150pF AM19 AD28
AUAD_R_CH2_IN AUAD_R_CH2_IN DDC_SCL_2
50V HDMI_2_SCL
OPT AN17 AUAD_L_CH3_IN AD29 R373
AUAD_L_CH3_IN HDMI_2_SDA DDC_SDA_2
AM17 AC27 R301 33 10
AUAD_R_CH3_IN AUAD_R_CH3_IN HDMI_HPD_2
HDMI_2_HPD
AL17 AUAD_L_CH4_IN AD27
HDMI_2_5V_DET
AK17 AUAD_R_CH4_IN C357 R377
AC31 1uF
HDMI_2_RX_0 D0+_HDMI2 5.1K
AK20 AC30 10V
AUDA_OUTL AUDA_OUTL D0-_HDMI2
HDMI_2_RX_0B
AL20 AUDA_OUTR AB33
AUDA_OUTR HDMI_2_RX_1 D1+_HDMI2
AB32
AK18 AUAD_L_REF AA31
AUAD_R_REF HDMI_2_RX_2 D2+_HDMI2
AL18 AUAD_R_REF AA30
AUAD_L_REF HDMI_2_RX_2B D2-_HDMI2
C347 10uF 10V AD32
HDMI_2_RX_C CK+_HDMI2
C348 2.2uF AN15 AUD_VBG_EXT AD33
HDMI_2_RX_CB CK-_HDMI2
10V
R360 33 AM15 IEC958OUT AB28
SPDIF_OUT HDMI_3_SCL DDC_SCL_3
MAIN I2S_I/F
AUDIO IN Placed as close as possible to IC101 AVDD25 R365 100 AN11 AUDCLK_OUT
HDMI_3_SDA
AB27
AB29
DDC_SDA_3
HDMI_3_HPD HDMI_HPD_3
R366 100 AK11 DAC_LRCH AC28
AUD_LRCH HDMI_3_5V_DET 5V_HDMI_3_SOC
L307 C342 AK10 DAC_SLRCH
22pF
R309 27K C316 4.7uF OPT AL10 DAC_CLFCH Y32
COMP1/AV1/DVI_L_IN 1%
AUAD_L_CH3_IN R374 120-ohm
AUD_SCK
R368 100 AL11 DAC_SCK
HDMI_3_RX_0
Y33
D0+_HDMI3
D0-_HDMI3
R322 10K 51K HDMI_3_RX_0B
R369 100 AM11 DAC_LRCK W31
C354 AUD_LRCK D1+_HDMI3
GOOGLE
GOOGLE
1% HDMI_3_RX_1
R380 10uF C335 C337 R387 R388 W30
1% 51K HDMI_3_RX_1B D1-_HDMI3
R310 27K C317 4.7uF AUAD_L_REF 10V 22pF 33pF R386 0 0 0 AD5 V33
COMP1/AV1/DVI_R_IN AUAD_R_CH3_IN R378 C313
1% OPT OPT I2S_AMP
GOOGLE AE5
PCMI3LRCH
PCMI3LRCK
HDMI_3_RX_2
V32
D2+_HDMI3
1% R323 10K 4.7uF HDMI_3_RX_2B D2-_HDMI3
47K AE7 Y31
PCMI3SCK CK+_HDMI3
1% 10V HDMI_3_RX_C
1% AE6 AUDCLK_IN Y30
HDMI_3_RX_CB CK-_HDMI3
C312 0.01uF
AUAD_R_REF TUNER_SIF AD6 Y27 5V_HDMI_4
FRC_LRSYNC DDC_SCL_4
HDMI_4_SCL
C353 R330 AA28
R381 HDMI_4_SDA DDC_SDA_4
2.2K AK29 Y28 R302 33
47K 4.7uF AAD_ADC_SIF R375
OPT HDMI_4_CBUS_HPD HDMI_HPD_4
1% 10V C351 0.1uF AL29 AA29 10
AAD_ADC_SIFM
HDMI_4_CD_SENSE
R350 10K R307 10K AM29 IFAGC AA27
MAIN_IF_AGC HDMI_4_5V_DET
0.047uF R389 C359 R379
C338 AK27 DMD_DAC_OUT T31 1uF
0.047uF C307 SOC_CVBS_OUT HDMI_4_RX_0 D0+_HDMI4 1K
10V 5.1K
AL30 DMD_SIF_OUT T30
T32
Close to Tuner Close to IC101 AK28 DMD_ADC_INP T33
AL28 DMD_ADC_INN R31
HDMI_4_RX_2 D2+_HDMI4 **In case of using HDMI4 without MHL
C352 0.1uF AN29 R30
DDR3 VENDOR OPTION Close to IC101
DMD_ADC_INCOM
HDMI_4_RX_2B
U31
D2-_HDMI4 CD SENSE should be connected to GND
CK+_HDMI4 using 1K pull-down!
HDMI_4_RX_C
Close to Tuner U30
C311 33pF HDMI_4_RX_CB CK-_HDMI4
+3.3V_NORMAL OPT
R346 10 R334 51
MAIN_PDIF
C331 0.1uF
R332
OPT
50V C360
4.7K
4.7K
1K
15pF
50V
R331 10 C332 0.1uF R336 51
MAIN_NDIF
50V
R382
R384
C310 33pF
OPT
DDR3_OPT1
DDR3_OPT2
4.7K
4.7K
DDC_SCL_3 TP321
OPT
OPT
DDC_SDA_3 TP322
HDMI_HPD_3 TP323
R383
R385
5V_HDMI_3_SOC TP324
D0+_HDMI3 TP325
D0-_HDMI3 TP326
D1+_HDMI3 TP327
D1-_HDMI3 TP328
D2+_HDMI3 TP329
D2-_HDMI3 TP330
CK+_HDMI3 TP331
CK-_HDMI3 TP332
AUDIO OUT
R311 0
EXT_SPK_LOUT_MAIN AUDA_OUTL
R303
C305
22K
0.01uF
50V
R312 0
EXT_SPK_ROUT_MAIN AUDA_OUTR
C306
R304
22K
0.01uF
50V

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. M14+ Symbol C 3 24
M14-AV In/Out
IC101 VREF_M0_0 +1.5V_DDR VREF_M0_0 +1.5V_DDR VREF_M0_1
LG1311-C1
VREF_M0_1
R402 R415
1K 1K
1% 1%
A22
M0_DDR_VREF1
A3
M0_DDR_VREF2 DDR3_512MB_HYNIX_25nm_1866_15Y DDR3_512MB_HYNIX_25nm_1866_15Y
E13 R403 C401 R416 C408
M0_DDR_A0 M0_DDR_A0 1K 0.1uF 1K 0.1uF
E11
M0_DDR_VREFCA M0_1_DDR_VREFCA
M0_DDR_A1 M0_DDR_A1 1% 16V 1% 16V
E15 OPT OPT
M0_DDR_A2 M0_DDR_A2
E17
M0_DDR_A3
IC401 IC402
M0_DDR_A3
D8
M0_DDR_A4
H5TQ4G63CFR_RDC H5TQ4G63CFR_RDC
M0_DDR_A4 M0_DDR_VREFDQ M0_1_DDR_VREFDQ
D16
M0_DDR_A5 M0_DDR_A5
D9 DDR3 DDR3
M0_DDR_A6 M0_DDR_A6
E16
M0_DDR_A7
N3
DDR_512MB_HYNIX_1866_25n 4Gbit M8 N3
DDR_512MB_HYNIX_1866_25n 4Gbit M8
M0_DDR_A7 M0_DDR_A0 A0 VREFCA M0_DDR_A0 A0 VREFCA
M0_DDR_A8
E9
M0_DDR_A8 M0_DDR_A1
P7
A1
(x16) M0_DDR_A1
P7
A1 (x16)
E14 P3 P3
M0_DDR_A9 M0_DDR_A9 M0_DDR_A2 A2 M0_DDR_A2 A2
D7 N2 H1 N2 H1
M0_DDR_A10 M0_DDR_A10 M0_DDR_A3 A3 VREFDQ M0_DDR_A3 A3 VREFDQ
D10 P8 P8
M0_DDR_A11 M0_DDR_A11 M0_DDR_A4 A4 +1.5V_DDR M0_DDR_A4 A4 +1.5V_DDR
D11 +1.5V_DDR P2 P2
M0_DDR_A12 M0_DDR_A12 M0_DDR_CKE M0_DDR_A5 A5 R418 M0_DDR_A5 A5 R419
D14 R8 L8 R8 L8
M0_DDR_A13 M0_DDR_A13 M0_DDR_A6 A6 ZQ M0_DDR_A6 A6 ZQ
E10 R2 240 R2 240
M0_DDR_A14 M0_DDR_A14 R417 M0_DDR_A7 A7 M0_DDR_A7 A7
E12 T8 1% T8 1%
M0_DDR_A15 M0_DDR_A15 10K M0_DDR_A8 A8 M0_DDR_A8 A8
R3 B2 R3 B2
R404 M0_DDR_A9 A9 VDD_1 M0_DDR_A9 A9 VDD_1
D17 10K L7 D9 L7 D9
M0_DDR_BA0 M0_DDR_BA0 OPT M0_DDR_A10 A10/AP VDD_2 M0_DDR_A10 A10/AP VDD_2
E8 R7 G7 R7 G7
M0_DDR_BA1 M0_DDR_BA1 M0_DDR_A11 A11 VDD_3 M0_DDR_A11 A11 VDD_3
D13 M0_DDR_RESET_N N7 K2 N7 K2
M0_DDR_BA2 M0_DDR_BA2 M0_DDR_A12 A12/BC VDD_4 M0_DDR_A12 A12/BC VDD_4
T3 K8 T3 K8
M0_DDR_A13 A13 VDD_5 M0_DDR_A13 A13 VDD_5
C8 T7 N1 T7 N1
M0_DDR_U_CLKP M0_U_CLK M0_DDR_A14 A14 VDD_6 M0_DDR_A14 A14 VDD_6
B8 M7 N9 M7 N9
M0_DDR_U_CLKN M0_U_CLKN M0_DDR_A15 NC_5 VDD_7 M0_DDR_A15 NC_5 VDD_7
C17 R1 R1
M0_DDR_D_CLKP M0_D_CLK VDD_8 VDD_8
B17 M2 R9 M2 R9
M0_DDR_D_CLKN M0_D_CLKN M0_DDR_BA0 BA0 VDD_9 M0_DDR_BA0 BA0 VDD_9
D12 M0_D_CLK M0_U_CLK N8 N8
M0_DDR_CKE M0_DDR_CKE M0_DDR_BA1 BA1 M0_DDR_BA1 BA1
M3 M3
M0_DDR_BA2 BA2 M0_DDR_BA2 BA2
E19 R405 A1 A1
M0_DDR_ODT R410
M0_DDR_ODT 100 VDDQ_1 VDDQ_1
D19 100 J7 A8 J7 A8
M0_DDR_RASN M0_DDR_RASN M0_D_CLK CK VDDQ_2 M0_U_CLK CK VDDQ_2
D18 K7 C1 K7 C1
M0_DDR_CASN M0_DDR_CASN M0_D_CLKN CK VDDQ_3 M0_U_CLKN CK VDDQ_3
E18 M0_D_CLKN M0_U_CLKN K9 C9 K9 C9
M0_DDR_WEN M0_DDR_WEN M0_DDR_CKE CKE VDDQ_4 M0_DDR_CKE CKE VDDQ_4
D2 D2
VDDQ_5 VDDQ_5
D15 L2 E9 L2 E9
M0_DDR_RESET_N M0_DDR_RESET_N CS VDDQ_6 CS VDDQ_6
K1 F1 K1 F1
M0_DDR_ODT ODT VDDQ_7 M0_DDR_ODT ODT VDDQ_7
B18 J3 H2 C413 1uF 10V J3 H2 C429 1uF 10V
M0_DDR_DQS_P0 M0_DDR_DQS0 M0_DDR_RASN RAS VDDQ_8 M0_DDR_RASN RAS VDDQ_8
C18 K3 H9 C414 1uF 10V K3 H9 C430 1uF 10V
M0_DDR_DQS_N0 M0_DDR_DQS_N0 M0_DDR_CASN CAS VDDQ_9 M0_DDR_CASN CAS VDDQ_9
B16 L3 L3
M0_DDR_DQS_P1 M0_DDR_DQS1 M0_DDR_WEN WE M0_DDR_WEN WE
A16 J1 J1
M0_DDR_DQS_N1 M0_DDR_DQS_N1 NC_1 NC_1
B9 +1.5V_DDR +1.5V_DDR T2 J9 T2 J9
M0_DDR_DQS_P2 M0_DDR_DQS2 M0_DDR_RESET_N RESET NC_2 M0_DDR_RESET_N RESET NC_2
C9 L1 L1
B7 L9 L9
M0_DDR_DQS_P3 M0_DDR_DQS3 M0_DDR_VREFCA M0_1_DDR_VREFCA NC_4 NC_4
A7 F3 F3
M0_DDR_DQS_N3 M0_DDR_DQS_N3 M0_DDR_DQS0 DQSL M0_DDR_DQS2 DQSL
R411 G3 G3
R406 1K M0_DDR_DQS_N0 DQSL M0_DDR_DQS_N2 DQSL
A15 1K
M0_DDR_DM0 M0_DDR_DM0 1%
A18 1% C7 A9 C7 A9
M0_DDR_DM1 M0_DDR_DM1 M0_DDR_DQS1 DQSU VSS_1 M0_DDR_DQS3 DQSU VSS_1
A6 B7 B3 B7 B3
M0_DDR_DM2 M0_DDR_DM2 M0_DDR_DQS_N1 DQSU VSS_2 M0_DDR_DQS_N3 DQSU VSS_2
A9 E1 E1
M0_DDR_DM3 M0_DDR_DM3 VSS_3 VSS_3
E7 G8 E7 G8
M0_DDR_DM0 DML VSS_4 M0_DDR_DM2 DML VSS_4
B20 R407 C402 R412 C406 D3 J2 D3 J2
M0_DDR_DQ0 M0_DDR_DQ0 0.1uF 0.1uF M0_DDR_DM1 DMU VSS_5 M0_DDR_DM3 DMU VSS_5
B13 1K 1K J8 J8
M0_DDR_DQ1 16V 16V
M0_DDR_DQ1 1% 1% VSS_6 VSS_6
C21 E3 M1 E3 M1
M0_DDR_DQ2 M0_DDR_DQ2 M0_DDR_DQ0 DQL0 VSS_7 M0_DDR_DQ16 DQL0 VSS_7
C14 F7 M9 F7 M9
A21 F2 P1 F2 P1
A13 F8 P9 F8 P9
B21 H3 T1 H3 T1
C13 H8 T9 H8 T9
B14 G2 G2
M0_DDR_DQ8 M0_DDR_DQ8 M0_DDR_DQ6 DQL6 M0_DDR_DQ22 DQL6
B19 H7 H7
C15 B1 B1
M0_DDR_DQ10 M0_DDR_DQ10 VSSQ_1 VSSQ_1
C20 D7 B9 D7 B9
M0_DDR_DQ11 M0_DDR_DQ11 M0_DDR_DQ8 DQU0 VSSQ_2 M0_DDR_DQ24 DQU0 VSSQ_2
C16 C3 D1 C3 D1
A19 C8 D8 C8 D8
M0_DDR_DQ13 M0_DDR_DQ13 +1.5V_DDR +1.5V_DDR M0_DDR_DQ10 DQU2 VSSQ_4 M0_DDR_DQ26 DQU2 VSSQ_4
B15 C2 E2 C2 E2
C19 A7 E8 A7 E8
B11 M0_1_DDR_VREFDQ A2 F9 A2 F9
M0_DDR_DQ16 M0_DDR_DQ16 M0_DDR_VREFDQ M0_DDR_DQ13 DQU5 VSSQ_7 M0_DDR_DQ29 DQU5 VSSQ_7
C5 B8 G1 B8 G1
C12 R408 R413 A3 G9 A3 G9
M0_DDR_DQ18 M0_DDR_DQ18 1K 1K M0_DDR_DQ15 DQU7 VSSQ_9 M0_DDR_DQ31 DQU7 VSSQ_9
B4 1%
M0_DDR_DQ19 M0_DDR_DQ19 1%
A12
M0_DDR_DQ20 M0_DDR_DQ20
A4
B12
C4
M0_DDR_DQ23 M0_DDR_DQ23 C403 C407
B5 R409 R414
M0_DDR_DQ24 M0_DDR_DQ24 1K 0.1uF 1K 0.1uF
B10 1% 16V 1% 16V
C6
C11
M0_DDR_DQ27
C7
M0_DDR_DQ27 DDR3_512MB_SS_25nm_1866_15Y
A10
M0_DDR_DQ29 M0_DDR_DQ29 DDR_512MB_SS_1866_25n DDR_512MB_SS_1866_25n
B6 IC401-*1 IC402-*1
M0_DDR_DQ30 M0_DDR_DQ30 K4B4G1646D-BCMA K4B4G1646D-BCMA
C10
M0_DDR_DQ31 M0_DDR_DQ31 N3
P7
A0 VREFCA
M8 N3
P7
A0 VREFCA
M8
A1 A1
P3 P3
A2 A2
N2 H1 N2 H1
A3 VREFDQ A3 VREFDQ
P8 P8
E7 R401 240 P2
R8
A4
A5
L8
P2
R8
A4
A5
L8
A6 ZQ A6 ZQ
M0_DDR_ZQCAL R2
T8
A7
R2
T8
A7
1% R3
L7
A8
A9 VDD_1
B2
D9
R3
L7
A8
A9 VDD_1
B2
D9
A10/AP VDD_2 A10/AP VDD_2
R7 G7 R7 G7
A11 VDD_3 A11 VDD_3
N7 K2 N7 K2
A12/BC VDD_4 A12/BC VDD_4
T3 K8 T3 K8
A13 VDD_5 A13 VDD_5
N1 N1
VDD_6 VDD_6
M7 N9 M7 N9
NC_5 VDD_7 NC_5 VDD_7
R1 R1
VDD_8 VDD_8
M2 R9 M2 R9
BA0 VDD_9 BA0 VDD_9
N8 N8
BA1 BA1
M3 M3
BA2 BA2
A1 A1
VDDQ_1 VDDQ_1
J7 A8 J7 A8
CK VDDQ_2 CK VDDQ_2
K7 C1 K7 C1
CK VDDQ_3 CK VDDQ_3
K9 C9 K9 C9
CKE VDDQ_4 CKE VDDQ_4
D2 D2
VDDQ_5 VDDQ_5
L2 E9 L2 E9
CS VDDQ_6 CS VDDQ_6
K1 F1 K1 F1
ODT VDDQ_7 ODT VDDQ_7
J3 H2 J3 H2
RAS VDDQ_8 RAS VDDQ_8
K3 H9 K3 H9
CAS VDDQ_9 CAS VDDQ_9
L3 L3
WE WE
J1 J1
NC_1 NC_1
T2 J9 T2 J9
RESET NC_2 RESET NC_2
L1 L1
NC_3 NC_3
L9 L9
NC_4 NC_4
F3 T7 F3 T7
DQSL NC_6 DQSL NC_6
G3 G3
DQSL DQSL
C7 A9 C7 A9
DQSU VSS_1 DQSU VSS_1
B7 B3 B7 B3
DQSU VSS_2 DQSU VSS_2
E1 E1
VSS_3 VSS_3
E7 G8 E7 G8
DML VSS_4 DML VSS_4
D3 J2 D3 J2
DMU VSS_5 DMU VSS_5
J8 J8
VSS_6 VSS_6
E3 M1 E3 M1
DQL0 VSS_7 DQL0 VSS_7
F7 M9 F7 M9
F2 P1 F2 P1
F8 P9 F8 P9
H3 T1 H3 T1
H8 T9 H8 T9
G2 G2
DQL6 DQL6
H7 H7
DQL7 DQL7
B1 B1
VSSQ_1 VSSQ_1
D7 B9 D7 B9
DQU0 VSSQ_2 DQU0 VSSQ_2
C3 D1 C3 D1
C8 D8 C8 D8
C2 E2 C2 E2
A7 E8 A7 E8
A2 F9 A2 F9
B8 G1 B8 G1
A3 G9 A3 G9

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. M14+ DDR3-(DE) 4 24
VREF_M1_0 +1.5V_DDR
IC101 +1.5V_DDR
LG1311-C1
VREF_M1_1 VREF_M1_0 VREF_M1_1
R508 R515
1K 1K
1% 1%
A2
M1_DDR_VREF1
Y1
M1_DDR_VREF2
+1.5V_DDR +1.5V_DDR
M5 R509 C501 R516 C506 1_2Gbit : T7(NC_6)
M1_DDR_A0 M1_DDR_A0 1K 0.1uF 1K 0.1uF
N5
M1_DDR_A1 1% 1% 16V 4Gbit : T7(A14)
M1_DDR_A1
M1_DDR_A2
K5
M1_DDR_A2
16V
OPT
OPT IC501 IC502
H5 M1_DDR_VREFCA M1_1_DDR_VREFCA
M1_DDR_A3 M1_DDR_A3
T4 H5TQ4G63AFR-PBC H5TQ4G63AFR-PBC
M1_DDR_A4 M1_DDR_A4
H4
M1_DDR_A5 M1_DDR_A5
R4 M1_DDR_VREFDQ M1_1_DDR_VREFDQ
M1_DDR_A6 M1_DDR_A6
J5
M1_DDR_A7 M1_DDR_A0
N3 DDR3 M8
M1_DDR_A0
N3 DDR3 M8
M1_DDR_A7 A0 VREFCA A0 VREFCA
M1_DDR_A8
T5
M1_DDR_A8 M1_DDR_A1
P7
A1
4Gbit M1_DDR_A1
P7
A1
4Gbit
L5 P3 DDR_512MB_HYNIX_1600_29n P3 DDR_512MB_HYNIX_1600_29n
U4 N2 H1 N2 H1
M1_DDR_A10 M1_DDR_A10 M1_DDR_A3 A3 VREFDQ M1_DDR_A3 A3 VREFDQ
P4 P8 P8
P5 P2 P2
K4 +1.5V_DDR R8 L8 R518 240 R8 L8 R519 240
M1_DDR_A13 M1_DDR_A13 M1_DDR_CKE M1_DDR_A6 A6 ZQ M1_DDR_A6 A6 ZQ
R5 R2 R2
+1.5V_DDR
+1.5V_DDR
N4 T8 T8
M1_DDR_A15 M1_DDR_A15 R517 M1_DDR_A8 A8 M1_DDR_A8 A8
R3 B2 R3 B2
10K M1_DDR_A9 A9 VDD_1 M1_DDR_A9 A9 VDD_1
G4 L7 D9 L7 D9
: Place these caps near Memory

M1_DDR_BA0 R502 M1_DDR_A10 M1_DDR_A10
: Place these caps near Memory

M1_DDR_BA0 A10/AP VDD_2 A10/AP VDD_2
U5 10K R7 G7 R7 G7
M1_DDR_BA1 M1_DDR_BA1 OPT M1_DDR_A11 A11 VDD_3 M1_DDR_A11 A11 VDD_3
L4 N7 K2 N7 K2
M1_DDR_BA2 M1_DDR_BA2 M1_DDR_A12 A12/BC VDD_4 M1_DDR_A12 A12/BC VDD_4
M1_DDR_RESET_N T3 K8 T3 K8
M1_DDR_A13 A13 VDD_5 M1_DDR_A13 A13 VDD_5
R3 T7 N1 T7 N1
M1_DDR_U_CLKP M1_U_CLK M1_DDR_A14 A14 VDD_6 M1_DDR_A14 A14 VDD_6
R2 M7 N9 M7 N9
M1_DDR_U_CLKN M1_U_CLKN M1_DDR_A15 A15 VDD_7 M1_DDR_A15 A15 VDD_7
F3 R1 R1
M1_DDR_D_CLKP M1_D_CLK VDD_8 VDD_8
DDR3 1.5V bypass Cap

F2 M2 R9 M2 R9
DDR3 1.5V bypass Cap

M1_DDR_D_CLKN M1_D_CLKN M1_DDR_BA0 BA0 VDD_9 M1_DDR_BA0 BA0 VDD_9
M4 N8 N8
M1_DDR_CKE M1_DDR_CKE M1_DDR_BA1 BA1 M1_DDR_BA1 BA1
M1_D_CLK M1_U_CLK M3 M3
M1_DDR_BA2 BA2 M1_DDR_BA2 BA2
F5 A1 A1
M1_DDR_ODT M1_DDR_ODT VDDQ_1 VDDQ_1
E4 R503 J7 A8 J7 A8
M1_DDR_RASN M1_DDR_RASN 100 R510 M1_D_CLK CK VDDQ_2 M1_U_CLK CK VDDQ_2
F4 K7 C1 K7 C1
M1_DDR_CASN M1_DDR_CASN 100 M1_D_CLKN CK VDDQ_3 M1_U_CLKN CK VDDQ_3
G5 K9 C9 K9 C9
M1_DDR_WEN M1_DDR_WEN M1_DDR_CKE CKE VDDQ_4 M1_DDR_CKE CKE VDDQ_4
M1_D_CLKN M1_U_CLKN D2 D2
VDDQ_5 VDDQ_5
J4 L2 E9 L2 E9
M1_DDR_RESET_N M1_DDR_RESET_N CS VDDQ_6 CS VDDQ_6
K1 F1 K1 F1
M1_DDR_ODT ODT VDDQ_7 M1_DDR_ODT ODT VDDQ_7
E2 J3 H2 C524 1uF 10V J3 H2 C540 1uF 10V
M1_DDR_DQS_P0 M1_DDR_DQS0 M1_DDR_RASN RAS VDDQ_8 M1_DDR_RASN RAS VDDQ_8
E3 K3 H9 K3 H9
M1_DDR_DQS_N0 M1_DDR_DQS_N0 M1_DDR_CASN CAS VDDQ_9 C525 1uF 10V M1_DDR_CASN CAS VDDQ_9 C541 1uF 10V
G2 L3 L3
M1_DDR_DQS_P1 M1_DDR_DQS1 M1_DDR_WEN WE M1_DDR_WEN WE
G1 J1 J1
P2 +1.5V_DDR +1.5V_DDR T2 J9 T2 J9
M1_DDR_DQS_P2 M1_DDR_DQS2 M1_DDR_RESET_N RESET NC_2 M1_DDR_RESET_N RESET NC_2
P3 L1 L1
T2 L9 L9
M1_DDR_DQS_P3 M1_DDR_DQS3 M1_DDR_VREFCA M1_1_DDR_VREFCA NC_4 NC_4
T1 F3 F3
M1_DDR_DQS_N3 M1_DDR_DQS_N3 M1_DDR_DQS0 DQSL M1_DDR_DQS2 DQSL
G3 G3
R504 R511 M1_DDR_DQS_N0 DQSL M1_DDR_DQS_N2 DQSL
H1 1K 1K
M1_DDR_DM0 M1_DDR_DM0 1%
E1 1% C7 A9 C7 A9
M1_DDR_DM1 M1_DDR_DM1 M1_DDR_DQS1 DQSU VSS_1 M1_DDR_DQS3 DQSU VSS_1
U1 B7 B3 B7 B3
M1_DDR_DM2 M1_DDR_DM2 M1_DDR_DQS_N1 DQSU VSS_2 M1_DDR_DQS_N3 DQSU VSS_2
P1 E1 E1
M1_DDR_DM3 M1_DDR_DM3 VSS_3 VSS_3
E7 G8 E7 G8
M1_DDR_DM0 DML VSS_4 M1_DDR_DM2 DML VSS_4
C2 C502 C507 D3 J2 D3 J2
M1_DDR_DQ0 M1_DDR_DQ0 R505 R512 M1_DDR_DM1 DMU VSS_5 M1_DDR_DM3 DMU VSS_5
K2 0.1uF 1K 0.1uF J8 J8
M1_DDR_DQ1 1K
M1_DDR_DQ1 1% 16V 1% 16V VSS_6 VSS_6
B3 E3 M1 E3 M1
J3 F7 M9 F7 M9
B1 F2 P1 F2 P1
K1 F8 P9 F8 P9
B2 H3 T1 H3 T1
K3 H8 T9 H8 T9
J2 G2 G2
D2 H7 H7
H3 B1 B1
M1_DDR_DQ10 M1_DDR_DQ10 VSSQ_1 VSSQ_1
C3 D7 B9 D7 B9
G3 C3 D1 C3 D1
D1 C8 D8 C8 D8
H2 C2 E2 C2 E2
D3 +1.5V_DDR +1.5V_DDR A7 E8 A7 E8
M2 A2 F9 A2 F9
V3 B8 G1 B8 G1
M1_DDR_DQ17 M1_DDR_DQ17 M1_DDR_VREFDQ M1_1_DDR_VREFDQ M1_DDR_DQ14 DQU6 VSSQ_8 M1_DDR_DQ30 DQU6 VSSQ_8
L3 A3 G9 A3 G9
W2
M1_DDR_DQ19 M1_DDR_DQ19 R506 R513
L1 1K 1K
M1_DDR_DQ20 M1_DDR_DQ20 1% 1%
W1
L2
W3
V2
N2 R507 C503 R514 C508
M1_DDR_DQ25 M1_DDR_DQ25 1K 0.1uF 1K 0.1uF
U3
M1_DDR_DQ26 M1_DDR_DQ26 1% 16V 1% 16V
M3
T3
M1_DDR_DQ28 M1_DDR_DQ28 DDR3_256MB_HYNIX_1600_29nm_14Y DDR3_256MB_HYNIX_1866_29nm_15Y DDR3_256MB_SS_1866_35nm_15Y
N1
U2
N3
M1_DDR_DQ31 M1_DDR_DQ31 IC501-*1 IC502-*1 IC501-*2
H5TQ2G63FFR-RDC
IC502-*2
H5TQ2G63FFR-RDC
IC501-*3 IC502-*3
H5TQ2G63FFR-PBC H5TQ2G63FFR-PBC K4B2G1646Q-BCMA K4B2G1646Q-BCMA
DDR_256MB_HYNIX_1866_29n DDR_256MB_HYNIX_1866_29n
DDR_256MB_HYNIX_1600_29n DDR_256MB_HYNIX_1600_29n DDR_256MB_SS_1866_35n DDR_256MB_SS_1866_35n
N3 M8 N3 M8
E5 R501 240 N3
P7
A0
A1
VREFCA
M8 N3
P7
A0
A1
VREFCA
M8
P7
P3
A0
A1
VREFCA
P7
P3
A0
A1
VREFCA N3
P7
A0
A1
VREFCA
M8 N3
P7
A0
A1
VREFCA
M8
P3 P3 P3 P3
M1_DDR_ZQCAL N2
A2
A3 VREFDQ
H1 N2
A2
A3 VREFDQ
H1
N2
P8
A2
A3 VREFDQ
H1 N2
P8
A2
A3 VREFDQ
H1
N2
A2
A3 VREFDQ
H1 N2
A2
A3 VREFDQ
H1
1% P8
P2
A4
A5
P8
P2
A4
A5
P2
R8
A4
A5
L8
P2
R8
A4
A5
L8
P8
P2
A4
A5
P8
P2
A4
A5
R8 L8 R8 L8 A6 ZQ A6 ZQ R8 L8 R8 L8
A6 ZQ A6 ZQ R2 R2 A6 ZQ A6 ZQ
R2 R2 A7 A7 R2 R2
A7 A7 T8 T8 A7 A7
T8 T8 A8 A8 T8 T8
A8 A8 R3 B2 R3 B2 A8 A8
R3 B2 R3 B2 A9 VDD_1 A9 VDD_1 R3 B2 R3 B2
A9 VDD_1 A9 VDD_1 L7 D9 L7 D9 A9 VDD_1 A9 VDD_1
L7 D9 L7 D9 A10/AP VDD_2 A10/AP VDD_2 L7 D9 L7 D9
A10/AP VDD_2 A10/AP VDD_2 R7 G7 R7 G7 A10/AP VDD_2 A10/AP VDD_2
R7 G7 R7 G7 A11 VDD_3 A11 VDD_3 R7 G7 R7 G7
A11 VDD_3 A11 VDD_3 N7 K2 N7 K2 A11 VDD_3 A11 VDD_3
N7 K2 N7 K2 A12/BC VDD_4 A12/BC VDD_4 N7 K2 N7 K2
A12/BC VDD_4 A12/BC VDD_4 T3 K8 T3 K8 A12/BC VDD_4 A12/BC VDD_4
T3 K8 T3 K8 A13 VDD_5 A13 VDD_5 T3 K8 T3 K8
A13 VDD_5 A13 VDD_5 T7 N1 T7 N1 A13 VDD_5 A13 VDD_5
N1 N1 A14 VDD_6 A14 VDD_6 N1 N1
VDD_6 VDD_6 M7 N9 M7 N9 VDD_6 VDD_6
M7 N9 M7 N9 NC_5 VDD_7 NC_5 VDD_7 M7 N9 M7 N9
NC_5 VDD_7 NC_5 VDD_7 R1 R1 NC_5 VDD_7 NC_5 VDD_7
R1 R1 VDD_8 VDD_8 R1 R1
VDD_8 VDD_8 M2 R9 M2 R9 VDD_8 VDD_8
M2 R9 M2 R9 BA0 VDD_9 BA0 VDD_9 M2 R9 M2 R9
BA0 VDD_9 BA0 VDD_9 N8 N8 BA0 VDD_9 BA0 VDD_9
N8 N8 BA1 BA1 N8 N8
BA1 BA1 M3 M3 BA1 BA1
M3 M3 BA2 BA2 M3 M3
BA2 BA2 A1 A1 BA2 BA2
A1 A1 VDDQ_1 VDDQ_1 A1 A1
VDDQ_1 VDDQ_1 J7 A8 J7 A8 VDDQ_1 VDDQ_1
J7 A8 J7 A8 CK VDDQ_2 CK VDDQ_2 J7 A8 J7 A8
CK VDDQ_2 CK VDDQ_2 K7 C1 K7 C1 CK VDDQ_2 CK VDDQ_2
K7 C1 K7 C1 CK VDDQ_3 CK VDDQ_3 K7 C1 K7 C1
CK VDDQ_3 CK VDDQ_3 K9 C9 K9 C9 CK VDDQ_3 CK VDDQ_3
K9 C9 K9 C9 CKE VDDQ_4 CKE VDDQ_4 K9 C9 K9 C9
CKE VDDQ_4 CKE VDDQ_4 D2 D2 CKE VDDQ_4 CKE VDDQ_4
D2 D2 VDDQ_5 VDDQ_5 D2 D2
VDDQ_5 VDDQ_5 L2 E9 L2 E9 VDDQ_5 VDDQ_5
L2 E9 L2 E9 CS VDDQ_6 CS VDDQ_6 L2 E9 L2 E9
CS VDDQ_6 CS VDDQ_6 K1 F1 K1 F1 CS VDDQ_6 CS VDDQ_6
K1 F1 K1 F1 ODT VDDQ_7 ODT VDDQ_7 K1 F1 K1 F1
ODT VDDQ_7 ODT VDDQ_7 J3 H2 J3 H2 ODT VDDQ_7 ODT VDDQ_7
J3 H2 J3 H2 RAS VDDQ_8 RAS VDDQ_8 J3 H2 J3 H2
RAS VDDQ_8 RAS VDDQ_8 K3 H9 K3 H9 RAS VDDQ_8 RAS VDDQ_8
K3 H9 K3 H9 CAS VDDQ_9 CAS VDDQ_9 K3 H9 K3 H9
CAS VDDQ_9 CAS VDDQ_9 L3 L3 CAS VDDQ_9 CAS VDDQ_9
L3 L3 WE WE L3 L3
WE WE J1 J1 WE WE
J1 J1 NC_1 NC_1 J1 J1
NC_1 NC_1 T2 J9 T2 J9 NC_1 NC_1
T2 J9 T2 J9 RESET NC_2 RESET NC_2 T2 J9 T2 J9
RESET NC_2 RESET NC_2 L1 L1 RESET NC_2 RESET NC_2
L1 L1 NC_3 NC_3 L1 L1
NC_3 NC_3 L9 L9 NC_3 NC_3
L9 L9 NC_4 NC_4 L9 L9
NC_4 NC_4 F3 F3 NC_4 NC_4
F3 T7 F3 T7 DQSL DQSL F3 T7 F3 T7
DQSL NC_6 DQSL NC_6 G3 G3 DQSL NC_6 DQSL NC_6
G3 G3 DQSL DQSL G3 G3
DQSL DQSL DQSL DQSL
C7 A9 C7 A9
C7 A9 C7 A9 DQSU VSS_1 DQSU VSS_1 C7 A9 C7 A9
DQSU VSS_1 DQSU VSS_1 B7 B3 B7 B3 DQSU VSS_1 DQSU VSS_1
B7 B3 B7 B3 DQSU VSS_2 DQSU VSS_2 B7 B3 B7 B3
DQSU VSS_2 DQSU VSS_2 E1 E1 DQSU VSS_2 DQSU VSS_2
E1 E1 VSS_3 VSS_3 E1 E1
VSS_3 VSS_3 E7 G8 E7 G8 VSS_3 VSS_3
E7 G8 E7 G8 DML VSS_4 DML VSS_4 E7 G8 E7 G8
DML VSS_4 DML VSS_4 D3 J2 D3 J2 DML VSS_4 DML VSS_4
D3 J2 D3 J2 DMU VSS_5 DMU VSS_5 D3 J2 D3 J2
DMU VSS_5 DMU VSS_5 J8 J8 DMU VSS_5 DMU VSS_5
J8 J8 VSS_6 VSS_6 J8 J8
VSS_6 VSS_6 E3 M1 E3 M1 VSS_6 VSS_6
E3 M1 E3 M1 DQL0 VSS_7 DQL0 VSS_7 E3 M1 E3 M1
DQL0 VSS_7 DQL0 VSS_7 F7 M9 F7 M9 DQL0 VSS_7 DQL0 VSS_7
F7 M9 F7 M9 DQL1 VSS_8 DQL1 VSS_8 F7 M9 F7 M9
DQL1 VSS_8 DQL1 VSS_8 F2 P1 F2 P1 DQL1 VSS_8 DQL1 VSS_8
F2 P1 F2 P1 DQL2 VSS_9 DQL2 VSS_9 F2 P1 F2 P1
DQL2 VSS_9 DQL2 VSS_9 F8 P9 F8 P9 DQL2 VSS_9 DQL2 VSS_9
F8 P9 F8 P9 DQL3 VSS_10 DQL3 VSS_10 F8 P9 F8 P9
DQL3 VSS_10 DQL3 VSS_10 H3 T1 H3 T1 DQL3 VSS_10 DQL3 VSS_10
H3 T1 H3 T1 DQL4 VSS_11 DQL4 VSS_11 H3 T1 H3 T1
DQL4 VSS_11 DQL4 VSS_11 H8 T9 H8 T9 DQL4 VSS_11 DQL4 VSS_11
H8 T9 H8 T9 DQL5 VSS_12 DQL5 VSS_12 H8 T9 H8 T9
DQL5 VSS_12 DQL5 VSS_12 G2 G2 DQL5 VSS_12 DQL5 VSS_12
G2 G2 DQL6 DQL6 G2 G2
DQL6 DQL6 H7 H7 DQL6 DQL6
H7 H7 DQL7 DQL7 H7 H7
DQL7 DQL7 B1 B1 DQL7 DQL7
B1 B1 VSSQ_1 VSSQ_1 B1 B1
VSSQ_1 VSSQ_1 D7 B9 D7 B9 VSSQ_1 VSSQ_1
D7 B9 D7 B9 DQU0 VSSQ_2 DQU0 VSSQ_2 D7 B9 D7 B9
DQU0 VSSQ_2 DQU0 VSSQ_2 C3 D1 C3 D1 DQU0 VSSQ_2 DQU0 VSSQ_2
C3 D1 C3 D1 DQU1 VSSQ_3 DQU1 VSSQ_3 C3 D1 C3 D1
DQU1 VSSQ_3 DQU1 VSSQ_3 C8 D8 C8 D8 DQU1 VSSQ_3 DQU1 VSSQ_3
C8 D8 C8 D8 DQU2 VSSQ_4 DQU2 VSSQ_4 C8 D8 C8 D8
DQU2 VSSQ_4 DQU2 VSSQ_4 C2 E2 C2 E2 DQU2 VSSQ_4 DQU2 VSSQ_4
C2 E2 C2 E2 DQU3 VSSQ_5 DQU3 VSSQ_5 C2 E2 C2 E2
DQU3 VSSQ_5 DQU3 VSSQ_5 A7 E8 A7 E8 DQU3 VSSQ_5 DQU3 VSSQ_5
A7 E8 A7 E8 DQU4 VSSQ_6 DQU4 VSSQ_6 A7 E8 A7 E8
DQU4 VSSQ_6 DQU4 VSSQ_6 A2 F9 A2 F9 DQU4 VSSQ_6 DQU4 VSSQ_6
A2 F9 A2 F9 DQU5 VSSQ_7 DQU5 VSSQ_7 A2 F9 A2 F9
DQU5 VSSQ_7 DQU5 VSSQ_7 B8 G1 B8 G1 DQU5 VSSQ_7 DQU5 VSSQ_7
B8 G1 B8 G1 DQU6 VSSQ_8 DQU6 VSSQ_8 B8 G1 B8 G1
DQU6 VSSQ_8 DQU6 VSSQ_8 A3 G9 A3 G9 DQU6 VSSQ_8 DQU6 VSSQ_8
A3 G9 A3 G9 DQU7 VSSQ_9 DQU7 VSSQ_9 A3 G9 A3 G9
DQU7 VSSQ_9 DQU7 VSSQ_9 DQU7 VSSQ_9 DQU7 VSSQ_9

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. M14+ DDR3(DE) 5 24
IC101
LG1311-C1
+3.3V_Bypass Cap +1.1V_Bypass Cap B22 P19

GND_1 GND_114
B24 P22
GND_2 GND_115
C22 P26
+1.1V_VDD GND_3 GND_116
C23 P30
GND_4 GND_117
+3.3V_NORMAL DVDD33 +3.3V_NORMAL AVDD33 C24 R7
GND_5 GND_118
D4 R8
GND_6 GND_119
D5 R11
L601 GND_7 GND_120
L606 D6 R12
BLM18PG121SN1D C617 C618 C619 C620 C623 C626 C627 C628 GND_8 GND_121
D20 R22
4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 0.1uF 0.1uF 0.1uF GND_9 GND_122
BLM18PG121SN1D 10V 10V 10V 10V 10V 16V 16V 16V D21 R26
IC101 E6
GND_10
GND_11
GND_123
GND_124
R27
C614 C615 E20 T6
DVDD33 +1.1V_VDD C601 C604 C607
LG1311-C1 4.7uF 4.7uF 0.1uF 4.7uF
10V
0.1uF
16V
E21
GND_12 GND_125
T7
10V 10V 16V GND_13 GND_126
F6 T8
GND_14 GND_127
F7 T12
GND_15 GND_128
TP5209 F8 T14
L18 DVDD33_1 DVDD11_1 M20 GND_16 GND_129
F18 T15
L21 DVDD33_2 DVDD11_2 M21 GND_17 GND_130
F19 T16
L22 DVDD33_3 DVDD11_3 N13 GND_18 GND_131
F20 T17
L23 DVDD33_4 DVDD11_4 N14 GND_19 GND_132
F21 T18
M23 DVDD33_5 DVDD11_5 N15 GND_20 GND_133
G7 T19
T11 DVDD33_6 DVDD11_6 N16 GND_21 GND_134
G8 T22
Y23 DVDD33_7 DVDD11_7 N17 GND_22 GND_135
G9 T26
AA23 DVDD33_8 DVDD11_8 N18 GND_23 GND_136
G10 T27
AC12 DVDD33_9 DVDD11_9 P20 GND_24 GND_137
G11 U6
AC13 P21
AC14
DVDD33_10
DVDD33_11
DVDD11_10
DVDD11_11 R13
+2.5V_Bypass Cap AFE 3CH Power G12
GND_25
GND_26
GND_138
GND_139
U7
G13 U8
AC15 DVDD33_12 DVDD11_12 R14 GND_27 GND_140
G14 U11
AC11 AVDD33_BT_USB DVDD11_13 R15 GND_28 GND_141
G15 U12
VDD3V3_HDMI P23 AVDD33_USB_1 DVDD11_14 R16 GND_29 GND_142
G16 U13
R23 AVDD33_USB_2 DVDD11_15 R17 GND_30 GND_143
G17 U22
T23 AVDD33_HDMI_1 DVDD11_16 R18 +2.5V_NORMAL AVDD25 +2.5V_NORMAL AVDD25_C4TX GND_31 GND_144
+1.1V_VDD AVDD11_DMD G20 U26
U23 R19
AVDD33 AVDD33_HDMI_2 DVDD11_17 G21
GND_32 GND_145
V4
C637 V23 R20
AVDD33_HDMI_3 DVDD11_18 GND_33 GND_146
0.1uF L602 L604 G22 V5
DVDD11_19 R21 GND_34 GND_147
16V BLM18PG121SN1D BLM18PG121SN1D G23 V6
AF22 AVDD33_CVBS DVDD11_20 T13 GND_35 GND_148
L607 G24 V7
DVDD11_21 T20 GND_36 GND_149
G25 V8
DVDD11_22 T21 GND_37 GND_150
BLM18PG121SN1D G26 V14
+1.5V_DDR F9 DVDD15_M0_1 DVDD11_23 U14 C602 C605 C608 C610 C613 C616
GND_38 GND_151
G27
TP5207
4.7uF 4.7uF 0.1uF 0.1uF 4.7uF 0.1uF C622 C625 V15

F10 DVDD15_M0_2 DVDD11_24 U15 GND_39 GND_152
10V 10V 16V 16V 10V 16V 4.7uF 0.1uF H7 V16
F11 DVDD15_M0_3 DVDD11_25 U16 10V GND_40 GND_153
16V H8 V17
H9 V18
H10 V19
H11 V22
H12 V26
H13 V30
F17 DVDD15_M0_9 DVDD11_31 V13 GND_46 GND_159
H14 V31
DVDD11_32 V20 GND_47 GND_160
+1.5V_DDR H15 W4
G6 V21 GND_48 GND_161
DVDD15_M1_1 DVDD11_33 +2.5V_NORMAL AVDD25_AUD H16
TP5208
W8
H6 DVDD15_M1_2 DVDD11_34 W13 GND_49 GND_162
H17 W20
J6 DVDD15_M1_3 DVDD11_35 W14 GND_50 GND_163
H21 W21
K6 DVDD15_M1_4 DVDD11_36 W15 L603 GND_51 GND_164
BLM18PG121SN1D H22 W22
L6 DVDD15_M1_5 DVDD11_37 W16 GND_52 GND_165
H23 W23
M6 DVDD15_M1_6 DVDD11_38 W17 GND_53 GND_166
H24 W26
N6 DVDD15_M1_7 DVDD11_39 W18 GND_54 GND_167
H25 W27
P6 DVDD15_M1_8 W19 GND_55 GND_168
DVDD11_40 C603 C606 C609 H26 Y2
R6 Y13
AVDD25_C4TX DVDD15_M1_9 DVDD11_41 4.7uF 4.7uF 0.1uF
H27
GND_56 GND_169
Y3
Y20 10V 10V 16V GND_57 GND_170
DVDD11_42 H31 Y4
Y21 GND_58 GND_171
DVDD11_43 J7 Y8
V11 AVDD25_C4TX_1 AA13 GND_59 GND_172
DVDD11_44 J8 Y14
W11 AVDD25_C4TX_2 AA14 GND_60 GND_173
DVDD11_45 J26 Y15
Y11 AVDD25_C4TX_3 AA15 GND_61 GND_174
DVDD11_46 J27 Y16
AVDD25 AA11 AVDD25_C4TX_4 DVDD11_47
AA17 GND_62 GND_175
K7 Y17
AC18 AVDD25_COMP_1 AA18 GND_63 GND_176
DVDD11_48 K8 Y18
AC19
AC20
AVDD25_COMP_2 DVDD11_49
AA19
AA20
+1.5V_Bypass Cap K26
GND_64
GND_65
GND_177
GND_178
Y19
AVDD25_CVBS_1 DVDD11_50 K27 Y22
AC21 AVDD25_CVBS_2 AA21 GND_66 GND_179
DVDD11_51 L7 Y26
AC22 AVDD25_DMD AB21 GND_67 GND_180
AVDD11_APLL L8 AA8
AC23 AVDD25_AAD AB19 GND_68 GND_181
AVDD11_COMP_LLPLL L11 AA16
G19 DVDD25_XTAL V12 GND_69 GND_182
AVDD11_C4TX_1 L12 AA22
H19 AVDD25_DR3PLL W12 GND_70 GND_183
AVDD25_AUD AVDD11_C4TX_2 L13 AA26
H20 Y12 GND_71 GND_184
SP_VQPS AVDD11_C4TX_3 +1.5V_DDR L14 AB11
AA12 GND_72 GND_185
AVDD11_C4TX_4 +1.1V_VDD L15 AB12
AC17 AVDD25_AUD GND_73 GND_186
L16 AB13
AB23 AVDD25_APLL GND_74 GND_187
L17 AB14
G18 GND_75 GND_188
DVDD11_XTAL L19 AB15
H18 GND_76 GND_189
DVDD11_DR3PLL
TP5210
L20 AB16
AVDD11_DMD L27
GND_77 GND_190
AB17
AF23 GND_78 GND_191
DVDD11_CVBSPLL M7 AB18
AF24 C629 C631 C633 GND_79 GND_192
AVDD11_DMD_1 22uF 0.1uF 0.1uF M8 AB20
AF25 GND_80 GND_193
AVDD11_DMD_2 10V 16V 16V M11 AB22
DVDD18_EMMC OPT M12
GND_81 GND_194
AB26
GND_82 GND_195
M13 AB30
L26 GND_83 GND_196
DVDD18_EMMC_1 M14 AB31
M26 GND_84 GND_197
DVDD18_EMMC_2 M15 AC16
GND_85 GND_198
M16 AC26
GND_86 GND_199
M17 AD26
GND_87 GND_200
M18 AE26
+1.5V_DDR GND_88 GND_201
M19 AF6
GND_89 GND_202
M22 AF8
GND_90 GND_203
M27 AF9
GND_91 GND_204
N7 AF10
GND_92 GND_205
N8 AF11
GND_93 GND_206
N11 AF12
GND_94 GND_207
N12 AF13
C630 C632 C634 GND_95 GND_208
N19 AF14
22uF 0.1uF 0.1uF GND_96 GND_209
N20 AF15
10V 16V 16V GND_97 GND_210
OPT N21 AF16
GND_98 GND_211
N22 AF17
GND_99 GND_212
N23 AF18
GND_100 GND_213
N26 AF19
GND_101 GND_214
N27 AF20
GND_102 GND_215
N30 AF21
GND_103 GND_216
P7 AF26
GND_104 GND_217
P8 AG20
GND_105 GND_218
P11 AG25
GND_106 GND_219
P12 AG31
GND_107 GND_220
P13 AH25
GND JIG POINT GND_108 GND_221
P14 AJ25
GND_109 GND_222
P15 AK9
GND_110 GND_223
P16 AK25
GND_111 GND_224
P17 AL9
GND_112 GND_225
P18 AL15
JP601
JP602
JP603
JP604
GND_113 GND_226

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. VCC & GND 6 24
11/05/31
+3.5V_ST
+3.5V_ST +13V PANEL_POWER PANEL_VCC
Default_NXP
R2366 Q2302
10K PMV48XP
E
R2365 L2313
R2351
D
10K C 10K B
MMBT3906(NXP)
Q2305 +13V
ADUC 20S 02 010L

R2300 10K B UBW2012-121F
C C2333
ADUC 20S 02 010L

VA23002
C2331 R2317
RL_ON
OPT
0.1uF 36K 0.1uF G
Q2304 L2303 C2363 C2347
LVDS_DISCHARGE
50V 50V 10uF 10uF
MMBT3904(NXP) E UBW2012-121F
R2346
25V 25V
3.3K
ICVS0505201FR
Multi_Innochips
VA23001-*1
ZD2301
20V C2307 R2318
POWER_WAFER_12PIN 0.1uF 150K
Default_Amotech P2300
OPT
50V
VA23001 SMAW200-H12S5K(BK)(LTR)
5.6V C
AMOTECH CO., LTD.
B Q2301
+13V_A PWR ON PDIM2 PANEL_CTL
ADUC 20S 02 010L
1 2 PWM_DIM2 MMBT3904(NXP) Multi_AOS

R2314
L2304
GND
D13V
3 4 D13V
D13V
10K
C2359
E Q2302-*1
Power_DET
10K
R2356
UBW2012-121F 5 6 AO3435
A13V A13V 4.7uF
D
7 8
10V
C2306 GND 9 10 GND
0.1uF DRV-ON PDIM1 OPT
11 12 PWM_DIM
ZD2303
50V
G
GND 13 14 GND +13V
20V
R2337
GND SCLK R2354 100K +3.5V_ST
15 13 16 R2355
OPT
L/DIM0_VS 4.7K 4.7K

VSYNC 17 18 SIN
L/DIM0_SCLK OPT OPT R2338
RESET IC_ROHM
L/DIM0_MOSI R2325 IC2307 10K
14K OPT
R2330 BD48K28G
1%
1K P2301 R2350
.
OPT SMAW200-H18S5 POWER_DET

POWER_WAFER_18PIN VDD VOUT 100
3 2
+3.3V_NORMAL +3.5V_ST
+2.5V R2326
5.1K
C2355
0.1uF
25V
1
GND
1%
IC2302 C2365
R2306 R2363 0.1uF
1K 100K TJ2132GDP 16V
OPT [EP]GND
INV_CTL R2307 POWER_ON/OFF2_1 R1
8.2K
100
1%
1/16W
R2321
POK GND
1 8 +2.5V_NORMAL RESET_IC_DIODES_NEW_APX803E29
RESET IC_DIODES_APX803D29
THERMAL
IC2307-*1 IC2307-*2 not to RESET at 8kV ESD
+3.3V_NORMAL R2315 EN FB
9
2 7 R2 APX803D29 APX803E29
26.1K
C2328
1%
1/16W
R2322
10K
0.01uF
+5V_NORMAL IN
3 6
OUT 50V
VCC 3 2 RESET VCC 3 2 RESET
+3.3V - eMMC 4.41/4.51 GND

1 1
GND
BIAS SS C2354 C2357
ZD2305
4 5
2A
OPT
10uF
5V
0.1uF
+3.3V_NORMAL 3.3V_EMMC C2332
10V 16V 12V-->3.58V
2700pF
ST_3.5V-->3.5V
50V
C2321
10uF
L2302 10V
BLM18PG121SN1D
C2305
0.1uF
C2300
22uF Vout=0.6*(1+R2/R1) +3.5V_ST DDR MAIN 1.5V
16V 10V
R2361
100K
R2324
+1.1V_CORE POWER_ON/OFF2_2
10K
OPT
C2361
0.1uF
16V
R2316
100 +3.5V_ST C2341 +1.5V_DDR
1/16W 0.1uF
1%
[EP]FIN
+1.8V - eMMC 4.51 R2320 C2327 16V
AVIN
BOOT
560K
L2308
PGD
+3.5V_ST
EN
1/10W
1%
1/16W
430K
330pF VLS5045EXT-2R2N
IC2301
R2319
5% 50V L2309
16
15
14
13
R2364 MP8762HGLE-Z 2.2uH
100K LPBN8050T-1R0N +1.1V_VDD PVIN_1 1 12 SW_3
L2307 THERMAL
DVDD18_EMMC POWER_ON/OFF2_3
R2310
1K EN SW_2 1.0uH C2339 C2340
PVIN_2 2 17 11 SW_2
ZD2302
1 16 10uF 0.1uF C2345 C2349
2.5V
+3.3V_NORMAL OPT 10V 16V
PGND_1 3 IC2303 10 SW_1
22uF 22uF
C2366 BD9A300MUV C2342 10V 10V
OPT
ZD2304
FREQ SW_1 PGND_2 SS
R2308
1/16W
R1 4 9
2.5V
0.1uF 2 15 C2337 C2356
OPT
C2346
3A
18K
16V 22uF 22uF 0.01uF

1%
22uF
8
50V
1%
1/16W
16K
R2332
10V 10V 10V
FB IN_2
3 14
R1
AGND
FB
ITH
MODE
IC2306 R2331
R2309
1/16W
AZ1117EH-ADJTRG1 R2 1/16W 330K 5%

SS PGND_4
22K
4 13
1%
C2318 R2329
IN OUT 8.2K C2344
0.033uF
ADJ/GND R2347 50V AGND PGND_3
5 12 1% 1/16W 50V 2700pF
R2
D2302
0
1%
1/16W
75
2.5V
OPT
R2357
R2311
100K PG PGND_2
6 11 +13V
1%
1/16W
18K
R2333
C2301 C2308 C2316 1/16W
10uF 10uF 1uF
1%
1/16W
33
1% VCC PGND_1
3A
R2358
10V 10V
7 10
10V
L2312
BST IN_1
8 9
Vout=0.8*(1+R1/R2)
C2325 C2326
R2313 10uF 10uF
C2319 25V 25V
4.7
1/16W
5%
0.1uF
16V
+5.0V normal & USB
1%
R2341150K 1%
R2
R2335 16K 1%
C2334 OPT
2200pF C2335 C2336
R2340 16K
+3.3V_NORMAL +13V 50V
1%
1/16W
6.8K
R2345
+13V
Vout=0.611*(1+R1/R2) R2342
100pF
50V
0.047uF
25V
10K
+3.3V_NORMAL
C2348 C2351 C2352
RSET2
RSET1
22uF 22uF 10uF
L2300
[EP]
AGND
RLIM
COMP
C2343 R1 10V 10V 10V
FB
SS
BLM18PG121SN1D L2310
120-ohm 82pF
R2352
1%
1/16W
51K
+3.5V_ST 50V
28
27
26
25
24
23
22
VIN_1 1 21 LX_3 L2311
C2302 +3.5V_ST THERMAL 4.7uH
C2303 VIN_2 LX_2
10uF 0.1uF 2 29 20
IC2300
3.3V_Diode_SEMTECH
25V +3.5V_ST
3.3V_Diode_KEC
25V
ZD2300-*1
C2309 C2311 C2329 VIN_3 3 19 LX_1 C2338

BD9D320EFJ [EP]FIN
IC2305 10uF 10uF 0.1uF
IC2304
0.047uF L2311 Change, 131120 +5V_NORMAL
0.1uF
50V PGND_1 BST 25V for Currnet UP

TPS563200 25V 25V 4 18
ZD2300
5V
R2301
SN1302001(TPS65286RHDR)
C2353
16V
POWER_ON/OFF1 10K R2304 OPT

5V
10K EN VIN PGND_2 SW_IN2

1 8 5 17
C2350
R2344
1/16W
16V GND VBST
THERMAL
100K
100K
R2353
C2360 PGND_3 SW_IN1
1/16W
0.1uF +13V 1 6 6 16 1uF
5%
5%
R2302 R2303 R1 VLS5045EXT-4R7M
0.1uF
5.1K 68K FB BOOT C2313
6A 10V
9
16V 2 7 NR8040T2R0N L2306 V7V NFAULT1

4.7uH 7 15
OPT 1/16W 1/16W L2301 SW EN R1
/USB_OCD3
2 5
25V
1uF
C2324
10
11
12
13
14
1% 1% 2uH
3A
8
9
VREG SW
3 6 1% 1%
C2304
MODE/SYNC
EN
SW_OUT2
SW_OUT1
SW_EN2
SW_EN1
NFAULT2
VIN VFB 1/16W 1/16W
100pF 3 4
50V
SS GND R2
BLM18PG121SN1D
L2305
R2 4
3A 5 C2314
22uF
C2315
22uF C2323
24.9K 11K
R2327 R2328
1/16W
R2323
1/16W
R2305
R2312
10V C2317 C2320 C2322

10V 22uF
10K
10K
10uF 0.1uF 22uF

22K
/USB_OCD2
1%
C2310 C2312 10V

1%
25V 25V 10V

50V
10pF
R2360
1uF 2200pF
4.7K
4.7K
R2359
C2358
C2330
OPT
R2339
+5V_USB_2
+5V_USB_3
10K
10V 50V +3.5V_ST 0.0068uF

50V
OPT
OPT
R2362
Vout=0.765*(1+R1/R2) USB_CTL2
USB_CTL3
100K
Vout=0.765*(1+R1/R2) POWER_ON/OFF2_4 Vout=0.6*(1+R1/R2)
5.1V:R1-51K, R2-6.8K
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. POWER 7 24
5V_HDMI_1
R3206
VA3215 1K
ESD_HDMI
Q3209
MMBT3904(NXP)
C
B
VA3208 R3207 HDMI_HPD_1
ESD_HDMI 100K R3264
E 1K
R3262
4.7K
R3261 33 5V_HDMI_4
OPT For CEC
1/16W
AR3200 33
DDC_SCL_1
R3211
DDC_SDA_1 1K +3.5V_ST
VA3206
BODY_SHIELD
ESD_HDMI Q3203
VA3207 C MMBT3904(NXP)
20 VA3202
ESD_HDMI BODY_SHIELD
HP_DET ESD_HDMI B
19 VA3209 R3205 HDMI_HPD_4
5V_HDMI_1 ESD_HDMI R3212
5V ARC 100K 1K
18 GND E
R3208 R3209
GND R3248 4.7K 27K
17 1K 20 R3210
DDC_DATA OPT 120K
C3202 1uF HP_DET R3213 33 D3208
16
SPDIF_OUT_ARC BAT54_SUZHO
G
19 OPT
DDC_CLK 10V 5V
15 VA3213 C3226
R3249 0.1uF 18
ARC 3.9K GND CEC_REMOTE HDMI_CEC_PTC
16V
S
14 ESD_HDMI
OPT OPT 1/16W
17 Q3207
CE_REMOTE DDC_DATA AR3202 33
G
13 CEC_REMOTE RUE003N02
16 DDC_SCL_4 Q3207-*1
CK- DDC_CLK DDC_SDA_4 HDMI_CEC_FET_ROHM
12 SI1012CR-T1-GE3
ESD_HDMI
ESD_HDMI
VA3210
VA3211
D3210 15 HDMI_CEC_FET_VISHAY
S
AR3210
CK_GND EOS_0OHM NC
11 5.1 IP4294CZ10-TBR
EAG63530101
1 10 AR3210-*1 14
CK+ CK-_HDMI1 0 CE_REMOTE
10 CEC_REMOTE D3215
2 9 13
D0- CK+_HDMI1 CK- IP4294CZ10-TBR EOS_0OHM
9 3 8 AR3215-*1
12 1 10
D0_GND CK_GND AR3215 CK-_HDMI4 0
8 4 7 5.1 2 9
EAG63530101
EOS_5.1OHM D0-_HDMI1 11 CK+_HDMI4 HDMI LEAKAGE Workaround in MTK A2(A0) (Default= with HDMI_LEAKAGE)
D0+ 5 6 CK+
7 D0+_HDMI1 10 3 8
D1- D0- 4 7
6 ESD_HDMI_TMDS 9 D0-_HDMI4 +3.3V_NORMAL
D1_GND D0_GND 5 6
5 8 D0+_HDMI4
D1+
AR3211
D3211 EOS_0OHM D0+ EOS_5.1OHM
ESD_HDMI_TMDS R3255 0
4 7
5.1 IP4294CZ10-TBR AR3211-*1
OPT
D2- 1 10 0 D1- D3214
3 D1-_HDMI1 6 EOS_0OHM
D2_GND 2 9 D1_GND
IP4294CZ10-TBR AR3214-*1 PANEL_VCC
2 D1+_HDMI1 5 1 10 0
3 8 AR3214 D1-_HDMI4
D2+ D1+ 2 9
1 4 5.1 D1+_HDMI4
4 7 R3254
D2-_HDMI1 D2- 3 8
EOS_5.1OHM 5 6 3 10K
D2+_HDMI1 4 7 VDD3V3_HDMI
D2_GND D2-_HDMI4
2
G
JK3202 ESD_HDMI_TMDS 5 6
D2+ D2+_HDMI4
DAADR019A 1
EOS_5.1OHM ESD_HDMI_TMDS
HDMI_JACK_FOOSUNG
D
NTR4501NT1G
HDMI2 with ARC JK3203
Q3202
DAADR019A C3227
0.1uF
HDMI_JACK_FOOSUNG 16V
HDMI3
5V_HDMI_1 +5V_NORMAL
5V_HDMI_2
20
5V_HDMI_2 +5V_NORMAL
19
A1
A2
+5V_NORMAL 5V_HDMI_4
18
IC3202 MMBD6100
VA3200 17
ESD_HDMI R3220 M24C02-RMN6T +3.5V_ST D3200
1K
A1
A2
16
C
IC3203 MMBD6100
A1
A2
15
Q3210
E0 VCC M24C02-RMN6T D3216
C MMBT3904(NXP) 14 1 8 IC3204
SHIELD
C
D3207
B 13
R3240 M24C02-RMN6T
HDMI_HPD_2
AR3204
VA3201
C
R3218 4.7K
1/16W
R3265 12 E1 WC E0 VCC
ESD_HDMI 100K 2 7 1 8
47K
E 1K 11
R3263 E0 VCC
10 HDMI_EXT_EDID_ST R3200 1 8
AR3206
4.7K E2 SCL 22
1/16W
20 E1 WC
9 3 6 DDC_SCL_1 2 7
47K
HP_DET R3260 33 E1 WC AR3205
8
19 R3201 HDMI_EXT_EDID_ST R3258 2 7 47K
5V OPT 7 VSS SDA 22 E2 SCL 22 1/16W
4 5 DDC_SDA_1 3 6 DDC_SCL_2
18 HDMI_EXT_EDID_ST
6 E2 SCL
GND 1/16W 3 6 R3203 22
17 AR3201 33 5 R3259 DDC_SCL_4
DDC_SCL_2 VSS SDA 22
DDC_DATA 4 4 5 DDC_SDA_2
16 DDC_SDA_2 VSS SDA 22
ESD_HDMI
ESD_HDMI
3 4 5 R3204 DDC_SDA_4
DDC_CLK EEPROM_WP
VA3203
VA3204
15 2
EEPROM_WP
NC 1
14
CE_REMOTE C
13 CEC_REMOTE EEPROM_WP
5501-56219 Q3204 B
CK- JK3202-*1 EDID_WP
MMBT3904(NXP)
12
AR3212 D3212 EOS_0OHM HDMI_JACK_CNPLUS
CK_GND IP4294CZ10-TBR E IC3202-*1
5.1 AR3212-*1 IC3203-*1 IC3204-*1
EAG59023302
11
CK+ 1 10 0 AT24C02C-SSHM-T AT24C02C-SSHM-T AT24C02C-SSHM-T
10 CK-_HDMI2
2 9
D0- CK+_HDMI2 A0
1 8
VCC A0 VCC A0 VCC
9 1 8 1 8
3 8
D0_GND A1 WP
8 4 7 20 2 7 A1
2 7
WP A1
2 7
WP
D0-_HDMI2
D0+ EOS_5.1OHM
7 5 6 19 A2 SCL
D0+_HDMI2 3 6 A2
3 6
SCL A2
3 6
SCL
D1- 18
6 ESD_HDMI_TMDS 17
GND SDA GND SDA GND SDA
4 5 4 5 4 5
D1_GND
5 16
D1+
AR3213
D3213 EOS_0OHM 15
HDMI_EXT_EDID_ATMEL
4 IP4294CZ10-TBR AR3213-*1 HDMI_EXT_EDID_ATMEL HDMI_EXT_EDID_ATMEL
5.1 0 14
D2- 1 10
3 D1-_HDMI2 13
D2_GND 2 9 IC3202-*2 IC3203-*2 IC3204-*2
D1+_HDMI2 12
2 BR24G02FJ-3GTE2 BR24G02FJ-3GTE2 BR24G02FJ-3GTE2
D2+ 3 8 11
1 A0 VCC
4 7 10 A0
1 8
VCC A0
1 8
VCC 1 8
D2-_HDMI2
EOS_5.1OHM 9
5 6 A1 WP
D2+_HDMI2 8 A1
2 7
WP A1
2 7
WP 2 7
7
JK3200 ESD_HDMI_TMDS A2 SCL A2 SCL
A2
3 6
SCL
6 3 6 3 6
YKF45-7058V
5 GND SDA
GND SDA GND SDA 4 5
4 5 4 5
4
HDMI1 3
HDMI_EXT_EDID_ROHM
2 HDMI_EXT_EDID_ROHM HDMI_EXT_EDID_ROHM
5501-56219
JK3203-*1
HDMI_JACK_CNPLUS

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HDMI 8 24
SPDIF OUT
DDTS TEST ONLY
Default_Foxconn
+3.3V_NORMAL JK3401 Multi_Solteam OPT
2F01TC1-CLM97-4F +3.5V_ST P3401
GND 1 GND 12507WS-04L
1
Fiber Optic
Fiber Optic
JST1223-001
JK3401-*1
VCC 2 VCC
2
R3405 1
10K
VIN 3 VINPUT OPT
SPDIF_OUT
3
4 M_REMOTE_RX 2
4
C3402 C3400
47pF 0.1uF
SHIELD
FIX_POLE
50V 16V 3
M_REMOTE_TX 4
AV/COMPONENT REAR
Place JACK Side Place SOC Side

R3402 100 C3404 0.047uF
AV1_CVBS_IN_SOC
C3403 3216
VA3406 150pF R3400
75 R3403 33 C3405 0.047uF
5.5V OPT
COMP2_Y_IN_SOC
+3.3V_NORMAL
C3406 1000pF
PPJ245N2-01 COMP2_Y_IN_SOC_SOY
JK3402 R3406
10K
6A [GN/YL]E-LUG
R3401 1K AV1_CVBS_DET
5A [GN/YL]O-SPRING
4A Default_Amotech
[GN/YL]CONTACT VA3403
5.6V
5B [BL]O-SPRING
COMP1_Pb +3.3V_NORMAL
7C [RD1]E-LUG-S VA3404
5.5V Multi_Innochips
VA3403-*1
5C R3410
[RD1]O-SPRING ICVS0505201FR 10K
COMP1_Pr
4C [RD1]CONTACT R3409 1K
COMP1_DET
5D [WH]O-SPRING
COMP1/AV1/DVI_L_IN
Default_Amotech
4E Default_Amotech VA3400
[RD2]CONTACT VA3405
VA3401 5.6V
5.5V
5.6V Multi_Innochips
5E [RD2]O-SPRING Multi_Innochips
VA3401-*1
ICVS0505201FR VA3400-*1
6E [RD2]E-LUG ICVS0505201FR
COMP1/AV1/DVI_R_IN
Defualt_Amotech
VA3402
5.6V
Multi_Innochips
VA3402-*1
ICVS0505201FR

ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR AV JACK 9 24
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
JK3801
+3.5V_ST PEJ027-04
E_SPRING 3
R3817 R3816 T_TERMINAL1

CPU DEBUG 6A
10K 10K
OPT
R3813 100 B_TERMINAL1 7A
SOC_TX
OPT
C3812 R_SPRING
1000pF 4
50V
T_SPRING 5
R3812 100 B_TERMINAL2 7B

SOC_RX
3.6V
3.6V
OPT
C3811 T_TERMINAL2 6B
1000pF
50V
ZD3801
ZD3802
Serial UART for Commercial
+3.5V_ST
IC3801
MC14053BDR2G
C3805
0.1uF
Y1 VDD
UART3_TX 1 16
Y0 Y R3805 100
PTC_TX 2 15 SOC_RX_PTC
Z1 X R3804 100
RESET_BY_CPU 3 14 SOC_TX_PTC
Z X1 R3806 100
RESET_HIGH 4 13 UART3_RX +3.5V_ST
Z0 X0
5 12 PTC_RX R3815
10K
INH A
6 11
Q3801
C MMBT3904(NXP)
VEE B
7 10 B R3818 10K
UART_SWB
C3806 R3819
VSS C E
8 9 0.47uF 10K
OPT OPT

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. UART 10 24
P4000 +3.5V_WOL
SMAW200-H18S5 L4000 Delete for voltage drop, 131120
C4005 C4006
0.1uF 22uF
GND 1 2 +3.5V_WOL 16V 10V
R4001 100 BT_RESET 3 4 USB_DM R4023 10

BT_RESET WIFI_DM
R4025 C4003
2K
0.1uF
16V
NC 5 6 USB_DP R4024 10
WIFI_DP
RCLAMP0502BA
OPT Place Near Wafer
WOL GND
D4000
WOL/WIFI_POWER_ON
R4002 100 7 8 C4016
5pF
C4015
5pF
OPT
C4004
0.1uF
16V R4010 100
SDA 9 10 GND 50V 50V
WIFI_DMDP_5pF WIFI_DMDP_5pF +3.5V_ST
I2C_SDA4
OPT
EYE SENSOR
R4011 100
SCL 11 12 KEY1
I2C_SCL4
+3.5V_ST OPT
GND 13 14 KEY2 R4008 R4009
10K 10K
R4005
3.3K
R4026 22
IR 15 16 +3.5V_ST R4006 100
KEY1
IR +3.5V_ST
C4007
100pF LED_R 17 18 GND R4007 100
KEY2
50V
C4002 C4001
C4008 0.1uF 0.1uF
R4015 1.8K 1000pF OPT OPT
LED_R 50V
OPT
C4009
0.1uF
19
16V
OPT GND
WOL POWER ENABLE CONTROL
+3.5V_ST +3.5V_WOL
IC4001
AP2191WG-7
IN OUT
5 1
C4017
GND
0.1uF 2
30K
R4027
OPT
R4022 33 EN FLG
WIFI_EN 4 3
C4010
R4021 0.1uF
10K 16V
OPT

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. IR / KEY 11 24
USB1 Side
+5V_USB_3
MAX 1.5A
3AU04S-305-ZC-(LG)
JK4302
1
USB DOWN STREAM
EOS_2.2ohm
R4302 2.2
Same with EU Model
2
USB_DM2
EOS_2.2ohm
R4301 2.2
(USB1)
3
USB_DP2
USB_ESD_SEMTECH
USB_ESD_0582B
RCLAMP0582B
D4301
ZD4301
4
C4322 C4323
5V
10uF 22uF
5
10V 10V
USB_ESD_KEC
ZD4301-*1
EOS_0ohm Multi_Toshiba USB_ESD_0502BA
R4302-*1 0 D4301-*2 D4301-*1
5V
DF3D6.8MS RCLAMP0502BA
EOS_0ohm
R4301-*1 0
+5V_USB_2
USB2 Rear
MAX 1.5A
JK4300
US-04A-VSD
EOS_2.2ohm
R4304 2.2
Same with EU Model USB_DM3
EOS_2.2ohm
2
R4303 2.2 3
(USB2) USB_DP3
USB_ESD_SEMTECH
4
ZD4300
USB_ESD_0582B
C4310 C4311
5V
RCLAMP0582B
10uF 22uF
10V 10V 5
D4300
USB_ESD_KEC
ZD4300-*1
EOS_0ohm
R4304-*1 0
5V
Multi_Toshiba USB_ESD_0502BA
EOS_0ohm D4300-*2 D4300-*1
R4303-*1 0 DF3D6.8MS RCLAMP0502BA

ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR 12 24
USB
AUDIO AMP(NTP7515)
Instant_Power_On
+13V_A
+13V_AMP
L5607 AMP_EN_OLD +3.3V_NORMAL

UBW2012-121F Q5602
AO3407B
S D
22000pF
L5601 L5604
C5629 C5630 10.0uH
R5615 C5631 BLM18PG121SN1D
0.01uF 0.1uF G SPK_L+
33K 4.7uF C5633 AMP_RESET_N
50V 50V 50V NRS6045T100MMGK
0.1uF
50V
50V AUD_SCK
+13V_AMP R5603
3.3
C5604
1/10W
R5616
C5618 R5607
47K
C5603 0.1uF 4.7K
C5611 50V
[EP]GND
C AMP_EN_NEW 0.1uF
Q5602-*1 16V C5606 390pF
VDD_IO
GND_IO
PGND1A
PVDD1A
PVDD1B
50V
R5614 10K B Q5600 SSM3J332R 10uF
CLK_I
RESET
BST1A
OUT1A
AMP_EN
MMBT3904(NXP) 35V
D
S
C5616
0.47uF
R5613 E 50V
AD
10K
G
C5612
390pF
50V C5619 R5608
0.1uF
50V 4.7K
SPEAKER_L
R5604
40
39
38
37
36
35
34
33
32
31
3.3
1/10W
L5605
NC_1 1 30 OUT1B 10.0uH
SPK_L-
+13V_A +13V_AMP NRS6045T100MMGK
VDD_PLL 2 29 PGND1B C5608
THERMAL 22000pF
L5606 C5601
NC_2 3 41 28 BST1B 50V
UBW2012-121F 1uF
10V GND 4 27 VDR1
OPT
NC_3 5 IC5600 26 NC_5
C5602
1uF
10V
DVDD 6 NTP7515 25 AGND
AUD_LRCH
SDATA 7 24 VDR2
WCK 0x54 BST2A
C5610
1uF
C5615
1uF
AUD_LRCK 8 23 10V 10V
NC_4 9 22 PGND2A C5609

22000pF
I2C_SDA1
SDA 10 21 OUT2A 50V
I2C_SCL1
11
12
13
14
15
16
17
18
19
20
AR5601
100 C5623
1/16W C5622
33pF 33pF L5602
50V 50V 10.0uH
SCL
FAULT
MONITOR_0
MONITOR_1
MONITOR_2
BST2B
PGND2B
OUT2B
PVDD2B
PVDD2A
SPK_R+
NRS6045T100MMGK
R5605
+3.3V_NORMAL 3.3
+13V_AMP 1/10W
C5613 C5620 R5609

R5601 390pF 0.1uF
10K 50V 4.7K
AMP_MUTE_MICOM 50V C5617
0.47uF
50V
22000pF
R5602 100 C5607 C5614 SPEAKER_R

390pF
AMP_MUTE_MICOM
C AMP_MUTE_MICOM 10uF
50V C5621
35V R5610
R5600 10K B C5600 0.1uF
50V
AMP_MUTE Q5601 1000pF R5606 50V 4.7K

AMP_MUTE_MICOM MMBT3904(NXP) 50V 3.3
C5605
AMP_MUTE_MICOM 1/10W L5603

WOOFER_MUTE
E
I2S_AMP
10.0uH
SPK_R-
NRS6045T100MMGK
R5690 100
POWER_DET 250A1-WR-H04M
AMP_MUTE_PWR_DET
P5600
TP5601 WOOFER_MUTE SPK_L+

4
SPK_L-
3
SPK_R+
2
SPK_R-
1
Black : Box_Type

ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR AUDIO[ST] 13 24
LVDS
[51Pin LVDS OUTPUT Connector] [41Pin LVDS OUTPUT Connector]
LVDS_41PIN_FLIP_TYPE
LVDS_51PIN_FLIP_TYPE
P7202
P7201
SP14-11592-01-41Pin
SP14-11592-01-51Pin
R7210 33
1 2D/3D_CTL 1
LGD_2D/3D_CTRL 2D/3D_CTL
2 2 R7221 33
LVDS_SEL
CP_BOX OPT
3 AR7201 3
0
4 +3.3V_NORMAL 4
I2C_SDA1
5 I2C_SCL1 5
R7204 0 R7217
6 3.3K 6
OPT LVDS_SEL_HIGH
7 7
R7218 33 R7215
8 PWM_DIM 8
10K
LGD_T-Con_Scanning LVDS_SEL_LOW
9 9
R7220 33
10 OPT 10 TXC0N/TX23N
R7219 33
OPC_EN
11 11 TXC0P/TX23P
OPT
12 TXA0N/TX11N 12 TXC1N/TX22N
13 TXA0P/TX11P 13 TXC1P/TX22P
16 TXA2N/TX9N 16
17 TXA2P/TX9P 17 TXCCLKN/TX20N
18 18 TXCCLKP/TX20P
19 TXACLKN/TX8N 19
20 TXACLKP/TX8P 20 TXC3N/TX19N
21 21 TXC3P/TX19P
24 TXA4N/TX6N 24
H or FLOAT : 10-bit
25 TXA4P/TX6P 25
L : 8-bit
26 26 TXD0N/TX17N
BIT_SEL
27 27 TXD0P/TX17P
28 TXB0N/TX5N 28 TXD1N/TX16N
R7214
29 TXB0P/TX5P 10K 29 TXD1P/TX16P
BIT_SEL_LOW
31 TXB1P/TX4P 31 TXD2P/TX15P EPI_CH8
32 TXB2N/TX3N 32
33 TXB2P/TX3P EPI_CH4 33 TXDCLKN/TX14N

34 34 TXDCLKP/TX14P EPI_CH7
35 TXBCLKN/TX2N 35
36 TXBCLKP/TX2P EPI_CH3 36 TXD3N/TX13N

37 37 TXD3P/TX13P EPI_CH6
39 TXB3P/TX1P EPI_CH2 39 TXD4P/TX12P
EPI_CH5
40 TXB4N/TX0N 40
41 TXB4P/TX0P
EPI_CH1 41
42
42
43
44
45 PANEL_VCC
46
L7200 UBW2012-121F
47
AUO_SHARP
48
49
50
51
52
OPT
C7201
10uF
25V

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LVDS 14 24
GIP_RST
V14_32INCH OPTION
EPI_V14(32)_V12_V13
VGH_EVEN
<T-CON POWER BLOCK>
VGH_ODD
CLK6
CLK5
CLK1
CLK2
CLK3
CLK4
VST
VGH
R7759 R7760
RE
0 0 INSTEAD OF AMCC0208
1/16W 1/16W
VGH_E/O
Q7700
RESET
MMBT3904(NXP)
[EP]
CLK1
CLK2
CLK3
CLK4
CLK5
CLK6
EVEN
CLK6
R7724
ODD
VST
VGH
RE
NC
CLK5 R7728 100K
C
0
56
55
54
53
52
51
50
49
48
47
46
45
44
43
CLK4 REVERSE 1 42 SWP 1/16W 5% D7703
CLK3 GCLK 2 THERMAL 41 CTRLP
1N4148W
VGL
57 CTRLN
[EP]AGND
MCLK VCOMFB
B
3 40
VGH_E/O
CLK2 GST 4 39 VCOMDAC
E/O VCOM 100V
RESET
5 38
CLK1 PMIC_SIW
CKL1
CLK2
CLK3
CLK4
CLK5
CLK6
NC_2
EVEN
GND 6 37 GGND
IC7703-*1
ODD
VST
VGH
VGL 7 36 GMA_N6 C7745 C7747
SW5084B
RE
C7704 C7707 C7708 C7709 SWN GMA_N5 SWN
C7716 C7721 8 35
560pF 560pF 560pF 560pF CTRLN 9 34 GMA_N4
1uF 10V 1uF 10V
560pF 560pF D7705
50V 50V 50V 50V
RST 10 33 GMA_P3
C7727 R7739 C7756
56
55
54
53
52
51
50
49
48
47
46
45
44
43
50V 50V OUT1 11 32 GMA_P2 1N4148W 1.5K C7733
EPI EPI EPI 0.1uF 1/16W 1uF 10uF
EPI EPI EPI
SWB1 12 31 GMA_P1
100V 5%
AGND 13 30 COMP REVERSE 1 42 SWP 50V 10V 10V
PVINB1 14 29 SS REVERSE SWP OPT
GCLK 2 THERMAL 41 CTRLP
GCLK CTRLP
57
15
16
17
18
19
20
21
22
23
24
25
26
27
28
VCC18 MCLK VCOMFB R7774
MCLK 3 40 VCOM_FB2
1K
AVIN
PVINB3
SWB3
OUT3
PGND3
SCL
SDA
VL
TCOMP
PGND
SW_1
SW_2
SWI
SWO
GST 4 39 VCOM
GST VCOM_TOP
E/O 5 PMIC_TI 38 VCOM_DAC
EO PVCOM
R7701 GND 6 37 VGND
10K IC7703
VGL 7 36 GMA6
1/16W VGL TPS65175B GMA15_18
SWN 8 35 GMA5
SWN GMA14
CTRLN GMA4
CTRLN
9 34 GMA12_10 INSTEAD OF AMCC0209 VGH
RST 10 33 GMA3
VCC18 GMA7_9
For EMI OUTB 11 32 GMA2
GMA5 D7704
SWB 12 31 GMA1 1N4148W
L7702 GMA4_1 C7746 C7748
R7737
R7736
AGND COMP
13 30 SWP
OPT
COMP
OPT
4.7
4.7
PVINB 14 29 SS 1uF 25V 1uF 25V 100V
R7700 C7710 C7711 C7712 22uH SS C7755 C7757 R7744 R7750
2K 10uF 10uF 1uF 1uF 1uF 20K 20K
D7700 CTRLP
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1/10W 1/10W
B
1/16W 10V 10V 10V C7722 50V 50V
V14-LGD PANEL SX34

40V OPT 4700pF VDD D7706
1N4148W
AVIN
PVINH
SWH
OUTH
PGNDH
SCL
SDA
VL
TCOMP
PGND
SW
NC_1
SWI
SWO
50V 100V
C7725
C
OPT 2200pF C7754
50V R7727 100K Q7701 0.1uF
PANEL_VCC MMBT3906(NXP) 50V
1/16W 5%
EPI 8-Lane (LEFT) EPI 8-Lane (RIGHT) C7713 C7714 I2C_SCL2

AR7700
C7724
10uF 10uF 1uF I2C_SDA2
25V 25V 33 VL
25V EPI
VDD
P7703
TCOMP
P7702 C7742
1uF
VCC18
10V
FL11S050HA1 FL11S050HA1 H_VDD L7703
EPI_WAFER EPI_WAFER NR6020T6R8NC C7737 C7705 R7718 R7761
6.8uH 0.1uF 10uF 10K
50V 25V 9.1K
EPI_V12_V13
R7715
NC 0 GMA1 R7729 C7715 R7755
1 Z_OUT 1 GMA1 2.7K 10uF EPI_LOCK8/6
EPI_LOCK8/6_SOURCE
CLK1 NC 16V VL
2 CLK1 2 For EMI R7713 C7729 C7726
33
CLK2 GMA4 PANEL_VCC 2.2 470pF 470pF
3 CLK2 3
CLK3 GMA5
GMA4 1/16W 50V 50V R7720
4 CLK3 4 OPT OPT OPT
CLK4 GMA7
GMA5 L7704
22uH
47K
5 CLK4 5 GMA7 D7701

CLK5 GMA9 SX34 TCOMP
6 CLK5 6 GMA9 C7723 C7734 C7706 R7722
CLK6 GMA10 10uF TH7700
7 CLK6 7 40V 0.1uF 10uF 120K
VGH GMA12
GMA10 25V 50V 25V 47k-ohm
1%
8 8 VCC18 SS
VGH_ODD
VGH GMA14
GMA12 COMP RE
9 9 GMA14
VGH_ODD R7717-*1 R7717 C7731
10
VGH_EVEN
VGH_EVEN 10
GMA15
GMA15 VCORE R7748
1K 68K 22K PMIC_SIW
C7740
0.1uF
16V
11 VSS
VGL
VDD H_VDD 11 NC
C7736-*1 C7736
68pF
50V
REVERSE
12 VST (+16V) (+8V) 12 GMA18 820pF 1000pF R7751
30K
VST GMA18 50V 50V 1/16W
13
NC(GIP_RST)
VCOM_L_BOT
GIP_RST 13
GND
LOCK_O
VCC18 R7749
1K
14 14 OPT
VCOM_FB(Z_OUT)
VCOM_L_BOT LOCK_I
EPI_LOCK8/6_SOURCE
15 15 EPI_LOCK4/3
VCOM_L_TOP
VCOM_L_FB VCC12
16 VCOM_TOP 16
GND VCC18 VCORE
17 17 ** 42/47/55INCH OPTION **
VDD GND +1.1V_VDD
18 18 AO3438
VDD EPI8- Q7702
19 19 C7702 C7703 EPI R7708 EPI_NON_32inch
TXD2N/TX15N 0.1uF 0.01uF VCOM_L_FB VCOM_FB_PANEL
D
H_VDD EPI8+ 50V 50V 0
20 20 ** 32INCH OPTION **
GND GND
TXD2P/TX15P EPI EPI
VCOM_R_FB
R7709 EPI_NON_32inch
21 21 6-Lane case
C7730 0
G
1uF C7732 C7728 R7707 EPI_32inch
EPI4- EPI7-
22 TXB2N/TX3N 22 10V 1uF VCOMR_FB VCOM_R_BOT VCOM_FB2
23 EPI4+
23 EPI7+
TXDCLKN/TX14N H_VDD OPT 10V
0.1uF
50V
VCOM_FB_PANEL
R7710 OPT
VCOM_FB1
0
GND
TXB2P/TX3P GND
TXDCLKP/TX14P (+8V)
OPT EPI 0
Z_OUT
R7702 EPI_32inch
VCOM_L_FB
0
24 6-Lane case 24 +3.3V_NORMAL
R7716 EPI_NON_32inch
EPI3- EPI6- R7711
25 25 TXD3N/TX13N VCOM_TOP EPI_32inch
EPI3+
TXBCLKN/TX2N EPI6+
0
0 VCOM_R_FB
26 26 TXD3P/TX13P R7712 OPT
GND
TXBCLKP/TX2P GND
R7741
1K VCOM_R_BOT 0
VCOM_FB1
27 27 EPI
R7766 EPI_NON_32inch R7714 OPT
28 EPI2-
TXB3N/TX1N VCORE VCC18 28 EPI5-
TXD4N/TX12N VDD EPI_CTL VCOM_FB_PANEL 0
VCOM_FB2 VCOM_BOT 0 VCOM_L_BOT VCOML_FB
EPI2+ EPI5+
29
TXB3P/TX1P 29 TXD4P/TX12P (+16V) R7767
GND GND VCOM_BOT
30 30 0 OPT
EPI1- H_VDD
31 31
EPI1+
TXB4N/TX0N VDD EPI_NON_32inch R7719 < VCOM OPTION TABLE >
32 32
GND
TXB4P/TX0P VDD
VCOM_BOT
0 VCOM_L_BOT
33 33 V14 42~55INCH V14 32INCH
VCC18 GND EPI_NON_32inch R7721
34 34 VCOM_R_BOT
0 EXT.OP AMP NOT USE EXT.OP AMP USE EXT.OP AMP NOT USE EXT.OP AMP USE
VCC12 VCOM_R_TOP
35 35
LOCK_I VCOM_FB(Z_OUT)
VCOM_TOP R7703 47 IC7702 NC R7716 0 ohm IC7702 USE R7710 0 ohm IC7702 NC IC7702 USE
36 C7700 C7701 36 EO_SOC EO
LOCK_O
EPI_LOCK4/3 0.01uF 0.1uF
VCOM_R_BOT
VCOM_R_FB FROM SOC
EPI
C7760 NC R7766 0 ohm C7760 USE R7716 NC C7760 NC
C7760
50V 50V USE
37 37
GND NC(GIP_RST)
VCOM_R_BOT C7717 R7766 0 ohm
L7706 R7767 NC L7706 USE L7706
38 38 15pF NC NC L7706 USE
GMA18 VST
GIP_RST 50V
39 39 EPI VDD R7770 0 ohm R7719 0 ohm R7770 1Kohm R7767 NC R7770 NC R7770
NC
GMA18 VSS
VST 1kohm
40 40 VGL R7771 0 ohm R7719 0 ohm R7771 R7771

R7772 0 ohm R7721 0 ohm NC 0 ohm
GMA15 VGH_EVEN
41 41
GMA14
GMA15 VGH_ODD
VGH_EVEN R7704 47 R7708 0 ohm R7771 NC
R7772 30Kohm R7721 0 ohm R7772 NC R7772 30Kohm
42 42 GST_SOC GST
GMA12
GMA14 VGH
VGH_ODD EPI R7709 0 ohm R7708 0 ohm R7702 0 ohm R7702 0 ohm
FROM SOC R7772 0 5%
43 GMA12 43 VGH C7718 EPI R7709 R7707 0 ohm R7707 0 ohm
GMA10 CLK6 0 ohm
44 44 15pF R7710 NC
GMA9
GMA10 CLK5
CLK6 50V OPT R7711 0 ohm R7711 0 ohm
45 GMA9 45 EPI IC7702
GMA7 CLK4
CLK5 C7760
1uF
R7712 NC R7712 0 ohm
46 46 RT9148GJ5 R7714
GMA5
GMA7 CLK3
CLK4 25V R7714 NC 0 ohm
47 47
GMA4
GMA5 CLK2
CLK3 VOUT 1 5 VS+
48 48 R7705 47 OPT
NC
GMA4 CLK1
CLK2 MCLK_SOC
EPI
MCLK VCOM_BOT
49 49 EPI_V14(32)_V12_V13
GMA1 NC
R7723 CLK1 FROM SOC
C7719 VS- 2
EPI_V14(32)_V12_V13
R7725 R7733
50 50 0 15pF GMA15_18 GMA15 GMA7_9 GMA7
GMA1 EPI_V12_V13
Z_OUT 50V OPT
0 0
EPI R7771 VIN+ 3 4 VIN- R7770 R7726 R7732

51 51 PVCOM VCOM_FB1 GMA18 GMA9
0 0 0 0
EPI_V14 EPI_V14
1/16W
R7706 EPI_V14(32)_V12_V13
47
GCLK_SOC GCLK EPI_V14(32)_V12_V13 R7734
R7730 GMA4_1 GMA4
FROM SOC EPI 0
GMA12_10 GMA12
0
C7720 R7735
15pF R7731 GMA1
50V 0
0 GMA10 EPI_V14
EPI EPI_V14

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. EPI 15 24
eMMC I/F
DVDD18_EMMC 3.3v power delete, 131120
R8117
R8116
1/16W
10K
AR8104
1/16W
10K
AR8103
10K
10K
IC8100
THGBMBG5D1KBAIL
EMMC_DATA[0-7] AR8100
22
1/16W
EMMC_DATA[0] A3 C7
DAT0 NC_22
EMMC_DATA[1] A4 C8
DAT1 NC_23
EMMC_DATA[2] A5 C9
DAT2 NC_24
EMMC_DATA[3] B2 C10
EMMC_DATA[4] DAT3 NC_25
B3 C11
B4 C12
B5 C13
EMMC_DATA[7] AR8101 DAT6 NC_28
22 B6 C14
1/16W DAT7 NC_29
D1
NC_30 DAT5
D2
NC_31
M6 D3
CLK NC_32
M5 D4
CMD NC_33
D12
NC_34
D13
NC_35
A7 D14 EMMC5.0_4G_SAMSUNG EMMC5.0_4G_SKHYNIX
RFU_2 NC_36 IC8100-*1 IC8100-*2
E5 E1 KLM4G1FEPD-B031 H26M31001HPR
RFU_4 NC_37
E8 E2 A3 C7 A3 C8
RFU_5 NC_38 A4
DAT0 NC_22
C8 A4
DAT0 NC_22
C9
E3 A5
DAT1
DAT2
NC_23
NC_24
C9 A5
DAT1
DAT2
NC_23
NC_24
C10
NC_39 B2
B3
DAT3 NC_25
C10
C11
B2
B3
DAT3 NC_25
C11
C12
G3 E12 B4
DAT4 NC_26
C12 B4
DAT4 NC_26
C13
RFU_9 NC_40 B5
DAT5 NC_27
C13 B5
DAT5 NC_27
C14
AR8102 22 G10 E13 B6

DAT6
DAT7
NC_28
NC_29
C14 B6
DAT6
DAT7
NC_28
NC_29
D1
EMMC_CLK RFU_10 NC_41 NC_30

D1
D2
NC_30
D2
D3
K6 E14 M6
NC_31
D3 M6
NC_31
D4
DAT7
EMMC_CMD RFU_13 NC_42 M5
CLK NC_32
D4 M5
CLK NC_32
D12
K7 F1 CMD NC_33
NC_34
D12
CMD NC_33
NC_34
D13
EMMC_RST RFU_14 NC_43 DAT6 A7

NC_35
D13
D14 A6
NC_35
D14
E1
K10 F2 E5
RFU_1 NC_36
E1 A7
RFU_1 NC_36
E2
EMMC5.0_4G_TOSHIBA
RFU_15 NC_44 G3
RFU_2 NC_37
E2 C5
RFU_2 NC_37
E3
P7 F3 K6
RFU_3
RFU_4
NC_38
NC_39
E3 E5
RFU_3
RFU_4
NC_38
NC_39
E12
RFU_16 NC_45 K7
E8
RFU_5 NC_40
E12
E13
E8
E9
RFU_5 NC_40
E13
E14
P10 F12 E9
RFU_6 NC_41
E14 E10
RFU_6 NC_41
F1
RFU_17 NC_46 E10
RFU_7 NC_42
F1 F10
RFU_7 NC_42
F2
F13 F10
RFU_8
RFU_9
NC_43
NC_44
F2 G3
RFU_8
RFU_9
NC_43
NC_44
F3
C8107 NC_47 G10

K10
RFU_10 NC_45
F3
F12
G10
H5
RFU_10 NC_45
F12
F13
OPT 10pF H5 F14 P10

RFU_11 NC_46
F13 J5
RFU_11 NC_46
F14
DS NC_48 H5
RFU_13 NC_47
F14 K6
RFU_12 NC_47
G1
50V G1 DS NC_48
NC_49
G1 K7
RFU_13
RFU_14
NC_48
NC_49
G2
NC_49 NC_50
G2
G12
K10
P7
RFU_15 NC_50
G12
G13
E9 G2 NC_51
G13 P10
RFU_16 NC_51
G14
VSF_1 NC_50 NC_52
G14
RFU_17 NC_52
H1
E10 G12 NC_53
NC_54
H1
NC_53
NC_54
H2
VSF_2 NC_51 K5
RSTN NC_55
H2
H3
K5
RSTN NC_55
H3
H12
F10 G13 NC_56
H12
NC_56
H13
VSF_3 NC_52 C6
NC_57
H13 C6
NC_57
H14
G14 M4
VDD_1
VDD_2
NC_58
NC_59
H14 M4
VCCQ_1
VCCQ_2
NC_58
NC_59
J1
NC_53 N4
P3
VDD_3 NC_60
J1
J2
N4
P3
VCCQ_3 NC_60
J2
J3
H1 P5
VDD_4 NC_61
J3 P5
VCCQ_4 NC_61
J12
NC_54 VDD_5 NC_62
J12
VCCQ_5 NC_62
J13
K5 H2 NC_63
NC_64
J13
NC_63
NC_64
J14
RSTN NC_55 E6
F5
VDDF_1 NC_65
J14
K1
E6
F5
VCC_1 NC_65
K1
K2
H3 VDDF_2 NC_66 VCC_2 NC_66
C8100 DVDD18_EMMC NC_56
J10
K9
VDDF_3 NC_67
K2
K3
J10
K9
VCC_3 NC_67
K3
K12
OPT 0.1uF H12 VDDF_4 NC_68

NC_69
K12
VCC_4 NC_68
NC_69
K13
NC_57 C2
NC_70
K13
C2
NC_70
K14
16V C6 H13 VDDI NC_71

K14
L1
VDDI NC_71
L1
L2
VCCQ_1 NC_58 NC_72
L2
NC_72
L3
3.3V_EMMC M4 H14 C4
VSS_1
NC_73
NC_74
L3 C4
VSSQ_1
NC_73
NC_74
L12
VCCQ_2 NC_59 N2
N5
VSS_2 NC_75
L12
L13
E7
G5
VSS_1 NC_75
L13
L14
N4 J1 P4
VSS_3 NC_76
L14 H10
VSS_2 NC_76
M1
VCCQ_3 NC_60 P6
VSS_4 NC_77
M1 K8
VSS_3 NC_77
M2
P3 J2 A6
VSS_5
VSS_6
NC_78
NC_79
M2 N2
VSS_4
VSSQ_2
NC_78
NC_79
M3
VCCQ_4 NC_61 E7
G5
VSS_7 NC_80
M3
M7
N5
P4
VSSQ_3 NC_80
M7
M8
P5 J3 H10
VSS_8 NC_81
M8 P6
VSSQ_4 NC_81
M9
VCCQ_5 NC_62 J5
VSS_9 NC_82
M9
VSSQ_5 NC_82
M10
DAT3
DAT4
DAT5
DAT6
EMMC_CLK_BALL
EMMC_CMD_BALL
EMMC_RESET_BALL
J12 K8
VSS_10
VSS_11
NC_83
NC_84
M10
NC_83
NC_84
M11
C8105 C8106 NC_63 NC_85

M11
M12 A1
NC_85
M12
M13
0.1uF 2.2uF J13 A1
NC_86
M13 A2
NC_1 NC_86
M14
NC_64 A2
NC_1 NC_87
M14 A8
NC_2 NC_87
N1
16V 10V E6 J14 EMMC_RESET_BALL A8
NC_2
NC_3
NC_88
NC_89
N1 A9
NC_3
NC_4
NC_88
NC_89
N3
VCC_1 NC_65 A9
A10
NC_4 NC_90
N3
N6
A10
A11
NC_5 NC_90
N6
F5 K1 A11
NC_5 NC_91
N7 A12
NC_6 NC_91
N7
N8
VCC_2 NC_66 A12
NC_6 NC_92
N8 A13
NC_7 NC_92
N9
J10 K2 A13
NC_7
NC_8
NC_93
NC_94
N9 A14
NC_8
NC_9
NC_93
NC_94
N10
VCC_3 NC_67 A14

B1
NC_9 NC_95
N10
N11
B1
B7
NC_10 NC_95
N11
K9 K3 B7
NC_10 NC_96
N12 B8
NC_11 NC_96
N12
N13
VCC_4 NC_68 B8
NC_11 NC_97
N13 B9
NC_12 NC_97
N14
K12 B9
NC_12
NC_13
NC_98
NC_99
N14 B10
NC_13
NC_14
NC_98
NC_99
P1
NC_69 B10
B11
NC_14 NC_100
P1
P2
B11
B12
NC_15 NC_100
P2
P8
EMMC_VDDI K13 B12
NC_15 NC_101
P7 B13
NC_16 NC_101
P9
pattern 0.2mm NC_70 B13

NC_16 RFU_12
P8 B14
NC_17 NC_102
P11
C2 K14 B14
NC_17
NC_18
NC_102
NC_103
P9 C1
NC_18
NC_19
NC_103
NC_104
P12
VDDI NC_71 C1
C3
NC_19 NC_104
P11
P12
C3
C7
NC_20 NC_105
P13
P14
L1 C5
NC_20 NC_105
P13
NC_21 NC_106
C8104 NC_72 NC_21 NC_106
P14
1uF L2 NC_107
NC_73
10V C4 L3
VSSQ_1 NC_74
N2 L12
VSSQ_2 NC_75
N5 L13
VSSQ_3 NC_76
P4 L14
VSSQ_4 NC_77
C8102 C8103 P6 M1
0.1uF 2.2uF VSSQ_5 NC_78
A6 M2
16V 10V VSS_1 NC_79
E7 M3 EMMC_CLK_BALL
VSS_2 NC_80
G5 M7
VSS_3 NC_81
H10 M8
VSS_4 NC_82
J5 M9
VSS_5 NC_83
K8 M10
VSS_6 NC_84
M11
NC_85
M12
NC_86
A1 M13
DAT3 NC_1 NC_87
A2 M14
DAT4 NC_2 NC_88
A8 N1
DAT7 NC_3 NC_89
A9 N3 EMMC_CMD_BALL
NC_4 NC_90
A10 N6
NC_5 NC_91
A11 N7
NC_6 NC_92
A12 N8
NC_7 NC_93
A13 N9
NC_8 NC_94
A14 N10
NC_9 NC_95
B1 N11
NC_10 NC_96
B7 N12
NC_11 NC_97
B8 N13
NC_12 NC_98
B9 N14
NC_13 NC_99
B10 P1
NC_14 NC_100
B11 P2
NC_15 NC_101
Don’t Connect Power At VDDI EMMC_VDDI
B12
B13
NC_16
NC_17
NC_102
NC_103
P8
P9
B14 P11
NC_18 NC_104
(Just Interal LDO Capacitor) C1
C3
NC_19 NC_105
P12
P13
DAT5 NC_20 NC_106
C5 P14
NC_21 NC_107

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. eMMC 16 24
DATA Digital Demodulator_LGDT3305 (USA)
(For Pro:Centric DATA Channel)
Xtal_matching Xtal_matching
50V +3.3V_3305
50V
33pF 33pF
C8213-*1 C8214-*1
+1.23V_TU +1.2V_3305 R8216 D8200

Xtal_Old 47K 1N4148W
C8213 C8214 OPT
Xtal_Old OPT
30pF 30pF /LGDT3305_RESET
50V 50V R8217
L8203 C8219
BLM18PG121SN1D X8200 OPT 1uF
25MHz 10V
C8224 C8226 R8213
22
0.1uF 0.1uF 1M
R8212
100
+3.3V_3305
R8215
+3.3V_3305
L8200
+1.2V_3305 BLM18PG121SN1D
0.1uF
C8211
+3.3V_TU +3.3V_3305 0.22uF
0.1uF
C8212
L8202
C8215
BLM18PG121SN1D
BLM18PG121SN1D
C8216
R8214
C8223 C8225
L8201
C8227 0.1uF
0.1uF 0.1uF 10uF
1K
10V
VCCAAD10A
VSSDAD10
[EP]GND
VSS33_3
VDD33_3
VDD_3
VSS_3
XTALO
XTALI
NC_2
NRST
OPM
XM
Near to IC8200
48
47
46
45
44
43
42
41
40
39
38
37
NC_1 1 36 PLLAVSS C8220 0.1uF
C8204 0.01uF
SUB_NDIF VINA2 2 35 PLLAVDD
THERMAL
VINA1 3 34 VSS33_2
C8205 0.01uF 49
SUB_PDIF C8208 0.1uF INCAP 4 33 VSS_2
VSSAAD10A 5
IC8200 32 VDD_2 C8217 0.1uF
R8209
I2CSEL 6 LGDT3305 31 VSS_1
1K
R8211 ANTCON SCL 100 R8218
R8205 100 7 30
C8209 0.1uF OPT VDD_1 VDD33_2 C8218 0.1uF I2C_SCL3
OPT 1K 8 29
I2CRPT_SCL 9 28 SDA 100 R8219
R8206 100 I2C_SDA3
OPT I2CRPT_SDA 10 27 NIRQ
R8204 IFOUT TPSOP
C8222
11 26
C8221
22pF
22pF
3305_IF_AGC
1K R8207 RFOUT 12 25 TPCLK
100
13
14
15
16
17
18
19
20
21
22
23
24
C8206 C8207 TPERR
VDD33_1
TPVALID
TPDATA[0]
VSS33_1
TPDATA[1]
TPDATA[2]
TPDATA[3]
TPDATA[4]
TPDATA[5]
TPDATA[6]
TPDATA[7]
1000pF
0.01uF 50V 0.1uF
demod to Main SoC

C8210
AR8200
+3.3V_3305
TS_S_IN_1_SYNC
TS_S_IN_1_CLK
TS_S_IN_1_DATA
470 TS_S_IN_1_VAL
R8208
22
LD8200
close to IC(LGDT3305)
MIN 1ms
MIN 1ms
VDD3.3V
MIN 1ms MIN 10ms
VDD1.0V
nRST
input; Digital IO
caution : Demodulator Power Sequence

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. DATA Demod 17 24
Ethernet HUB(RTL8305N-CG) STRAPPING PIN CONFIG
Place Close To RTL8305N
C8440 C8441
15pF 15pF
50V 50V
25.0MHz
X8400
LAN_ACT0
Ethernet Power ETNHUB_AVDD18

LAN_ACT2
LAN_ACT3
ETNHUB_ENDEFER
ETNHUB_AVDD33 /ETHERNET_RESET
GYSPD
ETNHUB_DVDD18
1K OPT
1K OPT
1K OPT
1K OPT
1K OPT
1K OPT
+3.5V_ST_LAN ETNHUB_DVDD33 ETNHUB_AVDD33
R8424 R8423 Place Close To RTL8305N ETNHUB_DVDD33
AVDD18_6
AVDD18_5
[EP]GND
TXON[0]
TXOP[0]
RXIP[0]
RXIN[0]
AVDD33
L8403 L8401 1.69K 270
IBREF
VCTRL
BLM18PG121SN1D BLM18PG121SN1D 1% 1%
OSCI
R8444
R8446
R8448
R8450
R8451
R8454
X2
X1
1.96K
C8419 C8425
0.1uF 22uF
48
47
46
45
44
43
42
41
40
39
38
37
16V 10V AVDD18_1 1 36 LED_ACT[0]/BCINDROP
LAN_ACT0
TXON[1] 2 35 LED_ACT[1]/GYSPD100
ETNHUB_EPHY_RXIN1 THERMAL GYSPD
TXOP[1] 3 34 LED_ACT[2]/P4ANEG
ETNHUB_EPHY_RXIP1 49 LAN_ACT2
LAN1 RXIP[1] 4 33 P4FLCTRL/CPU_INTT R8440 100
ETNHUB_EPHY_TXOP1 IC8401 ETNHUB_INT LED_ACT[2]/P4ANEG : Auto-negotiation Enable/Disable
RXIN[1] 5 32 RESET Realtek WOL R8452 22
ETNHUB_EPHY_TXON1 /ETHERNET_RESET
AVDD18_2 6 RTL8305N_REALTEK31 DVDD18_4
RXIN[2] 7 30 LED_ACT[3]/EN48PASS1 All Strapping Pins are internal pull-up
ETNHUB_EPHY_TXON2 LAN_ACT3
RXIP[2] 8 29 LED_ACT[4]
ETNHUB_EPHY_TXOP2
TO PHY Chip TXOP[2] 9 28 DVDD33
ETNHUB_EPHY_RXIP2
TXON[2] 10 27 SDA_MDIO R8434 33
ETNHUB_EPHY_RXIN2 EPHY_MDIO
TXON[3] 11 26 SCL_MDC R8435 33
ETNHUB_EPHY_RXIN3 EPHY_MDC
LAN2 TXOP[3] 12 25 ENEEPROM
ETNHUB_DVDD33 ETNHUB_EPHY_RXIP3
ETNHUB_AVDD33 R8436 1K
13
14
15
16
17
18
19
20
21
22
23
24
RXIP[3]
RXIN[3]
TXOP[4]
TXON[4]
AVDD18_3
DVDD18_1
RXIP[4]
RXIN[4]
AVDD18_4
DVDD18_2
DVDD18_3
LDIND/DISLD
C8405 Differential 100 ohm
C8422 C8426 C8429 0.1uF No Via
0.1uF 0.1uF 0.1uF 16V Close to
16V 16V 16V
ETNHUB_DVDD33
R8458
R8465
1.5K
1.5K
Realtek WOL
22
EPHY_MDIO
R8427
EPHY_MDC
ETNHUB_AVDD33
ETNHUB_EPHY_TXOP3
ETNHUB_EPHY_TXON3
ETNHUB_ENDEFER
C8400 IC8400
2.2uF MP20045DQ-LF-Z
25V EP[GND]
R8407
VIN_1 EN 10K
1 8
THERMAL
R8408
VIN_2 PG 100K LAN2
9
2 7
VOUT_1 GND ETNHUB_DVDD18 ETNHUB_AVDD18

3 6
R8409 L8406
VOUT_2 FB 10K 1% L8407
4 5 BLM18PG121SN1D BLM18PG121SN1D
R2 Vout
R8406 C8435 C8438

R1 2K C8430 0.1uF 22uF
1% 2.2uF 16V 10V
Vout=1.5*(1+R1/R2) 25V OPT
PHY TO RTL matching

ETNHUB_AVDD18 L8408-*1
UBW2012-121F
SHENCHEN_NEW
L8408
MAG_NEW
TR0P ETNHUB_EPHY_TXOP2
C8442
0.1uF R8416
49.9
C8446 R8417
0.1uF 49.9
ETNHUB_AVDD18
ETNHUB_DVDD18
TR0N ETNHUB_EPHY_TXON2
C8443
0.1uF
C8406 C8410 C8407 C8418 C8424

C8411
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
0.1uF
TR1P ETNHUB_EPHY_RXIP2
C8444
R8418
0.1uF
49.9
C8447
R8419
0.1uF 49.9
TR1N ETNHUB_EPHY_RXIN2
C8445
0.1uF
Place close to chip

Place to center position between two chips

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. ETHERNET HUB 18 24
+3.5V_ST EXT_SPK AMP EXT_AMP_15Y_CI
IC8601-*1
PAM8124
R8617 +13V_AMP PVCCL_1

1 24
PGNDL_2
OPT 47K SD PGNDL_1

OPT 2 23
R8619 0
PVCCL_2 LOUT
3 22
EXT_SPK_DET
L8601 MUTE BSL
4 21
OPT UBW2012-121F
C LIN
5 20
AVCC_2
R8610
47K B Q8601 RIN AVCC_1
6 19
HP_DET MMBT3904(NXP)
OPT BYPASS
7 18
GAIN0
C8608 C8609
E C8670
0.1uF 0.1uF 10uF AGND_1
8 17
GAIN1
50V 50V 35V
HP_DET AGND_2
9 16
BSR
Close to Pin1
TP8601 PVCCR_1 ROUT
Close to Pin3 10 15
R8618 1K VCLAMP PGNDR_2

AMP_RESET_N EXT_AMP_14Y 11 14
OPT IC8601 PVCCR_2 PGNDR_1

12 13
+3.5V_ST
TPA3124D2PWPR
+3.5V_ST 4.7K
R8607 PVCCL_1 PGNDL_2
C8661
R8620 1 24
47uF
25V
100
Close to AMP IC
10K
C SD PGNDL_1
R8621 2 23
R8608 Q8602 EXT_OUT_L
B L8603
EXT_SPK_MUTE MMBT3904(NXP) R8602 C8657 C8659 R8615
10K PVCCL_2 LOUT 22.0uH
4.7K 0.47uF 0.47uF 10K
3 22
E 50V 50V NON_LINE_OUT R8615-*1
C8615 OPT 1.6K
0.22uF 1%
R8609 MUTE BSL
C8662
4 21 50V C8658 C8660 LINE_OUT
47uF
R8603
25V
10K 0.47uF 0.47uF
22.0uH 4.7K
1uF 50V 50V
C8610 10V LIN AVCC_2 L8604 OPT
5 20
EXT_SPK_LOUT_MAIN EXT_OUT_R
1uF R8614
C8611 10V RIN AVCC_1
EXT_SPK_ROUT_MAIN 6 19 10K
NON_LINE_OUT R8614-*1
R8604 1.6K
Close to AMP IC BYPASS GAIN0 10K 1%
OPT R8611
7 18 10K LINE_OUT
OPT
AGND_1 GAIN1
8 17
R8605 R8612
AGND_2 BSR 10K 10K
9 16
C8616
0.22uF
PVCCR_1 ROUT 50V
10 15
C8671
1uF VCLAMP PGNDR_2
50V 11 14
C8612 PVCCR_2 PGNDR_1

12 13 Close to Pin19,20
1uF
50V C8673
10uF C8613 C8674 C8675
35V 0.1uF 10uF 0.1uF
50V 50V
Close to Pin10 35V
EXT_SPK OUT(Single End)

JK8600
PEJ034-01
3 E_SPRING
4 R_SPRING
EXT_OUT_R
T_SPRING EXT_SPK_DET
5
EXT_OUT_L
OPT OPT Connected Disconnected
7B B_TERMINAL2 C8618 C8614
1uF 1uF +3.5V_ST
10V 10V High Low
6B T_TERMINAL2
R8616
15K
EXT_SPK_DET
C8672
1uF
10V VA8600-*1 VA8600
ICVS0505201FR 5.6V
Multi_Innochips Default_Amotech

@area
15/08/27 ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
X66791502.cir/086.sht
@suppr
@compC THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. EXT. SPK 20 24
@refer
@partN
+13V NEW RJP
Q8725
L8700 PMV48XP
D
+3.5V_ST
PTC MICOM EEPROM PTC_EEPROM_ROHM_16KBIT PTC_EEPROM_ATMEL_16KBIT
BLM18PG121SN1D IC8702-*1 IC8702-*2
C8702 BR24G16FJ-3GTE2 AT24C16C-SSHM-T
R8705 2.2uF
10K G R8712
16V
R8701
820
+3.3V_NORMAL
10K
OPT
A0
1 8
VCC
NC_1
1 8
VCC LX770H Power SEQUENCE
1/10W R8725
A1 WP
1608 R8706 Q8702 10K 2 7 NC_2
2 7
WP
Apply 1608 size 10K OPT
R8704 C MMBT3904(NXP)
because of derating PTC_EEPROM_ATMEL_64KBIT
R8702
820
10K R8724 IC8702
AT24C64D-SSHM-T
+3.5V_ST +3.5V_ST A2
3 6
SCL
NC_3
3 6
SCL
POWER_ON/OFF1(+3.3V_NORMAL)
C GND SDA
1/10W B 4 5 GND SDA
R8708 B 47K OPT
4 5
1608 Q8705
Q8700 OPT Q8703 64KBIT R87093 0 A0 VCC
MMBT3904(NXP) E 1 8
C8700
MMBT3904(NXP) C 10K C MMBT3904(NXP) 0.1uF R8770 R8771
64KBIT R87094 0 A1
2 7
WP
4.7K 4.7K
R8727 E 16V
R8703 10K R8726
JK8700 B
47K
B 47K
POWER_ON/OFF1 64KBIT R87095 0 A2
3 6
SCL R8737 22
PTC_EEPROM_SCL
POWER_ON/OFF2_4(+5.0V_Normal)
KRJV9768-1001-024
E E OPT GND SDA R8738 22
4 5
R8778 0 PTC_EEPROM_SDA
POWER_12V OPT
1
RGB/TxD RJP_CTRL0 POWER_ON/OFF2_1(DDR MAIN 1.5V)

2 R8721 100
COMPOSITE/AUDIO RJP_CTRL1 Write Protection

3 R8709 100
- Low : Normal Operation
RJP_CTRL2 - High : Write Protection
4
AUDIO/IR
R8710 100 POWER_ON/OFF2_2(+1.1V_CORE)
HDMI RJP_CTRL3
5 R8711 100
B+ Control RJP_12V_CTRL
6 R8713 100
+3.5V_ST_PTC
POWER_ON/OFF2_3(+2.5V)
Reserved/RxD RJP_CTRL4
7 R8718 100
GND
8
3.6V
3.6V
3.6V
3.6V
3.6V
GND L8701
SOC_RESET
1 BLM18PG121SN1D
+3.5V_ST_PTC
ZD8700
ZD8701
ZD8702
ZD8703
ZD8704
VOUT 2 3 VDD
BD48K28G C8727
R8730
IC8705 1uF
25V 100K
R8722 +3.5V_ST_PTC +5V_ST
4.7K IC8704
TXS0104EDR
OPT
R8779
Q8701
VCCA VCCB
MMBT3904(NXP) 1 14
C 100 R87069
R8719 100 A1 B1
B 2 13
RESET_HIGH C8717 SPI_CLOCK
10K 2200pF
1 2 A2 B2
3 12
E
R8717 R87071
4.7K 3 4 100 A3 B3
4 11
MISO_1 SPI_DIN
R87070
5 100 A4 B4
5 10
+3.5V_ST_PTC SPI_DOUT
SKHMPWE010
NC_1 NC_2
SW8700 6 9
PTC_RESET C8730 R87090
0.1uF GND OE 4.7K
7 8
+5V_bLAN_PWR
PTC_UPDATE R8744 33 C8732
C8701 +3.5V_ST_PTC R8740 4.7K SOC_RESET 0.1uF R87089
R8714 SW8701 0.01uF R8745 470 11K
4.7K SKHMPWE010 25V R8741 4.7K AMP_MUTE
R8729 100 R8773 33
E 1 2 LED_R R8742 4.7K UART3_RX
R8715 R8774 33
R8743 4.7K UART3_TX GND_JIG
/UPDATE_BY_CPU R8733 R8748 100
4.7K B 3 4 PTC_EEPROM_SCL BLAN CHECK
1K R8753 100
4.7K R8734 PTC_EEPROM_SDA
Q8711 C 5 +3.5V_ST_PTC
OPT UART_SWB
MMBT3906(NXP) R8716
47K
P10.4/UCA3TXD/UCA3SIMO
P10.2/UCB3SOMI/UCB3SCL
P10.1/UCB3SIMO/UCB3SDA
P10.5/UCA3RXDUCA3SOMI
P10.3/UCB3CLK/UCA3STE
P10.0/UCB3STE/UCA3CLK
R8767 GND_JIG
10K BLAN CHECK
RST/NMI/SBWTDIO
PJ.1/TDI/TCLK
+3.5V_ST_PTC
C8728
TEST/SBWTCK
P5.3/XT2OUT
P11.2/SMCLK
P5.2/XT2IN
P11.1/MCLK
P11.0/ACLK
C8714 C8715 C8716 47pF C
C8713
PJ.3/TCK
PJ.2/TMS
PJ.0/TDO
10uF 0.1uF 0.1uF 0.1uF 50V
P6.3/A3
P6.2/A2
P6.1/A1
P6.0/A0
16V 16V 16V OPT B R87096 4.7K
6.3V MPI_DIN
DVSS4
DVCC4
P10.7
P10.6
+3.5V_ST_PTC
E Q8717 R8785
MMBT3904(NXP) 10K
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
WOL_MICOM
P6.4/A4 1 75 P9.7 R8764 22
KEY1 EPHY_MDC MPI_DOUT
P6.5/A5 2 74 P9.6 R8765 22
KEY2 EPHY_MDIO C
P6.6/A6 3 73 P9.5/UCA2RXDUCA2SOMI WOL_MICOM
P6.7/A7 4 72 P9.4/UCA2TXD/UCA2SIMO R8772 4.7K B Q8719
RL_ON
P7.4/A12 P9.3/UCB2CLK/UCA2STE MMBT3904(NXP)
POWER_ON/OFF1 5 71
P7.5/A13 6 70 P9.2/UCB2SOMI/UCB2SCL C8729 GND_JIG E
POWER_ON/OFF2_1 BLAN CHECK
R8731 OPT P7.6/A14 P9.1/UCB2SIMO/UCB2SDA 47pF
7 69
50V
P7.7/A15 P9.0/UCB2STE/UCA2CLK R8757 22
bLAN_POWER_MANAGE
C8718 1uF P5.0/A8/VREF+/VeREF+
8
9
IC8701 68
67 P8.7 R8766 22
PTC_WOL OPT
ETNHUB_PWR_ON/OFF
OPT 25V P5.1/A9/VREF./VeREF. P8.6/TA1.1
10 66
C8711
27pF AVCC 11 MSP430F5419A 65 P8.5/TA1.0
/ETHERNET_RESET
ETNHUB_ENDEFER
+3.5V_ST_PTC +3.5V_ST_PTC
AVSS 12 64 DVCC2 C8723 0.1uF
X8700 P7.0/XIN DVSS2
32.768KHz 13 63
P7.1/XOUT 14 62 VCORE C8724 0.47uF R8777
C8712 DVSS1 P8.4/TA0.4 R8756 100 10K
15 61 WIFI_EN
20pF DVCC1 P8.3/TA0.3 R8781
OPT 16 60 MISO_1 bLAN_IR
10K
P1.0/TA0CLK/ACLK 17 59 P8.2/TA0.2 C
R8787 33 P1.1/TA0.0 18 58 P8.1/TA0.1 R87091 10K B
UART3_TX HDMI_CEC_PTC Q8718
R8788 33 P1.2/TA0.1 19 57 P8.0/TA0.0 R8707 22 MMBT3904(NXP)
UART3_RX IR C Q8728
P1.3/TA0.2 20 56 P7.3/TA1.2
RJP_CTRL0 POWER_ON/OFF2_3 MMBT3904(NXP) E
P1.4/TA0.3 P7.2/TB0OUTH/SVMOUT R8775 68K B
RJP_CTRL1 21 55 R8760 330 IR
POWER_ON/OFF2_2
P1.5/TA0.4 22 54 P5.7/UCA1RXD/UCA1SOMI
RJP_CTRL2
P1.6/SMCLK P5.6/UCA1TXD/UCA1SIMO R8776 E
RJP_CTRL3 23 53
P1.7 P5.5/UCB1CLK/UCA1STE 33K
24 52 R8761 100 bLAN_IR : need to pull up
RJP_CTRL4 AMP_EN
R8723 100 P2.0/TA1CLK/MCLK 25 51 P5.4/UCB1SOMI/UCB1SCL
/RTL8201_PMEB
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
R8768 22 OPT
I2C_SCL_MICOM
PTC power
P2.1/TA1.0
P2.2/TA1.1
P2.3/TA1.2
P2.4/RTCCLK
P2.5
P2.6/ACLK
P2.7/ADC12CLK/DMAE0
P3.2/UCB0SOMI/UCB0SCL
P3.3/UCB0CLK/UCA0STE
DVSS3
DVCC3
P3.4/UCA0TXD/UCA0SIMO
P3.5/UCA0RXD/UCA0SOMI
P4.0/TB0.0
P4.1/TB0.1
P4.2/TB0.2
P4.3/TB0.3
P4.4/TB0.4
P4.5/TB0.5
P4.6/TB0.6
P4.7/TB0CLK/SMCLK
R8769 22 OPT
I2C_SDA_MICOM
+3.5V_ST +3.5V_ST_PTC
+3.5V_ST_PTC
L8702
BLM18PG121SN1D R87008
100K
R8798 22 OPT R87007 0
EDID_WP UART_SWB
R8751 22 T_TERMINAL2 6B
EXT_SPK_MUTE
/RTL8201_INT B_TERMINAL2 7B
ETNHUB_INT R8758 100
R8735 1K UART3_RX
EXT_SPK_DET 5
OPT R87009 T_SPRING
WOL/WIFI_POWER_ON 10K R8759 100
R8792 EPI 22 UART3_TX
EPI_CTL
R_SPRING 4
3.6V
3.6V
POWER_DET
R8720
PTC_TX
PTC_RX
RJP_12V_CTRL
22 7A
POWER_ON/OFF2_4 B_TERMINAL1
ZD8705
ZD8706
T_TERMINAL1 6A
E_SPRING 3
D8700
D8701
OPT 5.6V
OPT 5.6V
PEJ027-04
JK8701

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. PTC / RJ45 20 24
* 3.5V_ST -> 5V_ST Step-up Power
+5V_ST
D8805
L8800 SMAB34
3.6uH 40V
OPT
C8808 C8804
+3.5V_ST
1uF 22uF
16V 16V
R8809
1/16W
6 5
51K
+3.5V_ST SW_1 PGND
1%
OPT
R1 C8805
7 4 100pF
SW_2 AGND R8811 50V
3.3K
8 3 1%
C8809 C8807 C8806 IN EN
THERMAL
0.1uF 10uF 1uF

16V 10V 10V
11
9 2
OPT FREQ FB
R8810
10 1 R2 18K
SS COMP 1%
C8803
0.1uF R8812
[EP]AGND TPS61087DRC 16K
16V
IC8800
C8810
2700pF
50V

ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR 21 24
+5V_ST Step Up
MPI
+3.3V_TU
L8901
BLM18PG121SN1D
b-LAN +5V_TU
R8943
OPT
C8906
22uF
6.3V
C8925
100pF
50V
C8908
0.1uF
16V
OPT
C8909
10uF
6.3V
470 R8944
82
close to b-LAN E
TUNER_SIF
+5V_TU
C8921
B
0.1uF 16V Q8906
C R8946 R8947 2012 perallel
R8945 MMBT3906(NXP)
4.7K 220 220 because of derating
TU_CVBS
b-LAN POWER +5V_ST +5V_ST_bLAN
E
L8903 L8902
BLM18PG121SN1D CB3216PA501E
C8922 +1.8V_TU B Q8907
TU8900 C8923 C8924
MMBT3906(NXP)
100pF 0.1uF 0.1uF C BLAN CHECK +5V_ST_bLAN
TMMB-H701F 50V 16V 16V R8948
1K
close to b-LAN OPT +5V_bLAN

+3.3V FET_OLD
1
Q8904
SIF AO3407A
2
D
GND_1 R8911 22
3 I2C_SCL6 5VST_JIG
BLAN CHECK C8914 R8940
SDA R8912 22 +5V_bLAN +5V_TU R8936
0.1uF
C8917 C8919
4 47K 10V 2.2K 1uF
I2C_SDA6 16V G OPT
CVBS 1uF 10V
5 C8900 C8903 OPT
27pF 27pF R8932
KDR412
IF-N1
D8910
6 50V OPT
KDR412
MAIN_NDIF 50V
D8909
40V
+1.8V R8928
+3.3V_TU
40V
7 10K
IF-P2 OPT Q8903 FET_NEW FET_NEW
8 2SC3052 C Q8904-*1 Q8905-*1
R8949
RESET 100K Add 2page Pull up B AO3407B AO3407B
9 R8950 100
D
/TU_RESET R8926 R8933
AGC1 +5V_bLAN_PWR bLAN_POWER_MANAGE 47K 100K
10 C8926 E
0.1uF OPT OPT
GND_2 OPT
11 1. should be guarded by ground C8911 C8912 C8913 G G
SCL
SUB_PDIF 2. No via on both of them 22uF 0.1uF 10uF
12 3. Signal Width >= 12mils 16V 16V 10V
Signal to Signal Width = 12mils +13V_C +13V_C_MPI
13
GND_3 SUB_NDIF Ground Width >= 24mils
IF-P1 3305_IF_AGC FET_OLD
14 SUB_IF_AGC
MAIN_PDIF R8951 100 R8970 R8917 Q8905
GND_4 C8941 100 C8910 AO3407A
15 MAIN_IF_AGC 1000pF 1K
C8927 0.01uF
D
IF-N2 SUB_IF_AGC 0.1uF 50V
16 close to b-LAN
16V
R8935 C8915
AGC2 JK8901 R8939
17 5VST_JIG 0.1uF G C8918
47K C8916 2.2K
PEJ027-04 16V 22uF 1uF
RESET2 BLAN CHECK OPT 25V
18 OPT
E_SPRING 3
NC
R8930
19
47K
GND_5 T_TERMINAL1
OPT
R8927
20 22 R8918 6A
10K
+5V
21 B_TERMINAL1 7A
22 R8919 Q8902 C
JP2-P1 R8924
22 47K B +13V_C
R_SPRING 4 bLAN_POWER_MANAGE +13V
JP2-P4 22 R8920
R8931
23 2SC3052
OPT
D8911
22K
J1-P2 T_SPRING E
24 22 R8921 5 SX34
J1-P3
25 B_TERMINAL2 7B 40V
22 R8922
D8904
D8906
D8907
J1-P4
D8908
26
R8923 T_TERMINAL2 6B
J1-P5 22
27
5.6V
5.6V
5.6V
5.6V
PTS R8907 22
28 b_PTS_CTL
OPT
OPT
OPT
OPT
JP1-P3 R8908 22
29 MPI_DIN
JP1-P4 R8909 22
30
MPI_DOUT
JP1-P5 R8904 22
31 SPI_DOUT
JP1-P6 +5V_bLAN_EXT
32 R8910 22
SPI_DIN
JP1-P7 R8905 22
33 SPI_CLOCK
JP1-P10 R8906 22
34 bLAN_IR
J2-P1 R8914 22
35
J2-P2 R8913 22 B-Lan MPI pin3 output power(12V) control
36
J2-P3 L8900
37
J2-P4
38 B-Land External RJ12 jack
J2-P6 C8904 2200pF
39 +13V_C_MPI
50V JK8900
40 MJ-623PT-6-S-SD 12V_JIG
BLAN CHECK
SHIELD JP8920
1 MPI_DOUT
2 MPI_DIN E
R8902 22
2N3906S-RTK
3 B Q8901
R8903 22 MPI_SENSE
Need to 100 oHM 2W

C
R8925
1/16W
10K
Game_control
5%
4
R8929
3.3K
R8937
R8934
SMD
200
5 GND
200
1W
1W
465mA(MAX) Max 240mA
6
IR_OUT
D8901
+5V_bLAN_EXT
D8900
D8902
D8903
+3.5V_ST +3.3V_TU_IN
+3.3V_NORMAL +3.3V_TU 7
Vout=1.25*(1+R2/R1)+Iadj*R2
5.6V
5.6V
5.6V
5.6V
C8942
+3.3V_TU +1.8V_TU L8905
0.1uF
OPT
OPT
L8904
OPT
OPT
BLM18PG121SN1D 16V
BLM18PG121SN1D
L8907 C MPI_5V or 12V
D8905
IC8900
C8931 AZ1117EH-ADJTRG1 MLB-201209-0120P-N2 Q8900 B
C8930
22uF C8932
5.6V
0.1uF 0.1uF 2SC3052

16V 10V 16V Max 0.7A
OPT
IN OUT E
ADJ/GND
C8929 150 R8963 ZD8900
10uF R8960 R1 0 2.5V +1.23V_TU
Close to the b-LAN 10V 300
C8928 IC8901 R8938
R8961
10uF AP2132MP-2.5TRG1 [EP] 3.3K
10V +3.3V_TU_IN b_PTS_CTL
R8955
200 R2 1 8
20K R2
R8962 1%
1.3A C8938
THERMAL
PG GND
150mA(MAX) 0.1uF
R8956
9
2 7 11K
1% MPI_5V or 12V (PIN3) Select Control from b-LAN
+5V_NORMAL EN ADJ R8957 R1
+5V_TU R8954
10K 10K
3 6 1%
C8937 VIN VOUT
L8906
BLM18PG121SN1D
10uF
16V
+5V_NORMAL
4 2A 5
VCTRL NC
C8940
C8933 C8934 10uF
C8935 C8936
0.1uF 22uF
22uF 0.1uF 16V
16V 10V 16V
10V
C8939
1uF
Close to the b-LAN
Vout=0.6*(1+R1/R2)

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. bLAN 22 24
Ethernet PHY(RTL8201FN)/RJ45
+3.5V_ST +3.5V_ST_LAN
+3.5V_ST_LAN
LAN 1 ETNHUB_AVDD18
LAN_AVDD33
BLM18PG121SN1D
IC9003
AP2191WG-7
L9000
(AUX LAN)
L9002
BLM18PG121SN1D JK9000
IN OUT RJ45VT-01SN002
5 1
C9012
C9028 0.1uF
GND R9068 16V
0.1uF 2 1
30K ETNHUB_EPHY_TXOP1
OPT R9039
EN FLG 49.9
R9002 33 4 3 1%
ETNHUB_PWR_ON/OFF 2
C9015 R9040
LAN_DVDD33 49.9
0.1uF
R9007 1% 3
C9029 ETNHUB_EPHY_TXON1
10K 0.1uF L9001
OPT BLM18PG121SN1D
16V
OPT ETNHUB_EPHY_RXIP1 4
C9013 R9041
0.1uF 49.9
16V
1% 5
C9016 R9042
49.9
5.5V
5.5V
5.5V
5.5V
0.1uF
1% 6
ETNHUB_EPHY_RXIN1
LAN_ESD
LAN_ESD
LAN_ESD
LAN_ESD
7
D9004
D9006
D9008
D9010
8
C9017 C9021 9
0.01uF 0.1uF
16V
9
PHY ADDRESS CONFIG

50V 50V
12pF 12pF CONFIG PHY_ADDRESS = 111
C9003 C9005
TP9000
LAN_DVDD33
25.0MHz
X9000
0
1 2
R9026 R9027 R9032
4.7K 4.7K 4.7K
ET_COL/SNI
LAN_AVDD33 LAN_DVDD33
TR1N
TR1P
TR0N
TR0P
Place this Res. near IC C9014

R9009 0.1uF
2.49K 16V Place Closed
1%
C9004
0.1uF
R9014 3.3K LAN 2 ETNHUB_AVDD18
C9002
16V
BLM18PG121SN1D
0.1uF
16V
AVDD10OUT
DVDD10OUT
RXER/FXEN
ET_COL/SNI
L9003
JK9001
AVDD33_2
DVDD33_3
[EP]GND
CKXTAL2
CKXTAL1
RJ45VT-01SN002
LAN_DVDD33
C9007
NC_8
RSET
NC_7
NC_6
COL
0.1uF
16V EPHY_CRS_DV
R9025
ETNHUB_EPHY_TXOP3 1
4.7K LAN_DVDD33
48
47
46
45
44
43
42
41
40
39
38
37
LAN_AVDD33 R9051
MDI+[0] 1 36 CRS/CRS_DV R9015 22 +3.5V_ST 49.9
MDI-[0] LED1/PHYAD[1] 1% 2
2 35
THERMAL C9024 R9052
NC_1 3 34 LED0/PHYAD[0]
49 R9005 R9006 R9038 0.1uF 49.9
MDI+[1] 4 33 PMEB 1.5K 1.5K 1%
4.7K 3
MDI-[1] 5
IC9000 32 LED2/PHYAD[2] OPT OPT ETNHUB_EPHY_TXON3
AVDD33_1 6 RTL8201FN 31 MDIO R9000 22
EPHY_MDIO
NC_2 7 30 MDC R9003 22 ETNHUB_EPHY_RXIP3 4
LAN_DVDD33 EPHY_MDC
NC_3 8 29 PHYRSTB R9075 22 R9053
C9000 /ETHERNET_RESET 49.9
0.1uF NC_4 9 28 DVDD10
16V /RTL8201_PMEB TO MCU 1% 5
NC_5 10 27 TXEN
EPHY_EN C9025 R9054
R9001 4.7K EN_LDO_OUT TXD[3] 49.9
11 26 0.1uF
5.5V
5.5V
5.5V
5.5V
TXER TXD[2] 1% 6
12 25 C9010 C9011 ETNHUB_EPHY_RXIN3
0.1uF
LAN_ESD
LAN_ESD
LAN_ESD
LAN_ESD
0.1uF
13
14
15
16
17
18
19
20
21
22
23
24
16V 16V
7
RXDV
RXD[0]
DVDD33_1
RXD[1]
RXD[2]
RXD[3]/CLK_CTL
RXC
INTB
DVDD33_2
TXC
TXD[0]
TXD[1]
D9007
D9009
D9011
D9005
8
LAN_DVDD33 EPHY_TXD1
C9023 C9022 9
EPHY_TXD0
0.01uF 0.1uF
R9011 51 Place near IC 16V
LAN_DVDD33 EPHY_REFCLK 9
R9004 4.7K LAN_DVDD33 C9027 5pF
3.3K
C9026 33pF
C9006
EPHY_RXD0 R9012 0.1uF
R9067
4.7K 16V
R9013 100
EPHY_RXD1 /RTL8201_INT TO SOC / MCU
C9001
0.1uF
16V

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. PHY / RJ45 23 24
Power Pro:Idiom (XMARK)
+3.3V_PROIDIOM
+3.3V_NORMAL +3.3V_PROIDIOM +3.3V_VCCINT
L9402
C9405 MLB-201209-0120P-N2
L9401 10uF
10V
MLB-201209-0120P-N2
+3.3V_PROIDIOM
+3.3V_VCCINT
1uF 10V
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
BLM18PG121SN1D
BLM18PG121SN1D
BLM18PG121SN1D
BLM18PG121SN1D
BLM18PG121SN1D
L9404
L9405
L9406
L9407
L9408
C9425
C9422
C9423
C9424
C9426
C9427
C9429
C9430
C9431
C9432
C9433
C9434
C9435
SOC -> Pro:Idiom Serial
27MHz(200ppm)+3.3V_PROIDIOM R9423 33
TS_S_OUT_CLK
TS_S_OUT_VAL R9424 33
TS_S_OUT_SYNC R9425 33
X9400 TS_S_OUT_DATA R9426 33
27MHZ
VCC NC_OR_EN/DIS
VCCA_PLL2
VCCA_PLL1
GNDG_PLL2
GNDA_PLL2
GNDG_PLL1
GNDA_PLL1
VCCINT_12
VCCINT_11
VCCINT_10
4 1
VCCIO2_4
VCCIO2_3
VCCIO2_2
VCCIO2_1
VCCIO3_3
VCCIO3_2
VCCIO3_1
VCCIO4_4
VCCIO4_3
VCCIO4_2
VCCIO4_1
VCCIO1_3
VCCIO1_2
VCCIO1_1
VCCINT_9
VCCINT_8
VCCINT_7
VCCINT_6
VCCINT_5
VCCINT_4
VCCINT_3
VCCINT_2
VCCINT_1
OUTPUT GND
IO2_40
IO2_39
IO2_38
IO2_37
IO2_42
IO2_35
GND_26
GND_25
GND_24
GND_23
GND_22
GND_21
GND_20
GND_19
GND_18
GND_17
GND_16
GND_15
GND_14
GND_13
GND_12
GND_11
GND_10
GND_9
GND_8
GND_7
GND_6
GND_5
GND_4
GND_3
GND_2
GND_1
3 2
C9403 C9404
10uF 0.1uF AR9400 33
10V TPO_CLK IP : Serial TP
E5
E6
D5
D6
B5
B6
H11
H6
J12
J11
J5
J6
T16
T12
T5
T1
L11
L9
L8
L6
K10
K8
K6
J9
J7
H10
H8
G11
G9
G7
F11
F9
F8
F6
A12
A5
A16
A1
A3
F7
F10
A14
C16
K11
P16
T14
L10
L7
T3
P1
G6
C1
T10
T7
K9
K7
J10
J8
H9
H7
G10
G8
A10
A7
TPO_VAL CLK1 H1 R11 IO4_34/CH_CLK TS_S_IN_0_CLK
TPI_CLK
TPO_SOP IO2_29/TP_SOP B8 R8 IO4_20/CH_VALID TS_S_IN_0_VAL
TPI_VAL
IO2_21/TP_VALID B9 R9 IO4_26/CH_SOP TS_S_IN_0_SYNC
TPI_SOP
TPO_DATA[0-7] R9411 0 IO2_17/TP_ERR B10 R10 IO4_30/CH_ERR
R9401 TPI_DATA[0-7]
TPO_DATA[0] AR9401 33 IO2_41/TP_DATA[7] IO4_8/CH_DATA[0] TS_S_IN_0_DATA TPI_DATA[0]
22 C5 P5
Q16 PROIDIOM_SYSCLK IO2_36/TP_DATA[6] IO4_13/CH_DATA[1] TPI_DATA[1]
TPO_DATA[1] C6 P6
TPO_DATA[2] IO2_31/TP_DATA[5] C7 P7 IO4_18/CH_DATA[2] TPI_DATA[2]
TPO_DATA[4] AR9402 33 IO2_23/TP_DATA[3] IO4_28/CH-DATA[4] TPI_DATA[4]
C9 P9
IO1_29 M1 E7 IO2_34
IO1_2 IO2_33 XMARK_1.8V
Case 1) IPTV Serial TP Output -> Set Parallel TP Output to GPIO Input Port C3 A6
Case 2) RFTV Parallel TP Output -> Set Serial TP Output to GPIO Input Port IO1_3 IO2_32 C9437
C2 B7
Cap close to IC
0.1uF
XMARK_1.8V IO1_4 B1 A4 IO2_43
IO1_5 G5 D7 IO2_30
IO1_6 F4 A8 IO2_28
XMARK_1.8V L9403
BLM18PG121SN1D
IO1_7 D3 E8 IO2_27 C9438
IO1_8 IO2_26 0.1uF
+3.3V_PROIDIOM E4 D8
+3.3V_PROIDIOM
IO1_9
IO1_10
F5
IC9403 B4 IO2_44
IO2_24
MLB-201209-0120P-N2
XMARK_1.8V C9410 E3 E10

IC9401 R9402
4.7uF
10V
IO1_11 D2 C4 IO2_45
10K IO1_12 IO2_22
AZ1117EH-ADJTRG1 OPT
Close to IC
CLK0
E2
G1 LGDT1001 D9
A9 IO2_20
L9400
PROIDIOM_SYSCLK
IO2_48/RESET B2 D10 IO2_19 C9439
/PROIDIOM_RESET
R9409 22 IO3_37/I2C_SCK IO2_16 0.1uF
D14 A11
I2C_SCL3
IN OUT
C9409
0.1uF I2C_SDA3
R9410 22 IO3_34/I2C_SDA
DCLK
E14 I2C : 0x47 B11 IO2_15
IO2_46
3 2 16V
CONF_DONE
K4 B3
IO2_13
Close to IC K13 D11
NCONFIG H3 D12 IO2_12
1 NCE J4 E9 IO2_11
R9408 DATA0 IO2_10
0 ZD9400 XMARK_1.8V H2 E11
C9400
22uF C9401
ADJ/GND 2.5V IO1_21SO G4 E12 IO2_9
16V 0.1uF IO1_22/ASDO K3 A2 IO2_47
16V 150 NCEO IO2_7
R9405 H4 B12
0.1uF
C9413
R1 NSTATUS J13 A13 IO2_6

300 C9406
R9406 C9408 MSEL0 IO2_5
0.1uF 22uF J3 B13
16V 16V MSEL1 J2 C13 IO2_4
TCK J14 B14 IO2_3
R9407
R2 200 TDO H15 A15 IO2_2
TMS J15 B15 IO2_1
TDI H14 D13 IO3_43
IO1_1/INIT_DONE D4 C14 IO3_42
IO1_13 D1 C15 IO3_41
IO1_14 F3 B16 IO3_40 C9436
0.1uF
C9412
0.1uF
IO1_15 G3 G12 IO3_39
IO1_16 F2 H13 IO3_38
IO1_17 E1 E13 IO3_36 +3.3V_PROIDIOM
IO1_18 G2 F12 IO3_35
IO1_19 F1 D15 IO3_33 R9417 4.7K
RESET IO1_20 H5 D16 IO3_32 R9418 4.7K
IO1_23 J1 E15 IO3_31
IO1_24 K2 E16 IO3_30
IO1_25 L3 F15 IO3_29
+3.3V_PROIDIOM
IO1_26 K1 F13 IO3_28
IO1_27 L1 F14 IO3_27
IO1_28 L2 F16 IO3_26
IC9400 IO1_30 IO3_25
N1 G15
APX809-26SAG-7 IO1_31 IO3_24
M2 G13
092:M16 R9429 IO1_32 IO3_23
100 N2 G14
RESET 2 3 VCC
/PROIDIOM_RESET IO1_33 M3 H12 IO3_22
C9440 1 IO1_34 L5 G16 CLK2
R9428 1uF C9441
25V GND IO1_35 M4 H16 CLK3
4.7K 1uF
M10
T11
N10
N11
N12
M11
M12
R12
T13
R13
R14
P13
T15
R15
N13
P14
P15
R16
N15
N16
K12
K14
L12
N14
M13
M14
L13
M15
M16
L14
L15
L16
K16
K15
J16
OPT 25V
N3
K5
L4
R1
P2
P3
N4
R2
T2
R3
P4
R4
T4
R5
M5
M6
N5
N6
R6
M7
T6
R7
N7
T8
M8
N8
T9
N9
M9
IO1_36
IO1_37
IO1_38
IO1_39
IO1_40
IO1_41
IO1_42
IO4_1
IO4_2
IO4_3
IO4_4
IO4_5
IO4_6
IO4_7
IO4_9
IO4_10
IO4_11
IO4_12
IO4_14
IO4_15
IO4_16
IO4_17
IO4_19
IO4_21
IO4_22
IO4_23
IO4_25
IO4_27
IO4_29
IO4_31
IO4_32
IO4_36
IO4_37
IO4_38
IO4_39
IO4_40
IO4_42
IO4_43
IO4_44
IO4_45
IO4_46
IO4_47
IO4_48
IO3_1
IO3_2
IO3_3
IO3_4
IO3_5
IO3_6
IO3_7
IO3_8
IO3_9
IO3_10
IO3_11
IO3_12
IO3_13
IO3_14
IO3_15
IO3_16
IO3_17
IO3_18
IO3_19
IO3_20
IO3_21
XMARK_1.8V
+3.3V_PROIDIOM
C9428
C9417 C9418 C9419 C9420 C9421 0.1uF
0.1uF
0.1uF
C9414
C9415
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
R9416 4.7K
R9414 4.7K
R9415 4.7K
Cap close to IC

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. PRO:IDIOM 24 24

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Internal Use Only

North/Latin America http://aic.lgservice.com

MODEL : 40LX770H 40LX770H-UA

P/NO : MFL69373701 (1510-REV00) Printed in Korea

SAFETY PRECAUTIONS ......................................................................... 3

TROUBLE SHOOTING GUIDE................................................................ 19

EXPLODED VIEW ................................................................................... 28

SCHEMATIC CIRCUIT DIAGRAM ............................................ APPENDIX

IMPORTANT SAFETY NOTICE

General Guidance Leakage Current Hot Check (See below Figure)

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed

Leakage Current Cold Check(Antenna Cold Check)

Fuse and Conventional Resistor

1. Application range 3. Test method

5.2. HDMI Input (PC/DTV)

2. Specification 4.2. M AC Address, ESN Key and Widevine

※ Caution 4.2.4. Communication Port connection

* Remark 4.2.5. Download

3.2. Final assembly adjustment

Connect SET → LAN port == PC → LAN Port

4.4.2. LAN PORT inspection(PING TEST)

4.5.2. Method & notice

4.6. EDID Download

ⓕ Vendor Specific(HDMI) ⓕ Vendor Specific(HDMI)

5.3.3. Applied models

Command Set ACK

5.4.2. Check the menu on in-start

6.1. External SPK Out

(2) Check the sound from the TV Set

6.1.2. Check the speaker out

* Remark: Inspect in Power Only Mode and check SW version

S/W switch direction: RJP <-->

When checking the RJP(<-->)

6.3. Pro:Idiom Check

- Connection Line: 7.2. Specification

8. GND and HI-POT Test

8.2 GND & HI-POT auto-check

6.5. Ship-out mode check (In-stop) 8.2.2. Checkpoint

▪ If internal pattern is not available, use RF input. In EZ Adj.

(5) Updating Completed, the TV will restart automatically.

* After downloading, have to adjust Tool Option again.

Check IC8701 N Check switch SW8700, SW8701

Check X8700 Clock N Check X8700 application circuit or

Check IC8701 IIC N Check IIC line or replace IC8701

Check IR input state of IC8701 N Check IR board

Re-download PTC Micom

2. No OSD Trouble Shooting guide

N Check Q2302 application circuit or

Check LCD Module

Check IIC Signal N

Check IF Signal N Check tuner application circuit or

Check X101 N Replace X101

Check input signal is supported format

Check AC cable for damage or open

Check JK3402 N JK3402 may have problem.

This board has big problem because

6. HDMI Video Trouble Shooting guide

Check AC cable for damage

2. Specification 4.2. M AC Address, ESN Key and Widevine

* Remark: Inspect in Power Only Mode and check SW version

▪ If internal pattern is not available, use RF input. In EZ Adj.