ALU Desing

Todays Lecture
Homework #3 Assigned Due Mar 4 Project: form groups of 3 (preferred) by Mar 6, I will assign after that Project Specifications on Web, Due April 17 (written document and demonstration) Building the building blocks Outline Review Digital building blocks An Arithmetic Logic Unit (ALU) Reading Appendix C, Chapter 3
Basics of Logic Design Arithmetic Logic Unit (ALU)

Computer Science 104
Alvin R. Lebeck
CPS 104
Review: Digital Design

Logic Design, Switching Circuits, Digital Logic Recall: Everything is built from transistors A transistor is a switch It is either on or off On or off can represent True or False Given a bunch of bits (0 or 1) Is this instruction a lw or a beq? What register do I read? How do I add two numbers? Need a method to reason about complex expressions
Review: Boolean Functions

Boolean functions have arguments that take two values ({T,F} or {0,1}) and they return a single or a set of ({T,F} or {0,1}) value(s). Boolean functions can always be represented by a table called a Truth Table Example: F: {0,1}3 -> {0,1}2
a 0 0 0 0 1 1 1
3 Alvin R. Lebeck
b 0 0 1 1 0 1 1
c 0 1 0 1 0 0 1
f 1f 2 0 1 1 1 1 0 0 0 1 0 0 1 1 1
4
Alvin R. Lebeck
CPS 104
CPS 104
Review: Boolean Functions and Expressions F(A, B, C) = (A * B) + (~A * C)

A
0 0 0 0 1 1 1 1
Review: Boolean Gates

Gates are electronics devices that implement simple Boolean functions Examples
a b AND(a,b) a b OR(a,b)
B
0 0 1 1 0 0 1 1
C
0 1 0 1 0 1 0 1
F
0 1 0 1 0 0 1 1
NOT(a)
a b
XOR(a,b)
a b
NAND(a,b)
a b
NOR(a,b)
a b
XNOR(a,b)
Alvin R. Lebeck
CPS 104
Alvin R. Lebeck
CPS 104
Review: Boolean Functions, Gates and Circuits

Circuits are made from a network of gates. (function compositions).
a b XOR(a,b)
Parity Example
The parity code of a binary word counts the number of ones in a word. If there are an even number of ones the parity code is 0, if there are an odd number of ones the parity code is 1. For example, the parity of 0101 is 0, and the parity of 1101 is 1. Construct the truth table for a function that computes the parity of a four-bit word. Implement this function using AND, OR and NOT gates. (Note there are no constraints on the number of gate inputs.)
F = ~a*b + ~b*a
a 0 0 1 1
b 0 1 0 1
XOR(a,b) 0 1 1 0
a F
Alvin R. Lebeck
CPS 104
Alvin R. Lebeck
CPS 104
Circuit Example: Decoder
Circuit Example: 2x1 MUX

Multiplexor (MUX) selects one of many inputs
I1 I0 Q0 Q1 Q2 Q3 0 0 0 1 1 0 1 1 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 1
a b s
B
MUX(A, B, S) = (A * S) + (B * ~S)
Gate 1 Gate 3 A S Gate 2 Y = (A * S) + (B * ~S)
Alvin R. Lebeck
CPS 104
Alvin R. Lebeck
CPS 104
10
Example 4x1 MUX

a b
1 0 1
Arithmetic and Logical Operations in ISA

What operations are there? Arithmetic Logic Unit (ALU)
Hardware that performs operations Only one operation at a time y
1 0
a b y c d
3 2
c d
0 1 0
How do we implement the operations?

Consider AND, OR, NOT, and ADD Input is two bits, output
s0
s1
S
Alvin R. Lebeck
CPS 104
11
Alvin R. Lebeck
CPS 104
12
Truth Table for 1-bit Addition 01101100 01101101 +00101100 10011001

a 0 0 0 0 1 1 1 1 b 0 0 1 1 0 0 1 1 Cin 0 1 0 1 0 1 0 1 Sum 0 1 1 0 1 0 0 1 Cout 0 0 0 1 0 1 1 1
A 1-bit Full Adder

Cin a b Sum
01101100 01101101 +00101100 10011001

a 0 0 0 0 1 1 1 1 b 0 0 1 1 0 0 1 1 Cin 0 1 0 1 0 1 0 1 Sum 0 1 1 0 1 0 0 1 Cout 0 0 0 1 0 1 1 1
What is the circuit for Sum and for Cout?

Cout
Alvin R. Lebeck
CPS 104
13
Alvin R. Lebeck
CPS 104
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Example: 4-bit adder
ALU Slice (Almost)

Cin
S3 Cout
Full Adder
S2
Full Adder
S1
Full Adder
S0
Full Adder
a
Cin 0
3 2 1
F 0 1 2 3 Q a+b NOT b a OR b a AND b
a3 b3
a2 b2
a1
b1
a0
b0
Adder
0 2
Cout F
Alvin R. Lebeck CPS 104 15 Alvin R. Lebeck CPS 104 16
Subtraction
How do we perform integer subtraction? What is the HW?
ALU Slice
Cin
A 0 1 F 0 0 1 2 3 Q a+b a-b NOT b a OR b a AND b
a b
3 2 1
1 0
Adder
0 2
~Add/Sub
Cout F
Overflow
Example1: 0100000 01101012 (= 5310) +01010102 (= 4210) 10111112 (=-3310) Example3: 1100000 01101012 (= 5310) +11010102 (=-2210) 00111112 (= 3110)
Alvin R. Lebeck
Overflow Detection for 4-bit adder

OVERFLOW
Example2: 1000000 10101012 (=-4310) +10010102 (=-5410) 00111112 (= 3110) Example4: 0000000 00101012 (= 2110) +01010102 (= 4210) 01111112 (= 6310)
CPS 104 19 Alvin R. Lebeck
S3 Cout
Full Adder
S2
Full Adder
S1
Full Adder
S0
Full Adder
Cin 0
a3 b3
a2 b2
a1
b1
a0
b0
CPS 104
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The ALU
Overow = Zero
Abstraction: The ALU General structure Two operand inputs Control inputs
Q1 Q0
ALU control
Input A ALU
ALU Operation
Qn-1
Qn-2
Zero Result Overflow
ALU Slice
ALU Slice
ALU Slice
ALU Slice
Input B
Carry Out
an-1 bn-1
an-2 bn-2
a1
b1
a0
b0
Alvin R. Lebeck
CPS 104
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Alvin R. Lebeck
CPS 104
22
The Shift Operation

Consider an 8-bit machine How do I implement the shift operation?
Shifter
Alvin R. Lebeck
CPS 104
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Alvin R. Lebeck
CPS 104
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Summary thus far

Given Boolean function, generate a circuit that realizes the function. Constructed circuits that can add and subtract. The ALU: a circuit that can add, subtract, detect overflow, compare, and do bit-wise operations (AND, OR, NOT) Shifter Next up: Storage Elements: Registers, Latches, Buses
Memory Elements
All the circuit we looked at so far are combinational circuits: the output is a Boolean function of the inputs. We need circuits that can remember values. (registers) The output of the circuit is a function of the input AND a stored value (state) . Circuits with memory are called sequential circuits.
Alvin R. Lebeck
CPS 104
25
Alvin R. Lebeck
CPS 104
26
Set-Reset Latch
R Q R 0 1
Set-Reset Latch (Continued)

0 Q R 0 0 1 Q
R 0 0 1 1
S 0 1 0 1
Q Q 1 0 -
0 0
1 0
R 0 0 1 1
S 0 1 0 1
Q Q 1 0 -
Alvin R. Lebeck
CPS 104
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Alvin R. Lebeck
CPS 104
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Set-Reset Latch (Continued)

R 0 1 0 Q R 0 0 1 Enable Q
Data Latch (D Latch)

D 0 1 E 1 1 0 Q 0 1 Q
0 0
Q Time
1 1
Data Time D E Q
1 0 1 0 1 0
Q Does not affect Output
S R Q
1 0 1 0 1 0
Alvin R. Lebeck
CPS 104
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Alvin R. Lebeck
CPS 104
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D Flip-Flop
D D E C Clock
On On D latch
D Flip-Flop Timing
Q Q D D D Q1 E
latch
D E
D latch
Q Q
D D Q E
latch
Q Q
Time
D is transferred to the first D latch and the second is stable.
D Q1
1 0 0 1 0 1 1 0
C the output of the first stage is transferred to the second (output), and the first stage is stable.
Alvin R. Lebeck
CPS 104
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Alvin R. Lebeck
CPS 104
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Tri-State Driver
The
Bus Connections
The Bus: Many to many connections. Mutual exclusion: At most one Enable is on!
Tri-State driver is like a (one directional) switch: When the Enable is on (E=1) it transfers the input to the output. When the Enable is off (E=0) it disconnects the output.
E D Q
D 0 1 -
E 1 1 0
Q 0 1 Z
Z :- High Impedance
E
Alvin R. Lebeck
CPS 104
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Alvin R. Lebeck
CPS 104
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Register Cells on a bus

Data-In
Q D Q D Q D Q D
3-Port Register Cell

Bus-C Bus-B
WE D latch
Q
D latch
Q
D latch
Q
D latch
Q
RE
WE
RE
WE
RE
WE
RE
Q
Complement Q
Bus-A One can source and sink from any cell on the bus by activating the right controls (WE and RE).
DinEnable OutA OutB
Stores one bit of a register Can Read onto Bus-A & Bus-B and Write fromBus-C Simultaneously
3-Port Register File

Data-in
Address Decode Circuit

Bus-C Bus-B
Q
EC
EA
EB
Bus-C Bus-B
Register address: 01
Bit-1
DEnable
Bus-A Bus-C Bus-B
Bus-A OutA OutB

A0 A1 EA
Bit-0
Bus-A
B0 B1 EB C0 C1 EC
Alvin R. Lebeck
CPS 104
37
Alvin R. Lebeck
CPS 104
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Register File (Four 4-bit Registers)

Reg-3
One-bit Cell
Summary
Given Boolean function, generate a circuit that realize the function. Constructed circuits that can add and subtract. The ALU: a circuit that can add, subtract, detect overflow, compare, and do bit-wise operations (AND, OR, NOT) Shifter Memory Elements: SR-Latch, D Latch, D Flip-Flop Tri-state drivers & Bus Communication Register Files Control Signals modify what circuit does with inputs
ALU, Shift, Register Read/Write
Reg-2
One-bit Cell
Reg-1
One-bit Cell
Reg-0
One-bit Cell
A3 B3 C3 A2 B2 C2 A1 B1 C1 A0 B0 C0
One-bit Cell
One-bit Cell
One-bit Cell
One-bit Cell
One-bit Cell
One-bit Cell
One-bit Cell
One-bit Cell
One-bit Cell
One-bit Cell
One-bit Cell
One-bit Cell
A-En Add-A1 Add-A0 B-En Add-B1 Add-B0 C-En Add-C1 Add-C0
Alvin R. Lebeck
CPS 104
39
Alvin R. Lebeck
CPS 104
40

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Todays Lecture

Basics of Logic Design Arithmetic Logic Unit (ALU)

Review: Digital Design

Review: Boolean Functions

Review: Boolean Functions and Expressions F(A, B, C) = (A * B) + (~A * C)

Review: Boolean Gates

Review: Boolean Functions, Gates and Circuits

Circuit Example: Decoder

Circuit Example: 2x1 MUX

Gate 1 Gate 3 A S Gate 2 Y = (A * S) + (B * ~S)

Example 4x1 MUX

Arithmetic and Logical Operations in ISA

How do we implement the operations?

Truth Table for 1-bit Addition 01101100 01101101 +00101100 10011001

A 1-bit Full Adder

01101100 01101101 +00101100 10011001

What is the circuit for Sum and for Cout?

Example: 4-bit adder

ALU Slice (Almost)

Overflow Detection for 4-bit adder

Zero Result Overflow

The Shift Operation

Summary thus far

Set-Reset Latch (Continued)

Set-Reset Latch (Continued)

Data Latch (D Latch)

Q Does not affect Output

D is transferred to the first D latch and the second is stable.

Register Cells on a bus

3-Port Register Cell

3-Port Register File

Address Decode Circuit

Bus-A OutA OutB

Register File (Four 4-bit Registers)

A-En Add-A1 Add-A0 B-En Add-B1 Add-B0 C-En Add-C1 Add-C0

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