Adic Syllabus

University of Mumbai Class: S.E.
Branch: Electrical Engineering Subject: Analog and Digital Integrated Circuits Periods per Week Lecture (Each 60 min) Practical Tutorial Evaluation System Theory Practical and oral Oral Term Work Total
Contents
Semester :IV
3 2 --Hours 4 ------4 Marks 100 ----25 125

Hours
Module
Introduction: Number systems, binary, octal, hexadecimal and others, conversion from one system to another, binary, BCD and hexadecimal, converting binary to gray & gray to binary and XS3, designing code converter circuit e. g binary to gray, BCD to Seven segment parity generator, weighted, reflective, Sequential, gray, error detecting codes, odd, even parity, Hamming codes, Alphanumeric, morse, teletypewriter ASCII, EBCDIC codes. Boolean Algebra Logic Gates : AND, OR, NOT, XOR, XNOR, operation NAND, NOR use of the universal gate for performing different operations, laws of boolean algebra De- Morgans theorems, relating a truth table to Boolean expression multi level circuits. Combinational circuit and Design: K-Maps and their use in specifying Boolean expressions, Minterm,Maxterm SOP and POS implementation .Implementing logic function using universal gates, variable entered maps for five and six variables function quine Mc Clusky tabular techniques. Binary Arithmetic circuits: Adders, subtractors (Half and Full) BCD adder subtractor, carry, look ahead adder, Serial adder, multiplier magnitude comparators, Arithmetic Logic units. use of multiplexers in logic design: Multiplexer (ULM) Shannons theorem ULM trees demultiplexers, designing using ROMS and ULMS. Hazards in combinational circuits. design of circuit using IC Sequential Logic Circuits : Comparison of combinational & sequential circuit, multi
05
04
06
vibrators (Astable, monostable and bitable). flip-flops, SR, T, D, JK, Master Slave JK, converting one flip-flop to another, use of debounce switch counters Modulus of a counter, Ripple counters, Up/Down Counter, Designing sequential counters using gate IC and counters IC By drawing state transition diagram & state transition table, ring counter Johnson counter, twisted ring counter. Pseudo random number generator. Unused states and locked conditions. Design of circuit using IC Registers : Serial input serial output, serial input parallel output,left shift register. Use of register ICs for sequence generator and counters. Memories : RAM, ROM the basic cell IC bipolar. CMOS, RAM dynamic RAM cell. Magnetic core NVRAM, bubble memory. CCD, PAL, PLA. Logic families : RTL, DTL, TTL, Schotkey, clamed TTL tristate gate ECL, IIL, MOS devices, CMOS comparison of logic families, interfacing different families. TTL with CMOS, NMOS, TTL ECL & TTL IIL & TTL. Analog IC : Voltage regulator IC 78xx ,79xx , adjustable voltage regulator using IC 723 , IC 555 timer ( ADC-DAC ) IC 0808 , 0809, function generator IC 8083
05
03
04
04
05
Theory Examination:
1. 2. 3. 4. 5. Question paper will comprise of total 7 questions, each of 20 marks. Only 5 questions need to be solved. Q.1 will be compulsory and based on the entire syllabus. Remaining questions will be mixed in nature. In question paper weightage of each module will be proportional to the number of respective lecture hours as mentioned in the syllabus
Term work: Term work consists of minimum eight experiments and a written test. The distribution of the term work shall be as follows, Laboratory work (Experiments and Journal) :10 marks Test (at least one) :10 marks Attendance (Practical and Theory) :05 marks The final certification and acceptance of term-work ensures the satisfactory performance of laboratory work and minimum passing in the term-work.
List of Laboratory Experiments:
1 2 3 4 5 6 7 8
Implementing study of gates and Logic Operations like , NOT, AND, OR, NOR,XOR & XNIR using (i) all NAND gates (ii) all NOR Gates. Implementing a Binary to Gray, gray to binary or Binary to XS3 code converter using gate Ics. Simplifying 3, 4 variable logic functions and implementing them using gate Ics. AND/OR, OR/AND, all NOR. Constructing flip-flops like SR, D, JK and T using all NAND gates and a Debounce switch. Designing a mod N counter where N <14 using J K flip-flops and D flip-flops. Design of a ripple counter / OR a two bit comparator using gate Ics. Building of a ring counter and twisted ring counter using D flip flop Ics. Any one of the following. (i) Full Adder using Gates and using Decoder or a Multiplexer. (ii) Using a counter ICS like 7490 or 7492 or 7493 as a BCD counter (iii) Using a shift register as a sequence generator.
Books Recommended:
Text books: 1. Jain R.P., Modern Digitals Electronic Tata McGraw Hill, 1984. 2. Morris M. Mano. Digital design, Prentice Hall International 1984. Reference books: 1. Alan b. Marcovitz, introduction to logic Design, McGraw Hill International 2002. 2. Malvino & Leach, Digital principal and Application , Tata McGraw Hill, 1991. 3. Bignell James& Donovan Robert Digital electronic Delmar, Thomas Learning, 2001. 4. Jog N.K. Logic Circuits 2nd , Nandu Publishers & printers Pvt. Ltd 1998.

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University of Mumbai Class: S.E.

3 2 --Hours 4 ------4 Marks 100 ----25 125

List of Laboratory Experiments:

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