Lm75 Sensor Temperature
Lm75 Sensor Temperature
Lm75 Sensor Temperature
February 2004
LM75 Digital Temperature Sensor and Thermal Watchdog with Two-Wire Interface
General Description
The LM75 is a temperature sensor, Delta-Sigma analog-todigital converter, and digital over-temperature detector with I2C interface. The host can query the LM75 at any time to read temperature. The open-drain Overtemperature Shutdown (O.S.) output becomes active when the temperature exceeds a programmable limit. This pin can operate in either Comparator or Interrupt mode. The host can program both the temperature alarm threshold (TOS) and the temperature at which the alarm condition goes away (THYST). In addition, the host can read back the contents of the LM75s TOS and THYST registers. Three pins (A0, A1, A2) are available for address selection. The sensor powers up in Comparator mode with default thresholds of 80C TOS and 75C THYST. The LM75s 3.0V to 5.5V supply voltage range, low supply current and I2C interface make it ideal for a wide range of applications. These include thermal management and protection applications in personal computers, electronic test equipment, and office electronics. n Register readback capability n Power up defaults permit stand-alone operation as thermostat n Shutdown mode to minimize power consumption n Up to 8 LM75s can be connected to a single bus n UL Recognized Component
Key Specifications
j Supply Voltage j Supply Current
j Temperature Accuracy
2C(max) 3C(max)
Applications
n n n n System Thermal Management Personal Computers Office Electronics Electronic Test Equipment
Features
n SOP-8 and Mini SOP-8 (MSOP) packages save space n I2C Bus interface n Separate open-drain output pin operates as interrupt or comparator/thermostat output
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LM75
Connection Diagram
SOP-8 and Mini SOP-8
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Ordering Information
Order Number LM75BIM-3 LM75BIMX-3 LM75BIMM-3 LM75BIMMX-3 LM75BIM-5 LM75BIMX-5 LM75BIMM-5 LM75BIMMX-5 LM75CIM-3 LM75CIMX-3 LM75CIMM-3 LM75CIMMX-3 LM75CIM-5 LM75CIMX-5 LM75CIMM-5 LM75CIMMX-5 Package Marking LM75BIM-3 LM75BIM-3 T01B T01B LM75BIM-5 LM75BIM-5 T00B T00B LM75CIM-3 LM75CIM-3 T01C T01C LM75CIM-5 LM75CIM-5 T00C T00C NS Package Number M08A (SOP-8) M08A (SOP-8) MUA08A (MSOP-8) MUA08A (MSOP-8) M08A (SOP-8) M08A (SOP-8) MUA08A (MSOP-8) MUA08A (MSOP-8) M08A (SOP-8) M08A (SOP-8) MUA08A (MSOP-8) MUA08A (MSOP-8) M08A (SOP-8) M08A (SOP-8) MUA08A (MSOP-8) MUA08A (MSOP-8) Supply Voltage 3.3V 3.3V 3.3V 3.3V 5V 5V 5V 5V 3.3V 3.3V 3.3V 3.3V 5V 5V 5V 5V Transport Media 95 Units in Rail 2500 Units on Tape and Reel 1000 Units on Tape and Reel 3500 Units on Tape and Reel 95 Units in Rail 2500 Units on Tape and Reel 1000 Units on Tape and Reel 3500 Units on Tape and Reel 95 Units in Rail 2500 Units on Tape and Reel 1000 Units on Tape and Reel 3500 Units on Tape and Reel 95 Units in Rail 2500 Units on Tape and Reel 1000 Units on Tape and Reel 3500 Units on Tape and Reel Noise Filter on SDA and SCL Yes Yes Yes Yes Yes Yes Yes Yes Not Available Not Available Not Available Not Available Not Available Not Available Not Available Not Available
Pin Description
Label SDA SCL O.S. GND +VS Pin # 1 2 3 4 8 I2C Clock Input Overtemperature Shutdown Open Drain Output Power Supply Ground Positive Supply Voltage Input Function I2C Serial Bi-Directional Data Line. Open Drain. Typical Connection From Controller, tied to a pull-up From Controller Pullup Resistor, Controller Interrupt Line Ground DC Voltage from 3V to 5.5V; 0.1F bypass capacitor with 10F bulk capacitance in the near vicinity Ground (Low, 0) or +VS (High, 1)
A0A2
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LM75
Pin Description
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LM75
Operating Ratings
Specified Temperature Range (Note 5) Supply Voltage Range (+VS) TMIN to TMAX 55C to +125C +3.0V to +5.5V
Limits (Note 7)
2.0 3.0
9 100 0.25 4 6 0.25 4 6 0.8 1.0 0.5
Parameter Logical 1 Input Voltage Logical 0 Input Voltage Logical 1 Input Current Logical 0 Input Current All Digital Inputs High Level Output Current Low Level Output Voltage Output Fall Time
Conditions
Units (Limit) V (min) V (max) V (min) V (max) A (max) A (max) pF A (max) V (max) ns (max)
0.005 0.005 20
LM75
(Continued) DIGITAL DC CHARACTERISTICS Unless otherwise noted, these specifications apply for +VS = +5 Vdc for LM75BIM-5, LM75BIMM-5, LM75CIM-5, and LM75CIMM-5 and +VS = +3.3 Vdc for LM75BIM-3, LM75BIMM-3, LM75CIM-3, and LM75CIMM-3 (Note 6). Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = +25C, unless otherwise noted. Parameter Conditions Typical (Note 12) Limits (Note 7) Units (Limit)
Symbol
IO = 3 mA I2C DIGITAL SWITCHING CHARACTERISTICS Unless otherwise noted, these specifications apply for +VS = +5 Vdc for LM75BIM-5, LM75BIMM-5, LM75CIM-5, and LM75CIMM-5 and +VS = +3.3 Vdc for LM75BIM-3, LM75BIMM-3, LM75CIM-3, and LM75CIMM-3. CL (load capacitance) on output lines = 80 pF unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = +25C, unless otherwise noted. The switching characteristics of the LM75 fully meet or exceed the published specifications of the I2C bus. The following parameters are the timing relationships between SCL and SDA signals related to the LM75. They are not the I2C bus specifications. Symbol t1 t2 t3 t4 t5 tTIMEOUT SCL (Clock) Period Data in Set-Up Time to SCL High Data Out Stable after SCL Low SDA Low Set-Up Time to SCL Low (Start Condition) SDA High Hold Time after SCL High (Stop Condition) SDA Time Low for Reset of Serial Interface (Note 13) LM75B LM75C Parameter Conditions Typical (Note 12) Limits (Note 7) 2.5 100 0 100 100 75 325 Not Applicable Units (Limit) s (min) ns (min) ns (min) ns (min) ns (min) ms (min) ms (max)
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Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating the device beyond its rated operating conditions. Note 2: When the input voltage (VI) at any pin exceeds the power supplies (VI < GND or VI > +VS) the current at that pin should be limited to 5 mA. The 20 mA maximum package input current rating limits the number of pins that can safely exceedthe power supplies with an input current of 5 mA to four. Note 3: See AN-450 Surface Mounting Methods and Their Effect on Product Reliability or the section titled Surface Mount found in a current National Semiconductor Linear Data Book for other methods of soldering surface mount devices. Note 4: Human body model, 100 pF discharged through a 1.5 k resistor. Machine model, 200 pF discharged directly into each pin.
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LM75
Note 5: LM75 JA (thermal resistance, junction-to-ambient) when attached to a printed circuit board with 2 oz. foil similar to the one shown in Figure 3 is summarized in the table below:
Device Number LM75BIM-3, LM75BIM-5, LM75CIM-3, LM75CIM-5 LM75BIMM-3, LM75BIMM-5, LM75CIMM-3, LM75CIMM-5
Note 6: All part numbers of the LM75 will operate properly over the +VS supply voltage range of 3V to 5.5V. The devices are tested and specified for rated accuracy at their nominal supply voltage. Accuracy will typically degrade 1C/V of variation in +VS as it varies from the nominal value. Note 7: Limits are guaranteed to Nationals AOQL (Average Outgoing Quality Level). Note 8: This specification is provided only to indicate how often temperature data is updated. The LM75 can be read at any time without regard to conversion state (and will yield last conversion result). If a conversion is in process it will be interrupted and restarted after the end of the read. Note 9: For best accuracy, minimize output loading. Higher sink currents can affect sensor accuracy with internal heating. This can cause an error of 0.64C at full rated sink current and saturation voltage based on junction-to-ambient thermal resistance. Note 10: O.S. Delay is user programmable up to 6 over limit conversions before O.S. is set to minimize false tripping in noisy environments. Note 11: Default values set at power up. Note 12: Typicals are at TA = 25C and represent most likely parametric norm. Note 13: Holding the SDA line low for a time greater than tTIMEOUT will cause the LM75B to reset SDA to the IDLE state of the serial bus communication (SDA set High).
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The LM75B also has a bus fault timeout feature. If the SDA line is held low for longer than tTIMEOUT (75 ms minimum to 325 ms maximum) the LM75B will reset to the IDLE state (SDA set to high impedance) and wait for a new start condition.
1.1 O.S. OUTPUT, TOS AND THYST LIMITS In Comparator mode the O.S. Output behaves like a thermostat. The output becomes active when temperature exceeds the TOS limit, and leaves the active state when the temperature drops below the THYST limit. In this mode the O.S. output can be used to turn a cooling fan on, initiate an emergency system shutdown, or reduce system clock speed. Shutdown mode does not reset O.S. state in a comparator mode. In Interrupt mode exceeding TOS also makes O.S. active but O.S. will remain active indefinitely until reset by reading any register via the I2C interface. Once O.S. has been activated
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by crossing TOS, then reset, it can be activated again only by Temperature going below THYST. Again, it will remain active indefinitely until being reset by a read. Placing the LM75 in shutdown mode also resets the O.S. Output. 1.2 POWER UP AND POWER DOWN The LM75 always powers up in a known state. The power up default conditions are: 1. Comparator mode 2. TOS = 80C 3. THYST = 75C 4. 5. O.S. active low Pointer = 00
above the nominal 1.7V power up threshold, the internal registers are reset to the power up default values listed above. 1.3 I2C BUS INTERFACE The LM75 operates as a slave on the I2C bus, so the SCL line is an input (no clock is generated by the LM75) and the SDA line is a bi-directional serial data path. According to I2C bus specifications, the LM75 has a 7-bit slave address. The four most significant bits of the slave address are hard wired inside the LM75 and are 1001. The three least significant bits of the address are assigned to pins A2A0, and are set by connecting these pins to ground for a low, (0); or to +VS for a high, (1). Therefore, the complete slave address is: 1 MSB 0 0 1 A2 A1 A0 LSB
If the LM75 is not connected to the I2C bus on power up, it will act as a stand-alone thermostat with the above temperature settings. When the supply voltage is less than about 1.7V, the LM75 is considered powered down. As the supply voltage rises
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Note 14: These interrupt mode resets of O.S. occur only when LM75 is read or placed in shutdown. Otherwise, O.S. would remain active indefinitely for any event.
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1.7 COMPARATOR/INTERRUPT MODE As indicated in the O.S. Output Temperature Response Diagram, Figure 4, the events that trigger O.S. are identical for either Comparator or Interrupt mode. The most important difference is that in Interrupt mode the O.S. will remain set indefinitely once it has been set. To reset O.S. while in Interrupt mode, perform a read from any register in the LM75. 1.8 O.S. OUTPUT
Temperature data can be read from the Temperature, TOS Set Point, and THYST Set Point registers; and written to the TOS Set Point, and THYST Set Point registers. Temperature data is represented by a 9-bit, twos complement word with an LSB (Least Significant Bit) equal to 0.5C: Temperature +125C +25C +0.5C 0C 0.5C 25C 55C Digital Output Binary 0 1111 1010 0 0011 0010 0 0000 0001 0 0000 0000 1 1111 1111 1 1100 1110 1 1001 0010 Hex 0FAh 032h 001h 000h 1FFh 1CEh 192h
The O.S. output is an open-drain output and does not have an internal pull-up. A high level will not be observed on this pin until pull-up current is provided from some external source, typically a pull-up resistor. Choice of resistor value depends on many system factors but, in general, the pull-up resistor should be as large as possible. This will minimize any errors due to internal heating of the LM75. The maximum resistance of the pull up, based on LM75 specification for High Level Output Current, to provide a 2V high level, is 30 k. 1.9 O.S. POLARITY The O.S. output can be programmed via the configuration register to be either active low (default mode), or active high. In active low mode the O.S. output goes low when triggered exactly as shown on the O.S. Output Temperature Response Diagram, Figure 4. Active high simply inverts the polarity of the O.S. output.
1.5 SHUTDOWN MODE Shutdown mode is enabled by setting the shutdown bit in the Configuration register via the I2C bus. Shutdown mode reduces power supply current to 4 A typical. In Interrupt mode O.S. is reset if previously set and is undefined in Comparator mode during shutdown. The I2C interface remains active. Activity on the clock and data lines of the I2C bus may slightly increase shutdown mode quiescent current. TOS, THYST, and Configuration registers can be read from and written to in shutdown mode. 1.6 FAULT QUEUE A fault queue of up to 6 faults is provided to prevent false tripping of O.S. when the LM75 is used in noisy environments. The number of faults set in the queue must occur consecutively to set the O.S. output.
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There are four data registers in the LM75, selected by the Pointer register. At power-up the Pointer is set to 00; the location for the Temperature Register. The Pointer register latches whatever the last location it was set to. In Interrupt Mode, a read from the LM75, or placing the device in shutdown mode, resets the O.S. output. All registers are read and write, except the Temperature register which is read only. A write to the LM75 will always include the address byte and the Pointer byte. A write to the Configuration register requires one data byte, and the TOS and THYST registers require two data bytes. Reading the LM75 can take place either of two ways: If the location latched in the Pointer is correct (most of the time it is expected that the Pointer will point to the Temperature register because it will be the data most frequently read from the LM75), then the read can simply consist of an address byte, followed by retrieving the corresponding number of data bytes. If the Pointer needs to be set, then an address byte, pointer byte, repeat start, and another address byte will accomplish a read.
The first data byte is the most significant byte with most significant bit first, permitting only as much data as necessary to be read to determine temperature condition. For instance, if the first four bits of the temperature data indicates an overtemperature condition, the host processor could immediately take action to remedy the excessive temperatures. At the end of a read, the LM75 can accept either Acknowledge or No Acknowledge from the Master (No Acknowledge is typically used as a signal for the slave that the Master has read its last byte). An inadvertent 8-bit read from a 16-bit register, with the D7 bit low, can cause the LM75 to stop in a state where the SDA line is held low as shown in Figure 5. This can prevent any further bus communication until at least 9 additional clock cycles have occurred. Alternatively, the master can issue clock cycles until SDA goes high, at which time issuing a Stop condition will reset the LM75.
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FIGURE 5. Inadvertent 8-Bit Read from 16-Bit Register where D7 is Zero (0)
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Register Select
P0-P1: Register Select: P1 0 0 1 1 P2P7: Must be kept zero. 1.12 TEMPERATURE REGISTER (Read Only): D15 MSB D14 Bit 7 D13 Bit 6 D12 Bit 5 D11 Bit 4 D10 Bit 3 D9 Bit 2 D8 Bit 1 D7 LSB D6 X D5 X D4 X D3 X D2 X D1 X D0 X P0 0 1 0 1 Register Temperature (Read only) (Power-up default) Configuration (Read/Write) THYST (Read/Write) TOS (Read/Write)
D0D6: Undefined D7D15: Temperature Data. One LSB = 0.5C. Twos complement format. 1.13 CONFIGURATION REGISTER (Read/Write): D7 0 D6 0 D5 0 D4 Fault Queue D3 D2 O.S. Polarity Power up default is with all bits 0 (zero). D0: Shutdown: When set to 1 the LM75 goes to low power shutdown mode. D1: Comparator/Interrupt mode: 0 is Comparator mode, 1 is Interrupt mode. D2: O.S. Polarity: 0 is active low, 1 is active high. O.S. is an open-drain output under all conditions. D4 0 0 1 1 D3 0 1 0 1 2 4 6 D3D4: Fault Queue: Number of faults necessary to detect before setting O.S. output to avoid false tripping due to noise. Faults are determind at the end of a conversion. Conversions take about 100 ms, typically, to complete. D1 Cmp/Int D0 Shutdown
D5D7: These bits are used for production testing and must be kept zero for normal operation. 1.14 THYST AND TOS REGISTER (Read/Write): D15 MSB D14 Bit 7 D13 Bit 6 D12 Bit 5 D11 Bit 4 D10 Bit 3 D9 Bit 2 D8 Bit 1 D7 LSB D6 X D5 X D4 X D3 X D2 X D1 X D0 X
D0D6: Undefined D7D15: THYST Or TOS Trip Temperature Data. Power up default is TOS = 80C, THYST = 75C.
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DIGITAL NOISE ISSUES The LM75B features an integrated low-pass filter on both the SCL and the SDA digital lines to mitigate the effects of bus noise. Although this filtering makes the LM75B communication robust in noisy environments, good layout practices are always recommended. Minimize noise coupling by keeping digital traces away from switching power supplies. Also, ensure that digital lines containing high-speed data communications cross at right angles to the SDA and SCL lines. Excessive noise coupling into the SDA and SCL lines on the LM75C specifically noise with amplitude greater than 400 mVpp (the LM75s typical hysteresis), overshoot greater than 300 mV above +Vs, and undershoot more than 300 mV below GND may prevent successful serial communication with the LM75C. Serial bus no-acknowledge is the most common symptom, causing unnecessary traffic on the bus. The layout procedures mentioned above apply also to the LM75C. Although the serial bus maximum frequency of communication is only 100 kHz, care must be taken to ensure proper termination within a system with long printed circuit board traces or multiple parts on the bus. Resistance can be added in series with the SDA and SCL lines to further help filter noise and ringing. A 5 k resistor should be placed in series with the SCL line, placed as close as possible to the SCL pin on the LM75C. This 5 k resistor, with the 5 pF to 10 pF stray capacitance of the LM75 provides a 6 MHz to 12 MHz low pass filter, which is sufficient filtering in most cases.
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When using the two-wire interface: program O.S. for active high and connect O.S. directly to Q2s gate.
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FIGURE 9. Data Acquisition System with Temperature Input via I2C Bus
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Physical Dimensions
8-Lead (0.150" Wide) Molded Small Outline Package (SOP), JEDEC Order Number LM75CIM-3, LM75CIMX-3, LM75CIM-5, LM75CIMX-5, LM75BIM-3, LM75BIMX-3, LM75BIM-5, or LM75BIMX-5 NS Package Number M08A
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LM75 Digital Temperature Sensor and Thermal Watchdog with Two-Wire Interface
Physical Dimensions
8-Lead Molded Mini Small Outline Package (MSOP) (JEDEC REGISTRATION NUMBER M0-187) Order Number LM75CIMM-3, LM75CIMMX-3, LM75CIMM-5, LM75CIMMX-5, LM75BIMM-3, LM75BIMMX-3, LM75BIMM-5, or LM75BIMMX-5 NS Package Number MUA08A
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