Frank Schirrmeister

Early and continuous integration is poised to shift development efforts left and to reduce overall development effort significantly.

As we are in the process of hyperscaling the large volumes of data that our devices and sensors create, processing this data along the way at far and near edges, and transmitting the hard-to-imagine volumes of data through networks to data centers for processing, the data center itself is undergoing a fundamental shift with new networking and architecture co-design opportunities. In a previous blog post, I addressed some of the aspects of everything becoming programmable and the four core… Show more

As we are in the process of hyperscaling the large volumes of data that our devices and sensors create, processing this data along the way at far and near edges, and transmitting the hard-to-imagine volumes of data through networks to data centers for processing, the data center itself is undergoing a fundamental shift with new networking and architecture co-design opportunities. In a previous blog post, I addressed some of the aspects of everything becoming programmable and the four core elements that Facebook considers for their data center development—compute, storage, memory, and networking. This post adds Google’s view to that picture with regard to how networking and compute intertwine in the next, fifth epoch of distributed computing. Show less

As mentioned in previous posts, one of the key conversations I have with customers a lot these days is how to deal with the balance of storage, compute and connectivity as we enter the era of hyperscale computing. While there are overarching challenges that are “of similar class” across the vertical application domains—consumer, hyperscale computing, mobile, networking, aerospace/defense, automotive, industrial and healthcare—some seem to be more pronounced or even unique to certain verticals.

Just five years from now, by 2025, sensors will create exabytes of data per day (according to IBS and Seagate) that will be transmitted through next-generation networks with the lowest latencies possible. Zettabytes of data will be stored in the global datasphere, and consumer expectations for instantaneous responses to all their needs will be increasingly prevalent. To achieve that, networks, storage and compute must “hyper-scale” to speeds and capacities that are hard to comprehend, coining… Show more

Just five years from now, by 2025, sensors will create exabytes of data per day (according to IBS and Seagate) that will be transmitted through next-generation networks with the lowest latencies possible. Zettabytes of data will be stored in the global datasphere, and consumer expectations for instantaneous responses to all their needs will be increasingly prevalent. To achieve that, networks, storage and compute must “hyper-scale” to speeds and capacities that are hard to comprehend, coining the term, “hyperscale computing”. It will be one of the big topics at the Arm DevSummit, impacting all our lives at consumers. Show less

We hear a lot about “edge computing” these days. We are approaching an era in which unfathomable amounts of data are created, which need to be transmitted, stored, processed and made sense of. As we are witnessing never-before-seen scaling in all those domains, the term “hyperscale” computing has been invented. But what about the edge? As it turns out, the definition seems to have changed over time! What is the edge? Where is it? How is it defined?

Frank Schirrmeister, Senior Group Director, Solutions Marketing at Cadence looks at how classic EDA is merging with the world of system design and AI

In his keynote at CadenceLIVE Americas 2020, Facebook’s Vijay Rao, director, Technology and Strategy, described the four core elements the team considers when designing their data centers—compute, storage, memory, and networking. Wait a minute. Facebook? How did we get here? Wasn’t EDA supposed to be focused on chip design? As indicated in a previous blog, electronic value chains are definitely undergoing major changes, and EDA and computational software are key enablers.

You may have seen the term “computational software” more often recently. What are some prominent examples? Why do we in the electronic design automation (EDA) industry have to deal with math in the first place? Wasn’t chip design all about drawing polygons at one point? I’m glad you asked!

Observing electronic ecosystems and value chains change over time is fascinating. For instance, the design chain for mobile devices fundamentally changed over the past two decades with waves of disaggregation and aggregation. Today, the area of computing and data centers is amid tectonic shifts and transformation, with the combination of hyperscale, networking, artificial intelligence (AI), and machine learning (ML) fundamentally re-shuffling value creation.

In considering how far we’ve come with mobile devices just in the last two decades, it’s entertaining to think about the next ten years. When asking the new power users, Generation Z or the “digital natives,” a couple of key themes emerge, both for mobile devices, as well as for the networks they reside in. Some key advancements have been made this week with the announcement of Arm’s latest “Premium Mobile” processor. It seems the next step towards the future of mobile devices and connectivity… Show more

In considering how far we’ve come with mobile devices just in the last two decades, it’s entertaining to think about the next ten years. When asking the new power users, Generation Z or the “digital natives,” a couple of key themes emerge, both for mobile devices, as well as for the networks they reside in. Some key advancements have been made this week with the announcement of Arm’s latest “Premium Mobile” processor. It seems the next step towards the future of mobile devices and connectivity is “digital immersion.” Show less

Even though our teenage children may not show it the proper appreciation (yet), math is often referred to as the “universal language.” And it is, even in EDA. Whenever I’m asked what the heck I do in my day job, I often fall back on analogies—a lot of them refer to building houses. For the geekier ones among us, I have even invoked The Hitchhiker’s Guide to the Galaxy’s Slartibartfast to explain system-level design approaches and challenges. It turns out that the EDA industry is already full of… Show more

Even though our teenage children may not show it the proper appreciation (yet), math is often referred to as the “universal language.” And it is, even in EDA. Whenever I’m asked what the heck I do in my day job, I often fall back on analogies—a lot of them refer to building houses. For the geekier ones among us, I have even invoked The Hitchhiker’s Guide to the Galaxy’s Slartibartfast to explain system-level design approaches and challenges. It turns out that the EDA industry is already full of math, computational software, and advanced mathematical simulation that gets lost when using the simplified analogies above. More math, please! It’s for the cool kids! Show less

There is a new buzzword in town, “digital twins.” I have been using it for a while now in the context of system-on-chip (SoC) verification as well as a little more broadly when it comes to security issues for data in general. There are some differences in emphasis across different vertical domains, based on when they are used during the life cycle, which use models are desired and what scope of data is to be consumed. Depending on the combination of these, the fidelity, capacity and speed of… Show more

There is a new buzzword in town, “digital twins.” I have been using it for a while now in the context of system-on-chip (SoC) verification as well as a little more broadly when it comes to security issues for data in general. There are some differences in emphasis across different vertical domains, based on when they are used during the life cycle, which use models are desired and what scope of data is to be consumed. Depending on the combination of these, the fidelity, capacity and speed of the underlying tools really matters. Let’s try to decipher this situation. Show less

As I am in Nuremberg for the annual embedded world conference, the overall mood here seemed a bit muted and slow on day one. There are rumors of 200 exhibitors of the roughly 1100 having pulled out due to the global health situation—we are all asked not to shake hands and smile instead—and the rainy weather doesn’t help much either. With the weather turning to snow on day two, the attendance seems to be pretty good, actually, and we have good discussions with attendees. At Embedded World… Show more

As I am in Nuremberg for the annual embedded world conference, the overall mood here seemed a bit muted and slow on day one. There are rumors of 200 exhibitors of the roughly 1100 having pulled out due to the global health situation—we are all asked not to shake hands and smile instead—and the rainy weather doesn’t help much either. With the weather turning to snow on day two, the attendance seems to be pretty good, actually, and we have good discussions with attendees. At Embedded World software is always on my mind, and with that, I am thinking of James (Jim) Ready, a colleague and friend who passed on a little bit over two years ago. I miss his humor and software insights. What has changed in software development? What would he say today? Show less

In technology, we are always trying to figure out when we have reached critical mass, have crossed the chasm, or even can be considered mainstream. We all have seen the adoption curves for consumer products. In design and verification technology, a distinct B2B setting with fewer end customers than in the B2C domain, the situation seems to be even worse as there is no “one flow” to design and verify electronics. So, when do you know when you have made it? When you have enough users in one place… Show more

In technology, we are always trying to figure out when we have reached critical mass, have crossed the chasm, or even can be considered mainstream. We all have seen the adoption curves for consumer products. In design and verification technology, a distinct B2B setting with fewer end customers than in the B2C domain, the situation seems to be even worse as there is no “one flow” to design and verify electronics. So, when do you know when you have made it? When you have enough users in one place sharing their experiences, and they confirm how they use your products. And that’s exactly what happened in 2019 for emulation and prototyping. Show less

In my predictions blog last year, I focused on verification throughput and its expected growth in 2019. The four areas I predicted we’d see growth in during 2019 were scalable performance, unbound capacity including cloud enablement, smart bug hunting and multi-level abstractions. In 2018, the five key verification drivers that I identified were security, safety, application specificity, processor ecosystems and system design enablement. All these areas will be still relevant for the upcoming… Show more

In my predictions blog last year, I focused on verification throughput and its expected growth in 2019. The four areas I predicted we’d see growth in during 2019 were scalable performance, unbound capacity including cloud enablement, smart bug hunting and multi-level abstractions. In 2018, the five key verification drivers that I identified were security, safety, application specificity, processor ecosystems and system design enablement. All these areas will be still relevant for the upcoming year, too, but the key items that I have in mind for 2020 are application specificity, the power of ecosystems and a resurgence of classic system design. Show less

The last couple of weeks have been busy with me participating on three panels that dealt with AI and machine learning in the contexts of automotive and aero/defense, in San Jose, Berlin and Detroit. The common theme? Data is indeed the new oil, and it messes with traditional value creation in electronics. Also, requirements for system design and verification are changing and there are completely new, blank-sheet opportunities that can help with verification and confirmation of what AI and ML… Show more

The last couple of weeks have been busy with me participating on three panels that dealt with AI and machine learning in the contexts of automotive and aero/defense, in San Jose, Berlin and Detroit. The common theme? Data is indeed the new oil, and it messes with traditional value creation in electronics. Also, requirements for system design and verification are changing and there are completely new, blank-sheet opportunities that can help with verification and confirmation of what AI and ML actually do. Show less

About 15 years ago, the assumption in the EDA industry was that system design would be inevitable. The transition from gate-level design to a new entry point at the register transfer level (RTL) seemed complete with logic synthesis becoming well-adopted. The next step seemed to be so obvious at the time: High-level synthesis (HLS) and transaction-based development beyond RTL—also taking into account software—would then be the next entry point from which design and verification could be… Show more

About 15 years ago, the assumption in the EDA industry was that system design would be inevitable. The transition from gate-level design to a new entry point at the register transfer level (RTL) seemed complete with logic synthesis becoming well-adopted. The next step seemed to be so obvious at the time: High-level synthesis (HLS) and transaction-based development beyond RTL—also taking into account software—would then be the next entry point from which design and verification could be automated. Well, 15 years on, it still hasn’t happened. Why? Show less