UAA2016 Zero Voltage Switch Power Controller

The UAA2016 is designed to drive triacs with the Zero Voltage technique which allows RFIfree power regulation of resistive loads. Operating directly on the AC power line, its main application is the precision regulation of electrical heating systems such as panel heaters or irons. A builtin digital sawtooth waveform permits proportional temperature regulation action over a 1C band around the set point. For energy savings there is a programmable temperature reduction function, and for security a sensor failsafe inhibits output pulses when the sensor connection is broken. Preset temperature (i.e. defrost) application is also possible. In applications where high hysteresis is needed, its value can be adjusted up to 5C around the set point. All these features are implemented with a very low external component count.
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ZERO VOLTAGE SWITCH POWER CONTROLLER

MARKING DIAGRAMS

8 1

PDIP8 P SUFFIX CASE 626

UAA2016P AWL YYWWG

Zero Voltage Switch for Triacs, up to 2.0 kW (MAC212A8) Direct AC Line Operation Proportional Regulation of Temperature over a 1C Band Programmable Temperature Reduction Preset Temperature (i.e. Defrost) Sensor Failsafe Adjustable Hysteresis Low External Component Count PbFree Packages are Available

8 8 1 SOIC8 D SUFFIX CASE 751 1 x = A or D A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G, G = PbFree Package (Note: Microdot may be in either location) 2016x ALYW G

Failsafe 3 Sense Input 4 Temperature Reduction + Sampling Full Wave Logic Internal Reference

UAA2016
Pulse Amplifier 6 Output 7 +VCC

PIN CONNECTIONS
Vref 1 Hys. Adj. 2 Sensor 3 Temp. Reduc. 4 8 7 6 5 (Top View) Sync VCC Output VEE

1/2

4Bit DAC 2 Hysteresis Adjust

Synchronization Supply Voltage

11Bit Counter (Sawtooth Generator)

ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet.

1 Voltage Reference 8 Sync 5 VEE

Figure 1. Representative Block Diagram

Semiconductor Components Industries, LLC, 2006

January, 2006 Rev. 9

Publication Order Number: UAA2016/D

UAA2016
MAXIMUM RATINGS (Voltages referenced to Pin 7)
Rating Supply Current (IPin 5) NonRepetitive Supply Current, AC Synchronization Current Pin Voltages (Pulse Width = 1.0 ms) Symbol ICC ICCP Isync VPin 2 VPin 3 VPin 4 VPin 6 IPin 1 IO PD RqJA TA Value 15 200 3.0 0; Vref 0; Vref 0; Vref 0; VEE 1.0 150 625 100 20 to + 85 Unit mA mA mA V

Vref Current Sink Output Current (Pin 6), (Pulse Width < 400 ms) Power Dissipation Thermal Resistance, JunctiontoAir Operating Temperature Range

mA mA mW C/W C

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.

ELECTRICAL CHARACTERISTICS (TA = 25C, VEE = 7.0 V, voltages referred to Pin 7, unless otherwise noted.)
Characteristic Supply Current (Pins 6, 8 not connected), (TA = 20 to + 85C) Stabilized Supply Voltage (Pin 5), (ICC = 2.0 mA) Reference Voltage (Pin 1) Output Pulse Current (TA = 20 to + 85C), (Rout = 60 W, VEE = 8.0 V) Output Leakage Current (Vout = 0 V) Output Pulse Width (TA = 20 to + 85C) (Note 1), (Mains = 220 Vrms, Rsync = 220 kW) Comparator Offset (Note 5) Sensor Input Bias Current Sawtooth Period (Note 2) Sawtooth Amplitude (Note 6) Temperature Reduction Voltage (Note 3), (Pin 4 Connected to VCC) Internal Hysteresis Voltage, (Pin 2 Not Connected) Additional Hysteresis (Note 4), (Pin 2 Connected to VCC) Failsafe Threshold (TA = 20 to + 85C) (Note 7) Symbol ICC VEE Vref IO IOL TP Voff IIB TS AS VTR VIH VH VFSth Min 10 6.5 90 50 10 50 280 280 180 Typ 0.9 9.0 5.5 100 40.96 70 350 10 350 Max 1.5 8.0 4.5 130 10 100 +10 0.1 90 420 420 300 Unit mA V V mA mA ms mV mA sec mV mV mV mV mV

1. Output pulses are centered with respect to zero crossing point. Pulse width is adjusted by the value of Rsync. Refer to application curves. 2. The actual sawtooth period depends on the AC power line frequency. It is exactly 2048 times the corresponding period. For the 50 Hz case it is 40.96 sec. For the 60 Hz case it is 34.13 sec. This is to comply with the European standard, namely that 2.0 kW loads cannot be connected or removed from the line more than once every 30 sec. The inertia of most heating systems combined with the UAA2016 will comply with the European Standard. 3. 350 mV corresponds to 5C temperature reduction. This is tested at probe using internal test pad. Smaller temperature reduction can be obtained by adding an external resistor between Pin 4 and VCC. Refer to application curves. 4. 350 mV corresponds to a hysteresis of 5C. This is tested at probe using internal test pad. Smaller additional hysteresis can be obtained by adding an external resistor between Pin 2 and VCC. Refer to application curves. 5. Parameter guaranteed but not tested. Worst case 10 mV corresponds to 0.15C shift on set point. 6. Measured at probe by internal test pad. 70 mV corresponds to 1C. Note that the proportional band is independent of the NTC value. 7. At very low temperature the NTC resistor increases quickly. This can cause the sensor input voltage to reach the failsafe threshold, thus inhibiting output pulses; refer to application schematics. The corresponding temperature is the limit at which the circuit works in the typical application. By setting this threshold at 0.05 Vref, the NTC value can increase up to 20 times its nominal value, thus the application works below 20C.

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UAA2016
S2 RS S1

Rdef

R2

R1

R3 3 Sense Input 4

Failsafe + Sampling Full Wave Logic

UAA2016 MAC212A8
Pulse Amplifier 6 Rout Output 220 Vac Load 7 +VCC CF

NTC

Temp. Red.

+ +

1/2

Internal Reference

4Bit DAC 2 HysAdj 11Bit Counter 1 Vref Sync Rsync 8 VEE RS 5 Synchronization Supply Voltage

Figure 1. Application Schematic

APPLICATION INFORMATION (For simplicity, the LED in series with Rout is omitted in the following calculations.)
Triac Choice and Rout Determination

The load current is then:

I Load + (Vrms 2 sin(2pft)V ) R TM L

Depending on the power in the load, choose the triac that has the lowest peak gate trigger current. This will limit the output current of the UAA2016 and thus its power consumption. Use Figure 4 to determine Rout according to the triac maximum gate current (IGT) and the application low temperature limit. For a 2.0 kW load at 220 Vrms, a good triac choice is the ON Semiconductor MAC212A8. Its maximum peak gate trigger current at 25C is 50 mA. For an application to work down to 20C, Rout should be 60 W. It is assumed that: IGT(T) = IGT(25C)  exp (T/125) with T in C, which applies to the MAC212A8.
Output Pulse Width, Rsync

where VTM is the maximum on state voltage of the triac, f is the line frequency.
Set ILoad = ILatch for t = TP/2 to calculate TP.

Figures 6 and 7 give the value of TP which corresponds to the higher of the values of IHold and ILatch, assuming that VTM = 1.6 V. Figure 8 gives the Rsync that produces the corresponding TP.
RSupply and Filter Capacitor

The pulse with TP is determined by the triacs IHold, ILatch together with the load value and working conditions (frequency and voltage): Given the RMS AC voltage and the load power, the load value is:
RL = V2rms/POWER

With the output current and the pulse width determined as above, use Figures 9 and 10 to determine RSupply, assuming that the sinking current at Vref pin (including NTC bridge current) is less than 0.5 mA. Then use Figure 11 and 12 to determine the filter capacitor (CF) according to the ripple desired on supply voltage. The maximum ripple allowed is 1.0 V.
Temperature Reduction Determined by R1

(Refer to Figures 13 and 14.)

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UAA2016
Proportional Band Room Temperature T (C) Overshoot

Time (minutes, Typ.)

Time (minutes, Typ.)

Heating Power P(W)

Time (minutes, Typ.) Proportional Temperature Control D Reduced Overshoot D Good Stability

Time (minutes, Typ.) ON/OFF Temperature Control D Large Overshoot D Marginal Stability

Figure 2. Comparison Between Proportional Control and ON/OFF Control

TP is centered on the zerocrossing. TP AC Line Waveform IHold

ILatch

Gate Current Pulse

T + P

14 x Rsync ) 7 Vrms 2 x pf

105 (s)

f = AC Line Frequency (Hz) Vrms = AC Line RMS Voltage (V) Rsync = Synchronization Resistor (W)

Figure 3. Zero Voltage Technique

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UAA2016
CIRCUIT FUNCTIONAL DESCRIPTION
Power Supply (Pin 5 and Pin 7) Sawtooth Generator

The application uses a current source supplied by a single high voltage rectifier in series with a power dropping resistor. An integrated shunt regulator delivers a VEE voltage of 8.6 V with respect to Pin 7. The current used by the total regulating system can be shared in four functional blocks: IC supply, sensing bridge, triac gate firing pulses and zener current. The integrated zener, as in any shunt regulator, absorbs the excess supply current. The 50 Hz pulsed supply current is smoothed by the large value capacitor connected between Pins 5 and 7.
Temperature Sensing (Pin 3)

The actual temperature is sensed by a negative temperature coefficient element connected in a resistor divider fashion. This two element network is connected between the ground terminal Pin 5 and the reference voltage 5.5 V available on Pin 1. The resulting voltage, a function of the measured temperature, is applied to Pin 3 and internally compared to a control voltage whose value depends on several elements: Sawtooth, Temperature Reduction and Hysteresis Adjust. (Refer to Application Information.)
Temperature Reduction

In order to comply with European norms, the ON/OFF period on the load must exceed 30 seconds. This is achieved by an internal digital sawtooth which performs the proportional regulation without any additional components. The sawtooth signal is added to the reference applied to the comparator inverting input. Figure 2 shows the regulation improvement using the proportional band action. Figure 4 displays a timing diagram of typical system performance using the UAA2016. The internal sawtooth generator runs at a typical 40.96 sec period. The output duty cycle drive waveform is adjusted depending on the time within the 40.96 sec period the drive needs to turn on. This occurs when the voltage on the sawtooth waveform is above the voltage provided at the Sense Input.
Noise Immunity

The noisy environment requires good immunity. Both the voltage reference and the comparator hysteresis minimize the noise effect on the comparator input. In addition the effective triac triggering is enabled every 1/3 sec.
Failsafe

For energy saving, a remotely programmable temperature reduction is available on Pin 4. The choice of resistor R1 connected between Pin 4 and VCC sets the temperature reduction level.
Comparator

Output pulses are inhibited by the failsafe circuit if the comparator input voltage exceeds the specified threshold voltage. This would occur if the temperature sensor circuit is open.
Sampling Full Wave Logic

When the noninverting input (Pin 3) receives a voltage less than the internal reference value, the comparator allows the triggering logic to deliver pulses to the triac gate. To improve the noise immunity, the comparator has an adjustable hysteresis. The external resistor R3 connected to Pin 2 sets the hysteresis level. Setting Pin 2 open makes a 10 mV hysteresis level, corresponding to 0.15C. Maximum hysteresis is obtained by connecting Pin 2 to VCC. In that case the level is set at 5C. This configuration can be useful for low temperature inertia systems.

Two consecutive zerocrossing trigger pulses are generated at every positive mains halfcycle. This ensures that the number of delivered pulses is even in every case. The pulse length is selectable by Rsync connected on Pin 8. The pulse is centered on the zerocrossing mains waveform.
Pulse Amplifier

The pulse amplifier circuit sinks current pulses from Pin 6 to VEE. The minimum amplitude is 70 mA. The triac is then triggered in quadrants II and III. The effective output current amplitude is given by the external resistor Rout. Eventually, an LED can be inserted in series with the Triac gate (see Figure 1).

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UAA2016
Triac On Load Voltage Triac Off Output Pin

1/2 VCC

40.96 sec From Temperature Sensor (Sense Input)

Figure 4.

R out , OUTPUT RESISTOR ( )

180 160 140 120 100 80 60 40 20 TA = 10C 30 40 50 IGT, TRIAC GATE CURRENT SPECIFIED AT 25C (mA) 60 TA = 20C TA = +10C TA = 0C

I Out(min) , MINIMUM OUTPUT CURRENT (mA)

200

100 80 60 40 20 0 TA = 20C

TA = + 85C

40

60

80 100 120 140 160 Rout, OUTPUT RESISTOR (W)

180

200

Figure 5. Output Resistor versus Triac Gate Current

Figure 6. Minimum Output Current versus Output Resistor

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UAA2016
120 TP, OUTPUT PULSE WIDTH ( s) 100 80 110 Vrms 60 220 Vrms 40 20 0 20 30 40 50 ILatch(max), MAXIMUM TRIAC LATCH CURRENT (mA) 10 60 TP, OUTPUT PULSE WIDTH ( s) F = 50 Hz 2.0 kW Loads VTM = 1.6 V TA = 25C 120 100 80 60 220 Vrms 40 20 F = 50 Hz 1.0 kW Loads VTM = 1.6 V TA = 25C 60 110 Vrms

10 20 30 40 50 ILatch(max), MAXIMUM TRIAC LATCH CURRENT (mA)

Figure 7. Output Pulse Width versus Maximum Triac Latch Current

R sync , SYNCHRONIZATION RESISTOR (k ) 400 F = 50 Hz 300 220 Vrms 200 110 Vrms R Supply , MAXIMUM SUPPLY RESISTOR (k )

Figure 8. Output Pulse Width versus Maximum Triac Latch Current

60 V = 220 Vrms F = 50 Hz 50 TP = 50 ms 40 100 ms 30 150 ms 200 ms 0 25 50 75 IO, OUTPUT CURRENT (mA) 100

100

0 20

40 60 80 TP, OUTPUT PULSE WIDTH (ms)

100

20

Figure 9. Synchronization Resistor versus Output Pulse Width

R Supply , MAXIMUM SUPPLY RESISTOR (k ) C F(min), MINIMUM FILTER CAPACITOR ( F)

Figure 10. Maximum Supply Resistor versus Output Current

30 V = 110 Vrms F = 50 Hz 25 TP = 50 ms 100 ms 15 150 ms 200 ms 0 25 50 75 IO, OUTPUT CURRENT (mA) 100

90 Ripple = 1.0 Vpp F = 50 Hz 80 70 60 50 TP = 50 ms 40 0 20 40 60 IO, OUTPUT CURRENT (mA) 80 100 200 ms 150 ms 100 ms

20

10

Figure 11. Maximum Supply Resistor versus Output Current

Figure 12. Minimum Filter Capacitor versus Output Current

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UAA2016
C F(min) , MINIMUM FILTER CAPACITOR ( F TR , TEMPERATURE REDUCTION ( C) 180 160 140 120 100 TP = 50 ms 80 0 20 40 60 IO, OUTPUT CURRENT (mA) 80 100 Ripple = 0.5 Vpp F = 50 Hz 200 ms 150 ms 100 ms 7.0 Setpoint = 20C 6.0 5.0 4.0 3.0 2.0 1.0 0 0 10 20 30 40 50 60 70 80 90 R1, TEMPERATURE REDUCTION RESISTOR (kW) 100 10 kW NTC 100 kW NTC

Figure 13. Minimum Filter Capacitor versus Output Current

Figure 14. Temperature Reduction versus R1

TR , TEMPERATURE REDUCTION ( C)

6.0 5.6 10 kW NTC 5.2 4.8 100 kW NTC 4.4 4.0 10

4 RDEF /(NOMINAL NTC VALUE) RATIO R1 = 0 100 kW NTC 3 10 kW NTC

14

18 22 26 TS, TEMPERATURE SETPOINT (C)

30

10 15 20 25 TDEF, PRESET TEMPERATURE (C)

30

Figure 15. Temperature Reduction versus Temperature Setpoint

V H , COMPARATOR HYSTERESIS VOLTAGE (V)

Figure 16. RDEF versus Preset Temperature

( R S + R2 /(NOMINAL NTC VALUE) RATIO

8 TDEF = 4C 6

0.5 0.4 0.3 0.2 0.1 0

4 10 kW NTC RDEF = 29 kW 100 kW NTC RDEF = 310 kW 14 18 22 26 30 TS, TEMPERATURE SETPOINT (C) 34

0 10

100 200 300 R3, HYSTERESIS ADJUST RESISTOR (kW)

400

Figure 17. RS + R2 versus Preset Setpoint

Figure 18. Comparator Hysteresis versus R3

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UAA2016
ORDERING INFORMATION
Device UAA2016D UAA2016DG UAA2016AD UAA2016ADG UAA2016P UAA2016PG TA = 20 to +85C Operating Temperature Range Package SOIC8 SOIC8 (PbFree) SOIC8 SOIC8 (PbFree) PDIP8 PDIP8 (PbFree) Shipping 98 Units / Rail 98 Units / Rail 98 Units / Rail 98 Units / Rail 1000 Units / Rail 1000 Units / Rail

For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

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UAA2016
PACKAGE DIMENSIONS
PDIP8 P SUFFIX CASE 62605 ISSUE L
NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. DIM A B C D F G H J K L M N MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC 10_ 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC 10_ 0.030 0.040

B
1 4

F
NOTE 2

A L

C T
SEATING PLANE

J N D K
M

M T A B

G 0.13 (0.005)
M M

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UAA2016
PACKAGE DIMENSIONS
SOIC8 D SUFFIX CASE 75107 ISSUE AG
X A
8 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 75101 THRU 75106 ARE OBSOLETE. NEW STANDARD IS 75107. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8 _ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244

B
1 4

0.25 (0.010)

Y G C Z H D 0.25 (0.010)
M SEATING PLANE

X 45 _

0.10 (0.004)

Z Y

DIM A B C D G H J K M N S

SOLDERING FOOTPRINT*

1.52 0.060

7.0 0.275

4.0 0.155

0.6 0.024

1.270 0.050
SCALE 6:1 mm inches

*For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

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UAA2016

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PUBLICATION ORDERING INFORMATION

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UAA2016/D