Rtos - Lab 24mu05-1

Download as pdf or txt
Download as pdf or txt
You are on page 1of 16

PSG COLLEGE OF TECHNOLOGY

(Autonomous Institution)

COIMBATORE – 641 004

ORIENTATION LAB REPORT

A report submitted in partial fulfillment of the requirements for the course

24EE51-EMBEDDED SYSTEM DESIGN LABORATORY (20EE51)

PURNASNEGHA K (24MU05)

I Year (First Semester)

Programme: M.E. Embedded and Real Time Systems


Branch: DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING
PSG COLLEGE OF TECHNOLOGY
COIMBATORE – 641 004

NUVOTON-W78E052D
GENERAL DESCRIPTION:

The W78E052D series is an 8-bit microcontroller which can accommodate a


wider frequency range with low power consumption. The instruction set for the
W78E052D series is fully compatible with the standard 8052.

FEATURES:

• Fully static design 8-bit CMOS microcontroller


• 12 clocks per machine cycle operation, Speed up to 40 MHz/5V  6T Mode, 6
clocks per machine cycle operation set by the writer, Speed up to 20 MHz/5V
• Voltage of 2.4V to 5.5V
• Temperature grade is (-40oC~85oC)
• 256 bytes of on-chip scratchpad RAM
• 16K/8K bytes electrically erasable/programmable Flash EPROM
• 2K bytes LDROM support ISP function
• 64KB program memory address space
• 64KB data memory address space
• Four 8-bit bi-directional ports
• 8-sources, 4-level interrupt capability
• One extra 4-bit bit-addressable I/O port, additional INT2 / INT3
• Three 16-bit timer/counters
• One full duplex serial port
• Watchdog Timer
• Built-in power management:
o Idle mode
o Power down mode
• Packages: DIP40, PLCC44, PQFP44, LQFP48, TQFP44
PIN DIAGRAM:

Fig.1 Pin Diagram of W78E052D

PIN DESCRIPTIONS:

SYMBOL TYPE DESCRIPTIONS


EXTERNAL ACCESS ENABLE: This pin forces the
processor to execute out of external ROM. It should be kept
high to access internal ROM. The ROM address and data will
EA I
not be present on the bus if EA pin is high and the program
coun ter is within internal ROM area. Otherwise they will be
present on the bus.
PROGRAM STORE ENABLE: PSEN enables the external
ROM data onto the Port 0 address/data bus during fetch and
PSEN OH
MOVC operations. When internal ROM access is performed,
no PSEN strobe signal outputs from this pin.
ADDRESS LATCH ENABLE: ALE is used to enable the
ALE OH address latch that sepa rates the address from the data on Port
0.
RESET: A high on this pin for two machine cycles while the
RST IL
oscillator is running resets the device.
CRYSTAL1: This is the crystal oscillator input. This pin may
XTAL1 I
be driven by an ex ternal clock.
CRYSTAL2: This is the crystal oscillator output. It is the
XTAL2 O
inversion of XTAL1.
VSS I GROUND: Ground potential
VDD I POWER SUPPLY: Supply voltage for operation.
PORT 0: Port 0 is an open-drain bi-directional I/O port. This
P0.0−P0.7 I/O D port also provides a multiplexed low order address/data bus
during accesses to external memory.
PORT 1: Port 1 is a bi-directional I/O port with internal pull-
ups. The bits have alternate functions which are described
P1.0−P1.7 I/O H
below: T2 (P1.0): Timer/Counter 2 external count input T2EX
(P1.1): Timer/Counter 2 Reload/Capture control
PORT 2: Port 2 is a bi-directional I/O port with internal pull-
P2.0−P2.7 I/O H ups. This port also provides the upper address bits for accesses
to external memory.
PORT 3: Port 3 is a bi-directional I/O port with internal pull-
ups. All bits have al ternate functions, which are described
below:
RXD (P3.0): Serial Port 0 input
TXD (P3.1): Serial Port 0 output
P3.0−P3.7 I/O H
INT0 (P3.2) : External Interrupt 0
INT1 (P3.3) : External Interrupt 1
T0 (P3.4) : Timer 0 External Input
T1 (P3.5) : Timer 1 External Input
WR (P3.6) : External Data Memory Write Strobe
RD (P3.7) : External Data Memory Read Strobe
PORT 4: Another bit-addressable bidirectional I/O port P4.
P4.3 and P4.2 are alternative function pins. It can be used as
P4.0−P4.3 I/O H
general I/O port or external interrupt input sources ( INT2 /
INT3 ).
* Note: TYPE I: input, O: output, I/O: bi-directional, H: pull-high, L: pull-low, D:
open drain.

FEATURES:

• Fully static design 8-bit CMOS microcontroller


• 12 clocks per machine cycle operation, Speed up to 40 MHz/5V  6T Mode, 6
clocks per machine cycle operation set by the writer, Speed up to 20 MHz/5V
• Voltage of 2.4V to 5.5V
• Temperature grade is (-40oC~85oC)
• 256 bytes of on-chip scratchpad RAM
• 16K/8K bytes electrically erasable/programmable Flash EPROM
• 2K bytes LDROM support ISP function
• 64KB program memory address space
• 64KB data memory address space
• Four 8-bit bi-directional ports
• 8-sources, 4-level interrupt capability
• One extra 4-bit bit-addressable I/O port, additional INT2 / INT3
• Three 16-bit timer/counters
• One full duplex serial port
• Watchdog Timer
• Built-in power management:
o Idle mode
o Power down mode
• Packages: DIP40, PLCC44, PQFP44, LQFP48, TQFP44

LPC2377/78

GENERAL DESCRIPTION:

• The LPC2377/78 microcontrollers are based on a 16-bit/32-bit


ARM7TDMI-S CPU with real-time emulation. A 128-bit wide memory
interface and a unique accelerator architecture enable 32-bit code
execution at the maximum clock rate. For critical performance in
interrupt service routines and DSP algorithms, this increases performance
up to 30 % over Thumb mode. For critical code size applications, the
alternative 16-bit Thumb mode reduces code by more than 30 % with
minimal performance penalty.
• The LPC2377/78 are ideal for multi-purpose serial communication
applications. It incorporates a 10/100 Ethernet Media Access Controller
(MAC), USB full speed device with 4 kB of endpoint RAM (LPC2378
only), four UARTs, two CAN channels (LPC2378 only), an SPI interface,
two Synchronous Serial Ports (SSP), three I2C-bus interfaces, and I2S-
bus interface, and an External Memory Controller (EMC).
• This blend of serial communications interfaces combined with an on-chip
4 MHz internal oscillator, SRAM of 32 kB, 16 kB SRAM for Ethernet, 8
kB SRAM for USB and general-purpose use, together with 2 kB battery
powered SRAM make this device suited for communication gateways
and protocol converters.

FEATURES:

o ARM7TDMI-S processor, running at up to 72 MHz.


o Up to 512 kB on-chip flash program memory with In-System
Programming (ISP) and In-Application Programming (IAP) capabilities.
Flash program memory is on the ARM local bus for high performance
CPU access.
o 32 kB of SRAM on the ARM local bus for high performance CPU access.
o 16 kB SRAM for Ethernet interface. Can also be used as general purpose
SRAM.
o 8 kB SRAM for general purpose DMA use also accessible by the USB.
o Dual Advanced High-performance Bus (AHB) system that provides for
simultaneous Ethernet DMA, USB DMA, and program execution from
on-chip flash with no contention between those functions. A bus bridge
allows the Ethernet DMA to access the other AHB subsystem.
o EMC provides support for static devices such as flash and SRAM as well
as off-chip memory mapped peripherals.
o Advanced Vectored Interrupt Controller (VIC), supporting up to 32
vectored interrupts.
o General Purpose AHB DMA controller (GPDMA) that can be used with
the SSP serial interfaces, the I2S port, and the Secure Digital/Multimedia
Card (SD/MMC) card port, as well as for memory-to-memory transfers.

SPECIFICATIONS:

The LPC2378 is a microcontroller from NXP Semiconductor's LPC2000 family,


based on the ARM7TDMI-S core. It is designed for embedded applications that
require high performance, connectivity, and extensive peripheral support. Below
are some of its main specifications:

• Core
- CPU: ARM7TDMI-S
- Architecture: 32-bit ARM
- Clock Frequency: Up to 72 MHz
• Memory
- Flash Memory:512 KB
- SRAM: 32 KB
- EEPROM: None
• Peripherals:
- Timers:4 general-purpose timers, 2 PWM timers
- Watchdog Timer: Yes
- Real-Time Clock (RTC): Yes
- A/D Converters:10-bit ADC, 6 channels
- D/A Converter: 10-bit DAC
- CAN Controller: 2 CAN channels (CAN 2.0B)
- Ethernet Controller:10/100 Mbps Ethernet MAC with DMA
- USB 2.0 Device/Host/OTG: Full-speed USB device/host/OTG with 4 KB of
dedicated RAM
- UART:4 channels
- SPI: 2 channels
- I2C:3 channels
- I2S: 1 channel
- SD/MMC Interface: Yes
• GPIO:
- General-Purpose I/O (GPIO) Pins: 70 I/O pins
• External Memory Interface:
- Static Memory Controller (SMC): Supports external SRAM, ROM, Flash, etc.
• Power:
- Operating Voltage: 3.0 V to 3.6 V
• Package:
- LQFP (Low Profile Quad Flat Package) / BGA (Ball Grid Array) Options
• Other Features:
- On-chip PLL (Phase Locked Loop) for clock generation
- Integrated debug interface via JTAG
- Built-in Brown-Out Detection (BOD) and Power-On Reset (POR)
The LPC2378 microcontroller is suitable for applications like industrial
automation, communication interfaces, and various consumer electronics
requiring a versatile and feature-rich embedded platform.
PIN DIAGRAM:

Fig-2 Pin Configuration of LPC2378


The image displays the pinout diagram for the LPC2378FBD144
microcontroller, a 144-pin LQFP package. Pin numbers 1, 36, 37, 72, 73, 108,
109, and 144 are labeled along the edges of the chip. The circular marking at the
top-left corner likely indicates pin 1 for proper orientation during installation.

APPLICATION:

o Industrial control
o Medical systems
o Protocol converter
o Communications

STM32F407VGT6

GENERAL DESCRIPTION:

The STM32F405xx and STM32F407xx family is based on the high-


performance Arm® Cortex®-M4 32-bit RISC core operating at a frequency of up
to 168 MHz. The Cortex-M4 core features a Floating-point unit (FPU) single
precision which supports all Arm single precision data-processing instructions
and data types.
It also implements a full set of DSP instructions and a memory protection
unit (MPU) which enhances application security. The STM32F405xx and
STM32F407xx family incorporates high-speed embedded memories (Flash
memory up to 1 Mbyte, up to 192 Kbytes of SRAM), up to 4 Kbytes of backup
SRAM, and an extensive range of enhanced I/Os and peripherals connected to
two APB buses, three AHB buses and a 32-bit multi-AHB bus matrix.
All devices offer three 12-bit ADCs, two DACs, a low-power RTC, twelve
general-purpose 16-bit timers including two PWM timers for motor control, two
general-purpose 32-bit timers. a true random number generator (RNG).
They also feature standard and advanced communication interfaces.
• Up to three I2Cs
• Three SPIs, two I2Ss full duplex. To achieve audio class accuracy, the I2S
peripherals can be clocked via a dedicated internal audio PLL or via an
external clock to allow synchronization.
• Four USARTs plus two UARTs
• An USB OTG full-speed and a USB OTG high-speed with full-speed
capability (with the ULPI),
• Two CANs
• An SDIO/MMC interface
• Ethernet and the camera interface available on STM32F407xx devices
only.

FEATURES:

The STM32F407xx includes the following features:


• Supports 10 and 100 Mbit/s rates
• Dedicated DMA controller allowing high-speed transfers between the
dedicated SRAM and the descriptors.
• Tagged MAC frame support (VLAN support)
• Half-duplex (CSMA/CD) and full-duplex operation
• MAC control sublayer (control frames) support
• 32-bit CRC generation and removal
• Several address filtering modes for physical and multicast address
(multicast and group addresses)
• 32-bit status code for each transmitted or received frame
• Internal FIFOs to buffer transmit and receive frames. The transmit FIFO
and the receive FIFO are both 2 Kbytes.
• Supports hardware PTP (precision time protocol) in accordance with
IEEE 1588 2008 (PTP V2) with the time stamp comparator connected to
the TIM2 input
• Triggers interrupt when system time becomes greater than target time.

SPECIFICATIONS:

The STM32F407VG is a high-performance microcontroller from


STMicroelectronics, based on the ARM Cortex-M4 core. It is part of the
STM32F4 series and is designed for applications that require high-speed
processing, extensive peripheral support, and a range of connectivity options.
Below are its key specifications:
• Core:
- CPU: ARM Cortex-M4 with Floating Point Unit (FPU)
- Architecture: 32-bit RISC
- Clock Frequency: Up to 168 MHz
- Performance:10 DMIPS / 1.25 DMIPS/MHz (Dhrystone benchmark)
- Instruction Set: Thumb-2 instruction set
• Memory:
- Flash Memory: 1 MB
- SRAM: 192 KB (Split into two banks: 128 KB and 64 KB)
- EEPROM: No dedicated EEPROM (but emulation is possible)
- ROM: 512 bytes (System memory for bootloader)
• Connectivity:
- USB: USB 2.0 full-speed/low-speed Device/Host/OTG
- Ethernet: 10/100 Mbps Ethernet MAC with IEEE 1588 Precision Time
Protocol support
- CAN:2 CAN controllers (CAN 2.0B Active)
- UART:6 USART/UARTs
- SPI: 3 SPI interfaces
-I2C: 3 I2C interfaces
- I2S:2 I2S (Synchronous audio interface)
- SDIO:SD/SDIO/MMC interface
• Timers:
- General Purpose Timers: 10 (16-bit and 32-bit)
- Advanced Control Timer: 1 (16-bit, suitable for motor control and PWM
applications)
- Basic Timers: 2
- Watchdog Timers: Independent and Window watchdog
- RTC (Real-Time Clock): Yes, with sub-second accuracy and tamper
detection
• Digital I/O:
- GPIO Pins: 82 I/O pins, highly configurable
- External Interrupts: Up to 16 external interrupts and 7 wake-up lines
• Power:
- Operating Voltage:1.8 V to 3.6 V
- Low Power Modes: Sleep, Stop, and Standby modes

The STM32F407VG is well-suited for advanced applications such as


multimedia processing, motor control, industrial automation, and IoT devices,
due to its high performance and rich peripheral set.
PIN DIAGRAM:

Figure 3-Pin Configuration of STM32F407


The image shows an STM32F4 Discovery board with labeled pin headers
(P1 and P2). Each pin is numbered and color-coded to indicate its function, such
as SPI, UART, ADC, DAC, GPIO, PWM, and power connections (3V3, GND).
The board features an ST microcontroller and various peripheral connections.
Basys 3

GENERAL DESCRIPTION:

The Basys 3 board is a complete, ready-to-use digital circuit development


platform based on the latest Artix-7™ Field Programmable Gate Array (FPGA)
from Xilinx. With its high-capacity FPGA, low overall cost, and collection of
USB, VGA, and other ports, the Basys 3 can host designs ranging from
introductory combinational circuits to complex sequential circuits like
embedded processors and controllers. It includes enough switches, LEDs and
other I/O devices to allow many designs to be completed without the need for
any additional hardware, and enough uncommitted FPGA I/O pins to allow
designs to be expanded using Digilent Pmods or other custom boards and
circuits.

Features:

The Artix-7 FPGA is optimized for high performance logic, and offers more
capacity, higher performance, and more resources than earlier designs. Artix-7
35T features include:
• 33,280 logic cells in 5200 slices (each slice contains four 6-input LUTs
and 8 flip-flops);
• 1,800 Kbits of fast block RAM;
• Five clock management tiles, each with a phase-locked loop (PLL);
• 90 DSP slices;
• Internal clock speeds exceeding 450MHz.
• On-chip analog-to-digital converter (XADC).

The Basys 3 also offers an improved collection of ports and peripherals,


including:
• 16 user switches
• 16 user LEDs
• 5 user pushbuttons
• 4-digit 7-segment display
• Three Pmod ports
• Pmod for XADC signals
• 12-bit VGA output
• USB-UART Bridge
• Serial Flash
• Digilent USB-JTAG port for FPGA programming and communication
• USB HID Host for mice, keyboards and memory sticks.

MEMORY:

The Basys 3 board contains a 32Mbit non-volatile serial Flash device, which is
attached to the Artix-7 FPGA using a dedicated quad-mode (x4) SPI bus. The
connections and pin assignments between the FPGA and the serial flash device
FPGA configuration files can be written to the Quad SPI Flash (Spansion part
number S25FL032), and mode settings are available to cause the FPGA to
automatically read a configuration from this device at power on. An Artix-7 35T
configuration file requires just over two Mbytes of memory, leaving
approximately 48% of the flash device available for user data.

COMPONENTS:

1.Power good LED


2.Pmod ports
3.Analog signal Pmod port (XDAC)
4. Four digit 7-segment display
5. Slide switches (16)
6. LEDs (16)
7. Pushbuttons (5)
8. FPGA programming done LED
9. FPGA configuration reset button
10. Programming mode jumper
11. VGA connector
12. Shared UART/ JTAG USB port
13. USB host connector
14. External power connector
15. Power Switch
16. Power Select Jumper

BASYS-3 BOARD:
Figure 4-Basys-3 board
The image shows the Digilent Basys 3 FPGA board with labeled Pmod
(Peripheral Module) pin-out diagrams on both sides. Each Pmod connector (JA,
JB, JC, JX) is color-coded to indicate functions like power (PWR), ground
(GND), and signal pins. The board features a 7 segment display, multiple
switches, and USB/VGA ports, and uses a Xilinx FPGA for educational
purposes.

You might also like