5.data Convertors and Plds
5.data Convertors and Plds
5.data Convertors and Plds
Author :M.A.Ansari
Specifications of ADC:
1. Resolution
2. Accuracy
3. Conversion time
4. Linearity
5. Analog input voltage
6. Format of digital output
Define any two specification of ADC. (Any two specification of ADC 2M)
1. Analog input voltage: This is the maximum allowable input voltage range.
2. Input impedance: Its value ranges from 1 kΩ to 1 MΩ depending upon the type of A/D
converter. Input capacitance is in the range of tens of pF.
3. Linearity: is conventionally equal to the deviation of the performance of the converter from
a best straight line.
4. Accuracy: the accuracy of the A/D converter depends upon the accuracy of maximum
deviation of the digital output from the ideal linear line.
5. Monotoxicity: In response to a continuously increasing input signal the output of an A/D
converter should not at any point decrease or skip one or more codes. This is called the
monotoxicity of A/D converter.
6. Resolution is define as the maximum number of digital output codes. This is same as that of
a DAC
Resolution= 2n
List types of digital to analog converters and state specifications ofADC (any four).
Types of Digital to Analog converters and specifications
1. Weighted resistor D to A converter
2. R – 2R D to A converter
1. Data is stored in the form of charge on the capacitor. Hence each DRAM unit
consists of one MOSFET and a capacitor.
2. Since Capacitors are used on input side, refreshing circuit is required.
3. Access time is more, hence it is slow in speed.
4. Memory cell per unit area are more than Static
Explain the working of EPROM. (Note: Any other answer shall be considered)
An EPROM, or erasable programmable read-only memory, is a type of memory chip that retains its
data when its power supply is switched off. Computer memory that can retrieve stored data after a
power supply has been turned off and back on is called non-volatile. It is an array of floating-gate
transistors individually programmed by an electronic device that supplies higher voltages than those
normally used in digital circuits. Once programmed, an EPROM can be erased by exposing it to
strong ultraviolet light source .
Each storage location of an EPROM consists of a single field-effect transistor. Each field-effect
transistor consists of a channel in the semiconductor body of the device. Source and drain contacts
are made to regions at the end of the channel. An insulating layer of oxide is grown over the channel,
then a conductive (silicon or aluminum) gate electrode is deposited, and a further thick layer of oxide
is deposited over the gate electrode. The floating-gate electrode has no connections to other parts of
the integrated circuit and is completely insulated by the surrounding layers of oxide. A control gate
electrode is deposited and further oxide covers it.[2] To retrieve data from the EPROM, the address
represented by the values at the address pins of the EPROM is decoded and used to connect one word
(usually an 8-bit ) of storage to the output buffer amplifiers. Each bit of the word is a 1 or 0,
depending on the storage transistor being switched on or off, conducting or non-conducting. The
switching state of the field-effect transistor is controlled by the voltage on the control gate of the
transistor. Presence of a voltage on this gate creates a conductive channel in the transistor, switching
it on. In effect, the stored charge on the floating gate allows the threshold voltage of the transistor to
be programmed.
The programming process is not electrically reversible. To erase the data stored in the array of
transistors, ultraviolet light is directed onto the die. Photons of the UV light cause ionization within
the silicon oxide, which allow the stored charge on the floating gate to dissipate. Since the whole
memory array is exposed, all the memory is erased at the same time. The process takes several
minutes for UV lamps.
Explain successive approximation type ADC with neat diagram.
(Diagram2M; explanation 2M) Block diagram
Working: The comparator serves the function of the scale, the output of which is used for setting/
resetting the bits at the output of the programmer. This output is converted into equivalent analog
voltage from which offset is subtracted and then applied to the inverting input terminal of the
comparator. The outputs of the programmer will change only when the clock pulse is present. To
start the conversion, the programmer sets the MSB to 1 and all other bits to 0. This is converted
into analog voltage by the DAC and the comparator compares it with the analog input voltage. If the
analog input voltage Va >= Vi, the output voltage of the comparator is HIGH, which sets the next bit
also. On the other hand if Va <= Vi, Then the output of the comparator is LOW which resets the
MSB and sets the next bit. Thus a 1 is tried in each bit of DAC until the binary equivalent of analog
input voltage is obtained.
Draw circuit diagram of successive approximation type ADC and explain its working.
The comparator serves the function of the scale, the output of which is used for setting resetting
the bits at the output of the programmer/ This output is converted into equivalent analog voltage
from which the offset voltage is subtracted and then applied to the inverting input terminal of the
comparator. It should be noted that the offset weight was added on the side of the unknown
weight, and therefore, it is to be subtracted from the known weight side for getting the equivalent
effect. The outputs of the programmer will change only when the clock pulse is present. To start
conversion, the programmer sets the MSB to 1 and all other bits to 0. This is converted into
analog signal by the D/A converter and the comparator compares it with the analog input
voltage. If the analog input voltage Va ≥Vi , the output voltage VO of the comparator is HIGH
which sets the next bit also. On the other hand, if Va<Vi , then VOis LOW which resets the MSB
and sets the next bit. Thus, a 1 is tried in each bit of the D/A converter until the binary equivalent
of the analog input voltage is obtained.
The binary ladder network largely overcomes the problem of the weighted resistor network.
This type of circuit also has a resistive network to produce binary weighted currents but uses only
two values of resistor, namely R and 2R.
It uses a ladder network containing series-parallel combination of two resistors of value R and 2R.
Figure shows the circuit diagram of a binary ladder type D/A converter with sets of identical resistors
R and 2R.
It consists of a R-2R ladder network and op-amp inverting amplifier. The value of resistor R can be
between 2.5 K Ω. The resistor 2R can either be connected to the reference voltage (-VR) line or
grounded through controlled switched S1,S2,S3,….Sn .
The simplified circuit of a 3-bit (d1,d2,d3 =100) binary ladder type DAC is shoen in fig this simplified
circuit is further reduced to the equivalent circuit shown in fig. the equivalent resistance to the left
of node (A) in fig is only 2R and the node G is at virtual ground potential.
State advantages and disadvantages of (i) Ramp type ADC (ii) Dual slope type ADC.
(i) Ramp type ADC:
Advantages of Ramp type ADC:
1. It is very simple in construction.
2. It is easy to design.
3. It is last expensive.
4. Its speed can be adjusted by adjusting the clock frequency
5. It is faster than a dual slope ADC.
Disadvantages of Ramp type ADC:
1. It is comparatively very slow.
2. The conversion time does not remain constant.
3. The conversion time can be as long as clock cycle period for
high input voltages.
4. It needs longer conversion time.
(ii) Dual slope type ADC:
Advantages of Dual slope type ADC::
1. It is simple and relatively inexpensive.
2. It has high conversion accuracy.
3. It is more stable and of low cost.
4. It is not affected by time, temperature and input voltage.
5. It does not require crystal oscillator for stability.
6. It is less sensitive to noise.
Disadvantages of Dual slope type ADC:
1. It has large conversion time as compared to any other ADC.
2. It has very low speed of conversion.