5 4 3 2 1

MXM3 Type A
System Block Diagram of Brooks 15" card

PEG

POWER

CHARGER PG 40
D D
Re-driver
DP [A]
PS8311QFN48GTR DP CONN
LDO PG 47 DDR3-SODIMM_A0
0.75V_DDR_VTT, 1.8V_RUN
PG 23
DDR3-SODIMM_A1
MXM Card MUX for HDMI
DC/DC PG 49 Sandy Bridge DP [C]
+3.3V_ALW/+5V_ALW/+15V_ALW
1333 MHz DDR III Conn PS8312 HDMI CONN
PG 14,15
PEG PG 25
DC/DC PG 48 DDR3-SODIMM_B1
1.1V_VCCP and 1.5V_MEM (55W XE QC) dGPU_LVDS LVDS MUX
1333 MHz DDR III
(45W QC) TS3DV520ERUAR LVDS CONN
PG 16,17
VCORE PG 51 (35W DC) PG 21
VCC_VCORE DDR3-SODIMM_B0
dGPU_VGA CRT MUX
Socket S 989
MAX14885EETL+ VGA CONN
Power Good
PG 2,3,4,5 PG 24
Misc. Power PG 38
DP [B]
PG 19
FDI DMI DOCK_DP1
ODD
SATA [3] PCH_LVDS
PG 29 DOCK_VGA
PCH_VGA
DOCK_DP2
Cougar Point Dock-I2S
C C

Main HDD SATA Re-driver

SATA [0] QM67
PG 29 MAX4951 LAN LAN S/W
PCH PCIE [7]
PG 29 W G82579LM PI3L720ZHE
PG 49 PG 50 RJ-45
Free Fall Sensor
SMBus (Support AMT7.0) MAG
DE351DLTR8 PG 50
PG 29 SATA[5]
USB [5] USB[8,9]
MINI-CARD-1
SIM PCIE[1]
W W AN MUX USB 3.0
SATA [2] PCIE [4]
PG 35 PI2DBS212 PG 35 UPD720200AF1 USB 3.0 X2
PG 31 PG 32
E DOCKING
USB[4] USB[2] CONNECTOR
Half MINI-CARD-2
PCIE[2] USB/P eSATA
W LAN/W iMAX PG 33
SATA [4]
USB[6] PG 30
Half MINI-CARD-3
PCIE[5]
Flash, PP PG 34
SPI 2 x SPI ROM 2+8 MByte
PG 42
Card Reader
MMI/1394 USB [11]
B PCIE[8] PCIE[8] BT Conn B
OZ600RJ1LN
PCIE[3] PG 33
1394 Port
USB[10]
USB [12]
USB[0] Camera
USB[1] PG 22
Express Card PCIE[3] IOL USB[7] USB [13]
PG 07,08,09,10,11,12,13. LCD Touch
Express Card Slot R5538D001 USB[10] CONN.
PG 22
LPC

USB[0]
USB Conn SPI ROM SMSC SIO
BC bus DOCK_LPC
2 MByte USH 2.0 SMSC KBC ECE5028-LZY
PG 55 PG 40
BCM5882
USB[1] MEC5055-LZY
USB Conn Thermal CPU FAN CONN
BIO Sensor BC bus
EMC4002 PG 27
PG 55 PG 46
MXM FAN CONN
Smart Card Contactless
Smart Card
Sgnals Smart Card
Smart Card Slot TDA8034HN BC bus KBC
A
PG 56 PG 55,56,57 Keyboard A

ECE1117
PG 60
SMBus KBC Module and TP Module
IHDA Current Sensor PS/2
HD Audio
EMC 1701 PG 39 Touch Pad
92HD90B
Dock-I2S PG 38
Ever Light
Current Sensor
Technology Limited
Title
EMC 1701 01 -- BLOCK DIAGRAM
Size Document Number Rev
PG 38 1A
MIC/HP Jack Speaker X2
Date: Thursday, January 27, 2011 Sheet 1 of 84
5 4 3 2 1
 5 4 3 2 1

PEG_ICOMPO (J21) R_COMP place close to CPU

width 4 mils
SANDY BRIDGE PROCESSOR HOST, PEG, Others
PEG_ICOMPI (J22) VCC_IO

Trace length Max is 500 mils width 12 mils

PEG_RCOMPO (H22) R_COMP
+1.05V_RUN_VTT JCPU1B
JCPU1A
J22 PEG_COMP R1 24.9 +/-1%
PEG_ICOMPI J21
B27 PEG_ICOMPO H22 A28 CPU_DMI R2 0 +/-5%
(7) DMI_CRX_PTX_N0 DMI_RX#[0] PEG_RCOMPO BCLK CLK_CPU_DMI (10)

MISC

CLOCKS
B25 C26 A27 CPU_DMI# R3 0 +/-5%
(7) DMI_CRX_PTX_N1 DMI_RX#[1] (11) H_SNB_IVB# PROC_SELECT# BCLK# CLK_CPU_DMI# (10)
A25
(7) DMI_CRX_PTX_N2 DMI_RX#[2] PEG_CRX_GTX_N[0..15] (19)
B24 K33 PEG_CRX_GTX_N15
(7) DMI_CRX_PTX_N3 DMI_RX#[3] PEG_RX#[0] M35 PEG_CRX_GTX_N14 AN34
PEG_RX#[1] (40) CPU_DETECT# SKTOCC#
B28 L34 PEG_CRX_GTX_N13 A16 CPU_DPLL
D (7) DMI_CRX_PTX_P0 DMI_RX[0] PEG_RX#[2] DPLL_REF_CLK +1.05V_RUN_VTT D
B26 J35 PEG_CRX_GTX_N12 A15 CPU_DPLL#
(7) DMI_CRX_PTX_P1 DMI_RX[1] PEG_RX#[3] DPLL_REF_CLK#

DMI
A24 J32 PEG_CRX_GTX_N11
(7) DMI_CRX_PTX_P2 DMI_RX[2] PEG_RX#[4]
B23 H34 PEG_CRX_GTX_N10 CPU_DPLL# R5 1K +/-5%
(7) DMI_CRX_PTX_P3 DMI_RX[3] PEG_RX#[5] H31 PEG_CRX_GTX_N9 H_CATERR# AL33 CPU_DPLL R4 1K +/-5%
G21 PEG_RX#[6] G33 PEG_CRX_GTX_N8 CATERR#
(7) DMI_CTX_PRX_N0 DMI_TX#[0] PEG_RX#[7]
E22 G30 PEG_CRX_GTX_N7
(7) DMI_CTX_PRX_N1 DMI_TX#[1] PEG_RX#[8]

THERMAL
F21 F35 PEG_CRX_GTX_N6
(7) DMI_CTX_PRX_N2 DMI_TX#[2] PEG_RX#[9]
D21 E34 PEG_CRX_GTX_N5 AN33 R8 DDR3_DRAMRST#_CPU
(7) DMI_CTX_PRX_N3 DMI_TX#[3] PEG_RX#[10] (11) H_PECI PECI SM_DRAMRST#
E32 PEG_CRX_GTX_N4
PEG_RX#[11]

DDR3
MISC
G22 D33 PEG_CRX_GTX_N3
(7) DMI_CTX_PRX_P0 DMI_TX[0] PEG_RX#[12]
D22 D31 PEG_CRX_GTX_N2
(7) DMI_CTX_PRX_P1 DMI_TX[1] PEG_RX#[13]
F20 B33 PEG_CRX_GTX_N1 R6 56+/-5% H_PROCHOT#_R AL32 AK1 SM_RCOMP0

PCI EXPRESS* - GRAPHICS

(7) DMI_CTX_PRX_P2 DMI_TX[2] PEG_RX#[14] (39,71) H_PROCHOT# PROCHOT# SM_RCOMP[0]
C21 C32 PEG_CRX_GTX_N0 A5 SM_RCOMP1
(7) DMI_CTX_PRX_P3 DMI_TX[3] PEG_RX#[15] SM_RCOMP[1] A4 SM_RCOMP2
PEG_CRX_GTX_P[0..15] (19) SM_RCOMP[2]
J33 PEG_CRX_GTX_P15 Max 500mils
PEG_RX[0] L35 PEG_CRX_GTX_P14 R7 0 +/-5%H_THERMTRIP#_R AN32
PEG_RX[1] (11,46) H_THERMTRIP# THERMTRIP#
K34 PEG_CRX_GTX_P13
A21 PEG_RX[2] H35 PEG_CRX_GTX_P12
(7) FDI_CTX_PRX_N0 FDI0_TX#[0] PEG_RX[3] place R7 near CPU
H19 H32 PEG_CRX_GTX_P11
(7) FDI_CTX_PRX_N1 FDI0_TX#[1] PEG_RX[4]
E19 G34 PEG_CRX_GTX_P10
(7) FDI_CTX_PRX_N2 FDI0_TX#[2] PEG_RX[5]
F18 G31 PEG_CRX_GTX_P9 AP29 XDP_PRDY#
Intel(R) FDI
(7) FDI_CTX_PRX_N3 FDI0_TX#[3] PEG_RX[6] PRDY# XDP_PRDY# (6)
B21 F33 PEG_CRX_GTX_P8 AP27 XDP_PREQ#
(7) FDI_CTX_PRX_N4 FDI1_TX#[0] PEG_RX[7] PREQ# XDP_PREQ# (6)
C20 F30 PEG_CRX_GTX_P7
(7) FDI_CTX_PRX_N5 FDI1_TX#[1] PEG_RX[8]
D18 E35 PEG_CRX_GTX_P6 AR26 XDP_TCLK
(7) FDI_CTX_PRX_N6 FDI1_TX#[2] PEG_RX[9] TCK XDP_TCLK (6)

PWR MANAGEMENT
E17 E33 PEG_CRX_GTX_P5 AR27 XDP_TMS

JTAG & BPM

(7) FDI_CTX_PRX_N7 FDI1_TX#[3] PEG_RX[10] TMS XDP_TMS (6)
F32 PEG_CRX_GTX_P4 AM34 AP30 XDP_TRST#
PEG_RX[11] (7) H_PM_SYNC PM_SYNC TRST# XDP_TRST# (6)
D34 PEG_CRX_GTX_P3
A22 PEG_RX[12] E31 PEG_CRX_GTX_P2 AR28 XDP_TDI_R
(7) FDI_CTX_PRX_P0 FDI0_TX[0] PEG_RX[13] TDI
G19 C33 PEG_CRX_GTX_P1 AP26 XDP_TDO_R
(7) FDI_CTX_PRX_P1 FDI0_TX[1] PEG_RX[14] TDO
E20 B32 PEG_CRX_GTX_P0 R8 0 VCCPWRGOOD_0_R AP33
(7) FDI_CTX_PRX_P2 FDI0_TX[2] PEG_RX[15] (6,11) H_CPUPWRGD UNCOREPWRGOOD
G18 +/-5%
(7) FDI_CTX_PRX_P3 FDI0_TX[3]
B20 M29 PEG_CTX_GRX_N15
(7) FDI_CTX_PRX_P4 FDI1_TX[0] PEG_TX#[0]
C19 M32 PEG_CTX_GRX_N14 AL35 XDP_DBRESET#_R R9 0 +/-5%
(7) FDI_CTX_PRX_P5 FDI1_TX[1] PEG_TX#[1] DBR# XDP_DBRESET# (6,7)
D19 M31 PEG_CTX_GRX_N13 PM_DRAM_PWRGD_CPU V8
(7) FDI_CTX_PRX_P6 FDI1_TX[2] PEG_TX#[2] SM_DRAMPWROK XDP_OBS[0..7] (6)
F17 L32 PEG_CTX_GRX_N12
(7) FDI_CTX_PRX_P7 FDI1_TX[3] PEG_TX#[3] L29 PEG_CTX_GRX_N11 AT28 XDP_OBS0_R R10 0 +/-5% XDP_OBS0
J18 PEG_TX#[4] K31 PEG_CTX_GRX_N10 BPM#[0] AR29 XDP_OBS1_R R11 0 +/-5% XDP_OBS1
(7) FDI_FSYNC0 FDI0_FSYNC PEG_TX#[5] BPM#[1]
C J17 K28 PEG_CTX_GRX_N9 VCCPWRGOOD_0_R AR30 XDP_OBS2_R R12 0 +/-5% XDP_OBS2 C
(7) FDI_FSYNC1 FDI1_FSYNC PEG_TX#[6] BPM#[2]
J30 PEG_CTX_GRX_N8 PCH_PLTRST#_R AR33 AT30 XDP_OBS3_R R13 0 +/-5% XDP_OBS3
H20 PEG_TX#[7] J28 PEG_CTX_GRX_N7 RESET# BPM#[3] AP32 XDP_OBS4_R R14 0 +/-5% XDP_OBS4
(7) FDI_INT FDI_INT PEG_TX#[8] BPM#[4]
H29 PEG_CTX_GRX_N6 DRAMPWROK. DG v0.7 P252 AR31 XDP_OBS5_R R15 0 +/-5% XDP_OBS5
J19 PEG_TX#[9] G27 PEG_CTX_GRX_N5 R16 The PCH asserts this pin in S0-S3 to indicate BPM#[5] AT31 XDP_OBS6_R R17 0 +/-5% XDP_OBS6
(7) FDI_LSYNC0 FDI0_LSYNC PEG_TX#[10] BPM#[6]
H17 E29 PEG_CTX_GRX_N4 10K when DRAM power is on. AR32 XDP_OBS7_R R18 0 +/-5% XDP_OBS7
(7) FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11] BPM#[7]
F27 PEG_CTX_GRX_N3 +/-5% The PCH deasserts this pin in S4 and S5.
PEG_TX#[12] D28 PEG_CTX_GRX_N2 Pull-high to 1.5V thru 4.75K
+1.05V_RUN_VTT PEG_TX#[13] F26 PEG_CTX_GRX_N1
PEG_TX#[14] CRB v0.7 is 1.1K
E25 PEG_CTX_GRX_N0
R19 24.9 EDP_COMP A18 PEG_TX#[15] CPU socket
+/-1% A17 eDP_COMPIO M28 PEG_CTX_GRX_P15
B16 eDP_ICOMPO PEG_TX[0] M33 PEG_CTX_GRX_P14 XDP_TDI_R R20 0 +/-5% XDP_TDI
eDP_HPD PEG_TX[1] Avoid stub in the PWRGD path XDP_TDI (6)
M30 PEG_CTX_GRX_P13 XDP_TDO_R R21 0 +/-5% XDP_TDO
R57 *10K_NC +/-5% PEG_TX[2] L31 PEG_CTX_GRX_P12
while placing resistors R2006 & R2009 XDP_TDO (6)
C15 PEG_TX[3] L28 PEG_CTX_GRX_P11 +1.05V_RUN_VTT
+1.05V_RUN_VTT eDP_AUX PEG_TX[4]
D15 K30 PEG_CTX_GRX_P10
eDP_AUX# PEG_TX[5]
eDP

K27 PEG_CTX_GRX_P9
PEG_TX[6] J29 PEG_CTX_GRX_P8 +3.3V_RUN
1. C17 PEG_TX[7] J27 PEG_CTX_GRX_P7 R22 *56_NC H_THERMTRIP# +1.05V_RUN_VTT
F16 eDP_TX[0] PEG_TX[8] H28 PEG_CTX_GRX_P6 +/-5%
C16 eDP_TX[1] PEG_TX[9] G28 PEG_CTX_GRX_P5 +1.05V_RUN_VTT XDP_TMS R23 51+/-1%
G15 eDP_TX[2] PEG_TX[10] E28 PEG_CTX_GRX_P4 C1 R24 *49.9_NC H_CATERR# XDP_TDI_R R25 51+/-1%
eDP_TX[3] PEG_TX[11] F28 PEG_CTX_GRX_P3 0.1uF +/-1% XDP_PREQ# R26 *51_NC +/-1%
C18 PEG_TX[12] D27 PEG_CTX_GRX_P2 16V,Y5V
E16 eDP_TX#[0] PEG_TX[13] E26 PEG_CTX_GRX_P1 R27 R28 62 H_PROCHOT# XDP_TCLK R29 51+/-1%
D16 eDP_TX#[1] PEG_TX[14] D25 PEG_CTX_GRX_P0 75 +/-5% XDP_TRST# R30 51+/-1%
eDP_TX#[2] PEG_TX[15] U1

5
F15 +/-1%
eDP_TX#[3]
2 4 PCH_PLTRST#_BUF R31 43 PCH_PLTRST#_R
(9,11) PCH_PLTRST#
CPU socket +/-1%
NC 74LVC1G07GW

1
Each FDI pipeline can be configured according to required display bandwidth R32 SM_RCOMP0 +/-1% 140 R33
requirements. 1, 2, 3 or 4 Lanes may be used to transport frame data over the link. *0_NC
Trace length Max is 500 mils Each Lane transports at a rate of 2.7 Gbps and uses ANSI 8b10b encoding. +/-5% SM_RCOMP1 +/-1% 25.5 R34

DG(V0.7) P49: FDI Disable SM_RCOMP2 +/-1% 200 R35

B B
R_COMP place close to CPU FDI_TX[7:0] FDI_TX#[7:0] Can float on the processor. Follow 4-DIMM DG
width 4 mils FDI_FSYNC[0..1],FDI_LSYNC[0..1],FDI_INT
eDP_COMPIO (A18) VCC_IO ‧Can be tied to GND (through 1K ±5% resistors); In addition,
FDI_FSYNC[0], FDI_FSYNC[1], FDI_LSYNC[0],
width 12 mils FDI_LSYNC[1] can be ganged together with one resistor.
eDP_ICOMPO (A17) R_COMP ‧ If left as no connect, there is no functional impact, but power
(~15 mW) may be wasted. For CPU S3 Power Reduce R208 *0_NC +/-5%

+1.5V_MEM

Cap need close to MXM Connector R36

1K
+/-5%
Q1
BSS138

R356 1K +/-5% D S DDR3_DRAMRST#_CPU

PEG bus TX cap : 0.22uF for Gen 3, 0.1uF for Gen2 (14,15,16,17) DDR3_DRAMRST#
PEG_CTX_GRX_N15 C2 220nF 16V,X7R
PEG_CTX_GRX_N14 C3 220nF 16V,X7R PEG_CTX_GRX_N15_C (19)
PEG_CTX_GRX_N13 C4 220nF 16V,X7R PEG_CTX_GRX_N14_C (19) R37 0 +/-5% G
PEG_CTX_GRX_N12 C5 220nF 16V,X7R PEG_CTX_GRX_N13_C (19) +3.3V_ALW_PCH +1.5V_CPU_VDDQ (10) DDR_HVREF_RST_PCH 2.
PEG_CTX_GRX_N11 C6 220nF 16V,X7R PEG_CTX_GRX_N12_C (19) R38 *0_NC +/-5%
PEG_CTX_GRX_N11_C (19) (39) DDR_HVREF_RST_GATE
PEG_CTX_GRX_N10 C7 220nF 16V,X7R R39
PEG_CTX_GRX_N9 C8 220nF 16V,X7R PEG_CTX_GRX_N10_C (19) C9 0.1uF 16V,Y5V
PEG_CTX_GRX_N9_C (19) 4.99K
PEG_CTX_GRX_N8 C11 220nF 16V,X7R R40 C10 +/-1%
PEG_CTX_GRX_N7 C12 220nF 16V,X7R PEG_CTX_GRX_N8_C (19) +3.3V_ALW_PCH 200 47nF
PEG_CTX_GRX_N7_C (19)
5

PEG_CTX_GRX_N6 C13 220nF 16V,X7R U2 +/-1% 16V,X7R

PEG_CTX_GRX_N5 C14 220nF 16V,X7R PEG_CTX_GRX_N6_C (19) 2
PEG_CTX_GRX_N5_C (19) (39,40) RUNPWROK_R1
PEG_CTX_GRX_N4 C15 220nF 16V,X7R 4 RUNPWROK_AND PM_DRAM_PWRGD_CPU
PEG_CTX_GRX_N3 C16 220nF 16V,X7R PEG_CTX_GRX_N4_C (19) R42 210 +/-1% 1 R41 130 +/-5%
PEG_CTX_GRX_N2 C17 220nF 16V,X7R PEG_CTX_GRX_N3_C (19) r0603h6
PEG_CTX_GRX_N1 C18 220nF 16V,X7R PEG_CTX_GRX_N2_C (19)
(7) PM_DRAM_PWRGD 74AHC1G09GW
PEG_CTX_GRX_N1_C (19)
3

PEG_CTX_GRX_N0 C19 220nF 16V,X7R R43

PEG_CTX_GRX_N0_C (19) *39_NC
+/-1%
A PEG_CTX_GRX_P15 C20 220nF 16V,X7R A
PEG_CTX_GRX_P14 C21 220nF 16V,X7R PEG_CTX_GRX_P15_C (19)
PEG_CTX_GRX_P14_C (19) D
PEG_CTX_GRX_P13 C22 220nF 16V,X7R
PEG_CTX_GRX_P12 C23 220nF 16V,X7R PEG_CTX_GRX_P13_C (19) Q2
PEG_CTX_GRX_P11 C24 220nF 16V,X7R PEG_CTX_GRX_P12_C (19) *2N7002W-7-F_NC
PEG_CTX_GRX_P10 C25 220nF 16V,X7R PEG_CTX_GRX_P11_C (19) R44 *0_NC +/-5% G
PEG_CTX_GRX_P10_C (19) (39,72) SUS_ON
PEG_CTX_GRX_P9 C26 220nF 16V,X7R
PEG_CTX_GRX_P8
PEG_CTX_GRX_P7
C27
C28
220nF
220nF
16V,X7R
16V,X7R
PEG_CTX_GRX_P9_C
PEG_CTX_GRX_P8_C
PEG_CTX_GRX_P7_C
(19)
(19)
(19)
(4,72) RUN_ON_CPU1.5VS3# R45 *0_NC +/-5%
S Ever Light
PEG_CTX_GRX_P6 C29 220nF 16V,X7R
PEG_CTX_GRX_P5
PEG_CTX_GRX_P4
C30
C31
220nF
220nF
16V,X7R
16V,X7R
PEG_CTX_GRX_P6_C
PEG_CTX_GRX_P5_C
PEG_CTX_GRX_P4_C
(19)
(19)
(19)
Technology Limited
PEG_CTX_GRX_P3 C32 220nF 16V,X7R need to confirm component of AND gate and MOS Title
PEG_CTX_GRX_P2 C33 220nF 16V,X7R PEG_CTX_GRX_P3_C (19)
PEG_CTX_GRX_P1 C34 220nF 16V,X7R PEG_CTX_GRX_P2_C (19) 02 -- SNB (rPGA) 1/4 HOST, PEG
PEG_CTX_GRX_P1_C (19) Follow DG Rev0.71 SM_DRAMPWROK topology
PEG_CTX_GRX_P0 C35 220nF 16V,X7R Size Document Number Rev
PEG_CTX_GRX_P0_C (19) 1A

Date: Thursday, January 27, 2011 Sheet 2 of 84

5 4 3 2 1
 5 4 3 2 1

D SANDY BRIDGE PROCESSOR (DDR3) D

JCPU1C JCPU1D

AB6 AE2
SA_CLK[0] DDR_A_CLK0 (15) SB_CLK[0] DDR_B_CLK0 (17)
AA6 AD2
(14,15) DDR_A_D[0..63] SA_CLK#[0] DDR_A_CLK#0 (15) (16,17) DDR_B_D[0..63] SB_CLK#[0] DDR_B_CLK#0 (17)
DDR_A_D0 C5 V9 DDR_B_D0 C9 R9
SA_DQ[0] SA_CKE[0] DDR_A_CKE0 (15) SB_DQ[0] SB_CKE[0] DDR_B_CKE0 (17)
DDR_A_D1 D5 DDR_B_D1 A7
DDR_A_D2 D3 SA_DQ[1] DDR_B_D2 D10 SB_DQ[1]
DDR_A_D3 D2 SA_DQ[2] DDR_B_D3 C8 SB_DQ[2]
DDR_A_D4 D6 SA_DQ[3] AA5 DDR_B_D4 A9 SB_DQ[3] AE1
SA_DQ[4] SA_CLK[1] DDR_A_CLK1 (15) SB_DQ[4] SB_CLK[1] DDR_B_CLK1 (17)
DDR_A_D5 C6 AB5 DDR_B_D5 A8 AD1
SA_DQ[5] SA_CLK#[1] DDR_A_CLK#1 (15) SB_DQ[5] SB_CLK#[1] DDR_B_CLK#1 (17)
DDR_A_D6 C2 V10 DDR_B_D6 D9 R10
SA_DQ[6] SA_CKE[1] DDR_A_CKE1 (15) SB_DQ[6] SB_CKE[1] DDR_B_CKE1 (17)
DDR_A_D7 C3 DDR_B_D7 D8
DDR_A_D8 F10 SA_DQ[7] DDR_B_D8 G4 SB_DQ[7]
DDR_A_D9 F8 SA_DQ[8] DDR_B_D9 F4 SB_DQ[8]
DDR_A_D10 G10 SA_DQ[9] AB4 DDR_B_D10 F1 SB_DQ[9] AB2
SA_DQ[10] SA_CLK[2] DDR_A_CLK2 (14) SB_DQ[10] SB_CLK[2] DDR_B_CLK2 (16)
DDR_A_D11 G9 AA4 DDR_B_D11 G1 AA2
SA_DQ[11] SA_CLK#[2] DDR_A_CLK#2 (14) SB_DQ[11] SB_CLK#[2] DDR_B_CLK#2 (16)
DDR_A_D12 F9 W9 DDR_B_D12 G5 T9
SA_DQ[12] SA_CKE[2] DDR_A_CKE2 (14) SB_DQ[12] SB_CKE[2] DDR_B_CKE2 (16)
DDR_A_D13 F7 DDR_B_D13 F5
DDR_A_D14 G8 SA_DQ[13] DDR_B_D14 F2 SB_DQ[13]
DDR_A_D15 G7 SA_DQ[14] DDR_B_D15 G2 SB_DQ[14]
DDR_A_D16 K4 SA_DQ[15] AB3 DDR_B_D16 J7 SB_DQ[15] AA1
SA_DQ[16] SA_CLK[3] DDR_A_CLK3 (14) SB_DQ[16] SB_CLK[3] DDR_B_CLK3 (16)
DDR_A_D17 K5 AA3 DDR_B_D17 J8 AB1
SA_DQ[17] SA_CLK#[3] DDR_A_CLK#3 (14) SB_DQ[17] SB_CLK#[3] DDR_B_CLK#3 (16)
DDR_A_D18 K1 W10 DDR_B_D18 K10 T10
SA_DQ[18] SA_CKE[3] DDR_A_CKE3 (14) SB_DQ[18] SB_CKE[3] DDR_B_CKE3 (16)
DDR_A_D19 J1 DDR_B_D19 K9
DDR_A_D20 J5 SA_DQ[19] DDR_B_D20 J9 SB_DQ[19]
DDR_A_D21 J4 SA_DQ[20] DDR_B_D21 J10 SB_DQ[20]
DDR_A_D22 J2 SA_DQ[21] AK3 DDR_B_D22 K8 SB_DQ[21] AD3
SA_DQ[22] SA_CS#[0] DDR_A_CS#0 (15) SB_DQ[22] SB_CS#[0] DDR_B_CS#0 (17)
DDR_A_D23 K2 AL3 DDR_B_D23 K7 AE3
SA_DQ[23] SA_CS#[1] DDR_A_CS#1 (15) SB_DQ[23] SB_CS#[1] DDR_B_CS#1 (17)
DDR_A_D24 M8 AG1 DDR_B_D24 M5 AD6
SA_DQ[24] SA_CS#[2] DDR_A_CS#2 (14) SB_DQ[24] SB_CS#[2] DDR_B_CS#2 (16)
C DDR_A_D25 N10 AH1 DDR_B_D25 N4 AE6 C
SA_DQ[25] SA_CS#[3] DDR_A_CS#3 (14) SB_DQ[25] SB_CS#[3] DDR_B_CS#3 (16)
DDR_A_D26 N8 DDR_B_D26 N2
DDR_A_D27 N7 SA_DQ[26] DDR_B_D27 N1 SB_DQ[26]
DDR_A_D28 M10 SA_DQ[27] DDR_B_D28 M4 SB_DQ[27]
DDR_A_D29 M9 SA_DQ[28] AH3 DDR_B_D29 N5 SB_DQ[28] AE4
SA_DQ[29] SA_ODT[0] DDR_A_ODT0 (15) SB_DQ[29] SB_ODT[0] DDR_B_ODT0 (17)
DDR_A_D30 N9 AG3 DDR_B_D30 M2 AD4

DDR SYSTEM MEMORY B

SA_DQ[30] DDR SYSTEM MEMORY A SA_ODT[1] DDR_A_ODT1 (15) SB_DQ[30] SB_ODT[1] DDR_B_ODT1 (17)
DDR_A_D31 M7 AG2 DDR_B_D31 M1 AD5
SA_DQ[31] SA_ODT[2] DDR_A_ODT2 (14) SB_DQ[31] SB_ODT[2] DDR_B_ODT2 (16)
DDR_A_D32 AG6 AH2 DDR_B_D32 AM5 AE5
SA_DQ[32] SA_ODT[3] DDR_A_ODT3 (14) SB_DQ[32] SB_ODT[3] DDR_B_ODT3 (16)
DDR_A_D33 AG5 DDR_B_D33 AM6
DDR_A_D34 AK6 SA_DQ[33] DDR_B_D34 AR3 SB_DQ[33]
DDR_A_D35 AK5 SA_DQ[34] DDR_B_D35 AP3 SB_DQ[34]
DDR_A_D36 AH5 SA_DQ[35] DDR_B_D36 AN3 SB_DQ[35]
SA_DQ[36] DDR_A_DQS#[0..7] (14,15) SB_DQ[36] DDR_B_DQS#[0..7] (16,17)
DDR_A_D37 AH6 C4 DDR_A_DQS#0 DDR_B_D37 AN2 D7 DDR_B_DQS#0
DDR_A_D38 AJ5 SA_DQ[37] SA_DQS#[0] G6 DDR_A_DQS#1 DDR_B_D38 AN1 SB_DQ[37] SB_DQS#[0] F3 DDR_B_DQS#1
DDR_A_D39 AJ6 SA_DQ[38] SA_DQS#[1] J3 DDR_A_DQS#2 DDR_B_D39 AP2 SB_DQ[38] SB_DQS#[1] K6 DDR_B_DQS#2
DDR_A_D40 AJ8 SA_DQ[39] SA_DQS#[2] M6 DDR_A_DQS#3 DDR_B_D40 AP5 SB_DQ[39] SB_DQS#[2] N3 DDR_B_DQS#3
DDR_A_D41 AK8 SA_DQ[40] SA_DQS#[3] AL6 DDR_A_DQS#4 DDR_B_D41 AN9 SB_DQ[40] SB_DQS#[3] AN5 DDR_B_DQS#4
DDR_A_D42 AJ9 SA_DQ[41] SA_DQS#[4] AM8 DDR_A_DQS#5 DDR_B_D42 AT5 SB_DQ[41] SB_DQS#[4] AP9 DDR_B_DQS#5
DDR_A_D43 AK9 SA_DQ[42] SA_DQS#[5] AR12 DDR_A_DQS#6 DDR_B_D43 AT6 SB_DQ[42] SB_DQS#[5] AK12 DDR_B_DQS#6
DDR_A_D44 AH8 SA_DQ[43] SA_DQS#[6] AM15 DDR_A_DQS#7 DDR_B_D44 AP6 SB_DQ[43] SB_DQS#[6] AP15 DDR_B_DQS#7
DDR_A_D45 AH9 SA_DQ[44] SA_DQS#[7] DDR_B_D45 AN8 SB_DQ[44] SB_DQS#[7]
DDR_A_D46 AL9 SA_DQ[45] DDR_B_D46 AR6 SB_DQ[45]
DDR_A_D47 AL8 SA_DQ[46] DDR_B_D47 AR5 SB_DQ[46]
DDR_A_D48 AP11 SA_DQ[47] DDR_B_D48 AR9 SB_DQ[47]
SA_DQ[48] DDR_A_DQS[0..7] (14,15) SB_DQ[48] DDR_B_DQS[0..7] (16,17)
DDR_A_D49 AN11 D4 DDR_A_DQS0 DDR_B_D49 AJ11 C7 DDR_B_DQS0
DDR_A_D50 AL12 SA_DQ[49] SA_DQS[0] F6 DDR_A_DQS1 DDR_B_D50 AT8 SB_DQ[49] SB_DQS[0] G3 DDR_B_DQS1
DDR_A_D51 AM12 SA_DQ[50] SA_DQS[1] K3 DDR_A_DQS2 DDR_B_D51 AT9 SB_DQ[50] SB_DQS[1] J6 DDR_B_DQS2
DDR_A_D52 AM11 SA_DQ[51] SA_DQS[2] N6 DDR_A_DQS3 DDR_B_D52 AH11 SB_DQ[51] SB_DQS[2] M3 DDR_B_DQS3
DDR_A_D53 AL11 SA_DQ[52] SA_DQS[3] AL5 DDR_A_DQS4 DDR_B_D53 AR8 SB_DQ[52] SB_DQS[3] AN6 DDR_B_DQS4
DDR_A_D54 AP12 SA_DQ[53] SA_DQS[4] AM9 DDR_A_DQS5 DDR_B_D54 AJ12 SB_DQ[53] SB_DQS[4] AP8 DDR_B_DQS5
DDR_A_D55 AN12 SA_DQ[54] SA_DQS[5] AR11 DDR_A_DQS6 DDR_B_D55 AH12 SB_DQ[54] SB_DQS[5] AK11 DDR_B_DQS6
DDR_A_D56 AJ14 SA_DQ[55] SA_DQS[6] AM14 DDR_A_DQS7 DDR_B_D56 AT11 SB_DQ[55] SB_DQS[6] AP14 DDR_B_DQS7
DDR_A_D57 AH14 SA_DQ[56] SA_DQS[7] DDR_B_D57 AN14 SB_DQ[56] SB_DQS[7]
DDR_A_D58 AL15 SA_DQ[57] DDR_B_D58 AR14 SB_DQ[57]
DDR_A_D59 AK15 SA_DQ[58] DDR_B_D59 AT14 SB_DQ[58]
DDR_A_D60 AL14 SA_DQ[59] DDR_B_D60 AT12 SB_DQ[59]
SA_DQ[60] DDR_A_MA[0..15] (14,15) SB_DQ[60] DDR_B_MA[0..15] (16,17)
DDR_A_D61 AK14 AD10 DDR_A_MA0 DDR_B_D61 AN15 AA8 DDR_B_MA0
DDR_A_D62 AJ15 SA_DQ[61] SA_MA[0] W1 DDR_A_MA1 DDR_B_D62 AR15 SB_DQ[61] SB_MA[0] T7 DDR_B_MA1
B
DDR_A_D63 AH15 SA_DQ[62] SA_MA[1] W2 DDR_A_MA2 DDR_B_D63 AT15 SB_DQ[62] SB_MA[1] R7 DDR_B_MA2 B
SA_DQ[63] SA_MA[2] W7 DDR_A_MA3 SB_DQ[63] SB_MA[2] T6 DDR_B_MA3
SA_MA[3] V3 DDR_A_MA4 SB_MA[3] T2 DDR_B_MA4
SA_MA[4] V2 DDR_A_MA5 SB_MA[4] T4 DDR_B_MA5
SA_MA[5] W3 DDR_A_MA6 SB_MA[5] T3 DDR_B_MA6
AE10 SA_MA[6] W6 DDR_A_MA7 AA9 SB_MA[6] R2 DDR_B_MA7
(14,15) DDR_A_BS0 SA_BS[0] SA_MA[7] (16,17) DDR_B_BS0 SB_BS[0] SB_MA[7]
AF10 V1 DDR_A_MA8 AA7 T5 DDR_B_MA8
(14,15) DDR_A_BS1 SA_BS[1] SA_MA[8] (16,17) DDR_B_BS1 SB_BS[1] SB_MA[8]
V6 W5 DDR_A_MA9 R6 R3 DDR_B_MA9
(14,15) DDR_A_BS2 SA_BS[2] SA_MA[9] (16,17) DDR_B_BS2 SB_BS[2] SB_MA[9]
AD8 DDR_A_MA10 AB7 DDR_B_MA10
SA_MA[10] V4 DDR_A_MA11 SB_MA[10] R1 DDR_B_MA11
SA_MA[11] W4 DDR_A_MA12 SB_MA[11] T1 DDR_B_MA12
AE8 SA_MA[12] AF8 DDR_A_MA13 AA10 SB_MA[12] AB10 DDR_B_MA13
(14,15) DDR_A_CAS# SA_CAS# SA_MA[13] (16,17) DDR_B_CAS# SB_CAS# SB_MA[13]
AD9 V5 DDR_A_MA14 AB8 R5 DDR_B_MA14
(14,15) DDR_A_RAS# SA_RAS# SA_MA[14] (16,17) DDR_B_RAS# SB_RAS# SB_MA[14]
AF9 V7 DDR_A_MA15 AB9 R4 DDR_B_MA15
(14,15) DDR_A_WE# SA_WE# SA_MA[15] (16,17) DDR_B_WE# SB_WE# SB_MA[15]

CPU socket CPU socket

A A

Ever Light
Technology Limited
Title
03 -- SNB (rPGA) 2/4 DDR
Size Document Number Rev
1A

Date: Thursday, January 27, 2011 Sheet 3 of 84

5 4 3 2 1
 5 4 3 2 1

SANDY BRIDGE PROCESSOR (POWER) SANDY BRIDGE PROCESSOR (GRAPHICS POWER)

JCPU1F POWER +1.5V_CPU_VDDQ

VCCCORE = (SV) xxA max

R1042
+VCC_CORE 18-mil witdh,and shoulde use differential routing with 7-milseparation. *1K_NC
Signals must have equal trace length +/-1%
+1.05V_RUN_VTT within 25 mils and are to be routed using external layer and
AG35
AG34
AG33
VCC1
VCC2 VCCIO1
AH13
AH10 +VCC_GFXCORE JCPU1G
POWER GND referencing (no split plane referencing). VSS_SENSE,
VCC_SENSE are to use 25-mils separation from any other
signal or rail. +V_SM_VREF_CNT
R1043 *0_NC
SM_VREF_RES
AG32 VCC3 VCCIO2 AG10
AG31 VCC4 VCCIO3 AC10 +/-5% C978 R1044
VCC5 VCCIO4

SENSE
LINES
AG30 Y10 AT24 AK35 *0.1uF_NC *1K_NC
VCC6 VCCIO5 VAXG1 VAXG_SENSE VAXG_SENSE (71)
AG29 U10 AT23 AK34 16V,X7R +/-1%
AG28 VCC7 VCCIO6 P10 AT21 VAXG2 VSSAXG_SENSE VSSAXG_SENSE (71)
C36 C37 C38 C39 C40 C41
AG27 VCC8 VCCIO7 L10 22uF 22uF 22uF 22uF 22uF 22uF AT20 VAXG3
D D
AG26 VCC9 VCCIO8 J14 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S AT18 VAXG4
AF35 VCC10 VCCIO9 J13 AT17 VAXG5
AF34 VCC11 VCCIO10 J12 AR24 VAXG6
AF33 VCC12 VCCIO11 J11 AR23 VAXG7
AF32 VCC13 VCCIO12 H14 AR21 VAXG8
AF31 VCC14 VCCIO13 H12 AR20 VAXG9
VCC15 VCCIO14 VAXG10

VREF
AF30 H11 AR18
AF29 VCC16 VCCIO15 G14 AR17 VAXG11
AF28 VCC17 VCCIO16 G13 AP24 VAXG12 AL1 +V_SM_VREF_CNT
VCC18 VCCIO17 VAXG13 SM_VREF
PEG AND DDR
AF27 G12 AP23 +1.5V_MEM
AF26 VCC19 VCCIO18 F14 AP21 VAXG14
AD35 VCC20 VCCIO19 F13 C42 C43 C45 C46 C47 C48 AP20 VAXG15
AD34 VCC21 VCCIO20 F12 22uF 22uF 22uF 22uF 22uF 22uF AP18 VAXG16 C44 100nF 10V,Y5V
AD33 VCC22 VCCIO21 F11 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S AP17 VAXG17
VCC23 VCCIO22 VAXG18 +V_SM_VREF should +1.5V_CPU_VDDQ
AD32 E14 AN24 C53 100nF 10V,Y5V
AD31 VCC24 VCCIO23 E12 AN23 VAXG19 have 10 mil trace width
AD30 VCC25 VCCIO24 AN21 VAXG20 C54 100nF 10V,Y5V
AD29 VCC26 E11 AN20 VAXG21
VCC27 VCCIO25 Power page : VAXG22

DDR3 -1.5V RAILS

AD28 D14 AN18 C55 100nF 10V,Y5V
AD27 VCC28 VCCIO26 D13
330uF x 4 AN17 VAXG23
VCC29 VCCIO27 EE page : VAXG24

GRAPHICS
AD26 D12 AM24 AF7
AC35 VCC30 VCCIO28 D11 22uF x 12 AM23 VAXG25 VDDQ1 AF4
AC34 VCC31 VCCIO29 C14 AM21 VAXG26 VDDQ2 AF1 C56 C57 C58 C59 C60 C61
AC33 VCC32 VCCIO30 C13 AM20 VAXG27 VDDQ3 AC7 10uF 10uF 10uF 10uF 10uF 10uF
AC32 VCC33 VCCIO31 C12 Intel DG : AM18 VAXG28 VDDQ4 AC4 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S
AC31 VCC34 VCCIO32 C11 470uF x 2 Bottom Socket Edge AM17 VAXG29 VDDQ5 AC1 c0805h14 c0805h14 c0805h14 c0805h14 c0805h14 c0805h14
AC30 VCC35 VCCIO33 B14 AL24 VAXG30 VDDQ6 Y7
VCC36 VCCIO34 22uF x 2 Top Socket Cavity VAXG31 VDDQ7
AC29 B12 AL23 Y4 Power page :
AC28 VCC37 VCCIO35 A14
22uF x 4 Top Socket Edge AL21 VAXG32 VDDQ8 Y1
AC27 VCC38 VCCIO36 A13 22uF x 2 Bottom Socket Cavity AL20 VAXG33 VDDQ9 U7
22uF x 4
AC26 VCC39 VCCIO37 A12 22uF x 4 Bottom Socket Edge AL18 VAXG34 VDDQ10 U4 C62 EE page :
AA35 VCC40 VCCIO38 A11 AL17 VAXG35 VDDQ11 U1 330uF 330uF x 1
AA34 VCC41 VCCIO39 AK24 VAXG36 VDDQ12 P7 2.5V,<9mOhm
VCC42 VAXG37 VDDQ13 10uF x 6
AA33 J23 AK23 P4
AA32 VCC43 VCCIO40 AK21 VAXG38 VDDQ14 P1
AA31 VCC44 AK20 VAXG39 VDDQ15 Intel DG :
AA30 VCC45 AK18 VAXG40
VCC46 VAXG41 330uF x 1 Bottom Socket Edge
AA29 AK17
AA28 VCC47 +1.05V_RUN_VTT AJ24 VAXG42 10uF x 6 Bottom Socket Edge
AA27 VCC48 AJ23 VAXG43
AA26 VCC49 ALERT R46 75 +/-1% AJ21 VAXG44
VCC50 VAXG45
CORE SUPPLY

Y35 AJ20 +0.85V_RUN

Y34 VCC51 AJ18 VAXG46
VCC52 VAXG47 Power page :
Y33 AJ17
C
Y32 VCC53 Place PU resistors close to VR AH24 VAXG48 22uF x 5 C

SA RAIL
Y31 VCC54 AH23 VAXG49 C63 C64 C65 C66 C120 EE page :
Y30 VCC55 AH21 VAXG50 M27 *10uF_NC 10uF 10uF *10uF_NC 330uF 10uF x 2, NC x 2
Y29 VCC56 AH20 VAXG51 VCCSA1 M26 4V,X6S 4V,X6S 4V,X6S 4V,X6S 2V,+/-20%
Y28 VCC57 AH18 VAXG52 VCCSA2 L26 c0805h14 c0805h14 c0805h14 c0805h14
Y27 VCC58 AH17 VAXG53 VCCSA3 J26 Intel DG :
Y26 VCC59 VAXG54 VCCSA4 J25 330uF x 1 near CPU
V35 VCC60 VCCSA5 J24
VCC61 VCCSA6 10uF x 2 Bottom Socket Cavity
SVID

V34 AJ29 H_CPU_SVIDALRT# R47 43 +/-1% ALERT H26

V33 VCC62 VIDALERT# AJ30
ALERT (71) VCCSA7 H25 R48 0 +/-5%
10uF x 1 Bottom Socket Edge
VCC63 VIDSCLK CLK (71) VCCSA8 VCCSA_SENSE_GND (67)
V32 AJ28 VDIO VDIO (71)
VCC64 VIDSOUT

1.8V RAIL
V31
V30 VCC65 +1.8V_RUN
V29 VCC66 +1.05V_RUN_VTT
V28 VCC67
V27 VCC68 R49 0 +/-5% r1206h7 +1.8V_VCCPLL B6 H23
VCC69 VCCPLL1 VCCSA_SENSE VCCSA_SENSE (67)

MISC
V26 A6
U35 VCC70 R50 C995 C68 C69 C70 A2 VCCPLL2 R51 *0_NC +/-5%
U34 VCC71 Place PU resistors close 130 330uF 10uF 1uF 1uF VCCPLL3
VCC72 Power page :
U33 to processor +/-1% 2.5V,<9mOhm 4V,X6S 6.3V,X5R 6.3V,X5R C22 H_FC_C22 R749 *0_NC +/-5%
U32 VCC73 10uF x 2 c0805h14 c0402h6 c0402h6 FC_C22 C24 VCCSA_VID1 R53 *0_NC +/-5%
VCCSA_CNTRL0 (40,67)
VCC74 EE page : VCCSA_VID1 VCCSA_CNTRL1 (40,67)
U31 VDIO
U30 VCC75 330uF x 1
U29 VCC76 R1041 R52 +V_DDR_REF
VCC77 10uF x 1
U28 1K 1K
U27 VCC78 1uF x 2 CPU socket +/-5% +/-5% R54 *0_NC +/-5%
U26 VCC79 18-mil witdh,and shoulde use differential +VCC_CORE
R35 VCC80
VCC81
routing with 7-milseparation. Intel DG : PQ1
R34 Signals must have equal trace length
R33 VCC82 VCC_SENSE & VSS_SENSE:
330uF x 1 Bottom Socket Edge 2N7002W-7-F
within 25 mils and are to be routed using external layer and
R32 VCC83 R55 xxxxxx 10uF x 1 Bottom Socket Edge
GND referencing (no split plane referencing). VSS_SENSE,
R31 VCC84 100 1uF x2 Bottom Socket Edge +V_SM_VREF_CNT S D
VCC_SENSE are to use 25-mils separation from any other 100- ±1% pull-down to GND near processor
R30 VCC85 +/-1%
VCC86 signal or rail.
R29
VCC87
SENSE LINES

R28 R58 C71

R27 VCC88 AJ35 VCCSENSE_R R56 0 +/-5% 100K G 0.1uF
VCC89 VCC_SENSE VCCSENSE (71) +1.05V_RUN_VTT
R26 AJ34 VSSSENSE_R R59 0 +/-5% VSSSENSE +/-5% 16V,X7R
P35 VCC90 VSS_SENSE VSSSENSE (71)
+1.05V_RUN_VTT
P34 VCC91
P33 VCC92
P32 VCC93 B10 VTT_SENSE_R R60 0 +/-5%
VCC94 VCCIO_SENSE VTT_SENSE (68)
P31 A10 VSSIO_SENSE_R R61 0 +/-5%
P30 VCC95 VSSIO_SENSE VTT_GND (68)
C72 C73 C74 C75 C76 C77 C78 C79 C80 C81 C82
P29 VCC96 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF *22uF_NC *22uF_NC +1.5V_CPU_VDDQ +1.5V_MEM
P28 VCC97 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S
For CPU S3 Power Reduce
B B
P27 VCC98 Q3
P26 VCC99 FDMS7670
VCC100 VSSSENSE 3
2
1 5

R62 C83 C84 C85 C86 C87 C88 C89 C90 C102 C103
100 22uF *22uF_NC *22uF_NC *22uF_NC 22uF *22uF_NC *22uF_NC 22uF 330uF 330uF

4
+/-1% 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 2V,+/-20% 2V,+/-20% RUN_ON_CPU1.5VS3

CPU socket C94

4.7nF
Power page : +15V_ALW 50V,X7R
22uF x 3
EE page :
330uF x 1, NC x 1
+VCC_CORE +3.3V_ALW2
22uF x 12, NC x 7
R63
Intel DG : 100K
C104 C105 C106 C107 C108 330uF x 2 near CPU +/-5%
Power page : 22uF 22uF 22uF 22uF 22uF R64
4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S
22uF x 5, NC x 5 Bottom Socket Cavity 100K
330uF x 6 22uF x 7, NC x 2 Top Socket Cavity +/-5% Q4
D
EE page : CPU Power Rail Table(TBD) for 2012 capable designs 2N7002W-7-F
22uF x 16 330 µF x3
10uF x 10 S0 Iccmax
Voltage Rail Voltage RUN_ON_CPU1.5VS3# G
Current (A)
Intel DG : C109 C110 C111 C112 C113 C114
470uF x 4 Bottom Socket Edge 22uF 22uF 22uF 22uF 22uF 22uF S
VCC 0.65-1.3 53 D
4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S
22uF x 8 Top Socket Cavity
22uF x 8 Top Socket Edge VCCIO 1.05 8.5
10uF x 10 Bottom Socket Cavity (40,61,66,67,72,73) RUN_ON R65 *0_NC G Q5
+/-5% 2N7002W-7-F
VAXG 0.0-1.1 26 S
RUN_ON_CPU1.5VS3# (2,72)
C117 C115 C116 C118 C119 (39) CPU1.5V_S3_GATE R66 0 +/-5%
22uF 22uF 22uF 22uF 22uF VCCPLL 1.8 3
4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S

A VDDQ 1.5 5 A

VCCSA 0.65-0.9 6
C124 C125 C126 C127 C128
10uF 10uF 10uF 10uF 10uF +1.5V_MEM 1.5 12-16 *
4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S
c0805h14 c0805h14 c0805h14 c0805h14 c0805h14

Ever Light
C130
10uF
C131
10uF
C132
10uF
C133
10uF
C134
10uF
* Description
5A to Mem controller(+1.5V_CPU_VDDQ)
Technology Limited
4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S Title
c0805h14 c0805h14 c0805h14 c0805h14 c0805h14 5-6A to 2 DIMMs/channel 04 -- SNB (rPGA) 3/4 POWER
2-5A to +1.5V_RUN & +0.75V_DDR_VTT
Size Document Number Rev
1A

Date: Thursday, January 27, 2011 Sheet 4 of 84

5 4 3 2 1
 5 4 3 2 1

D SANDY BRIDGE PROCESSOR (GND) D

JCPU1H JCPU1I

AT35 AJ22
SANDY BRIDGE PROCESSOR( RESERVED, CFG)
AT32 VSS1 VSS81 AJ19
AT29 VSS2 VSS82 AJ16 T35 F22 JCPU1E
AT27 VSS3 VSS83 AJ13 T34 VSS161 VSS234 F19
AT25 VSS4 VSS84 AJ10 T33 VSS162 VSS235 E30
AT22 VSS5 VSS85 AJ7 T32 VSS163 VSS236 E27 L7
VSS6 VSS86 VSS164 VSS237 RSVD28 T1
AT19 AJ4 T31 E24 AG7
VSS7 VSS87 VSS165 VSS238 RSVD29 T2
AT16 AJ3 T30 E21 CFG0 AK28 AE7 T12
VSS8 VSS88 VSS166 VSS239 (6) CFG0 CFG[0] RSVD30
AT13 AJ2 T29 E18 CFG1 AK29 AK2 T3
VSS9 VSS89 VSS167 VSS240 (6) CFG1 CFG[1] RSVD31
AT10 AJ1 T28 E15 CFG2 AL26 W8 T4
VSS10 VSS90 VSS168 VSS241 (6) CFG2 CFG[2] RSVD32
AT7 AH35 T27 E13 CFG3 AL27
VSS11 VSS91 VSS169 VSS242 (6) CFG3 CFG[3]
AT4 AH34 T26 E10 CFG4 AK26
VSS12 VSS92 VSS170 VSS243 (6) CFG4 CFG[4]
AT3 AH32 P9 E9 CFG5 AL29 AT26 T13
VSS13 VSS93 VSS171 VSS244 (6) CFG5 CFG[5] RSVD33
AR25 AH30 P8 E8 CFG6 AL30 AM33 T14
VSS14 VSS94 VSS172 VSS245 (6) CFG6 CFG[6] RSVD34
AR22 AH29 P6 E7 CFG7 AM31 AJ27
VSS15 VSS95 VSS173 VSS246 (6) CFG7 CFG[7] RSVD35 T5
AR19 AH28 P5 E6 CFG8 AM32
VSS16 VSS96 VSS174 VSS247 (6) CFG8 CFG[8]
AR16 AH26 P3 E5 CFG9 AM30
VSS17 VSS97 VSS175 VSS248 (6) CFG9 CFG[9]
AR13 AH25 P2 E4 CFG10 AM28
VSS18 VSS98 VSS176 VSS249 (6) CFG10 CFG[10]
AR10 AH22 N35 E3 CFG11 AM26
VSS19 VSS99 VSS177 VSS250 (6) CFG11 CFG[11]
AR7 AH19 N34 E2 CFG12 AN28
VSS20 VSS100 VSS178 VSS251 T6 CFG[12]
AR4 AH16 N33 E1 T7 CFG13 AN31 T8 T8
AR2 VSS21 VSS101 AH7 N32 VSS179 VSS252 D35 CFG14 AN26 CFG[13] RSVD37 J16
VSS22 VSS102 VSS180 VSS253 T9 CFG[14] RSVD38 T10
AP34 AH4 N31 D32 T11 CFG15 AM27 H16 T15
AP31 VSS23 VSS103 AG9 N30 VSS181 VSS254 D29 CFG16 AK31 CFG[15] RSVD39 G16
VSS24 VSS104 VSS182 VSS255 (6) CFG16 CFG[16] RSVD40 T16
AP28 AG8 N29 D26 CFG17 AN29
VSS25 VSS105 VSS183 VSS256 (6) CFG17 CFG[17]
AP25 AG4 N28 D20
AP22 VSS26 VSS106 AF6 N27 VSS184 VSS257 D17
VSS27 VSS107 VSS185 VSS258 Intel review feed back
AP19 AF5 N26 C34
AP16 VSS28 VSS108 AF3 M34 VSS186 VSS259 C31 AR35
VSS29 VSS109 VSS187 VSS260 RSVD41 T17
AP13 AF2 L33 C28 RSVD1 AJ31 AT34 T18
AP10 VSS30 VSS110 AE35 L30 VSS188 VSS261 C27 RSVD2 AH31 VAXG_VAL_SENSE RSVD42 AT33
VSS31 VSS111 VSS189 VSS262 +VCC_GFXCORE VSSAXG_VAL_SENSE RSVD43 T19
C AP7 AE34 L27 C25 RSVD3 AJ33 AP35 C
VSS32 VSS112 VSS190 VSS263 VCC_VAL_SENSE RSVD44 T20
AP4 AE33 L9 C23 RSVD4 AH33 AR34 T21
AP1 VSS33 VSS113 AE32 L8 VSS191 VSS264 C10 VSS_VAL_SENSE RSVD45
AN30 VSS34 VSS114 AE31 L6 VSS192 VSS265 C1
AN27 VSS35 VSS115 AE30 L5 VSS193 VSS266 B22 R67 *49.9_NC +/-1% RSVD1 AJ26
VSS36 VSS116 VSS194 VSS267 T22 RSVD5
AN25 AE29 L4 B19

RESERVED
AN22
AN19
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
AE28
AE27
L3
L2
VSS195
VSS196
VSS197
VSS VSS268
VSS269
VSS270
B17
B15
+VCC_CORE

RSVD46
B34 T23
AN16 AE26 L1 B13 +M_VREF_DQ_DIMM0_1 B4 A33
VSS40 VSS120 VSS198 VSS271 +M_VREF_DQ_DIMM0_1 RSVD6 RSVD47 T24
AN13 AE9 K35 B11 R68 *49.9_NC +/-1% RSVD3 +M_VREF_CA_DIMM0_1 D1 A34
VSS41 VSS121 VSS199 VSS272 +M_VREF_CA_DIMM0_1 RSVD7 RSVD48 T25
AN10 AD7 K32 B9 B35 T26
AN7 VSS42 VSS122 AC9 K29 VSS200 VSS273 B8 RSVD49 C35
VSS43 VSS123 VSS201 VSS274 RSVD50 T27
AN4 AC8 K26 B7
AM29 VSS44 VSS124 AC6 J34 VSS202 VSS275 B5 R69 *49.9_NC +/-1% RSVD2 F25
VSS45 VSS125 VSS203 VSS276 T28 RSVD8
AM25 AC5 J31 B3 T29
F24
AM22 VSS46 VSS126 AC3 H33 VSS204 VSS277 B2 R70 *49.9_NC +/-1% RSVD4 F23 RSVD9
VSS47 VSS127 VSS205 VSS278 T30 RSVD10
AM19 AC2 H30 A35 T31
D24 AJ32 T32
AM16 VSS48 VSS128 AB35 H27 VSS206 VSS279 A32 R71 *1K_NC +/-5% +M_VREF_DQ_DIMM0_1 G25 RSVD11 RSVD51 AK32
VSS49 VSS129 VSS207 VSS280 T33 RSVD12 RSVD52 T34
AM13 AB34 H24 A29 T35
G24
AM10 VSS50 VSS130 AB33 H21 VSS208 VSS281 A26 R72 *1K_NC +/-5% +M_VREF_CA_DIMM0_1 E23 RSVD13
VSS51 VSS131 VSS209 VSS282 T36 RSVD14
AM7 AB32 H18 A23 D23
VSS52 VSS132 VSS210 VSS283 T37 RSVD15
AM4 AB31 H15 A20 C30 AH27
VSS53 VSS133 VSS211 VSS284 T38 RSVD16 VCC_DIE_SENSE T39
AM3 AB30 H13 A3 T40
A31
AM2 VSS54 VSS134 AB29 H10 VSS212 VSS285 B30 RSVD17
VSS55 VSS135 VSS213 T41 RSVD18
AM1 AB28 H9 T42
B29
AL34 VSS56 VSS136 AB27 H8 VSS214 D30 RSVD19 AN35
VSS57 VSS137 VSS215 +3.3V_ALW T43 RSVD20 RSVD54 CLK_XDP_ITP (6)
AL31 AB26 H7 T44
B31 AM35 CLK_XDP_ITP# (6)
AL28 VSS58 VSS138 Y9 H6 VSS216 A30 RSVD21 RSVD55
VSS59 VSS139 VSS217 T45 RSVD22
AL25 Y8 H5 T46
C29
AL22 VSS60 VSS140 Y6 H4 VSS218 RSVD23
AL19 VSS61 VSS141 Y5 H3 VSS219 R1081
AL16 VSS62 VSS142 Y3 H2 VSS220 10K J20
VSS63 VSS143 VSS221 T47 RSVD24
AL13 Y2 H1 +/-5% T48
B18 AT2 T49
AL10 VSS64 VSS144 W35 G35 VSS222 A19 RSVD25 RSVD56 AT1
VSS65 VSS145 VSS223 VCCIO_SEL RSVD57 T50
AL7 W34 G32 R73 0 +/-5% AR1
VSS66 VSS146 VSS224 RSVD58 T51
AL4 W33 G29
AL2 VSS67 VSS147 W32 G26 VSS225 J15
VSS68 VSS148 VSS226 T52 RSVD27
AK33 W31 G23
B
AK30 VSS69 VSS149 W30 G20 VSS227 B
AK27 VSS70 VSS150 W29 G17 VSS228 B1
VSS71 VSS151 VSS229 Voltage selection for VCCIO: KEY T53
AK25 W28 G11
AK22 VSS72 VSS152 W27 F34 VSS230 For Huron River platforms,
AK19 VSS73 VSS153 W26 F31 VSS231 this pin must be pulled high
AK16 VSS74 VSS154 U9 F29 VSS232
AK13 VSS75 VSS155 U8 VSS233 on the motherboard.
AK10 VSS76 VSS156 U6
AK7 VSS77 VSS157 U5 CPU socket
AK4 VSS78 VSS158 U3
AJ25 VSS79 VSS159 U2
VSS80 VSS160
CFG2 R74 1K +/-5%

1 0 CFG4 R75 *1K_NC +/-5%

CPU socket CPU socket
CFG2 Lan# definition matches CFG5 R76 *1K_NC +/-5%

(PEG Static socket pin map definition Lan Reversed CFG6 R77 *1K_NC +/-5%
Lane Reversal) (Default Value) CFG7 R78 *1K_NC +/-5%
CFG4 Disabled; No Physical Display Port Enabled; An external Display port
(Display Port attached to Embedded Diplay Port device is connected to the Embedded
Presence strap) (Default Value) Display port

PEG Train immediately following

CFG7 xxRESETB de assertion
A
(PEG Defer Training) PEG Wait for BIOS for training A
(Default Value)

11 x16 - Device 1 functions 1 and 2 disable (Default Value)

Ever Light
CFG[6:5] 10 x8, x8 - Device 1 function 1 enable; function 2 disable
(PCIe Port Technology Limited
Bifurcation Straps) 01 Reserved - (Device 1 function 1 disable; function 2 enable) Title
05 -- SNB (rPGA) 4/4(GND)
00 x8, x8, x4 - Device 1 function 1 and 2 enable Size Document Number Rev
1A

Date: Thursday, January 27, 2011 Sheet 5 of 84

5 4 3 2 1
 5 4 3 2 1

R79 *0_NC +/-5%

R80 *0_NC +/-5% CLK_XDP_ITP (5)
CLK_XDP_ITP# (5)
CLK_XDP R81 0 +/-5%
CLK_CPU_ITP (10)
CLK_XDP# R82 0 +/-5%
CLK_CPU_ITP# (10)

+1.05V_RUN_VTT
CPU XDP
D JXDP1 D

1 2
C135 C136 3 GND0 GND1 4
(2) XDP_PREQ# OBSFN_A0 OBSFN_C0 CFG16 (5)
0.1uF 0.1uF 5 6
(2) XDP_PRDY# OBSFN_A1 OBSFN_C1 CFG17 (5)
16V,X7R 16V,X7R 7 8
XDP_OBS0 9 GND2 GND3 10
XDP_OBS1 11 OBSDATA_A0 OBSDATA_C0 12 CFG0 (5)
13 OBSDATA_A1 OBSDATA_C1 14 CFG1 (5)
XDP_OBS2 15 GND4 GND5 16
XDP_OBS3 17 OBSDATA_A2 OBSDATA_C2 18 CFG2 (5) +1.05V_RUN_VTT
19 OBSDATA_A3 OBSDATA_C3 20 CFG3 (5)
21 GND6 GND7 22
(5) CFG10 OBSFN_B0 OBSFN_D0 CFG8 (5) +3.3V_RUN
(2) XDP_OBS[0..7] 23 24
(5) CFG11 OBSFN_B1 OBSFN_D1 CFG9 (5)
25 26
XDP_OBS4 27 GND8 GND9 28
XDP_OBS5 29 OBSDATA_B0 OBSDATA_D0 30 CFG4 (5)
31 OBSDATA_B1 OBSDATA_D1 32 CFG5 (5)
XDP_OBS6 33 GND10 GND11 34
+1.05V_RUN_VTT XDP_OBS7 35 OBSDATA_B2 OBSDATA_D2 36 CFG6 (5) R83 R84
37 OBSDATA_B3 OBSDATA_D3 38 CFG7 (5)
GND12 GND13 51 1K
R85 1K +/-1% H_CPUPWRGD_XDP 39 40 CLK_XDP +/-1%
(2,11) H_CPUPWRGD PWRGOOD/HOOK0 ITPCLK/HOOK4 +/-1%
(7) SIO_PWRBTN#_R R86 0 +/-5% CFD_PWRBTN#_XDP 41 42 CLK_XDP#
43 HOOK1 ITPCLK#/HOOK5 44
R87 1K +/-1% XDP_HOOK2 45 VCC_OBS_AB VCC_OBS_CD 46 XDP_RST#_R R88 1K
(5) CFG0 HOOK2 RESET#/HOOK6 PLTRST_XDP# (9)
The resistor R89 0 +/-5% SYS_PWROK_XDP 47 48 +/-1% XDP_DBRESET#
(7,40) SYS_PWROK HOOK3 DBR#/HOOK7 XDP_DBRESET# (2,7)
49 50
for HOOK2 should be MEM_SMBDAT R90 0 +/-5% DDR_XDP_SMBDAT_R1 51 GND14 GND15 52 XDP_TDO
placed such that the SDA TDO XDP_TDO (2)
MEM_SMBCLK R91 0 +/-5% DDR_XDP_SMBCLK_R1 53 54
SCL TRSTN XDP_TRST# (2)
stub is very small 55 56 XDP_TDI
XDP_TDI (2)
57 TCK1 TDI 58 XDP_TMS
on CFG0 net (2) XDP_TCLK TCK0 TMS XDP_TMS (2)
59 60
GND16 GND17
+3.3V_ALW
*Header_2X30_NC

C C
R92 *1K_NC +/-5% SYS_PWROK_XDP

MEM_SMBCLK
(10,14,15,16,17,18,29,35) MEM_SMBCLK

PCH XDP +3.3V_ALW_PCH

JXDP2

1 2 R307
3 GND0 GND1 4 XDP_FN16
OBSFN_A0 OBSFN_C0 *4.7K_NC
MEM_SMBDAT 5 6 XDP_FN17 +/-5%
(10,14,15,16,17,18,29,35) MEM_SMBDAT OBSFN_A1 OBSFN_C1
7 8
XDP_FN0 9 GND2 GND3 10 XDP_FN8 XDP_FN8
XDP_FN1 11 OBSDATA_A0 OBSDATA_C0 12 XDP_FN9
13 OBSDATA_A1 OBSDATA_C1 14
XDP_FN2 15 GND4 GND5 16 XDP_FN10
XDP_FN3 17 OBSDATA_A2 OBSDATA_C2 18 XDP_FN11
19 OBSDATA_A3 OBSDATA_C3 20
21 GND6 GND7 22
23 OBSFN_B0 OBSFN_D0 24
25 OBSFN_B1 OBSFN_D1 26
XDP_FN4 27 GND8 GND9 28 XDP_FN12
XDP_FN5 29 OBSDATA_B0 OBSDATA_D0 30 XDP_FN13
31 OBSDATA_B1 OBSDATA_D1 32
XDP_FN6 33 GND10 GND11 34 XDP_FN14
XDP_FN7 35 OBSDATA_B2 OBSDATA_D2 36 XDP_FN15
37 OBSDATA_B3 OBSDATA_D3 38
+3.3V_ALW_PCH R93 1K+/-5% 1.05V_0.8V_PWROK_R 39 GND12 GND13 40 +3.3V_ALW_PCH
(39,71) 1.05V_0.8V_PWROK PWRGOOD/HOOK0 ITPCLK/HOOK4
R94 0 +/-5% PCH_PWRBTN#_XDP 41 42
B (7) SIO_PWRBTN#_R HOOK1 ITPCLK#/HOOK5 B
43 44
45 VCC_OBS_AB VCC_OBS_CD 46 RSMRST#_XDP R95 1K
HOOK2 RESET#/HOOK6 PCH_RSMRST# (7,39)
C137 47 48 +/-1% XDP_DBRESET#
HOOK3 DBR#/HOOK7 XDP_DBRESET# (2,7)
0.1uF 49 50
16V,X7R MEM_SMBDAT R96 0 +/-5% DDR_XDP_SMBDAT_R2 51 GND14 GND15 52 PCH_JTAG_TDO
SDA TDO PCH_JTAG_TDO (8)
MEM_SMBCLK R97 0 +/-5% DDR_XDP_SMBCLK_R2 53 54
55 SCL TRSTN 56 PCH_JTAG_TDI
TCK1 TDI PCH_JTAG_TDI (8)
PCH_JTAG_TCK 57 58 PCH_JTAG_TMS
(8) PCH_JTAG_TCK TCK0 TMS PCH_JTAG_TMS (8)
59 60
GND16 GND17

*Header_2X30_NC

(9) USB_OC0#_R R98 *33_NC +/-5% XDP_FN0

(9) USB_OC1#_R R99 *33_NC +/-5% XDP_FN1
(9) USB_OC2# R100 *33_NC +/-5% XDP_FN2
(9) USB_OC3# R101 *33_NC +/-5% XDP_FN3
(9) USB_OC4# R102 *33_NC +/-5% XDP_FN4
(9) USB_OC5# R103 *33_NC +/-5% XDP_FN5
(9) USB_OC6# R104 *33_NC +/-5% XDP_FN6
(9,39) SIO_EXT_SMI# R105 *33_NC +/-5% XDP_FN7
R106 *33_NC +/-5% XDP_FN8
(11,40) SLP_ME_CSW_DEV#
R107 *33_NC +/-5% XDP_FN9
(11) PCH_GPIO35
R108 *33_NC +/-5% XDP_FN10
(8) HDD_DET#_R
R109 *33_NC +/-5% XDP_FN11
(8,9) BBS_BIT0_R
R110 *33_NC +/-5% XDP_FN12
(11) GPIO36
R111 *33_NC +/-5% XDP_FN13
(11) FDI_OVRVLTG
R112 *33_NC +/-5% XDP_FN14
(11) PCH_GPIO16
R113 *33_NC +/-5% XDP_FN15
(11,40) TEMP_ALERT#
A R114 *33_NC +/-5% XDP_FN16 A
(11) PCH_GPIO15
R115 *33_NC +/-5% XDP_FN17
(11) SIO_EXT_SCI#_R

Ever Light
Technology Limited
Title
06 -- XDP Connector
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 6 of 84

5 4 3 2 1
 5 4 3 2 1

R116 100K +/-5% ENVDD_PCH

R117 100K +/-5% PANEL_BKEN_PCH

COUGAR POINT (DMI,FDI,GPIO)

U3C PDG v0.7 P166
If the LVDS interface is not implemented,
all signals associated with the interface can
BC24 BJ14 FDI_CTX_PRX_N0 be left as No Connects
D (2) DMI_CTX_PRX_N0 DMI0RXN FDI_RXN0 FDI_CTX_PRX_N0 (2) D
BE20 AY14 FDI_CTX_PRX_N1
(2) DMI_CTX_PRX_N1
(2) DMI_CTX_PRX_N2
(2) DMI_CTX_PRX_N3
BG18
BG20
DMI1RXN
DMI2RXN
FDI_RXN1
FDI_RXN2
BE14
BH13
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
(2)
(2)
(2)
COUGAR POINT (LVDS,DDI)
DMI3RXN FDI_RXN3 BC12 FDI_CTX_PRX_N4
FDI_RXN4 FDI_CTX_PRX_N4 (2)
BE24 BJ12 FDI_CTX_PRX_N5
(2) DMI_CTX_PRX_P0 DMI0RXP FDI_RXN5 FDI_CTX_PRX_N5 (2)
BC20 BG10 FDI_CTX_PRX_N6
(2) DMI_CTX_PRX_P1 DMI1RXP FDI_RXN6 FDI_CTX_PRX_N6 (2)
BJ18 BG9 FDI_CTX_PRX_N7 U3D
(2) DMI_CTX_PRX_P2 DMI2RXP FDI_RXN7 FDI_CTX_PRX_N7 (2)
BJ20
(2) DMI_CTX_PRX_P3 DMI3RXP BG14 FDI_CTX_PRX_P0 PANEL_BKEN_PCH J47 AP43
FDI_RXP0 FDI_CTX_PRX_P0 (2) (22) PANEL_BKEN_PCH L_BKLTEN SDVO_TVCLKINN
AW24 BB14 FDI_CTX_PRX_P1 ENVDD_PCH M45 AP45
(2) DMI_CRX_PTX_N0 DMI0TXN FDI_RXP1 FDI_CTX_PRX_P1 (2) (22,40) ENVDD_PCH L_VDD_EN SDVO_TVCLKINP
AW20 BF14 FDI_CTX_PRX_P2
(2) DMI_CRX_PTX_N1 DMI1TXN FDI_RXP2 FDI_CTX_PRX_P2 (2)
BB18 BG13 FDI_CTX_PRX_P3 P45 AM42
(2) DMI_CRX_PTX_N2 DMI2TXN FDI_RXP3 FDI_CTX_PRX_P3 (2) (22) BIA_PWM_PCH L_BKLTCTL SDVO_STALLN
AV18 BE12 FDI_CTX_PRX_P4 AM40

DMI
FDI
(2) DMI_CRX_PTX_N3 DMI3TXN FDI_RXP4 FDI_CTX_PRX_P4 (2) SDVO_STALLP
BG12 FDI_CTX_PRX_P5 LDDC_CLK_PCH T40
FDI_RXP5 FDI_CTX_PRX_P5 (2) (22) LDDC_CLK_PCH L_DDC_CLK
AY24 BJ10 FDI_CTX_PRX_P6 LDDC_DATA_PCH K47 AP39
(2) DMI_CRX_PTX_P0 DMI0TXP FDI_RXP6 FDI_CTX_PRX_P6 (2) (22) LDDC_DATA_PCH L_DDC_DATA SDVO_INTN
AY20 BH9 FDI_CTX_PRX_P7 AP40
(2) DMI_CRX_PTX_P1 DMI1TXP FDI_RXP7 FDI_CTX_PRX_P7 (2) SDVO_INTP
AY18 R118 *2.2K_NC +/-5% T45
(2) DMI_CRX_PTX_P2 DMI2TXP +3.3V_RUN L_CTRL_CLK
AU18 R120 *2.2K_NC +/-5% P39
(2) DMI_CRX_PTX_P3 DMI3TXP L_CTRL_DATA
AW16
FDI_INT FDI_INT (2)
R119 2.37K +/-1% AF37 P38
+1.05V_RUN BJ24 AV12 LVD_VBG AF36 LVD_IBG SDVO_CTRLCLK M39
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 (2) T54 LVD_VBG SDVO_CTRLDATA
Width = 10 mil, Spacing = 20 mil
Close PCH within 500 mil R121 49.9 +/-1% DMI_COMP_R BG25 BC10 AE48
DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 (2) LVD_VREFH
AE47 AT49
R122 750 +/-1% RBIAS_CPY BH21 AV14 LVD_VREFL DDPB_AUXN AT47
DMI2RBIAS FDI_LSYNC0 FDI_LSYNC0 (2) DDPB_AUXP AT40
BB10 AK39 DDPB_HPD

LVDS
FDI_LSYNC1 FDI_LSYNC1 (2) (21) LCD_ACLK-_PCH LVDSA_CLK#
AK40 AV42
(21) LCD_ACLK+_PCH LVDSA_CLK DDPB_0N AV40
AN48 DDPB_0P AV45
(21) LCD_A0-_PCH LVDSA_DATA#0 DDPB_1N

Digital Display Interface

A18 DSWODVREN Deep Sleep not implemented AM47 AV46
DSWVRMEN (21) LCD_A1-_PCH LVDSA_DATA#1 DDPB_1P
DPWROK connect to RSMRST# AK47 AU48

System Power Management

(21) LCD_A2-_PCH LVDSA_DATA#2 DDPB_2N
From EC AJ48 AU47
(21) LCD_A3-_PCH LVDSA_DATA#3 DDPB_2P
R123 *0_NC +/-5% SUSACK#_R C12 E22 PCH_DPWROK AV47
(40) SUSACK# SUSACK# DPWROK PCH_DPWROK (40) DDPB_3N
Deep Sleep not implemented AN47 AV49
(21) LCD_A0+_PCH LVDSA_DATA0 DDPB_3P
SYS_PWROK, DG v0.7 P248 SUSACK# unconnected R124 *0_NC +/-5% PCH_RSMRST#_R AM49
(21) LCD_A1+_PCH LVDSA_DATA1
This signal should be used on the platform to indicate K3 B9 PCH_PCIE_WAKE# AK49
(2,6) XDP_DBRESET# SYS_RESET# WAKE# PCH_PCIE_WAKE# (40) (21) LCD_A2+_PCH LVDSA_DATA2
C that the processor VR power is good and therefore AJ47 P46 C
(21) LCD_A3+_PCH LVDSA_DATA3 DDPC_CTRLCLK
it can be connected to the same source as PWROK on PCH. P42
R125 0 +/-5% SYS_PWROK_R P12 N3 CLKRUN# DDPC_CTRLDATA
(6,40) SYS_PWROK SYS_PWROK CLKRUN# / GPIO32 CLKRUN# (39,40)
AF40
(21) LCD_BCLK-_PCH LVDSB_CLK#
AF39 AP47
(21) LCD_BCLK+_PCH LVDSB_CLK DDPC_AUXN
R126 0 +/-5% PCH_PWROK L22 G8 SUS_STAT#/LPCPD# AP49
(39) RESET_OUT# PWROK SUS_STAT# / GPIO61 T55 DDPC_AUXP
AH45 AT38
(21) LCD_B0-_PCH LVDSB_DATA#0 DDPC_HPD
AH47
(21) LCD_B1-_PCH LVDSB_DATA#1
R127 0 +/-5% L10 N14 SUSCLK AF49 AY47
(39) PM_APWROK APWROK SUSCLK / GPIO62 T56 (21) LCD_B2-_PCH LVDSB_DATA#2 DDPC_0N
AF45 AY49
(21) LCD_B3-_PCH LVDSB_DATA#3 DDPC_0P
T57
AY43
R128 0 +/-5% PM_DRAM_PWRGD_R B13 D10 SIO_SLP_S5# AH43 DDPC_1N AY45
(2) PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63 SIO_SLP_S5# (39) (21) LCD_B0+_PCH LVDSB_DATA0 DDPC_1P
AH49 BA47
(21) LCD_B1+_PCH LVDSB_DATA1 DDPC_2N
Follow DG 0.9 AF47 BA48
T58 (21) LCD_B2+_PCH LVDSB_DATA2 DDPC_2P
R129 0 +/-5% PCH_RSMRST#_R C21 H4 SIO_SLP_S4# AF43 BB47
(6,39) PCH_RSMRST# RSMRST# SLP_S4# SIO_SLP_S4# (18,40) (21) LCD_B3+_PCH LVDSB_DATA3 DDPC_3N BB49
DDPC_3P
T59
R130 0 +/-5% ME_SUS_PWR_ACK_RK16 F4 SIO_SLP_S3#
(39) ME_SUS_PWR_ACK SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# SIO_SLP_S3# (40)
(24) PCH_CRT_BLU PCH_CRT_BLU N48 M43
(6) SIO_PWRBTN#_R CRT_BLUE DDPD_CTRLCLK
T60 (24) PCH_CRT_GRN PCH_CRT_GRN P49 M36
R131 0 +/-5% SIO_PWRBTN#_R E20 G10 SIO_SLP_A# PCH_CRT_RED T49 CRT_GREEN DDPD_CTRLDATA
(39) SIO_PWRBTN# PWRBTN# SLP_A# SIO_SLP_A# (40,69) (24) PCH_CRT_RED CRT_RED
AT45

CRT
T61 DDPD_AUXN
H20 G16 SIO_SLP_SUS# PCH_CRT_DDC_CLK T39 AT43
(39) AC_PRESENT ACPRESENT / GPIO31 SLP_SUS# SIO_SLP_SUS# (40) (24) PCH_CRT_DDC_CLK CRT_DDC_CLK DDPD_AUXP
PCH_CRT_DDC_DAT M40 BH41
(24) PCH_CRT_DDC_DAT CRT_DDC_DATA DDPD_HPD
T62
+3.3V_ALW_PCH R132 8.2K +/-5% PCH_BATLOW# E10 AP14 BB43
BATLOW# / GPIO72 PMSYNCH H_PM_SYNC (2) DDPD_0N
(24) PCH_CRT_HSYNC R133 10+/-1% HSYNC M47 BB45
R134 10+/-1% VSYNC M49 CRT_HSYNC DDPD_0P BF44
(24) PCH_CRT_VSYNC CRT_VSYNC DDPD_1N
PCH_RI# A10 K14 SIO_SLP_LAN# BE44
RI# SLP_LAN# / GPIO29 SIO_SLP_LAN# (40,49) DDPD_1P BF42
R135 1K+/-1% CRT_IREF T43 DDPD_2N BE42
BD82QM67[VER.B3,SLH9B] T42 DAC_IREF DDPD_2P BJ42
ME_SUS_PWR_ACK_R R136 0 +/-5% SUSACK#_R CRT_IRTN DDPD_3N BG42
APWROK, DG v0.7 P248 DDPD_3P
DG v0.7 P248 This is a input signal to the PCH from power monitoring circuit to indicate that all Active BD82QM67[VER.B3,SLH9B]
SUSACK# and SUSWARN# can be tied together Sleep Well (ASW) rails, i.e. Intel ME sub-system and LAN power rails are stable on the CRT_HSYNC and CRT_VSYNC resistor
if EC does not want to involve in the platform. Connect to ASW power rail monitoring circuit on motherboard. For platform 33 ohm for Direct Connect
B B
handshake mechanism for the Deep Sleep state entry and exit. not supporting Intel AMT it can be connected to PWROK. The ASW power must be 20 ohm for Dock Support
stable for at least 1ms before platform logic asserts APWROK.
20 ohm for Switchable Graphics Device Down Topology
DPWROK, DG v0.7 P252 10 ohm for Switchable Graphics Dock Support
This is an input signal to the PCH from platform power monitoring logic to indicate that +3.3V_RUN
+3.3V_RUN all power rails associated with the PCH Deep Sx well (DSW) are valid and stable.
Connect to VccDSW3_3 power rail monitoring circuit on mother board for platforms
CLKRUN# R137 8.2K +/-1% that support Deep Sx state. This signal can be tied to RSMRST# for platforms that do PCH_CRT_DDC_DAT R149 2.2K +/-5%
not support the Deep Sx state. The DSW rails must be stable for at least 10ms before PCH_CRT_BLU R138 150 +/ -1% PCH_CRT_DDC_CLK R150 2.2K +/-5%
DPWROK is asserted to PCH. PCH_CRT_GRN R139 150 +/ -1%
PCH_CRT_RED R140 150 +/ -1% LDDC_CLK_PCH R1106 2.2K +/-5%
LDDC_DATA_PCH R1107 2.2K +/-5%

+3.3V_ALW_PCH
+RTC_CELL
SUS_STAT#/LPCPD# R141 *10K_NC +/-5%
DSWODVREN R142 330K +/-5%
SIO_SLP_LAN# R144 10K +/-5%
R145 *330K_NC +/-5%
PCH_RI# R147 10K +/-5% PCH_RSMRST# R148 10K +/-5%

PCH_PCIE_WAKE# R146 10K +/-5%

ME_SUS_PWR_ACK R151 10K +/-5% DSWODVREN - On Die DSW VR Enable

Enabled (DEFAULT)
HIGH: R142 STUFFED,
RESET_OUT# R152 *0_NC +/-5% SYS_PWROK R145 UNSTUFFED
Disabled
LOW: R145 STUFFED,
R142 UNSTUFFED

A A

Ever Light
Technology Limited
Title
07 -- CBT 1/6 (DMI&VIDEO)
Size Document Number Rev
1A

Date: Thursday, January 27, 2011 Sheet 7 of 84

5 4 3 2 1
 5 4 3 2 1

+3.3V_RUN

R1100
10K
+/-5% Q125
+3.3V_ALW_PCH BSS138

PCH_AZ_SYNC_G S D PCH_AZ_SYNC

D G D
R156 +5V_RUN
1K
+/-5%

+RTC_CELL PCH_AZ_SYNC +RTC_CELL

R160 R157 20K +/-1%

R155
*100K_NC
+/-5%
Cougar Point (HDA,JTAG,SATA)
330K C139
+/-5% 1uF C138 18pF 50V,NPO R154 0 +/-5%
6.3V,X5R

2
1
PCH_INTVRMEN
R158
Y1 10M U3A
R161 20K +/-1% XTAL 32.768KHz +/-5%
R159 PLL ODVR VOLTAGE (HDA_SYNC have Internal PD 20k) PCH_RTCX1 A20 C38
LPC_LAD0 (34,39,40,55)

3
4
C142 RTCX1 FWH0 / LAD0 A38
*330K_NC

LPC
FWH1 / LAD1 LPC_LAD1 (34,39,40,55)
LOW - SET VCCVRM TO 1.8 V 1uF C140 18pF 50V,NPO PCH_RTCX2 C20 B37
+/-5% RTCX2 FWH2 / LAD2 LPC_LAD2 (34,39,40,55)
6.3V,X5R C37
for Desktop (DEFAULT) PCH_RTCRST# D20 FWH3 / LAD3 LPC_LAD3 (34,39,40,55)
RTCRST# D36
HDA_SYNC FWH4 / LFRAME# LPC_LFRAME# (34,39,40,55)
SRTCRST# G22
SRTCRST# E36
HIGH - SET VCCVRM TO 1.5 V

RTC
LDRQ0# LPC_LDRQ0# (40)
R162 1M +/-5% INTRUDER# K22 K36
for Mobile INTRUDER# LDRQ1# / GPIO23 LPC_LDRQ1# (40)
INTVRMEN :
Integrated 1.05 V VRM Enable / Disable. PCH_INTVRMEN C17 V5 IRQ_SERIRQ
INTVRMEN SERIRQ IRQ_SERIRQ (39,40,55)
Integrated 1.05 V VRMs is enabled when high
NOTE: This signal should always be pulled high AM3
SATA0RXN PSATA_PRX_DTX_N0_C (29)
C141 *27pF_NC 50V,NPO PCH_AZ_BITCLK N34 AM1
HDA_BCLK SATA0RXP PSATA_PRX_DTX_P0_C (29)

SATA 6G
AP7
PCH_AZ_SYNC L34 SATA0TXN AP5
PSATA_PTX_DRX_N0_C (29) HDD 1st
HDA_SYNC SATA0TXP PSATA_PTX_DRX_P0_C (29)
R163 33+/-5% PCH_AZ_SDOUT
(61) PCH_AZ_CODEC_SDOUT
SPKR T10 AM10
(61) SPKR SPKR SATA1RXN
C R164 33+/-5% PCH_AZ_SYNC_G AM8 C
(61) PCH_AZ_CODEC_SYNC SATA1RXP
PCH_AZ_RST# K34 AP11 HDD 2nd
R165 33+/-5% PCH_AZ_RST# HDA_RST# SATA1TXN AP10
(61) PCH_AZ_CODEC_RST# SATA1TXP
R166 33+/-5% PCH_AZ_BITCLK E34 AD7
(61) PCH_AZ_CODEC_BITCLK (61) PCH_AZ_CODEC_SDIN0 HDA_SDIN0 SATA2RXN SATA_PRX_WWANTX_N2_C (35)
AD5
SATA2RXP SATA_PRX_WWANTX_P2_C (35)
G34 AH5 MINI CARD
HDA_SDIN1 SATA2TXN SATA_PTX_WWANRX_N2_C (35)
AH4
SATA2TXP SATA_PTX_WWANRX_P2_C (35)
C34

IHDA
C143 HDA_SDIN2 AB8
SATA3RXN SATA_ODD_PRX_DTX_N3_C (29)
27pF A34 AB10
+3.3V_ALW_PCH HDA_SDIN3 SATA3RXP SATA_ODD_PRX_DTX_P3_C (29)
50V,NPO
AF3 ODD
SATA3TXN SATA_ODD_PTX_DRX_N3_C (29)
AF1
SATA3TXP SATA_ODD_PTX_DRX_P3_C (29)
R167 *1K_NC +/-5% PCH_AZ_SDOUT A36

SATA
R168 1K+/-5% HDA_SDO Y7
(40) ME_FWP SATA4RXN ESATA_PRX_DTX_N4_C (30)
Y5
SATA4RXP ESATA_PRX_DTX_P4_C (30)
T180 C36 AD3 E-SATA
HDA_DOCK_EN# / GPIO33 SATA4TXN ESATA_PTX_DRX_N4_C (30)
AD1
SATA4TXP ESATA_PTX_DRX_P4_C (30)
USB30_SMI# N32
(31) USB30_SMI# HDA_DOCK_RST# / GPIO13 Y3
SATA5RXN SATA_PRX_DKTX_N5_C (27)
Y1
+3.3V_ALW_PCH SATA5RXP SATA_PRX_DKTX_P5_C (27)
AB3
PCH_JTAG_TCK J3 SATA5TXN AB1
SATA_PTX_DKRX_N5_C (27) Docking
(6) PCH_JTAG_TCK JTAG_TCK SATA5TXP SATA_PTX_DKRX_P5_C (27)
T175
R170 210 +/-1% PCH_JTAG_TMS PCH_JTAG_TMS H7 Y11 +1.05V_RUN

JTAG
(6) PCH_JTAG_TMS JTAG_TMS SATAICOMPO
R172 210 +/-1% PCH_JTAG_TDI T176
R175 210 +/-1% PCH_JTAG_TDO PCH_JTAG_TDI K5 Y10 SATA_COMP R173 37.4 +/-1%
(6) PCH_JTAG_TDI JTAG_TDI SATAICOMPI
T177
PCH_JTAG_TDO H1 Width = 10 mil, Spacing = 20 mil
(6) PCH_JTAG_TDO JTAG_TDO +1.05V_RUN
R169 51+/-1% PCH_JTAG_TCK T178 AB12 Close PCH within 500 mil
R171 100 +/-1% PCH_JTAG_TMS SATA3RCOMPO
R174 100 +/-1% PCH_JTAG_TDI AB13 SATA3_COMP R177 49.9 +/-1%
R176 100 +/-1% PCH_JTAG_TDO SATA3COMPI

R178 0 +/-5% PCH_SPI_CLK_R T3 AH1 RBIAS_SATA3 R179 750 +/-1%

(42) PCH_SPI_CLK SPI_CLK SATA3RBIAS
R180 0 +/-5% PCH_SPI_CS0#_R Y14
(42) PCH_SPI_CS0# SPI_CS0#
B Direct Connection to SPI ROM R181 0 +/-5% PCH_SPI_CS1#_R T1 B

SPI
(42) PCH_SPI_CS1# SPI_CS1#
Due to DELL E3 information P3
SATALED# SATA_ACT# (44)
PCH_SPI_DO R182 0 +/-5% PCH_SPI_SI_R V4 V14 HDD_DET#_R R183 0 +/-5%
(42) PCH_SPI_DO SPI_MOSI SATA0GP / GPIO21 HDD_DET# (29)
R184 0 +/-5% PCH_SPI_SO_R U3 P1
(42) PCH_SPI_DIN SPI_MISO SATA1GP / GPIO19 HDD_DET#_R (6)
BBS_BIT0_R
BBS_BIT0_R (6,9)
BD82QM67[VER.B3,SLH9B]
+3.3V_ALW_PCH
No series resistor required
+3.3V_M if routing length is 1.5”-6.5” if using 1 SPI device
R1129 100K +/-5% USB30_SMI#

R186
+3.3V_RUN *8.2K_NC
+/-5%

PCH_SPI_DO
HDD_DET#_R R187 10K +/-5%
BBS_BIT0_R R188 10K +/-5%

+3.3V_RUN

R189 R190
10K *10K_NC
+/-5% +/-5%

No Reboot strap. IRQ_SERIRQ

A A
Low = Default.
SPKR SPKR
High = No Reboot.

Note1, Sampled at rising edge of PWROK

The signal has a weak internal pull-down.
(the internal pull-down is disabled after PLTRST# deasserts.) Ever Light
If the signal is sampled high, this indicate that
the system is strapped to the "No Reboot" mode Technology Limited
Title
08 -- CBT 2/6 (SATA)
Size Document Number Rev
1A

Date: Thursday, January 27, 2011 Sheet 8 of 84

5 4 3 2 1
 5 4 3 2 1

Cougar Point (PCI,USB,NVRAM)

R191 *1K_NC +/-5%
BBS_BIT0_R (6,8)
R192 *1K_NC +/-5% BBS_BIT1 U3E
AY7
RSVD1 AV7
BG26 RSVD2 AU3
D
BJ26 TP1 RSVD3 BG4 D
BH25 TP2 RSVD4
BJ16 TP3 AT10
BG16 TP4 RSVD5 BC8
Boot BIOS Strap AH38 TP5 RSVD6
AH37 TP6 AU2
BBS_BIT[1] BBS_BIT[0] Boot BIOS Location TP7 RSVD7
AK43 AT4
AK45 TP8 RSVD8 AT3
0 0 LPC
C18 TP9 RSVD9 AT1
N30 TP10 RSVD10 AY3
0 1 Reserved (NAND)
H3 TP11 RSVD11 AT5
AH12 TP12 RSVD12 AV3
1 0 PCI
AM4 TP13 RSVD13 AV1
AM5 TP14 RSVD14 BB1
1 1 SPI
Y13 TP15 RSVD15 BA3
K24 TP16 RSVD16 BB5
L24 TP17 RSVD17 BB3
AB46 TP18 RSVD18 BB7
AB45 TP19 RSVD19 BE8

RSVD
TP20 RSVD20 BD4
RSVD21 BF6
RSVD22
B21 AV5
M20 TP21 RSVD23 AV10
AY16 TP22 RSVD24
BG46 TP23 AT8
TP24 RSVD25
AY5
RSVD26 BA2
BE28 RSVD27
BC30 TP25 AT12
BE32 TP26 RSVD28 BF3
BJ32 TP27 RSVD29
BC28 TP28
BE30 TP29
BF32 TP30
BG32 TP31 C24
TP32 USBP0N USBP0- (61)
C GNT2# : Strap for ESI mode AV26 A24 Right Side pair top C
TP33 USBP0P USBP0+ (61)
This signal has a weak internal pull-up. BB26 C25
TP34 USBP1N USBP1- (61)
Note : The internal pull-up is disable AU28 B25 Right Side pair bottom
TP35 USBP1P USBP1+ (61)
after PLTRST# deasserts. AY30 C26
TP36 USBP2N USBP2- (30)
Tying this strap low configures DMI for AU26 A26 Back Side
TP37 USBP2P USBP2+ (30)
ESI compatible opeartion. AY26 K28
AV28 TP38 USBP3N H28
Note : ESI compatible mode is for server TP39 USBP3P
platform only. AW30 E28
TP40 USBP4N USBP4- (33)
This signal should not be pulled low for D28 2nd Mini Card (WLAN/WIMAX)
USBP4P USBP4+ (33)
desktop and mobile. C28
USBP5N USBP5- (35)
A28 1st Mini Card (WWAN)
USBP5P USBP5+ (35)
C29 USBP6- (34)
USBP6N B29
USBP6P USBP6+ (34) 3rd Mini Card
PCI_PIRQA# K40 N28
PIRQA# USBP7N USBP7- (55)
PCI_PIRQB# K38 M28 USH

PCI
PIRQB# USBP7P USBP7+ (55)
PCI_PIRQC# H38 L30
PIRQC# USBP8N USBP8- (27)
PCI_PIRQD# G38 K30 DOCK
PIRQD# USBP8P USBP8+ (27)
G30
USBP9N USBP9- (27)
REQ# functionality is not available on Mobile PCI_REQ1# C46 E30 DOCK

USB
REQ1# / GPIO50 USBP9P USBP9+ (27)
PCI_REQ2# C44 C30
REQ2# / GPIO52 USBP10N USBP10- (61)
PCI_REQ3# E40 A30 Express Card
REQ3# / GPIO54 USBP10P USBP10+ (61)
L32
USBP11N USBP11- (33)
BBS_BIT1 D47 K32 BlueTooth
GNT1# / GPIO51 USBP11P USBP11+ (33)
E42 G32
GNT2# / GPIO53 USBP12N USBP12- (22)
PCI_GNT3# F46 E32 Camera
GNT3# / GPIO55 USBP12P USBP12+ (22)
GNT# functionality is not available on Mobile C32
USBP13N USBP13- (22)
A32 LCD Touch
USBP13P USBP13+ (22)
G42
G40 PIRQE# / GPIO2
CAM_MIC_CBL_DET# C42 PIRQF# / GPIO3 C33 USBRBIAS R193 22.6 +/-1%
(22) CAM_MIC_CBL_DET# PIRQG# / GPIO4 USBRBIAS#
R194 0 +/-5% FFS_PCH_INT D44
(29) HDD_FALL_INT PIRQH# / GPIO5 +3.3V_ALW_PCH
Net USB_BIAS route impedacnes should be 50-ohm
PIRQ[H:E]# functionality is not available on Mobile B33 and length less than 500-mil spacing is 15-mil.
T103 K10 USBRBIAS
PME# RN1
PCH_PLTRST# C6 A14 USB_OC0#_R R195 0 +/-5% OC0# : USBP0, P1 USB_OC0#
(2,11) PCH_PLTRST# PLTRST# OC0# / GPIO59 USB_OC0# (61) 1 2
K20 USB_OC1#_R R196 0 +/-5% OC1# : USBP2, P3 USB_OC1#
OC1# / GPIO40 USB_OC1# (30) 3 4
R197 22+/-1% B17 USB_OC2# USB_OC3#
B (34) CLK_DEBUG
R198 22+/-1% CLK_PCI0 H49 OC2# / GPIO41 C16 USB_OC3#
USB_OC2# (6) OC2# : USBP4, P5 USB_OC4# 5 6 B
(40) CLK_PCI_5048 CLKOUT_PCI0 OC3# / GPIO42 USB_OC3# (6) OC3# : USBP6, P7 7 8
R199 22+/-1% CLK_PCI1 H43 L16 USB_OC4#
(39) CLK_PCI_5055 CLKOUT_PCI1 OC4# / GPIO43 USB_OC4# (6)
R200 22+/-1% CLK_PCI2 J48 A16 USB_OC5# OC4# : USBP8, P9 10K
(27) CLK_PCI_DOCK CLKOUT_PCI2 OC5# / GPIO9 USB_OC5# (6)
K42 D14 USB_OC6# OC5# : USBP10, P11 +/-5%
CLKOUT_PCI3 OC6# / GPIO10 USB_OC6# (6)
R202 22+/-1% CLK_PCI4 H40 C14 SIO_EXT_SMI# RN2
(10) CLK_PCI_LOOPBACK CLKOUT_PCI4 OC7# / GPIO14 SIO_EXT_SMI# (6,39)OC6# : USBP12, P13
USB_OC5#
OC7# : Floater OC# (not used) USB_OC2# 1 2
BD82QM67[VER.B3,SLH9B] SIO_EXT_SMI# 3 4
USB_OC0#_R (6) 5 6
USB_OC6#
USB_OC1#_R (6) 7 8
10K
+/-5%
+3.3V_RUN

C144 0.1uF

16V,Y5V +3.3V_RUN
R203 0 +/-5%
(55) PLTRST_USH#
5

U4 C145 0.1uF Add Buffers as needed for

R205 0 +/-5% 2
(6) PLTRST_XDP#
R206 0 +/-5% PCH_PLTRST#_1 4 16V,Y5V
Loading and fanout concerns.
(49) PLTRST_LAN#

5
R207 0 +/-5% 1 PCH_PLTRST# U5
(31) PLTRST_USB30#
R210 0 +/-5% 2
(19) PLTRST_MXM#
+3.3V_RUN 74AHC1G08GW 4 PCH_PLTRST#_EC
PCH_PLTRST#_EC (33,34,35,39,40)
3

PCH_PLTRST# 1
For Mini Card , SIO use
74AHC1G08GW

3
PCI_REQ1# R209 10K +/-5% R204 0 +/-5%
(61) PLTRST_IOL#
PCI_REQ3# R213 10K +/-5%

PCI_PIRQA# R214 8.2K +/-5%

PCI_PIRQB# R215 8.2K +/-5%
PCI_PIRQC# R216 8.2K +/-5%
PCI_PIRQD# R217 8.2K +/-5%

A 5. EMI request A
PCI_REQ2# R585 10K +/-5% R218 *1K_NC +/-1% PCI_GNT3# PCH_PLTRST#_1 PCH_PLTRST#_EC
CLK_PCI1

CAM_MIC_CBL_DET# R1917 10K +/-5% CLK_PCI4

A16 swap override Strap/Top-Block C779 C790 R1114 R1115

Swap Override jumper *10pF_NC
50V,NPO
*10pF_NC
50V,NPO
100K
+/-5%
100K
+/-5%
Ever Light
Low = A16 swap
override/Top-Block
Technology Limited
GNT3# Title
Swap Override enabled 09 -- CBT 3/6 (USB, PCI, NVRAM)
High = Default
Size Document Number Rev
1A

Date: Thursday, January 27, 2011 Sheet 9 of 84

5 4 3 2 1
 5 4 3 2 1

Cougar Point (PCI-E,SMBUS,CLK)

U3B
Place TX DC blocking caps close PCH.
BG34
(35) PCIE_PRX_WANTX_N1 PERN1
BJ34 E12 PCH_SMB_ALERT#
(35) PCIE_PRX_WANTX_P1 PERP1 SMBALERT# / GPIO11
1st Mini Card WWAN C152 0.1uF 16V,X7R PCIE_PTX_WANRX_N1 AV32
(35) PCIE_PTX_WANRX_N1_C PETN1
C153 0.1uF 16V,X7R PCIE_PTX_WANRX_P1 AU32 H14 PCH_SMBCLK
(35) PCIE_PTX_WANRX_P1_C PETP1 SMBCLK
BE34 C9 PCH_SMBDAT
(33) PCIE_PRX_WLANTX_N2 PERN2 SMBDATA
BF34
(33) PCIE_PRX_WLANTX_P2 PERP2
2ed Mini Card WLAN C146 0.1uF 16V,X7R PCIE_PTX_WLANRX_N2 BB32
(33) PCIE_PTX_WLANRX_N2_C PETN2
C154 0.1uF 16V,X7R PCIE_PTX_WLANRX_P2 AY32

SMBUS
(33) PCIE_PTX_WLANRX_P2_C PETP2 A12 DDR_HVREF_RST_PCH
D SML0ALERT# / GPIO60 DDR_HVREF_RST_PCH (2) D
BG36
(61) PCIE_PRX_EXPTX_N3 PERN3
BJ36 C8 LAN_SMBCLK
(61) PCIE_PRX_EXPTX_P3 PERP3 SML0CLK LAN_SMBCLK (49)
Express Card C147 0.1uF 16V,X7R PCIE_PTX_EXPRX_N3 AV34
(61) PCIE_PTX_EXPRX_N3_C PETN3
C155 0.1uF 16V,X7R PCIE_PTX_EXPRX_P3 AU34 G12 LAN_SMBDATA
(61) PCIE_PTX_EXPRX_P3_C PETP3 SML0DATA LAN_SMBDATA (49)
BF36
(31) PCIE_PRX_USB30TX_N4 PERN4
USB 3.0 BE36
(31) PCIE_PRX_USB30TX_P4 PERP4
C148 0.1uF 16V,X7R PCIE_PTX_USB30RX_N4 AY34 C13 GPIO74
(31) PCIE_PTX_USB30RX_N4_C PETN4 SML1ALERT# / PCHHOT# / GPIO74
C149 0.1uF 16V,X7R PCIE_PTX_USB30RX_P4 BB34
(31) PCIE_PTX_USB30RX_P4_C PETP4 E14 SML1_SMBCLK

PCI-E*
SML1CLK / GPIO58 SML1_SMBCLK (39)
BG37
(34) PCIE_PRX_CARDTX_N5 PERN5
BH37 M16 SML1_SMBDAT
(34) PCIE_PRX_CARDTX_P5 PERP5 SML1DATA / GPIO75 SML1_SMBDAT (39)
3rd Mini-Card C150 0.1uF 16V,X7R PCIE_PTX_CARDRX_N5 AY36
(34) PCIE_PTX_CARDRX_N5_C PETN5
C151 0.1uF 16V,X7R PCIE_PTX_CARDRX_P5 BB36
(34) PCIE_PTX_CARDRX_P5_C PETP5
BJ38 +3.3V_LAN
BG38 PERN6

Controller
AU36 PERP6 M7 LAN_SMBCLK R219 2.2K +/-5%
PETN6 CL_CLK1 PCH_CL_CLK1 (33)
AV36 LAN_SMBDATA R220 2.2K +/-5%
PETP6

Link
BG40 T11 +3.3V_ALW_PCH
(49) PCIE_PRX_GLANTX_N7 PERN7 CL_DATA1 PCH_CL_DATA1 (33)
BJ40
(49) PCIE_PRX_GLANTX_P7 PERP7
LAN C158 0.1uF 16V,X7R PCIE_PTX_GLANRX_N7 AY40
(49) PCIE_PTX_GLANRX_N7_C PETN7
C159 0.1uF 16V,X7R PCIE_PTX_GLANRX_P7 BB40 P10 PEG_CLKREQ# R221 10K +/-5%
(49) PCIE_PTX_GLANRX_P7_C PETP7 CL_RST1# PCH_CL_RST1# (33)
PCH_SMB_ALERT# R222 10K +/-5%
BE38 PCH_SMBCLK R223 2.2K +/-5%
(61) PCIE_PRX_CARDTX_N8 PERN8
BC38 PCH_SMBDAT R224 2.2K +/-5%
(61) PCIE_PRX_CARDTX_P8 PERP8
Card Reader C160 0.1uF 16V,X7R PCIE_PTX_CARDRX_N8 AW38 GPIO74 R225 10K +/-5%
(61) PCIE_PTX_CARDRX_N8_C PETN8
C161 0.1uF 16V,X7R PCIE_PTX_CARDRX_P8 AY38 DDR_HVREF_RST_PCH R226 1K +/-1%
(61) PCIE_PTX_CARDRX_P8_C PETP8 SML1_SMBCLK R227 2.2K +/-5%
M10 PEG_CLKREQ# SML1_SMBDAT R228 2.2K +/-5%
PEG_A_CLKRQ# / GPIO47 PEG_CLKREQ# (19)
(35) CLK_PCIE_MINI1# R229 0 +/-5% CLK_PCIE_MINI1#_C Y40
R230 0 +/-5% CLK_PCIE_MINI1_C Y39 CLKOUT_PCIE0N
(35) CLK_PCIE_MINI1 CLKOUT_PCIE0P
1st Mini Card WWAN R231 10K +/-5% AB37
+3.3V_ALW_PCH CLKOUT_PEG_A_N CLK_PCIE_PEG# (19)

CLOCKS
J2 AB38
(35) MINI1CLK_REQ# PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P CLK_PCIE_PEG (19)
CLK_BUF_EXP# R232 10K +/-5%
C R257 0 +/-5% CLK_PCIE_LAN#_C AB49 AV22 CLK_BUF_EXP R234 10K +/-5% C
(49) CLK_PCIE_LAN# CLKOUT_PCIE1N CLKOUT_DMI_N CLK_CPU_DMI# (2)
R258 0 +/-5% CLK_PCIE_LAN_C AB47 AU22
(49) CLK_PCIE_LAN CLKOUT_PCIE1P CLKOUT_DMI_P CLK_CPU_DMI (2)
10/100/LAN CLK_BUF_BCLK# R237 10K +/-5%
PU at 82579 M1 CLK_BUF_BCLK R238 10K +/-5%
(49) LANCLK_REQ# PCIECLKRQ1# / GPIO18 AM12
CLKOUT_DP_N AM13 CLK_BUF_DOT96# R239 10K +/-5%
R261 0 +/-5% CLK_PCIE_CARD#_C AA48 CLKOUT_DP_P CLK_BUF_DOT96 R241 10K +/-5%
(61) CLK_PCIE_CARD# CLKOUT_PCIE2N
R262 0 +/-5% CLK_PCIE_CARD_C AA47
(61) CLK_PCIE_CARD R263 10K +/-1% CLKOUT_PCIE2P
Card Reader BF18 CLK_BUF_EXP# CLK_BUF_CKSSCD# R244 10K +/-5%
+3.3V_RUN CLKIN_DMI_N
V10 BE18 CLK_BUF_EXP CLK_BUF_CKSSCD R245 10K +/-5%
(61) CARDCLK_REQ# PCIECLKRQ2# / GPIO20 CLKIN_DMI_P
CLK_PCH_14M R246 10K +/-5%
R250 0 +/-5% CLK_PCIE_MINI3#_C Y37 BJ30 CLK_BUF_BCLK#
(34) CLK_PCIE_MINI3# CLKOUT_PCIE3N CLKIN_GND1_N
R251 0 +/-5% CLK_PCIE_MINI3_C Y36 BG30 CLK_BUF_BCLK
(34) CLK_PCIE_MINI3 CLKOUT_PCIE3P CLKIN_GND1_P
3rd Mini-Card +3.3V_ALW_PCH R252 10K +/-5%
A8
(34) MINI3CLK_REQ# PCIECLKRQ3# / GPIO25 G24 CLK_BUF_DOT96#
CLKIN_DOT_96N E24 CLK_BUF_DOT96
R240 0 +/-5% CLK_PCIE_EXP#_C Y43 CLKIN_DOT_96P CLOCK TERMINATION for FCIM
(61) CLK_PCIE_EXP# CLKOUT_PCIE4N
R242 0 +/-5% CLK_PCIE_EXP_C Y45
(61) CLK_PCIE_EXP CLKOUT_PCIE4P
Express Card R243 10K +/-5% AK7 CLK_BUF_CKSSCD#
+3.3V_RUN CLKIN_SATA_N
L12 AK5 CLK_BUF_CKSSCD
(61) EXPCLK_REQ# PCIECLKRQ4# / GPIO26 CLKIN_SATA_P

R233 0 +/-5% CLK_PCIE_MINI2#_C V45 K45 CLK_PCH_14M

(33) CLK_PCIE_MINI2# CLKOUT_PCIE5N REFCLK14IN
R235 0 +/-5% CLK_PCIE_MINI2_C V46
(33) CLK_PCIE_MINI2 CLKOUT_PCIE5P
2nd Mini Card WLAN +3.3V_ALW_PCH R236 10K +/-5%
L14 H45
(33) MINI2CLK_REQ# PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK CLK_PCI_LOOPBACK (9)
XTAL25_IN R256 0 +/-5% XTA25L_IN_R C162 30pF 50V,NPO

AB42 V47 XTAL25_IN

CLKOUT_PEG_B_N XTAL25_IN

2
AB40 V49 XTAL25_OUT R259
CLKOUT_PEG_B_P XTAL25_OUT +1.05V_RUN 1M X1
4th Mini-Card
R255 10K +/-5% PCIECLKRQ5# E6 +/-5% XTAL 25MHz
+3.3V_ALW_PCH PEG_B_CLKRQ# / GPIO56

1
Y47 XCLK_RCOMP R260 90.9Ohm +/-1%
V40 XCLK_RCOMP XTAL25_OUT C163 30pF 50V,NPO
V42 CLKOUT_PCIE6N Width = 10 mil, Spacing = 20 mil
B CLKOUT_PCIE6P Close PCH within 500 mil
B

+3.3V_ALW_PCH R253 10K +/-5% T13

PCIECLKRQ6# / GPIO45
R247 0 +/-5% CLK_PCIE_USB30#_C V38 K43 CLKOUTFLEX0
(31) CLK_PCIE_USB30# CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64 T105

FLEX CLOCKS
R248 0 +/-5% CLK_PCIE_USB30_C V37
(31) CLK_PCIE_USB30 CLKOUT_PCIE7P
USB 3.0 +3.3V_ALW_PCH R249 10K +/-5% F47 CLKOUTFLEX1 R264 22+/-1%
CLKOUTFLEX1 / GPIO65 CLK_SIO_14M (40)
(31) USB30CLK_REQ#
K12
PCIECLKRQ7# / GPIO46 H47 CLKOUTFLEX2 R201 22+/-1%
CLKOUTFLEX2 / GPIO66 CLK_PCI_TPM (55)
R265 0 +/-5% CLK_BCLK_ITP# AK14
(6) CLK_CPU_ITP# CLKOUT_ITPXDP_N
R266 0 +/-5% CLK_BCLK_ITP AK13 K49 CLKOUTFLEX3
(6) CLK_CPU_ITP CLKOUT_ITPXDP_P CLKOUTFLEX3 / GPIO67 T107

BD82QM67[VER.B3,SLH9B]
PCIE REQ power rail:
suspend: 0 3 4 5 6 7
core: 1 2

R1077 *0_NC +/-5%

PCH_SMBDAT D S
MEM_SMBDAT (6,14,15,16,17,18,29,35)
Q123 R1084
2N7002W-7-F 10K
G +/-5%
+3.3V_RUN
Q124 G
2N7002W-7-F R1085
A 10K A
PCH_SMBCLK D S +/-5%
MEM_SMBCLK (6,14,15,16,17,18,29,35)

R1078 *0_NC +/-5%

Ever Light
Technology Limited
Title
10 -- CBT 4/7 (PCIE, CLK)
Size Document Number Rev
1A

Date: Thursday, January 27, 2011 Sheet 10 of 84

5 4 3 2 1
 5 4 3 2 1

+3.3V_RUN

PCH_GPIO1 R285 10K +/-5%

COUGAR POINT (GPIO,VSS_NCTF,RSVD)

R270 *1K_NC +/-1% PCH_GPIO1

D D
+3.3V_ALW_PCH

U3F
(6) SIO_EXT_SCI#_R
R793 R275 0 +/-5% T7 C40 CONTACTLESS_DET#
(39) SIO_EXT_SCI# BMBUSY# / GPIO0 TACH4 / GPIO68 CONTACTLESS_DET# (56)
4.7K
+/-5% PCH_GPIO1 A42 B41 +3.3V_ALW_PCH
TACH1 / GPIO1 TACH5 / GPIO69 DGPU_PWROK (19,40)
SLP_ME_CSW_DEV# IOL_DET# H36 C41
(61) IOL_DET# TACH2 / GPIO6 TACH6 / GPIO70 MXM_PRESENT2# (19)
MXM_PRESENT1# E38 A40 T111
(19) MXM_PRESENT1# TACH3 / GPIO7 TACH7 / GPIO71
R276 SIO_EXT_WAKE# R1090 10K +/-5%
*1K_NC SIO_EXT_WAKE# C10
+/-1%
Ra (40) SIO_EXT_WAKE# GPIO8 KB_DET# R767 10K +/-5%
(49) PM_LANPHY_ENABLE
C4 GPIO27 R1103 100K +/-5%
LAN_PHY_PWR_CTRL / GPIO12 SIO_A20GATE (39)
PCH_GPIO15 G2 P4 SIO_A20GATE R277 0 +/-5%
(6) PCH_GPIO15 GPIO15 A20GATE PECI_EC (39)
AU16 H_PECI_R R278 *0_NC
PECI H_PECI (2) +3.3V_RUN
PCH_GPIO16 U2 +/-5%
(6) PCH_GPIO16 SATA4GP / GPIO16 P5 SIO_RCIN#
PLL ON DIE VR ENABLE RCIN# SIO_RCIN# (39)

GPIO
GPIO17 D40 AY11 +1.05V_RUN_VTT SIO_RCIN# R280 10K +/-5%

CPU/MISC
TACH0 / GPIO17 PROCPWRGD H_CPUPWRGD (2,6)
ENABLED - HIGH (Ra UNSTUFFED) DEFAULT SIO_EXT_SCI# R281 10K +/-5%
GPIO22 T5 AY10 PCH_THRMTRIP#_R R282 56 +/-5%
DISABLED - LOW (Ra STUFFED) SCLOCK / GPIO22 THRMTRIP#
T110
E8 T14 INIT_3.3V# T108 C164 R284 *390_NC +/-5% IOL_DET# R1091 100K +/-5%
GPIO24 / MEM_LED INIT3_3V# H_THERMTRIP# (2,46)
0.1uF MXM_PRESENT1# R1092 10K +/-5%
GPIO27 E16 AY1 NV_CLE 16V,X7R
GPIO27 DF_TVS SIO_A20GATE R287 8.2K +/-5%
(6,40) SLP_ME_CSW_DEV# SLP_ME_CSW_DEV# P8
GPIO28 AH8 CONTACTLESS_DET# R288 200K +/-5%
K1 TS_VSS1 PCH_GPIO16 R289 100K +/-5%
(19) DGPU_HOLD_RST# STP_PCI# / GPIO34 AK11 TEMP_ALERT# R290 10K +/-5%
K4 TS_VSS2 GPIO22 R291 10K +/-5%
(6) PCH_GPIO35 GPIO35 AH10
GPIO36 V8 TS_VSS3
(6) GPIO36 SATA2GP / GPIO36
C AK10 C
FDI_OVRVLTG M5 TS_VSS4
(6) FDI_OVRVLTG SATA3GP / GPIO37
R296 0 +/-5%
N2 P37 FDI_OVRVLTG R297 *200K_NC +/-5%
(61) TPM_ID0 SLOAD / GPIO38 NC_1 GPIO17 R298 8.2K +/-5%
M3
(61) TPM_ID1 SDATAOUT0 / GPIO39
R299 0 +/-5% S D GPIO36 R1101 *10K_NC +/-5%
(29,39) EC_PCH_SATA_MOD_EN#
V13 BG2
(29) FFS_INT2 SDATAOUT1 / GPIO48 VSS_NCTF_15
Q28
2N7002W-7-F TEMP_ALERT# V3 BG48
(29) PCH_SATA_MOD_EN# G (6,40) TEMP_ALERT# SATA5GP / GPIO49 VSS_NCTF_16
KB_DET# D6 BH3
(2,9) PCH_PLTRST# (41) KB_DET# GPIO57 VSS_NCTF_17
BH47
VSS_NCTF_18
A4 BJ4 GPIO36 R1093 10K +/-5%
VSS_NCTF_1 VSS_NCTF_19
A44 BJ44
VSS_NCTF_2 VSS_NCTF_20
A45 BJ45
VSS_NCTF_3 VSS_NCTF_21

NCTF
A46 BJ46
VSS_NCTF_4 VSS_NCTF_22
A5 BJ5
VSS_NCTF_5 VSS_NCTF_23
A6 BJ6
VSS_NCTF_6 VSS_NCTF_24
B3 C2
VSS_NCTF_7 VSS_NCTF_25
B47 C48
VSS_NCTF_8 VSS_NCTF_26
BD1 D1
VSS_NCTF_9 VSS_NCTF_27
BD49 D49
VSS_NCTF_10 VSS_NCTF_28
BE1 E1
VSS_NCTF_11 VSS_NCTF_29 PLACE R638 CLOSE TO THE BRANCHING POINT
BE49 E49 ( TO CPU and NVRAM CONNECTOR)
B VSS_NCTF_12 VSS_NCTF_30 B
BF1 F1 +VCCPNAND
VSS_NCTF_13 VSS_NCTF_31
BF49 F49
VSS_NCTF_14 VSS_NCTF_32
0827 Update by DG1.2
BD82QM67[VER.B3,SLH9B] DMI & FDI Termination Voltage
R305
2.2K
+/-5%
R306
NV_CLE
NV_CLE Set to Vss when LOW H_SNB_IVB# (2)
+3.3V_ALW_PCH Set to Vcc when HIGH 1K
+/-5%

R295 1K +/-1% PCH_GPIO15

GPIO15

Low - Intel ME Crypto Transport Layer Security (TLS)

cipher suite with no confidentiality
High - Intel ME Crypto Transport Layer Security (TLS)
cipher suite with confidentiality

A R304 *100K_NC +/-1% FDI_OVRVLTG A

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FDI TERMINATION VOLTAGE OVERRIDE
Technology Limited
LOW - Tx, Rx terminated Title
GPIO37 to same voltage
(FDI_OVRVLTG) (DC Coupling Mode) 11 -- CBT 5/7 (GPIO)
DEFAULT Size Document Number Rev
1A

Date: Thursday, January 27, 2011 Sheet 11 of 84

5 4 3 2 1
 5 4 3 2 1

COGAR POINT (POWER)

close PCH 100mil
+1.05V_RUN FB1 +3.3V_RUN
FB 1K Ohm, 300mA
U3G POWER
+VCCADAC 1 2
0603h10 +1.05V_RUN
VCCCORE=1.3A max
AA23 U48
AC23 VCCCORE[1] VCCADAC C165 C168 C169
VCCCORE[2] +3.3V_ALW_PCH

CRT
AD21 10uF 0.1uF 10nF R313 *0_NC +/-5%
C166 C170 C167 C171 AD23 VCCCORE[3] U47 10V,X7R 16V,Y5V 25V,X7R r0805h6
VCCCORE[4] VSSADAC

VCC CORE
10uF 1uF 1uF 1uF AF21
6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R AF23
AG21
VCCCORE[5]
VCCCORE[6] +3.3V_RUN
R314 0 +/-5% +VCCPDSW U3J POWER +1.05V_RUN
c0603h9 r0603h6
AG23 VCCCORE[7] +VCCACLK AD49 N26
D VCCCORE[8] VCCALVDS = 1mA max VCCACLK VCCIO[29] D
AG24 AK36 C172
AG26 VCCCORE[9] VCCALVDS 0.1uF P26 C183
AG27 VCCCORE[10] AK37 C173 16V,Y5V T16 VCCIO[30] 1uF
AG29 VCCCORE[11] VSSALVDS 0.1uF VCCDSW3_3 P28 6.3V,X5R
AJ23 VCCCORE[12] 16V,Y5V VCCIO[31]

LVDS
AJ26 VCCCORE[13] AM37 L1 +/-10% +1.8V_RUN +PCH_VCCDSW V12 T27
AJ27 VCCCORE[14] VCCTX_LVDS[1] 0.1uH,250mA C174 DCPSUSBYP VCCIO[32]
VCCCORE[15] VCCTX_LVDS = 60mA max
AJ29 AM38 *0.1uF_NC T29
AJ31 VCCCORE[16] VCCTX_LVDS[2] 0805h11 16V,Y5V +3.3V_RUN_VCC_CLKF33 T38 VCCIO[33] +3.3V_ALW_PCH
VCCCORE[17] AP36 C176 C177 C178 VCC3_3[5]
+1.05V_RUN VCCTX_LVDS[3] 10nF 10nF 22uF T23
AP37 25V,X7R 25V,X7R 6.3V,X5R +VCCAPLL_CPY_PCH BH23 VCCSUS3_3[7]
VCCTX_LVDS[4] VCCAPLLDMI2
close PCH
+1.05V_RUN AN19 c0805h14 T24 C175
VCCIO[28] AL29 VCCSUS3_3[8] width 100mil
+1.05V_RUN VCCIO[14] 0.1uF
V23

USB
+3.3V_RUN VCCSUS3_3[9] 16V,Y5V
L2 *1uH_NC +VCCAPLLEXP BJ22
VCCAPLLEXP +VCCSUS1 AL24 V24 +3.3V_ALW_PCH
C180 V33 DCPSUS[3] VCCSUS3_3[10]

HVCMOS
*10uF_NC AN16 VCC3_3[6] C182 P24 C179 0.1uF16V,Y5V
6.3V,X5R VCCIO[15] C181 *1uF_NC VCCSUS3_3[6]
close PCH
c0603h9 AN17 0.1uF 6.3V,X5R AA19 +1.05V_RUN
+1.05V_RUN 100mil VCCIO[16] V34 16V,Y5V VCCASW[1] T26 R319 10+/-5% r0603h6
VCC3_3[7] +1.05V_RUN_VTT VCCIO[34] +5V_ALW_PCH
AA21
AN21 VCCASW[2] C184 D1 C A SDM10K45-7-F
VCCIO[17] +3.3V_ALW_PCH
R324 0 +/-5% AA24 M26 +PCH_V5REF_SUS 0.1uF
C185 C186 AN26 r0805h6 VCCASW[3] V5REF_SUS 16V,Y5V
VCCIO[18] 6. V5REF_SUS = 1mA max

Clock and Miscellaneous

10uF 1uF AA26
6.3V,X5R 6.3V,X5R AN27 AT16 +1.05V_+1.5V_1.8V_RUN C187 VCCASW[4] AN23 +VCCA_USBSUS +3.3V_ALW_PCH
c0603h9 VCCIO[19] VCCVRM[3] 1uF AA27 DCPSUS[4]
AP21 6.3V,X5R VCCASW[5] AN24 C204 0.1uF 16V,Y5V
VCCIO[20] AA29 VCCSUS3_3[1]
AP23 AT20 +1.05V_RUN_VTT_DMI VCCASW[6] +PCH_V5REF_RUN R325 10+/-5% r0603h6
VCCIO[21] VCCDMI[1] +1.05V_RUN +1.05V_M +5V_RUN
AA31
DMI
C189 C190 C191 AP24 VCCASW[7] C192 D2 C A SDM10K45-7-F
VCCIO

VCCIO[22] +3.3V_RUN
1uF 1uF 1uF L19 R1833 1 +/-1% AC26 P34 1uF

*
6.3V,X5R 6.3V,X5R 6.3V,X5R AP26 AB36 +1.05V_RUN_DMI VCCASW[8] V5REF 6.3V,X5R
VCCIO[23] VCCCLKDMI 10uH 150mA C195 C196 AC27
AT24 C193 C194 r0603h6 22uF 22uF VCCASW[9] N20 +VCCA_USBSUS
C C

PCI/GPIO/LPC
VCCIO[24] 1uF *10uF_NC 6.3V,X5R 6.3V,X5R AC29 VCCSUS3_3[2] +3.3V_ALW_PCH
6.3V,X5R 6.3V,X5R c0805h14 c0805h14 VCCASW[10] N22
+3.3V_RUN AN33 AC31 VCCSUS3_3[3] C188
VCCIO[25]
close PCH 100mil VCCASW[11] P20 C197 *1uF_NC
AN34 AG16 AD29 VCCSUS3_3[4] 1uF 6.3V,X5R
VCCIO[26] VCCDFTERM[1] +VCCPNAND VCCASW[12] P22 6.3V,X5R
AD31 VCCSUS3_3[5]
VCCASW[13]
close PCH 100mil
C198 BH29 AG17
DFT / SPI

0.1uF VCC3_3[3] VCCDFTERM[2] R330 0 +/-5% W21 AA16

+1.8V_RUN VCCASW[14] VCC3_3[1] +3.3V_RUN
16V,Y5V r0805h6 C199 C200 C201
AJ16 R331 *0_NC +/-5% +3.3V_RUN 1uF 1uF 1uF W23 W16
VCCDFTERM[3] r0805h6 6.3V,X5R 6.3V,X5R 6.3V,X5R VCCASW[15] VCC3_3[8]
+1.05V_RUN +1.05V_+1.5V_1.8V_RUN AP16 C202 W24 T34 +3.3V_RUN_VCCPPCI C203
VCCVRM[2] AJ17 0.1uF VCCASW[16] VCC3_3[4] 0.1uF
VCCDFTERM[4] 16V,Y5V W26 16V,Y5V
R333 *0_NC +/-5% +VCCAPLL_FDI BG6 VCCASW[17] +3.3V_RUN
r0805h6 VccAFDIPLL W29
+3.3V_M VCCASW[18]
C205 +1.05V_RUN
AP17 W31 AJ2 C206 0.1uF16V,Y5V
VCCIO[27] VCCASW[19] VCC3_3[2]
FDI

*10uF_NC V1 +3.3V_M_VCCSPI R334 0 +/-5%

6.3V,X5R VCCSPI r0805h6 W33
+1.05V_RUN_VTT_DMI AU20 C207 VCCASW[20] AF13
VCCDMI[2] VCCIO[5]
trace width
1uF +1.05V_RUN +1.05V_RUN
6.3V,X5R C208 0.1uF +VCCRTCEXT N16
40mil
trace width DCPRTC
BD82QM67[VER.B3,SLH9B] 16V,X7R AH13
40mil VCCIO[12]
Follow Power Delivery +1.05V_+1.5V_1.8V_RUN Y49 AH14 C209
VCCVRM[4] VCCIO[13] 1uF
Design Guide Rev 0.5(chapter 7) close PCH 100mil
C210 6.3V,X5R
+1.05V_RUN 1uF AF14 +1.05V_RUN
+1.5V_RUN +1.05V_+1.5V_1.8V_RUN VCCIO[6] L3
6.3V,X5R +1.05V_RUN_VCCA_A_DPL BD47

SATA

*
+1.05V_M VCCADPLLA AK1 +VCCSATAPLL
+1.05V_RUN_VCCA_B_DPL BF47 VCCAPLLSATA *10uH_NC
R342 0 +/-5% +1.05V_+1.5V_1.8V_RUN VCCADPLLB C211
+1.8V_RUN r0603h6 AF11 +1.05V_+1.5V_1.8V_RUN *10uF_NC
C212 C213 C214 AF17 VCCVRM[1] 6.3V,X5R
*330uF_NC *330uF_NC *330uF_NC R338 0 +/-5% +1.05V_RUN_VCCDIFFCLKN AF33 VCCIO[7] c0603h9
B
R345 *0_NC +/-5% 2V,<=9mOhm 2V,<=9mOhm 2V,<=9mOhm AF34 VCCDIFFCLKN[1] AC16 +1.05V_RUN B
+1.05V_RUN r0603h6 C215 1uF AG34 VCCDIFFCLKN[2] VCCIO[2]
6.3V,X5R VCCDIFFCLKN[3] AC17 +1.05V_RUN_VCC_SATA R340 0 +/-5%
VCCIO[3] r0805h6
R348 *0_NC +/-5% R341 0 +/-5% +1.05V_RUN_SSCVCC AG33 AD17 C216
r0603h6 VCCSSC VCCIO[4] 1uF
C217 6.3V,X5R
+1.05V_M 1uF C218 0.1uF +VCCSST V16 +1.05V_M
6.3V,X5R 16V,Y5V DCPSST

R343 *0_NC +1.05V_M_VCCSUS T17 T21

+/-5% V19 DCPSUS[1] VCCASW[22]

MISC
C219 DCPSUS[2]
+1.05V_RUN L4
*1uF_NC V21
*

R1685 0 +/-5% +1.05V_RUN_VCCA_A_DPL 6.3V,X5R VCCASW[23]

CPU
r0603h6 10uH 150mA +1.05V_RUN_VTT BJ8
V_PROC_IO T19
L5 VCCASW[21]
R349 0 +/-5% +V_CPU_IO
*

R1686 0 +/-5% +1.05V_RUN_VCCA_B_DPL +3.3V_ALW_PCH

r0603h6 10uH 150mA C220 C221 C222

RTC
4.7uF 0.1uF 0.1uF A22 P32 +VCCSUSHDA R351 0 +/-5%

HDA
C223 C224 C225 C226 10V,X5R 16V,Y5V 16V,Y5V VCCRTC VCCSUSHDA
220uF 1uF 220uF 1uF c0805h14 C227
2.5V,<=15mOhm 6.3V,X5R 2.5V,<=15mOhm 6.3V,X5R BD82QM67[VER.B3,SLH9B] 0.1uF
16V,Y5V

+RTC_CELL

close PCH 100mil,

trace width 20mil of L35,L36 & R1699 C228 C229 C230 +3.3V_RUN
1uF 0.1uF 0.1uF
6.3V,X5R 16V,Y5V 16V,Y5V +3.3V_RUN_VCCPPCI R352 0 +/-5%
r0805h6
C231
0.1uF
+3.3V_RUN 16V,Y5V
A A
+1.05V_RUN
L6
R1834 1 +/-1%
L43
*

+3.3V_RUN_VCC_CLKF33
*

+VCCAPLL_CPY_PCH
r0603h6 *10uH_NC
10uH 150mA C234
C232
10uF
C233
1uF
*10uF_NC
6.3V,X5R Ever Light
6.3V,X5R 6.3V,X5R close PCH c0603h9
c0603h9
width 100mil Technology Limited
Title

+1.05V_RUN_VCCA_A_DPL R355 *0_NC +/-5% +1.05V_RUN_VCCA_B_DPL

12 -- CBT 6/7 (POWER)
r0805h6 Size Document Number Rev
close PCH 100mil 1A

Date: Thursday, January 27, 2011 Sheet 12 of 84

5 4 3 2 1
 5 4 3 2 1

Cougar Point (GND)

U3I

AY4 H46
AY42 VSS[159] VSS[259] K18
AY46 VSS[160] VSS[260] K26
AY8 VSS[161] VSS[261] K39
B11 VSS[162] VSS[262] K46
D
B15 VSS[163] VSS[263] K7 D
B19 VSS[164] VSS[264] L18
B23 VSS[165] VSS[265] L2
B27 VSS[166] VSS[266] L20 U3H
B31 VSS[167] VSS[267] L26 H5
B35 VSS[168] VSS[268] L28 VSS[0]
B39 VSS[169] VSS[269] L36 AA17 AK38
B7 VSS[170] VSS[270] L48 AA2 VSS[1] VSS[80] AK4
F45 VSS[171] VSS[271] M12 AA3 VSS[2] VSS[81] AK42
BB12 VSS[172] VSS[272] P16 AA33 VSS[3] VSS[82] AK46
BB16 VSS[173] VSS[273] M18 AA34 VSS[4] VSS[83] AK8
BB20 VSS[174] VSS[274] M22 AB11 VSS[5] VSS[84] AL16
BB22 VSS[175] VSS[275] M24 AB14 VSS[6] VSS[85] AL17
BB24 VSS[176] VSS[276] M30 AB39 VSS[7] VSS[86] AL19
BB28 VSS[177] VSS[277] M32 AB4 VSS[8] VSS[87] AL2
BB30 VSS[178] VSS[278] M34 AB43 VSS[9] VSS[88] AL21
BB38 VSS[179] VSS[279] M38 AB5 VSS[10] VSS[89] AL23
BB4 VSS[180] VSS[280] M4 AB7 VSS[11] VSS[90] AL26
BB46 VSS[181] VSS[281] M42 AC19 VSS[12] VSS[91] AL27
BC14 VSS[182] VSS[282] M46 AC2 VSS[13] VSS[92] AL31
BC18 VSS[183] VSS[283] M8 AC21 VSS[14] VSS[93] AL33
BC2 VSS[184] VSS[284] N18 AC24 VSS[15] VSS[94] AL34
BC22 VSS[185] VSS[285] P30 AC33 VSS[16] VSS[95] AL48
BC26 VSS[186] VSS[286] N47 AC34 VSS[17] VSS[96] AM11
BC32 VSS[187] VSS[287] P11 AC48 VSS[18] VSS[97] AM14
BC34 VSS[188] VSS[288] P18 AD10 VSS[19] VSS[98] AM36
BC36 VSS[189] VSS[289] T33 AD11 VSS[20] VSS[99] AM39
BC40 VSS[190] VSS[290] P40 AD12 VSS[21] VSS[100] AM43
BC42 VSS[191] VSS[291] P43 AD13 VSS[22] VSS[101] AM45
BC48 VSS[192] VSS[292] P47 AD19 VSS[23] VSS[102] AM46
BD46 VSS[193] VSS[293] P7 AD24 VSS[24] VSS[103] AM7
BD5 VSS[194] VSS[294] R2 AD26 VSS[25] VSS[104] AN2
BE22 VSS[195] VSS[295] R48 AD27 VSS[26] VSS[105] AN29
BE26 VSS[196] VSS[296] T12 AD33 VSS[27] VSS[106] AN3
BE40 VSS[197] VSS[297] T31 AD34 VSS[28] VSS[107] AN31
BF10 VSS[198] VSS[298] T37 AD36 VSS[29] VSS[108] AP12
BF12 VSS[199] VSS[299] T4 AD37 VSS[30] VSS[109] AP19
BF16 VSS[200] VSS[300] W34 AD38 VSS[31] VSS[110] AP28
C C
BF20 VSS[201] VSS[301] T46 AD39 VSS[32] VSS[111] AP30
BF22 VSS[202] VSS[302] T47 AD4 VSS[33] VSS[112] AP32
BF24 VSS[203] VSS[303] T8 AD40 VSS[34] VSS[113] AP38
BF26 VSS[204] VSS[304] V11 AD42 VSS[35] VSS[114] AP4
BF28 VSS[205] VSS[305] V17 AD43 VSS[36] VSS[115] AP42
BD3 VSS[206] VSS[306] V26 AD45 VSS[37] VSS[116] AP46
BF30 VSS[207] VSS[307] V27 AD46 VSS[38] VSS[117] AP8
BF38 VSS[208] VSS[308] V29 AD8 VSS[39] VSS[118] AR2
BF40 VSS[209] VSS[309] V31 AE2 VSS[40] VSS[119] AR48
BF8 VSS[210] VSS[310] V36 AE3 VSS[41] VSS[120] AT11
BG17 VSS[211] VSS[311] V39 AF10 VSS[42] VSS[121] AT13
BG21 VSS[212] VSS[312] V43 AF12 VSS[43] VSS[122] AT18
BG33 VSS[213] VSS[313] V7 AD14 VSS[44] VSS[123] AT22
BG44 VSS[214] VSS[314] W17 AD16 VSS[45] VSS[124] AT26
BG8 VSS[215] VSS[315] W19 AF16 VSS[46] VSS[125] AT28
BH11 VSS[216] VSS[316] W2 AF19 VSS[47] VSS[126] AT30
BH15 VSS[217] VSS[317] W27 AF24 VSS[48] VSS[127] AT32
BH17 VSS[218] VSS[318] W48 AF26 VSS[49] VSS[128] AT34
BH19 VSS[219] VSS[319] Y12 AF27 VSS[50] VSS[129] AT39
H10 VSS[220] VSS[320] Y38 AF29 VSS[51] VSS[130] AT42
BH27 VSS[221] VSS[321] Y4 AF31 VSS[52] VSS[131] AT46
BH31 VSS[222] VSS[322] Y42 AF38 VSS[53] VSS[132] AT7
BH33 VSS[223] VSS[323] Y46 AF4 VSS[54] VSS[133] AU24
BH35 VSS[224] VSS[324] Y8 AF42 VSS[55] VSS[134] AU30
BH39 VSS[225] VSS[325] BG29 AF46 VSS[56] VSS[135] AV16
BH43 VSS[226] VSS[328] N24 AF5 VSS[57] VSS[136] AV20
BH7 VSS[227] VSS[329] AJ3 AF7 VSS[58] VSS[137] AV24
D3 VSS[228] VSS[330] AD47 AF8 VSS[59] VSS[138] AV30
D12 VSS[229] VSS[331] B43 AG19 VSS[60] VSS[139] AV38
D16 VSS[230] VSS[333] BE10 AG2 VSS[61] VSS[140] AV4
D18 VSS[231] VSS[334] BG41 AG31 VSS[62] VSS[141] AV43
D22 VSS[232] VSS[335] G14 AG48 VSS[63] VSS[142] AV8
D24 VSS[233] VSS[337] H16 AH11 VSS[64] VSS[143] AW14
D26 VSS[234] VSS[338] T36 AH3 VSS[65] VSS[144] AW18
D30 VSS[235] VSS[340] BG22 AH36 VSS[66] VSS[145] AW2
D32 VSS[236] VSS[342] BG24 AH39 VSS[67] VSS[146] AW22
D34 VSS[237] VSS[343] C22 AH40 VSS[68] VSS[147] AW26
B
D38 VSS[238] VSS[344] AP13 AH42 VSS[69] VSS[148] AW28 B
D42 VSS[239] VSS[345] M14 AH46 VSS[70] VSS[149] AW32
D8 VSS[240] VSS[346] AP3 AH7 VSS[71] VSS[150] AW34
E18 VSS[241] VSS[347] AP1 AJ19 VSS[72] VSS[151] AW36
E26 VSS[242] VSS[348] BE16 AJ21 VSS[73] VSS[152] AW40
G18 VSS[243] VSS[349] BC16 AJ24 VSS[74] VSS[153] AW48
G20 VSS[244] VSS[350] BG28 AJ33 VSS[75] VSS[154] AV11
G26 VSS[245] VSS[351] BJ28 AJ34 VSS[76] VSS[155] AY12
G28 VSS[246] VSS[352] AK12 VSS[77] VSS[156] AY22
G36 VSS[247] AK3 VSS[78] VSS[157] AY28
G48 VSS[248] VSS[79] VSS[158]
H12 VSS[249] BD82QM67[VER.B3,SLH9B]
H18 VSS[250]
H22 VSS[251]
H24 VSS[252]
H26 VSS[253]
H30 VSS[254]
H32 VSS[255]
H34 VSS[256]
F3 VSS[257]
VSS[258]

BD82QM67[VER.B3,SLH9B]

A A

Ever Light
Technology Limited
Title
13 -- CBT 7/7 (GND)
Size Document Number Rev
1A

Date: Thursday, January 27, 2011 Sheet 13 of 84

5 4 3 2 1
 5 4 3 2 1

DDR3 Length Matching Formulas

Signal Group Min Length Max Length
D (0xA6)
B (0xA2) Control-to-Clock Clock - 0.5" Clock - 0.0"
Command-to-Clock Clock - 0.5" Clock - 0.5"
JDIMM1 JDIMM3 Strobe-to-Clock Clock - 0.5" Clock - 1.0"
CPU
JDIMM2 JDIMM4 Data-to-Strobe (per byte lane) Strobe - 20 mils Strobe + 20 mils

A (0xA0) C (0xA4) CHA_DIMM1_TOP_SIDE

D D

JDIMM1 is STD type. (H=60)

JDIMM1A
(3,15) DDR_A_MA[0..15] DDR_A_D[0..63] (3,15)
DDR_A_MA0 98 5 DDR_A_D11
DDR_A_MA1 97 A0 DQ0 7 DDR_A_D12 +1.5V_MEM
DDR_A_MA2 96 A1 DQ1 15 DDR_A_D9 JDIMM1B
DDR_A_MA3 95 A2 DQ2 17 DDR_A_D14 75 44
DDR_A_MA4 92 A3 DQ3 4 DDR_A_D8 76 VDD1 VSS16 48
DDR_A_MA5 91 A4 DQ4 6 DDR_A_D10 81 VDD2 VSS17 49
DDR_A_MA6 90 A5 DQ5 16 DDR_A_D13 82 VDD3 VSS18 54
DDR_A_MA7 86 A6 DQ6 18 DDR_A_D15 87 VDD4 VSS19 55
DDR_A_MA8 89 A7 DQ7 21 DDR_A_D5 88 VDD5 VSS20 60
DDR_A_MA9 85 A8 DQ8 23 DDR_A_D4 93 VDD6 VSS21 61
DDR_A_MA10 107 A9 DQ9 33 DDR_A_D7 94 VDD7 VSS22 65
DDR_A_MA11 84 A10/AP DQ10 35 DDR_A_D6 99 VDD8 VSS23 66
DDR_A_MA12 83 A11 DQ11 22 DDR_A_D0 100 VDD9 VSS24 71
DDR_A_MA13 119 A12/BC# DQ12 24 DDR_A_D1 105 VDD10 VSS25 72
DDR_A_MA14 80 A13 DQ13 34 DDR_A_D3 106 VDD11 VSS26 127
DDR_A_MA15 78 A14 DQ14 36 DDR_A_D2 111 VDD12 VSS27 128
A15 DQ15 39 DDR_A_D20 112 VDD13 VSS28 133
109 DQ16 41 DDR_A_D21 117 VDD14 VSS29 134
(3,15) DDR_A_BS0 BA0 DQ17 VDD15 VSS30
108 51 DDR_A_D22 118 138
(3,15) DDR_A_BS1 BA1 DQ18 VDD16 VSS31
79 53 DDR_A_D19 123 139
(3,15) DDR_A_BS2 BA2 DQ19 VDD17 VSS32
114 40 DDR_A_D17 124 144
(3) DDR_A_CS#2 S0# DQ20 VDD18 VSS33
121 42 DDR_A_D16 145
(3) DDR_A_CS#3 S1# DQ21 VSS34
101 50 DDR_A_D23 +3.3V_RUN
199 150
(3) DDR_A_CLK2 CK0 DQ22 VDDSPD VSS35
103 52 DDR_A_D18 151
(3) DDR_A_CLK#2 CK0# DQ23 VSS36
102 57 DDR_A_D29 77 155
(3) DDR_A_CLK3 CK1 DQ24 NC1 VSS37
104 59 DDR_A_D31 122 156
(3) DDR_A_CLK#3 CK1# DQ25 NC2 VSS38
73 67 DDR_A_D27 125 161
+3.3V_RUN (3) DDR_A_CKE2 CKE0 DQ26 NCTEST VSS39
74 69 DDR_A_D26 162
(3) DDR_A_CKE3 CKE1 DQ27 VSS40
115 56 DDR_A_D28 T146 TS#_DIMMA1 198 167
(3,15) DDR_A_CAS# CAS# DQ28 EVENT# VSS41
C 110 58 DDR_A_D24 30 168 C
(3,15) DDR_A_RAS# RAS# DQ29 (2,15,16,17) DDR3_DRAMRST# RESET# VSS42
R1053 10K +/-5% 113 68 DDR_A_D30 172
(3,15) DDR_A_WE# WE# DQ30 VSS43
R357 *10K_NC +/-5% 197 70 DDR_A_D25 173
R358 10K +/-5% 201 SA0 DQ31 129 DDR_A_D38 1 VSS44 178
SA1 DQ32 (15,18) M_VREF_DQ_DIMM0 VREF_DQ VSS45
202 131 DDR_A_D35 126 179
(6,10,15,16,17,18,29,35) MEM_SMBCLK SCL DQ33 VREF_CA VSS46
200 141 DDR_A_D37 R679 *0_NC +/-5% 184
(6,10,15,16,17,18,29,35) MEM_SMBDAT SDA DQ34 +M_VREF_DQ_DIMM0_1 VSS47
Address:0xA2 143 DDR_A_D32 C235 C236 185
116 DQ35 130 DDR_A_D36 2.2uF 0.1uF 2 VSS48 189
(3) DDR_A_ODT2 ODT0 DQ36 VSS1 VSS49
120 132 DDR_A_D33 10V,X5R 16V,X7R 3 190
(3) DDR_A_ODT3 ODT1 DQ37 VSS2 VSS50
140 DDR_A_D34 8 195
11 DQ38 142 DDR_A_D39 9 VSS3 VSS51 196
28 DM0 DQ39 147 DDR_A_D40 13 VSS4 VSS52
SA1 SA0 46 DM1 DQ40 149 DDR_A_D41 14 VSS5
63 DM2 DQ41 157 DDR_A_D42 19 VSS6
CHA0 0 0 136 DM3 DQ42 159 DDR_A_D43
(15,18) M_VREF_CA_DIMM0
20 VSS7 +0.75V_DDR_VTT
153 DM4 DQ43 146 DDR_A_D44 R680 *0_NC +/-5% 25 VSS8
CHA1 0 1 170 DM5 DQ44 148 DDR_A_D47
+M_VREF_CA_DIMM0_1
C237 C238 26 VSS9 203
187 DM6 DQ45 158 DDR_A_D46 2.2uF 0.1uF 31 VSS10 VTT1 204
DM7 DQ46 160 DDR_A_D45 10V,X5R 16V,X7R 32 VSS11 VTT2
CHB0 1 0 (3,15) DDR_A_DQS[0..7]
DDR_A_DQS1 12 DQ47 163 DDR_A_D52 37 VSS12 G1
DDR_A_DQS0 29 DQS0 DQ48 165 DDR_A_D49 38 VSS13 GND G2
CHB1 1 1 DDR_A_DQS2 47 DQS1 DQ49 175 DDR_A_D51 43 VSS14 GND#2-G2
DDR_A_DQS3 64 DQS2 DQ50 177 DDR_A_D50 VSS15
DDR_A_DQS4 137 DQS3 DQ51 164 DDR_A_D53 DDRIII
DDR_A_DQS5 154 DQS4 DQ52 166 DDR_A_D48
DDR_A_DQS6 171 DQS5 DQ53 174 DDR_A_D54
DDR_A_DQS7 188 DQS6 DQ54 176 DDR_A_D55
(3,15) DDR_A_DQS#[0..7] DQS7 DQ55
DDR_A_DQS#1 10 181 DDR_A_D61
DDR_A_DQS#0 27 DQS#0 DQ56 183 DDR_A_D60
DDR_A_DQS#2 45 DQS#1 DQ57 191 DDR_A_D62
DDR_A_DQS#3 62 DQS#2 DQ58 193 DDR_A_D58
DDR_A_DQS#4 135 DQS#3 DQ59 180 DDR_A_D57
DDR_A_DQS#5 152 DQS#4 DQ60 182 DDR_A_D56
DDR_A_DQS#6 169 DQS#5 DQ61 192 DDR_A_D59
DDR_A_DQS#7 186 DQS#6 DQ62 194 DDR_A_D63
DQS#7 DQ63
DDRIII
B B

+1.5V_SUS decoupling caps be located at the VDD pins of each SO-DIMM connector in the
vicinity of the CMD, Clock and Control signals
Those capacitors should be placed on the same side of the motherboard as the
SO-DIMM connector

330uF x 1
10uF x 6 Place these Caps near So-DimmA. +1.5V_MEM +3.3V_RUN +0.75V_DDR_VTT
0.1uF x 4 1uF x 4

C239 C240 C241 C242 C243 C244 C245 C246 C247 C248 C249 C250 C251 C252 C253 C254 C255
10uF 10uF 10uF 10uF 10uF 10uF 1uF 1uF 1uF 1uF 330uF 2.2uF 0.1uF 1uF 1uF 1uF 1uF
6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 2.5V,<9mOhm 10V,X5R 16V,X7R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R

For VDDSPD

A A

Ever Light
Technology Limited
Title
15 -- SODIMM-204P-A1
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 14 of 84

5 4 3 2 1
 5 4 3 2 1

DDR3 Length Matching Formulas

Signal Group Min Length Max Length
D (0xA6) Control-to-Clock Clock - 0.5" Clock - 0.0"
B (0xA2)
Command-to-Clock Clock - 0.5" Clock - 0.5"
JDIMM1 JDIMM3
CHA_DIMM0_BOT_SIDE Strobe-to-Clock Clock - 0.5" Clock - 1.0"
CPU Data-to-Strobe (per byte lane) Strobe - 20 mils Strobe + 20 mils
JDIMM2 JDIMM4

D A (0xA0) C (0xA4) JDIMM2 is RVS type.(H=60) D

JDIMM2A
(3,14) DDR_A_MA[0..15] DDR_A_D[0..63] (3,14)
DDR_A_MA0 98 5 DDR_A_D8
DDR_A_MA1 97 A0 DQ0 7 DDR_A_D10 +1.5V_MEM
DDR_A_MA2 96 A1 DQ1 15 DDR_A_D13 JDIMM2B
DDR_A_MA3 95 A2 DQ2 17 DDR_A_D15 75 44
DDR_A_MA4 92 A3 DQ3 4 DDR_A_D11 76 VDD1 VSS16 48
DDR_A_MA5 91 A4 DQ4 6 DDR_A_D12 81 VDD2 VSS17 49
DDR_A_MA6 90 A5 DQ5 16 DDR_A_D9 82 VDD3 VSS18 54
DDR_A_MA7 86 A6 DQ6 18 DDR_A_D14 87 VDD4 VSS19 55
DDR_A_MA8 89 A7 DQ7 21 DDR_A_D0 88 VDD5 VSS20 60
DDR_A_MA9 85 A8 DQ8 23 DDR_A_D1 93 VDD6 VSS21 61
DDR_A_MA10 107 A9 DQ9 33 DDR_A_D3 94 VDD7 VSS22 65
DDR_A_MA11 84 A10/AP DQ10 35 DDR_A_D2 99 VDD8 VSS23 66
DDR_A_MA12 83 A11 DQ11 22 DDR_A_D5 100 VDD9 VSS24 71
DDR_A_MA13 119 A12/BC# DQ12 24 DDR_A_D4 105 VDD10 VSS25 72
DDR_A_MA14 80 A13 DQ13 34 DDR_A_D7 106 VDD11 VSS26 127
DDR_A_MA15 78 A14 DQ14 36 DDR_A_D6 111 VDD12 VSS27 128
A15 DQ15 39 DDR_A_D17 112 VDD13 VSS28 133
109 DQ16 41 DDR_A_D16 117 VDD14 VSS29 134
(3,14) DDR_A_BS0 BA0 DQ17 VDD15 VSS30
108 51 DDR_A_D23 118 138
(3,14) DDR_A_BS1 BA1 DQ18 VDD16 VSS31
79 53 DDR_A_D18 123 139
(3,14) DDR_A_BS2 BA2 DQ19 VDD17 VSS32
114 40 DDR_A_D20 124 144
(3) DDR_A_CS#0 S0# DQ20 VDD18 VSS33
121 42 DDR_A_D21 145
(3) DDR_A_CS#1 S1# DQ21 VSS34
101 50 DDR_A_D22 +3.3V_RUN
199 150
(3) DDR_A_CLK0 CK0 DQ22 VDDSPD VSS35
103 52 DDR_A_D19 151
(3) DDR_A_CLK#0 CK0# DQ23 VSS36
102 57 DDR_A_D28 77 155
(3) DDR_A_CLK1 CK1 DQ24 NC1 VSS37
104 59 DDR_A_D24 All VREF traces should have 10 mil trace width 122 156
(3) DDR_A_CLK#1 CK1# DQ25 NC2 VSS38
73 67 DDR_A_D30 125 161
+3.3V_RUN (3) DDR_A_CKE0 CKE0 DQ26 NCTEST VSS39
74 69 DDR_A_D25 162
(3) DDR_A_CKE1 CKE1 DQ27 VSS40
C 115 56 DDR_A_D29 T147 TS#_DIMMA0 198 167 C
(3,14) DDR_A_CAS# CAS# DQ28 EVENT# VSS41
110 58 DDR_A_D31 30 168
(3,14) DDR_A_RAS# RAS# DQ29 (2,14,16,17) DDR3_DRAMRST# RESET# VSS42
R360 *10K_NC +/-5% 113 68 DDR_A_D27 172
(3,14) DDR_A_WE# WE# DQ30 VSS43
R1032 10K +/-5% 197 70 DDR_A_D26 173
R1037 10K +/-5% 201 SA0 DQ31 129 DDR_A_D36 1 VSS44 178
SA1 DQ32 (14,18) M_VREF_DQ_DIMM0 VREF_DQ VSS45
202 131 DDR_A_D33 126 179
(6,10,14,16,17,18,29,35) MEM_SMBCLK SCL DQ33 VREF_CA VSS46
200 141 DDR_A_D34 184
(6,10,14,16,17,18,29,35) MEM_SMBDAT SDA DQ34 VSS47
Address:0xA0 143 DDR_A_D39 +M_VREF_DQ_DIMM0_1 R761 *0_NC +/-5% C256 C257 185
116 DQ35 130 DDR_A_D38 2.2uF 0.1uF 2 VSS48 189
(3) DDR_A_ODT0 ODT0 DQ36 VSS1 VSS49
120 132 DDR_A_D35 10V,X5R 16V,X7R 3 190
(3) DDR_A_ODT1 ODT1 DQ37 VSS2 VSS50
140 DDR_A_D37 8 195
11 DQ38 142 DDR_A_D32 9 VSS3 VSS51 196
28 DM0 DQ39 147 DDR_A_D44 13 VSS4 VSS52
SA1 SA0 46 DM1 DQ40 149 DDR_A_D47 14 VSS5
63 DM2 DQ41 157 DDR_A_D46 19 VSS6
CHA0 0 0 136 DM3 DQ42 159 DDR_A_D45
(14,18) M_VREF_CA_DIMM0
20 VSS7 +0.75V_DDR_VTT
153 DM4 DQ43 146 DDR_A_D40 25 VSS8
CHA1 0 1 170 DM5 DQ44 148 DDR_A_D41 R735 *0_NC +/-5% C258 C259 26 VSS9 203
DM6 DQ45 +M_VREF_CA_DIMM0_1 VSS10 VTT1
187 158 DDR_A_D42 2.2uF 0.1uF 31 204
DM7 DQ46 160 DDR_A_D43 10V,X5R 16V,X7R 32 VSS11 VTT2
CHB0 1 0 (3,14) DDR_A_DQS[0..7]
DDR_A_DQS1 12 DQ47 163 DDR_A_D53 37 VSS12 G1
DDR_A_DQS0 29 DQS0 DQ48 165 DDR_A_D48 38 VSS13 GND G2
CHB1 1 1 DDR_A_DQS2 47 DQS1 DQ49 175 DDR_A_D54 43 VSS14 GND#2-G2
DDR_A_DQS3 64 DQS2 DQ50 177 DDR_A_D55 VSS15
DDR_A_DQS4 137 DQS3 DQ51 164 DDR_A_D52 DDRIII
DDR_A_DQS5 154 DQS4 DQ52 166 DDR_A_D49
DDR_A_DQS6 171 DQS5 DQ53 174 DDR_A_D51
DDR_A_DQS7 188 DQS6 DQ54 176 DDR_A_D50
(3,14) DDR_A_DQS#[0..7] DQS7 DQ55
DDR_A_DQS#1 10 181 DDR_A_D57
DDR_A_DQS#0 27 DQS#0 DQ56 183 DDR_A_D56
DDR_A_DQS#2 45 DQS#1 DQ57 191 DDR_A_D59
DDR_A_DQS#3 62 DQS#2 DQ58 193 DDR_A_D63
DDR_A_DQS#4 135 DQS#3 DQ59 180 DDR_A_D61
DDR_A_DQS#5 152 DQS#4 DQ60 182 DDR_A_D60
DDR_A_DQS#6 169 DQS#5 DQ61 192 DDR_A_D62
DDR_A_DQS#7 186 DQS#6 DQ62 194 DDR_A_D58
DQS#7 DQ63
DDRIII
B B

+1.5V_SUS decoupling caps be located at the VDD pins of each SO-DIMM connector in the
vicinity of the CMD, Clock and Control signals
Those capacitors should be placed on the same side of the motherboard as the
SO-DIMM connector

330uF x 1
10uF x 6 Place these Caps near So-DimmA. +1.5V_MEM +3.3V_RUN +0.75V_DDR_VTT
0.1uF x 4 1uF x 4

C260 C261 C262 C263 C264 C265 C266 C267 C268 C269 C270 C271 C272 C273 C274 C275 C276
10uF 10uF 10uF 10uF 10uF 10uF 1uF 1uF 1uF 1uF 330uF 2.2uF 0.1uF 1uF 1uF 1uF 1uF
6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 2.5V,<9mOhm 10V,X5R 16V,X7R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R

A A

Ever Light
Technology Limited
Title
14 -- SODIMM-204P-A0
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 15 of 84

5 4 3 2 1
 5 4 3 2 1

DDR3 Length Matching Formulas

D (0xA6) Signal Group Min Length Max Length
B (0xA2)
Control-to-Clock Clock - 0.5" Clock - 0.0"
Command-to-Clock Clock - 0.5" Clock - 0.5"
JDIMM1 JDIMM3
CPU
JDIMM2 JDIMM4
CHB_DIMM1_TOP_SIDE Strobe-to-Clock Clock - 0.5" Clock - 1.0"
Data-to-Strobe (per byte lane) Strobe - 20 mils Strobe + 20 mils
A (0xA0) C (0xA4)
JDIMM3 is STD type.
D D

JDIMM3A
(3,17) DDR_B_MA[0..15] DDR_B_D[0..63] (3,17)
DDR_B_MA0 98 5 DDR_B_D3
DDR_B_MA1 97 A0 DQ0 7 DDR_B_D1 +1.5V_MEM
DDR_B_MA2 96 A1 DQ1 15 DDR_B_D7 JDIMM3B
DDR_B_MA3 95 A2 DQ2 17 DDR_B_D0 75 44
DDR_B_MA4 92 A3 DQ3 4 DDR_B_D4 76 VDD1 VSS16 48
DDR_B_MA5 91 A4 DQ4 6 DDR_B_D5 81 VDD2 VSS17 49
DDR_B_MA6 90 A5 DQ5 16 DDR_B_D6 82 VDD3 VSS18 54
DDR_B_MA7 86 A6 DQ6 18 DDR_B_D2 87 VDD4 VSS19 55
DDR_B_MA8 89 A7 DQ7 21 DDR_B_D13 88 VDD5 VSS20 60
DDR_B_MA9 85 A8 DQ8 23 DDR_B_D12 93 VDD6 VSS21 61
DDR_B_MA10 107 A9 DQ9 33 DDR_B_D10 94 VDD7 VSS22 65
DDR_B_MA11 84 A10/AP DQ10 35 DDR_B_D14 99 VDD8 VSS23 66
DDR_B_MA12 83 A11 DQ11 22 DDR_B_D8 100 VDD9 VSS24 71
DDR_B_MA13 119 A12/BC# DQ12 24 DDR_B_D9 105 VDD10 VSS25 72
DDR_B_MA14 80 A13 DQ13 34 DDR_B_D11 106 VDD11 VSS26 127
DDR_B_MA15 78 A14 DQ14 36 DDR_B_D15 111 VDD12 VSS27 128
A15 DQ15 39 DDR_B_D17 112 VDD13 VSS28 133
109 DQ16 41 DDR_B_D21 117 VDD14 VSS29 134
(3,17) DDR_B_BS0 BA0 DQ17 VDD15 VSS30
108 51 DDR_B_D23 118 138
(3,17) DDR_B_BS1 BA1 DQ18 VDD16 VSS31
79 53 DDR_B_D18 123 139
(3,17) DDR_B_BS2 BA2 DQ19 VDD17 VSS32
114 40 DDR_B_D20 124 144
(3) DDR_B_CS#2 S0# DQ20 VDD18 VSS33
121 42 DDR_B_D16 145
(3) DDR_B_CS#3 S1# DQ21 VSS34
101 50 DDR_B_D22 +3.3V_RUN
199 150
(3) DDR_B_CLK2 CK0 DQ22 VDDSPD VSS35
103 52 DDR_B_D19 All VREF traces should have 10 mil trace width 151
(3) DDR_B_CLK#2 CK0# DQ23 VSS36
102 57 DDR_B_D24 77 155
(3) DDR_B_CLK3 CK1 DQ24 NC1 VSS37
104 59 DDR_B_D30 122 156
(3) DDR_B_CLK#3 CK1# DQ25 NC2 VSS38
73 67 DDR_B_D27 125 161
(3) DDR_B_CKE2 CKE0 DQ26 NCTEST VSS39
74 69 DDR_B_D26 162
(3) DDR_B_CKE3 CKE1 DQ27 VSS40
115 56 DDR_B_D28 T148 TS#_DIMMB 198 167
(3,17) DDR_B_CAS# CAS# DQ28 EVENT# VSS41
110 58 DDR_B_D31 30 168
(3,17) DDR_B_RAS# RAS# DQ29 (2,14,15,17) DDR3_DRAMRST# RESET# VSS42
R1039 *10K_NC +/-5% 113 68 DDR_B_D25 172
(3,17) DDR_B_WE# WE# DQ30 VSS43
R1055 10K +/-5% 197 70 DDR_B_D29 173
R1040 10K +/-5% 201 SA0 DQ31 129 DDR_B_D37 1 VSS44 178
+3.3V_RUN SA1 DQ32 (17,18) M_VREF_DQ_DIMM1 VREF_DQ VSS45
C 202 131 DDR_B_D32 126 179 C
(6,10,14,15,17,18,29,35) MEM_SMBCLK SCL DQ33 VREF_CA VSS46
200 141 DDR_B_D35 184
(6,10,14,15,17,18,29,35) MEM_SMBDAT SDA DQ34 VSS47
Address:0xA6 143 DDR_B_D34 +M_VREF_DQ_DIMM0_1 R782 *0_NC +/-5% C277 C278 185
116 DQ35 130 DDR_B_D38 2.2uF 0.1uF 2 VSS48 189
(3) DDR_B_ODT2 ODT0 DQ36 VSS1 VSS49
120 132 DDR_B_D36 10V,X5R 16V,X7R 3 190
(3) DDR_B_ODT3 ODT1 DQ37 VSS2 VSS50
140 DDR_B_D39 8 195
11 DQ38 142 DDR_B_D33 9 VSS3 VSS51 196
28 DM0 DQ39 147 DDR_B_D47 13 VSS4 VSS52
46 DM1 DQ40 149 DDR_B_D40 14 VSS5
63 DM2 DQ41 157 DDR_B_D44 19 VSS6
SA1 SA0 136 DM3 DQ42 159 DDR_B_D43
(17,18) M_VREF_CA_DIMM1
20 VSS7 +0.75V_DDR_VTT
153 DM4 DQ43 146 DDR_B_D45 25 VSS8
CHA0 0 0 170 DM5 DQ44 148 DDR_B_D41 R763 *0_NC +/-5% C279 C280 26 VSS9 203
DM6 DQ45 +M_VREF_CA_DIMM0_1 VSS10 VTT1
CHA1 0 1 187 158 DDR_B_D46 2.2uF 0.1uF 31 204
DM7 DQ46 160 DDR_B_D42 10V,X5R 16V,X7R 32 VSS11 VTT2
(3,17) DDR_B_DQS[0..7] DQ47 VSS12
DDR_B_DQS0 12 163 DDR_B_D48 37 G1
DDR_B_DQS1 29 DQS0 DQ48 165 DDR_B_D50 38 VSS13 GND G2
CHB0 1 0 DDR_B_DQS2 47 DQS1 DQ49 175 DDR_B_D55 43 VSS14 GND#2-G2
DDR_B_DQS3 64 DQS2 DQ50 177 DDR_B_D49 VSS15
CHB1 1 1 DDR_B_DQS4 137 DQS3 DQ51 164 DDR_B_D53 DDRIII
DDR_B_DQS5 154 DQS4 DQ52 166 DDR_B_D51
DDR_B_DQS6 171 DQS5 DQ53 174 DDR_B_D54
DDR_B_DQS7 188 DQS6 DQ54 176 DDR_B_D52
(3,17) DDR_B_DQS#[0..7] DQS7 DQ55
DDR_B_DQS#0 10 181 DDR_B_D61
DDR_B_DQS#1 27 DQS#0 DQ56 183 DDR_B_D60
DDR_B_DQS#2 45 DQS#1 DQ57 191 DDR_B_D58
DDR_B_DQS#3 62 DQS#2 DQ58 193 DDR_B_D59
DDR_B_DQS#4 135 DQS#3 DQ59 180 DDR_B_D57
DDR_B_DQS#5 152 DQS#4 DQ60 182 DDR_B_D56
DDR_B_DQS#6 169 DQS#5 DQ61 192 DDR_B_D63
DDR_B_DQS#7 186 DQS#6 DQ62 194 DDR_B_D62
DQS#7 DQ63
DDRIII

+1.5V_SUS decoupling caps be located at the VDD pins of each SO-DIMM connector in the
vicinity of the CMD, Clock and Control signals
B B
Those capacitors should be placed on the same side of the motherboard as the
SO-DIMM connector

330uF x 1
10uF x 6 Place these Caps near So-DimmB. +1.5V_MEM +3.3V_RUN +0.75V_DDR_VTT
0.1uF x 4 1uF x 4

C281 C282 C283 C284 C285 C286 C287 C288 C289 C290 C291 C292 C293 C974 C975 C976 C977
10uF 10uF 10uF 10uF 10uF 10uF 1uF 1uF 1uF 1uF 330uF 2.2uF 0.1uF 1uF 1uF 1uF 1uF
6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 2.5V,<9mOhm 10V,X5R 16V,X7R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R

A A

Ever Light
Technology Limited
Title
17 -- SODIMM-204P-B0
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 16 of 84

5 4 3 2 1
 5 4 3 2 1

DDR3 Length Matching Formulas

Signal Group Min Length Max Length
D (0xA6)
B (0xA2) Control-to-Clock Clock - 0.5" Clock - 0.0"
Command-to-Clock Clock - 0.5" Clock - 0.5"
CPU
JDIMM1 JDIMM3 CHB_DIMM0_BOT_SIDE Strobe-to-Clock Clock - 0.5" Clock - 1.0"
JDIMM2 JDIMM4 Data-to-Strobe (per byte lane) Strobe - 20 mils Strobe + 20 mils

A (0xA0) C (0xA4)
JDIMM4 is STD type.
D D

JDIMM4A
(3,16) DDR_B_MA[0..15] DDR_B_D[0..63] (3,16)
DDR_B_MA0 98 5 DDR_B_D4
DDR_B_MA1 97 A0 DQ0 7 DDR_B_D5 +1.5V_MEM
DDR_B_MA2 96 A1 DQ1 15 DDR_B_D6 JDIMM4B
DDR_B_MA3 95 A2 DQ2 17 DDR_B_D2 75 44
DDR_B_MA4 92 A3 DQ3 4 DDR_B_D3 76 VDD1 VSS16 48
DDR_B_MA5 91 A4 DQ4 6 DDR_B_D1 81 VDD2 VSS17 49
DDR_B_MA6 90 A5 DQ5 16 DDR_B_D7 82 VDD3 VSS18 54
DDR_B_MA7 86 A6 DQ6 18 DDR_B_D0 87 VDD4 VSS19 55
DDR_B_MA8 89 A7 DQ7 21 DDR_B_D8 88 VDD5 VSS20 60
DDR_B_MA9 85 A8 DQ8 23 DDR_B_D9 93 VDD6 VSS21 61
DDR_B_MA10 107 A9 DQ9 33 DDR_B_D11 94 VDD7 VSS22 65
DDR_B_MA11 84 A10/AP DQ10 35 DDR_B_D15 99 VDD8 VSS23 66
DDR_B_MA12 83 A11 DQ11 22 DDR_B_D13 100 VDD9 VSS24 71
DDR_B_MA13 119 A12/BC# DQ12 24 DDR_B_D12 105 VDD10 VSS25 72
DDR_B_MA14 80 A13 DQ13 34 DDR_B_D10 106 VDD11 VSS26 127
DDR_B_MA15 78 A14 DQ14 36 DDR_B_D14 111 VDD12 VSS27 128
A15 DQ15 39 DDR_B_D20 112 VDD13 VSS28 133
109 DQ16 41 DDR_B_D16 117 VDD14 VSS29 134
(3,16) DDR_B_BS0 BA0 DQ17 VDD15 VSS30
108 51 DDR_B_D22 118 138
(3,16) DDR_B_BS1 BA1 DQ18 VDD16 VSS31
79 53 DDR_B_D19 123 139
(3,16) DDR_B_BS2 BA2 DQ19 VDD17 VSS32
114 40 DDR_B_D17 124 144
(3) DDR_B_CS#0 S0# DQ20 VDD18 VSS33
121 42 DDR_B_D21 145
(3) DDR_B_CS#1 S1# DQ21 VSS34
101 50 DDR_B_D23 +3.3V_RUN
199 150
(3) DDR_B_CLK0 CK0 DQ22 VDDSPD VSS35
103 52 DDR_B_D18 151
(3) DDR_B_CLK#0 CK0# DQ23 VSS36
102 57 DDR_B_D28 77 155
(3) DDR_B_CLK1 CK1 DQ24 NC1 VSS37
104 59 DDR_B_D31 All VREF traces should have 10 mil trace width 122 156
(3) DDR_B_CLK#1 CK1# DQ25 NC2 VSS38
73 67 DDR_B_D25 125 161
(3) DDR_B_CKE0 CKE0 DQ26 NCTEST VSS39
74 69 DDR_B_D29 162
(3) DDR_B_CKE1 CKE1 DQ27 VSS40
115 56 DDR_B_D24 T149 TS#_DIMMB0 198 167
(3,16) DDR_B_CAS# CAS# DQ28 EVENT# VSS41
110 58 DDR_B_D30 30 168
(3,16) DDR_B_RAS# RAS# DQ29 (2,14,15,16) DDR3_DRAMRST# RESET# VSS42
R1054 10K +/-5% 113 68 DDR_B_D27 172
(3,16) DDR_B_WE# WE# DQ30 VSS43
R362 *10K_NC +/-5% 197 70 DDR_B_D26 173
R363 10K +/-5% 201 SA0 DQ31 129 DDR_B_D38 1 VSS44 178
+3.3V_RUN SA1 DQ32 (16,18) M_VREF_DQ_DIMM1 VREF_DQ VSS45
C 202 131 DDR_B_D36 126 179 C
(6,10,14,15,16,18,29,35) MEM_SMBCLK SCL DQ33 VREF_CA VSS46
Address:0xA4 200 141 DDR_B_D39 184
(6,10,14,15,16,18,29,35) MEM_SMBDAT SDA DQ34 VSS47
143 DDR_B_D33 +M_VREF_DQ_DIMM0_1 R791 *0_NC +/-5% C294 C295 185
116 DQ35 130 DDR_B_D37 2.2uF 0.1uF 2 VSS48 189
(3) DDR_B_ODT0 ODT0 DQ36 VSS1 VSS49
120 132 DDR_B_D32 10V,X5R 16V,X7R 3 190
(3) DDR_B_ODT1 ODT1 DQ37 VSS2 VSS50
140 DDR_B_D35 8 195
11 DQ38 142 DDR_B_D34 9 VSS3 VSS51 196
28 DM0 DQ39 147 DDR_B_D45 13 VSS4 VSS52
46 DM1 DQ40 149 DDR_B_D41 14 VSS5
SA1 SA0 63 DM2 DQ41 157 DDR_B_D46 19 VSS6
DM3 DQ42 (16,18) M_VREF_CA_DIMM1 VSS7 +0.75V_DDR_VTT
CHA0 0 0 136 159 DDR_B_D42 20
153 DM4 DQ43 146 DDR_B_D47 25 VSS8
170 DM5 DQ44 148 DDR_B_D40 R790 *0_NC +/-5% C296 C297 26 VSS9 203
CHA1 0 1 187 DM6 DQ45 158 DDR_B_D44
+M_VREF_CA_DIMM0_1
2.2uF 0.1uF 31 VSS10 VTT1 204
DM7 DQ46 160 DDR_B_D43 10V,X5R 16V,X7R 32 VSS11 VTT2
(3,16) DDR_B_DQS[0..7] DQ47 VSS12
CHB0 1 0 DDR_B_DQS0 12 163 DDR_B_D53 37 G1
DDR_B_DQS1 29 DQS0 DQ48 165 DDR_B_D51 38 VSS13 GND G2
DDR_B_DQS2 47 DQS1 DQ49 175 DDR_B_D54 43 VSS14 GND#2-G2
CHB1 1 1 DDR_B_DQS3 64 DQS2 DQ50 177 DDR_B_D52 VSS15
DDR_B_DQS4 137 DQS3 DQ51 164 DDR_B_D48 DDRIII
DDR_B_DQS5 154 DQS4 DQ52 166 DDR_B_D50
DDR_B_DQS6 171 DQS5 DQ53 174 DDR_B_D55
DDR_B_DQS7 188 DQS6 DQ54 176 DDR_B_D49
(3,16) DDR_B_DQS#[0..7] DQS7 DQ55
DDR_B_DQS#0 10 181 DDR_B_D57
DDR_B_DQS#1 27 DQS#0 DQ56 183 DDR_B_D56
DDR_B_DQS#2 45 DQS#1 DQ57 191 DDR_B_D63
DDR_B_DQS#3 62 DQS#2 DQ58 193 DDR_B_D62
DDR_B_DQS#4 135 DQS#3 DQ59 180 DDR_B_D61
DDR_B_DQS#5 152 DQS#4 DQ60 182 DDR_B_D60
DDR_B_DQS#6 169 DQS#5 DQ61 192 DDR_B_D58
DDR_B_DQS#7 186 DQS#6 DQ62 194 DDR_B_D59
DQS#7 DQ63
DDRIII

+1.5V_SUS decoupling caps be located at the VDD pins of each SO-DIMM connector in the
vicinity of the CMD, Clock and Control signals
B B
Those capacitors should be placed on the same side of the motherboard as the
SO-DIMM connector

330uF x 1
10uF x 6 Place these Caps near So-DimmB. +1.5V_MEM +3.3V_RUN +0.75V_DDR_VTT
0.1uF x 4 1uF x 4

C298 C299 C300 C301 C302 C303 C304 C305 C306 C307 C308 C309 C310 C311 C312 C313 C314
10uF 10uF 10uF 10uF 10uF 10uF 1uF 1uF 1uF 1uF 330uF 2.2uF 0.1uF 1uF 1uF 1uF 1uF
6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 2.5V,<9mOhm 10V,X5R 16V,X7R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R

A A

Ever Light
Technology Limited
Title
16 -- SODIMM-204P-B0
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 17 of 84

5 4 3 2 1
 5 4 3 2 1

M1: Fixed SO-DIMM VREF_DQ (Default) M2: Programmable SODIMM VREFDQ

+3.3V_SUS
+1.5V_MEM +3.3V_SUS
+1.5V_MEM

C316
R364 C315 *1uF_NC
1K *1uF_NC 6.3V,X5R
+/-1% 6.3V,X5R U6 All VREF traces should have 10 mil trace width
D D
*ISL90727WIE627Z-TK_NC R365
R366 0 1 6 *12.1K_NC
VDD RH

5
M_VREF_DQ_DIMM0_L +/-1% U7 R367

+/-5%
M_VREF_DQ_DIMM0 (14,15)
For CH A SO-DIMM VREF_DQ (6,10,14,15,16,17,29,35) MEM_SMBCLK
3
SCL RW
5 +VREF_RW_PO0 1
+
4 +VREF_OPA_PO0
*2.2_NC +/-5%
+VREF_OPA_POT0_R R368 *0_NC
R369 C317 4 2 3 - +/-5% M_VREF_DQ_DIMM0 (14,15)
(6,10,14,15,16,17,29,35) MEM_SMBDAT SDA GND
1K 0.1uF *LMV321SQ3T2G_NC
+/-1% 16V,X7R Potentiometers 90727

2
R370 R371 C318
SMBus Addr = 5Ch *12.1K_NC *10_NC *1uF_NC
+/-1% Discharge Circuits +/-5% 6.3V,X5R
D
Q10
*2N7002W-7-F_NC
PP_S4GT G

+3.3V_SUS +3.3V_SUS

+1.5V_MEM
+1.5V_MEM
For CH B SO-DIMM VREF_DQ C319
*1uF_NC
C320
*1uF_NC All VREF traces should have 10 mil trace width
6.3V,X5R U8 6.3V,X5R
R372 *ISL90727WIE627Z-TK_NC R373
1K 1 6 *12.1K_NC
VDD RH

5
+/-1% +/-1% U9 R374
3 5 +VREF_RW_PO1 1 *2.2_NC +/-5%
(6,10,14,15,16,17,29,35) MEM_SMBCLK SCL RW +
R375 0 4 +VREF_OPA_PO1 +VREF_OPA_POT1_R R376 *0_NC
M_VREF_DQ_DIMM1_L 4 2 3 - +/-5% M_VREF_DQ_DIMM1 (16,17)
M_VREF_DQ_DIMM1 (16,17) (6,10,14,15,16,17,29,35) MEM_SMBDAT SDA GND R377 *LMV321SQ3T2G_NC C321
+/-5% Potentiometers 90728 *12.1K_NC R378 *1uF_NC

2
C R379 C322 +/-1% *10_NC 6.3V,X5R C
1K 0.1uF SMBus Addr = 7Ch +/-5%
+/-1% 16V,X7R Discharge Circuits D
Q11
*2N7002W-7-F_NC
PP_S4GT G

+5V_ALW
For CH A SO-DIMM VREF_CA
+1.5V_MEM

B B
R380
*100K_NC
R381 +/-5%
1K
+/-1% PP_S4GT

R382 0 D
R383
M_VREF_CA_DIMM0 (14,15) *1M_NC
+/-5% +/-5%
R384 C323 G Q12
(7,40) SIO_SLP_S4#
1K 0.1uF *2N7002W-7-F_NC
+/-1% 16V,X7R
S

+1.5V_MEM
For CH B SO-DIMM VREF_CA

R385
1K
+/-1%

R386 0
M_VREF_CA_DIMM1 (16,17)
+/-5%
R387 C324
A 1K 0.1uF A
+/-1% 16V,X7R

Ever Light
Technology Limited
Title
18 -- DDR3 VREF
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 18 of 84

5 4 3 2 1
 5 4 3 2 1

+PWR_SRC_MXM
MXM 3.0 C0NNECTOR +3.3V_RUN
+PWR_SRC_MXM MXM SPEC:
C1006 0.1uF
7~20V, Up to 10A +3.3V_RUN +3.3V_RUN_MXM 16V,Y5V JMXM1B
C325 U78
22uF 0607GC: CIS OK R801 10K +/-5% 74LVC1G08 157 158 MXM_G_DAT_DDC2 (24)
GND_157 VGA_DDC_DAT_158

5
25V,X5R 159 160 MXM_G_CLK_DDC2 (24)
JMXM1A DGPU_PWR_GOOD 1 161 RSVD_159 VGA_DDC_CLK_160 162

VCC
B RSVD_161 VGA_VSYNC_162 MXM_VGA_VSYNC (24)
R388 4 DGPU_PWROK (11,40) 163 164

GND
+5V_RUN_MXM Y RSVD_163 VGA_HSYNC_164 MXM_VGA_HSYNC (24)
E1 E2 100K To GPIO DGPU_PWR_EN 2 165 166
E3 PWR_SRC_E1 PWR_SRC_E2 E4 A 167 RSVD_165 GND_166 168
GND_E3 Part 1 of 2 GND_E4 +/-5% module side is GND 169 RSVD_167 VGA_RED_168 170 MXM_VGA_RED (24)
2.5 A (21) MXM_LVDS_UCLK# MXM_VGA_GRN (24)

3
1 2 171 LVDS_UCLK#_169 VGA_GREEN_170 172
5V_1 PRSNT_R#_2 MXM_PRESENT2# (11) (21) MXM_LVDS_UCLK LVDS_UCLK_171 VGA_BLUE_172 MXM_VGA_BLU (24)
3 4 R389 *0_NC 173 174
5 5V_3 WAKE#_4 6 PCIE_WAKE# (31,33,34,40,61) 175 GND_173 GND_174 176
C326 C327 DGPU_PWR_GOOD
5V_5 PWR_GOOD_6 (21) MXM_LVDS_UTX3# LVDS_UTX3#_175 LVDS_LCLK#_176 MXM_LVDS_LCLK# (21)
10uF 2.2uF 7 8 DGPU_PWREN 177 178
9 5V_7 PWR_EN_8 10 +3.3V_RUN_MXM (21) MXM_LVDS_UTX3 179 LVDS_UTX3_177 LVDS_LCLK_178 180 MXM_LVDS_LCLK (21)
6.3V,X5R T150
D 10V,X5R 11 5V_9 RSVD_10 12 T151 181 GND_179 GND_180 182 D
PEX swing slect GND_11 RSVD_12 (21) MXM_LVDS_UTX2# LVDS_UTX2#_181 LVDS_LTX3#_182 MXM_LVDS_LTX3# (21)
13 14 GPU internal PU. 183 184
0: High swing. 15 GND_13 RSVD_14 16 +3.3V_RUN_MXM (21) MXM_LVDS_UTX2
185 LVDS_UTX2_183 LVDS_LTX3_184 186 MXM_LVDS_LTX3 (21)
NC: Lowing swing 17 GND_15 RSVD_16 18 MXM_PWR_LEVEL R802 D71 187 GND_185 GND_186 188
19 GND_17 PWR_LEVEL_18 20 (21) MXM_LVDS_UTX1# 189 LVDS_UTX1#_187 LVDS_LTX2#_188 190 MXM_LVDS_LTX2# (21)
R391 0 MXM_OVERT# 10K SDM10K45-7-F
PEX_STD_SW#_19 TH_OVERT#_20 (21) MXM_LVDS_UTX1 LVDS_UTX1_189 LVDS_LTX2_190 MXM_LVDS_LTX2 (21)
R392 *0_NC 21 22 MXM_ALERT# +/-5% 191 192
23 VGA_DISABLE#_21 TH_ALERT#_22 24 DGPU_PWREN A C DGPU_PWR_EN 193 GND_191 GND_192 194
(22) MXM_LCDVCC_EN DGPU_PWR_EN (40) (21) MXM_LVDS_UTX0# MXM_LVDS_LTX1# (21)

A
25 PNL_PWR_EN_23 TH_PWM_24 26 T152 195 LVDS_UTX0#_193 LVDS_LTX1#_194 196
to 5048 (22) PANEL_BKEN_DGPU PNL_BL_EN_25 GPIO0_26 SDM10K45-7-F (21) MXM_LVDS_UTX0 LVDS_UTX0_195 LVDS_LTX1_196 MXM_LVDS_LTX1 (21)
(22) MXM_LCD_BL_PWM
27 28 T153 197 198
29 PNL_BL_PWM_27 GPIO1_28 30 T154 D70 199 GND_197 GND_198 200
31 HDMI_CEC_29 GPIO2_30 32 (25) MXM_DPC_TX0# 201 DP_C_L0#_199 LVDS_LTX0#_200 202 MXM_LVDS_LTX0# (21)
CEC MXM Internal PU. MXM_SMBDAT_C
(25) MXM_DPC_TX0 MXM_LVDS_LTX0 (21)

C
33 DVI_HPD_31 SMB_DAT_32 34 MXM_SMBCLK_C 203 DP_C_L0_201 LVDS_LTX0_202 204
(22) MXM_LCD_DDC_DATA LVDS_DDC_DAT_33 SMB_CLK_34 GND_203 GND_204
35 36 205 206
(22) MXM_LCD_DDC_CLK LVDS_DDC_CLK_35 GND_36 (25) MXM_DPC_TX1# DP_C_L1#_205 DP_D_L0#_206
37 38 R399 G 207 208
39 GND_37 OEM_38 40 (25) MXM_DPC_TX1 209 DP_C_L1_207 DP_D_L0_208 210
100K
41 OEM_39 OEM_40 42 Q27 211 GND_209 GND_210 212
OEM_41 OEM_42 +/-5% DOCK DP1 (25) MXM_DPC_TX2# DP_C_L2#_211 DP_D_L1#_212
43 44 S D from GPIO 213 214
OEM_43 OEM_44 DGPU_PWR_LEVEL (40) MB HDMI (25) MXM_DPC_TX2 DP_C_L2_213 DP_D_L1_214
45 46 215 216
47 OEM_45 GND_46 48 PEG_CTX_GRX_N15_C 2N7002W-7-F 217 GND_215 GND_216 218
49 GND_47 PEX_TX15#_48 50 (25) MXM_DPC_TX3# 219 DP_C_L3#_217 DP_D_L2#_218 220
PEG_CRX_GTX_N15_C PEG_CTX_GRX_P15_C
51 PEX_RX15#_49 PEX_TX15_50 52 (25) MXM_DPC_TX3 221 DP_C_L3_219 DP_D_L2_220 222
PEG_CRX_GTX_P15_C
53 PEX_RX15_51 GND_52 54 PEG_CTX_GRX_N14_C 223 GND_221 GND_222 224
GND_53 PEX_TX14#_54 PEX_TX : connect to CPU TX +3.3V_RUN_MXM (25) MXM_DPC_AUX# DP_C_AUX#_223 DP_D_L3#_224
PEG_CRX_GTX_N14_C 55 56 PEG_CTX_GRX_P14_C (25) MXM_DPC_AUX
225 226
PEG_CRX_GTX_P14_C 57 PEX_RX14#_55 PEX_TX14_56 58 connect to MXM RX 227 DP_C_AUX_225 DP_D_L3_226 228
59 PEX_RX14_57 GND_58 60 +3.3V_RUN_MXM RSVD_227 GND_228
GND_59 PEX_TX13#_60
PEG_CTX_GRX_N13_C PEX_RX : connect to CPU RX C987 0.1uF 16V,Y5V 229
RSVD_229 DP_D_AUX#_230
230
PEG_CRX_GTX_N13_C 61 62 PEG_CTX_GRX_P13_C 231 232
PEG_CRX_GTX_P13_C 63 PEX_RX13#_61 PEX_TX13_62 64 connect to MXM TX 233 RSVD_231 DP_D_AUX_232 234 MXM_DPC_HPD_GATE

A
PEX_RX13_63 GND_64 U71 RSVD_233 DP_C_HPD_234

5
65 66 PEG_CTX_GRX_N12_C 235 236
PEG_CRX_GTX_N12_C 67 GND_65 PEX_TX12#_66 68 PEG_CTX_GRX_P12_C 1 D74 237 RSVD_235 DP_D_HPD_236 238

VCC
69 PEX_RX12#_67 PEX_TX12_68 70 4 B DOCK_DP2_HPD (27,40) 239 RSVD_237 RSVD_238 240
PEG_CRX_GTX_P12_C DOCK_DP2_HPD_GATE *SDM10K45-7-F_NC

GND
71 PEX_RX12_69 GND_70 72 PEG_CTX_GRX_N11_C Y 2 DGPU_PWROK 241 RSVD_239 RSVD_240 242

C
PEG_CRX_GTX_N11_C 73 GND_71 PEX_TX11#_72 74 PEG_CTX_GRX_P11_C A R1841 *2.2K_NC +/-5% MXM_MBDP_AUX 243 RSVD_241 RSVD_242 244
PEG_CRX_GTX_P11_C 75 PEX_RX11#_73 PEX_TX11_74 76 R1105 74LVC1G08 R1842 *2.2K_NC +/-5% MXM_MBDP_AUX# 245 RSVD_243 GND_244 246
DOCK_DP2_TX0# (27)

3
77 PEX_RX11_75 GND_76 78 PEG_CTX_GRX_N10_C 100K 247 RSVD_245 DP_B_L0#_246 248
79 GND_77 PEX_TX10#_78 80 249 RSVD_247 DP_B_L0_248 250 DOCK_DP2_TX0 (27)
PEG_CRX_GTX_N10_C PEG_CTX_GRX_P10_C +/-5%
PEG_CRX_GTX_P10_C 81 PEX_RX10#_79 PEX_TX10_80 82 251 RSVD_249 GND_250 252
PEX_RX10_81 GND_82 GND_251 DP_B_L1#_252 DOCK_DP2_TX1# (27)
83 84 PEG_CTX_GRX_N9_C 253 254
GND_83 PEX_TX9#_84 (23) MXM_MBDP_TX0# DP_A_L0#_253 DP_B_L1_254 DOCK_DP2_TX1 (27)
PEG_CRX_GTX_N9_C 85 86 PEG_CTX_GRX_P9_C 255 256
PEX_RX9#_85 PEX_TX9_86 (23) MXM_MBDP_TX0 DP_A_L0_255 GND_256
PEG_CRX_GTX_P9_C 87 88 257 258
89 PEX_RX9_87 GND_88 90 259 GND_257 DP_B_L2#_258 260 DOCK_DP2_TX2# (27)
PEG_CTX_GRX_N8_C DOCK DP2 C
GND_89 PEX_TX8#_90 (23) MXM_MBDP_TX1# DP_A_L1#_259 DP_B_L2_260 DOCK_DP2_TX2 (27)
C PEG_CRX_GTX_N8_C 91 92 PEG_CTX_GRX_P8_C 261 262
PEX_RX8#_91 PEX_TX8_92 (23) MXM_MBDP_TX1 DP_A_L1_261 GND_262
PEG_CRX_GTX_P8_C 93 94 263 264
PEX_RX8_93 GND_94 +3.3V_RUN_MXM GND_263 DP_B_L3#_264 DOCK_DP2_TX3# (27)
95 96 PEG_CTX_GRX_N7_C MB DP Port 265 266
GND_95 PEX_TX7#_96 (23) MXM_MBDP_TX2# DP_A_L2#_265 DP_B_L3_266 DOCK_DP2_TX3 (27)
PEG_CRX_GTX_N7_C 97 98 PEG_CTX_GRX_P7_C 267 268
99 PEX_RX7#_97 PEX_TX7_98 100 (23) MXM_MBDP_TX2 269 DP_A_L2_267 GND_268 270
PEG_CRX_GTX_P7_C C988 0.1uF 16V,Y5V
101 PEX_RX7_99 GND_100 102 271 GND_269 DP_B_AUX#_270 272 DOCK_DP2_AUX# (27)
PEG_CTX_GRX_N6_C
103 GND_101 PEX_TX6#_102 104 (23) MXM_MBDP_TX3# 273 DP_A_L3#_271 DP_B_AUX_272 274 DOCK_DP2_AUX (27)
PEG_CRX_GTX_N6_C PEG_CTX_GRX_P6_C DOCK_DP2_HPD_GATE
PEX_RX6#_103 PEX_TX6_104 U72 (23) MXM_MBDP_TX3 DP_A_L3_273 DP_B_HPD_274

5
PEG_CRX_GTX_P6_C 105 106 275 276 MXM_MBDP_HPD_GATE
107 PEX_RX6_105 GND_106 108 PEG_CTX_GRX_N5_C 1 MXM_MBDP_AUX# 277 GND_275 DP_A_HPD_276 278

VCC
GND_107 PEX_TX5#_108 B MXM_MBDP_HPD (23,40) (23) MXM_MBDP_AUX# DP_A_AUX#_277 3V3_278 +3.3V_RUN_MXM
PEG_CRX_GTX_N5_C 109 110 PEG_CTX_GRX_P5_C MXM_MBDP_HPD_GATE 4 (23) MXM_MBDP_AUX MXM_MBDP_AUX 279 280 1A

GND
PEG_CRX_GTX_P5_C 111 PEX_RX5#_109 PEX_TX5_110 112 Y 2 DGPU_PWROK 281 DP_A_AUX_279 3V3_280
PEX_RX5_111 GND_112 A (11) MXM_PRESENT1# PRSNT_L#_281
113 114 PEG_CTX_GRX_N4_C
PEG_CRX_GTX_N4_C 115 GND_113 PEX_TX4#_114 116 PEG_CTX_GRX_P4_C R1111 74LVC1G08 ME1 C328 C329
PU at PCH.

3
PEG_CRX_GTX_P4_C 117 PEX_RX4#_115 PEX_TX4_116 118 100K ME1 ME2 0.1uF 4.7uF
119 PEX_RX4_117 GND_118 120 PEG_CTX_GRX_N3_C +/-5% ME2 16V,X7R 10V,X5R
GND_119 PEX_TX3#_120 To GPIO
PEG_CRX_GTX_N3_C 121 122 PEG_CTX_GRX_P3_C
PEG_CRX_GTX_P3_C 123 PEX_RX3#_121 PEX_TX3_122 124
module side is GND
125 PEX_RX3_123 GND_124
GND_125
133
Mechanical Key 134
PEG_CRX_GTX_N2_C 135 GND_133 GND_134 136 PEG_CTX_GRX_N2_C
PEG_CRX_GTX_P2_C 137 PEX_RX2#_135 PEX_TX2#_136 138 PEG_CTX_GRX_P2_C +5V_ALW +5V_RUN_MXM +3.3V_ALW +3.3V_RUN_MXM
139 PEX_RX2_137 PEX_TX2_138 140
PEG_CRX_GTX_N1_C 141 GND_139 GND_140 142 PEG_CTX_GRX_N1_C +3.3V_RUN_MXM +5V_ALW +15V_ALW Q109 Q110
PEG_CRX_GTX_P1_C 143 PEX_RX1#_141 PEX_TX1#_142 144 PEG_CTX_GRX_P1_C FDC655BN FDC655BN
145 PEX_RX1_143 PEX_TX1_144 146 C989 0.1uF 16V,Y5V 6 6
PEG_CRX_GTX_N0_C 147 GND_145 GND_146 148 PEG_CTX_GRX_N0_C R1067 5 4 5 4
PEG_CRX_GTX_P0_C 149 PEX_RX0#_147 PEX_TX0#_148 150 PEG_CTX_GRX_P0_C 100K R1063 2 2
PEX_RX0_149 PEX_TX0_150 U70
5

151 152 +/-5% 100K 1 1

153 GND_151 GND_152 154 PEG_CLK_REQ# 1 +/-5%
From PCH
VCC

(10) CLK_PCIE_PEG# 155 PEX_REFCLK#_153 PEX_CLK_REQ#_154 156 4 B PLTRST_MXM# (9)

MXM_RST#
GND

(10) CLK_PCIE_PEG

3
PEX_REFCLK_155 PEX_RST#_156 Y 2
A DGPU_HOLD_RST# (11) D
C979 C980
R1071 74LVC1G08 D 0.1uF 0.1uF
3

CONN-PCI-X +3.3V_RUN_MXM 100K R1064 16V,X7R 16V,X7R

+3.3V_RUN_MXM +/-5% 100K RUN_GFX_ON G Q122 C981 C982
(40) RUN_GFX_ON
+/-5% 2N7002W-7-F 4.7nF 4.7nF
G Q111 50V,X7R 50V,X7R
R778 S 2N7002W-7-F

B 1.Whole TX & RX AC decoupling 10K

+/-5%
G
S B

Cap(64 pcs) need to place within PEG_CLK_REQ# S

Q24
D PEG_CLKREQ# (10)
0.5" of MXM Conn 2N7002W-7-F
(38) EMC1700_SENSE_N
MXM PEG SPEC
2.TX cap at CPU Side Length Low swing: 7 inches High swing: 10 inches +PWR_SRC
(38) EMC1700_SENSE_P
R401 *0_NC +/-5%
PEG_CRX_GTX_N[0..15] (2) +PWR_SRC_MXM
PEG_CRX_GTX_N15_C C331 220nF 16V,X7R PEG_CRX_GTX_N15
PEG_CTX_GRX_N15_C PEG_CRX_GTX_N14_C C332 220nF 16V,X7R PEG_CRX_GTX_N14 Q13
PEG_CTX_GRX_N15_C (2) +3.3V_RUN_MXM SI4835DDY-T1-E3
PEG_CTX_GRX_N14_C PEG_CRX_GTX_N13_C C333 220nF 16V,X7R PEG_CRX_GTX_N13
PEG_CTX_GRX_N14_C (2)

4
PEG_CTX_GRX_N13_C PEG_CRX_GTX_N12_C C334 220nF 16V,X7R PEG_CRX_GTX_N12 MXM_SMBCLK_C S D 3 8
PEG_CTX_GRX_N13_C (2) MXM_SMBCLK (39)
PEG_CTX_GRX_N12_C PEG_CRX_GTX_N11_C C335 220nF 16V,X7R PEG_CRX_GTX_N11 C990 0.1uF 16V,Y5V 2 7 1 2
PEG_CTX_GRX_N12_C (2)
PEG_CTX_GRX_N11_C PEG_CRX_GTX_N10_C C336 220nF 16V,X7R PEG_CRX_GTX_N10 Q17 1 6
PEG_CTX_GRX_N11_C (2) 5
PEG_CTX_GRX_N10_C PEG_CRX_GTX_N9_C C337 220nF 16V,X7R PEG_CRX_GTX_N9 2N7002W-7-F R395 C330 5m
PEG_CTX_GRX_N10_C (2) U73

5
PEG_CTX_GRX_N9_C PEG_CRX_GTX_N8_C C339 220nF 16V,X7R PEG_CRX_GTX_N8 G 100K 0.1uF PR29
PEG_CTX_GRX_N9_C (2) 1
PEG_CTX_GRX_N8_C PEG_CRX_GTX_N7_C C340 220nF 16V,X7R PEG_CRX_GTX_N7 25V,X7R

VCC
PEG_CTX_GRX_N8_C (2) +3.3V_RUN_MXM MXM_DPC_HPD (25,40) +/-5%

4
PEG_CTX_GRX_N7_C PEG_CRX_GTX_N6_C C341 220nF 16V,X7R PEG_CRX_GTX_N6 MXM_DPC_HPD_GATE 4 B

GND
PEG_CTX_GRX_N7_C (2) Y
PEG_CTX_GRX_N6_C PEG_CRX_GTX_N5_C C342 220nF 16V,X7R PEG_CRX_GTX_N5 G Q18 2 DGPU_PWROK
PEG_CTX_GRX_N6_C (2) A
PEG_CTX_GRX_N5_C PEG_CRX_GTX_N4_C C343 220nF 16V,X7R PEG_CRX_GTX_N4 2N7002W-7-F R396
PEG_CTX_GRX_N5_C (2)
PEG_CTX_GRX_N4_C PEG_CRX_GTX_N3_C C344 220nF 16V,X7R PEG_CRX_GTX_N3 R1112 74LVC1G08 20K
PEG_CTX_GRX_N4_C (2)

3
PEG_CTX_GRX_N3_C PEG_CRX_GTX_N2_C C345 220nF 16V,X7R PEG_CRX_GTX_N2 MXM_SMBDAT_C S D 100K +/-5%
PEG_CTX_GRX_N3_C (2) MXM_SMBDAT (39)
PEG_CTX_GRX_N2_C PEG_CRX_GTX_N1_C C346 220nF 16V,X7R PEG_CRX_GTX_N1 +/-5% R397
PEG_CTX_GRX_N2_C (2)
PEG_CTX_GRX_N1_C PEG_CRX_GTX_N0_C C347 220nF 16V,X7R PEG_CRX_GTX_N0 100K
PEG_CTX_GRX_N1_C (2)
PEG_CTX_GRX_N0_C +/-5%
PEG_CTX_GRX_N0_C (2) PEG_CRX_GTX_P[0..15] (2)
PEG_CRX_GTX_P15_C C348 220nF 16V,X7R PEG_CRX_GTX_P15 R404 *0_NC +/-5%
PEG_CTX_GRX_P15_C PEG_CRX_GTX_P14_C C349 220nF 16V,X7R PEG_CRX_GTX_P14 D
PEG_CTX_GRX_P15_C (2)
PEG_CTX_GRX_P14_C PEG_CRX_GTX_P13_C C350 220nF 16V,X7R PEG_CRX_GTX_P13
PEG_CTX_GRX_P14_C (2)
PEG_CTX_GRX_P13_C PEG_CRX_GTX_P12_C C351 220nF 16V,X7R PEG_CRX_GTX_P12 Q15
PEG_CTX_GRX_P13_C (2)
PEG_CTX_GRX_P12_C PEG_CRX_GTX_P11_C C352 220nF 16V,X7R PEG_CRX_GTX_P11
PEG_CTX_GRX_P12_C (2)
PEG_CTX_GRX_P11_C PEG_CRX_GTX_P10_C C354 220nF 16V,X7R PEG_CRX_GTX_P10 Thermal Trip Thermal Alert G RUN_GFX_ON
PEG_CTX_GRX_P11_C (2)
PEG_CTX_GRX_P10_C PEG_CRX_GTX_P9_C C353 220nF 16V,X7R PEG_CRX_GTX_P9 2N7002W-7-F
PEG_CTX_GRX_P10_C (2)
PEG_CTX_GRX_P9_C PEG_CRX_GTX_P8_C C355 220nF 16V,X7R PEG_CRX_GTX_P8
PEG_CTX_GRX_P9_C (2) S
PEG_CTX_GRX_P8_C PEG_CRX_GTX_P7_C C356 220nF 16V,X7R PEG_CRX_GTX_P7 From 5048
PEG_CTX_GRX_P8_C (2) +3.3V_RUN_MXM
PEG_CTX_GRX_P7_C PEG_CRX_GTX_P6_C C357 220nF 16V,X7R PEG_CRX_GTX_P6
PEG_CTX_GRX_P7_C (2) +3.3V_RUN_MXM
PEG_CTX_GRX_P6_C PEG_CRX_GTX_P5_C C358 220nF 16V,X7R PEG_CRX_GTX_P5
PEG_CTX_GRX_P6_C (2)
PEG_CTX_GRX_P5_C PEG_CRX_GTX_P4_C C359 220nF 16V,X7R PEG_CRX_GTX_P4
PEG_CTX_GRX_P5_C (2)
PEG_CTX_GRX_P4_C PEG_CRX_GTX_P3_C C360 220nF 16V,X7R PEG_CRX_GTX_P3
PEG_CTX_GRX_P4_C (2)
PEG_CTX_GRX_P3_C PEG_CRX_GTX_P2_C C361 220nF 16V,X7R PEG_CRX_GTX_P2
PEG_CTX_GRX_P3_C (2)
A

PEG_CTX_GRX_P2_C PEG_CRX_GTX_P1_C C362 220nF 16V,X7R PEG_CRX_GTX_P1

PEG_CTX_GRX_P2_C (2)
A

A PEG_CTX_GRX_P1_C PEG_CRX_GTX_P0_C C363 220nF 16V,X7R PEG_CRX_GTX_P0 SDM10K45-7-F A

PEG_CTX_GRX_P1_C (2) SDM10K45-7-F D69
PEG_CTX_GRX_P0_C
PEG_CTX_GRX_P0_C (2) D68
C
C

R398 G
R394 G 100K
100K +/-5% Q16

MXM_OVERT#
+/-5%
S
Q14
D DGPU_THERMTRIP# (46)
MXM_ALERT# S D DGPU_ALERT# (40) Ever Light
GPU internal PU. 2N7002W-7-F
GPU internal PU. 2N7002W-7-F
Technology Limited
Title
19 -- MXM3.0 Connector
Size Document Number Rev
1A

Date: Thursday, January 27, 2011 Sheet 19 of 84

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Ever Light
Technology Limited
Title
20 -- 17" eDP for PANEL
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 20 of 84

5 4 3 2 1
 5 4 3 2 1

D D

C C

LVDS MUX for Panel

U10
+3.3V_RUN U11
+3.3V_RUN
39 1
(19) MXM_LVDS_LTX0 0B1 VCC1
38 4 39 1
(19) MXM_LVDS_LTX0# 1B1 VCC2 (19) MXM_LVDS_UTX0 0B1 VCC1
35 7 C374 C375 38 4
(19) MXM_LVDS_LTX1 2B1 VCC3 (19) MXM_LVDS_UTX0# 1B1 VCC2
34 13 0.1uF 0.1uF 35 7 C378 C379

from MXM
(19) MXM_LVDS_LTX1# 3B1 VCC4 (19) MXM_LVDS_UTX1 2B1 VCC3
30 22 16V,Y5V 16V,Y5V 34 13 0.1uF 0.1uF
(19) MXM_LVDS_LTX2 4B1 VCC5 (19) MXM_LVDS_UTX1# 3B1 VCC4
29 31 30 22 16V,Y5V 16V,Y5V

from MXM
(19) MXM_LVDS_LTX2# 5B1 VCC6 (19) MXM_LVDS_UTX2 4B1 VCC5
26 40 29 31
(19) MXM_LVDS_LTX3 6B1 VCC7 (19) MXM_LVDS_UTX2# 5B1 VCC6
25 26 40
(19) MXM_LVDS_LTX3# 7B1 (19) MXM_LVDS_UTX3 6B1 VCC7
16 25
(19) MXM_LVDS_LCLK
18 8B1 TS3DV520ERUAR 2 (19) MXM_LVDS_UTX3#
16 7B1
(19) MXM_LVDS_LCLK# 9B1 A0 3 LCD_A0+ (22) (19)
(19)
MXM_LVDS_UCLK
MXM_LVDS_UCLK#
18 8B1 TS3DV520ERUAR 2
A1 5 LCD_A0- (22) 9B1 A0 3 LCD_B0+ (22)
37 A2 6 LCD_A1+ (22) A1 5 LCD_B0- (22)
(7) LCD_A0+_PCH 0B2 A3 LCD_A1- (22) A2 LCD_B1+ (22)
36 8 37 6

to Panel
B (7) LCD_A0-_PCH 1B2 A4 LCD_A2+ (22) (7) LCD_B0+_PCH 0B2 A3 LCD_B1- (22) B
33 9 36 8

to Panel
(7) LCD_A1+_PCH 2B2 A5 LCD_A2- (22) (7) LCD_B0-_PCH 1B2 A4 LCD_B2+ (22)
32 10 33 9
(7) LCD_A1-_PCH 3B2 A6 LCD_A3+ (22) (7) LCD_B1+_PCH 2B2 A5 LCD_B2- (22)
28 11 32 10

from PCH
(7) LCD_A2+_PCH 4B2 A7 LCD_A3- (22) (7) LCD_B1-_PCH 3B2 A6 LCD_B3+ (22)
27 14 28 11

from PCH
(7) LCD_A2-_PCH 5B2 A8 LCD_ACLK+ (22) (7) LCD_B2+_PCH 4B2 A7 LCD_B3- (22)
24 15 27 14
(7) LCD_A3+_PCH 6B2 A9 LCD_ACLK- (22) (7) LCD_B2-_PCH 5B2 A8 LCD_BCLK+ (22)
23 24 15
(7) LCD_A3-_PCH 7B2 (7) LCD_B3+_PCH 6B2 A9 LCD_BCLK- (22)
20 23
(7) LCD_ACLK+_PCH 8B2 (7) LCD_B3-_PCH 7B2
21 17 20
(7) LCD_ACLK-_PCH 9B2 NC1 (7) LCD_BCLK+_PCH 8B2
19 21 17
NC2 (7) LCD_BCLK-_PCH 9B2 NC1
41 19
NC3 42 NC2 41
NC4 NC3 42
12 NC4
(22,24,40) DGPU_SELECT# SEL
VIA10

43 12
VIA1
VIA2
VIA3
VIA4
VIA5
VIA6
VIA7
VIA8
VIA9

thermal pad (22,24,40) DGPU_SELECT# SEL

VIA10
43

VIA1
VIA2
VIA3
VIA4
VIA5
VIA6
VIA7
VIA8
VIA9
thermal pad
TS3DV520ERUAR
44
45
46
47
48
49
50
51
52
53

TS3DV520ERUAR

44
45
46
47
48
49
50
51
52
53
SEL = L , Port B1 active.
SEL = H , Port B2 active.
SEL = L , Port B1 active.
SEL = H , Port B2 active.

A A

Ever Light
Technology Limited
Title
21 -- LVDS MUX for PANEL
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 21 of 84

5 4 3 2 1
 5 4 3 2 1

+PWR_SRC Q19 +BL_PWR_SRC +3.3V_RUN +CAM_VCC

FDC658AP R407 *0_NC +/-5%
6 40mil R409 0 +/-5%
40mil 4 5 R408 *0_NC +/-5% r0603h6
2
1 C383 C384 L7 Q20
R410 C382 0.1uF 0.1uF 90 ohm,150mA +15V_ALW *FDC655BN_NC
330K 0.1uF 25V,X7R 25V,X7R 4 3 USB_CAMERA_D- 30V,9.0A,[email protected]
(9) USBP12-

3
+/-5% 25V,X7R 6
1 2 USB_CAMERA_D+ R412 5 4 Current: 220mA(max)
(9) USBP12+
*100K_NC 2
+/-5% 1
C385 C386
R411 0.1uF *10uF_NC

3
330K R421 0 +/-5% CCD_OFF# 16V,X7R 10V,X5R
+/-5% C387
D D
R423 0 +/-5% D *0.1uF_NC
D 25V,X7R
L8
*90 ohm,150mA_NC
Q21 4 3 USB_TOUCH_D- G Q22
(9) USBP13- (40) CCD_OFF
G 2N7002W-7-F *2N7002W-7-F_NC
(39) EN_INVPWR
1 2 USB_TOUCH_D+
(9) USBP13+ S
S

+3.3V_RUN_MXM
+3.3V_RUN

MXM_LCD_DDC_CLK R422 *2.2K_NC +/-5%

MXM_LCD_DDC_DATA R424 *2.2K_NC +/-5%
R418 10K +/-5%
(39) BIA_PWM_EC
C992
0.1uF
16V,X7R
D59
A C LCD_PWM_VADJ U75
(7) BIA_PWM_PCH
MXM_LCD_DDC_CLK 9 8
(19) MXM_LCD_DDC_CLK NC1 V+
*SDM10K45-7-F_NC
D60 MXM_LCD_DDC_DATA 7 10 LDDC_CLK
(19) MXM_LCD_DDC_DATA NC2 COM1
A C
(19) MXM_LCD_BL_PWM
2 6 LDDC_DATA
(7) LDDC_CLK_PCH NO1 COM2
*SDM10K45-7-F_NC
R415 C1004 4 1 +3.3V_RUN
(7) LDDC_DATA_PCH NO2 IN1
*100K_NC *1nF_NC
+/-5% 50V,X7R 3 5
GND IN2 DGPU_SELECT# (21,24,40)
PU at PCH side R783 2.2K +/-5% LDDC_CLK
TS5A23157RSER SEL = L , NC to COM. R784 2.2K +/-5% LDDC_DATA
C C
SEL = H , NO to COM.
BIA_PWM_PCH

C96

EMI request.
*0.1uF_NC
16V,Y5V LVDS
0817GC: Need to update CIS.
cable loopback JLVDS1

1
2 1
(9) CAM_MIC_CBL_DET# USB_CAMERA_D+ 3 2
+3.3V_SUS USB_CAMERA_D- 4 3
5 4
+CAM_VCC 5
R786 10K +/-5% 6
(40) PANEL_BKEN_EC 6
R414 0 DMIC_CLK_R 7
(61) DMIC_CLK 7
R1835 JTS1 8
D62 SDM10K45-7-F D72 R416 0 DMIC_DATA_R 9 8

11
100K (61) DMIC_DATA 9
A C DISP_ON SDM10K45-7-F +/-5%
10
(7) PANEL_BKEN_PCH 10
11

11
D61 SDM10K45-7-F C A 1 12 11
(39) TOUCH_SCREEN_PD# 1 12
A C 2 13
(19) PANEL_BKEN_DGPU +3.3V_SUS 2 +BL_PWR_SRC 13
USB_TOUCH_D- 3 DMIC_DATA_R DMIC_CLK_R 14
USB_TOUCH_D+ 4 3 15 14
5 4 C388 C389 16 15 63
R417 6 5 33pF 33pF 17 16 GND5 62
100K 7 6 50V,NPO 50V,NPO DISP_ON 18 17 GND4 61
+/-5% 8 7 LCD_PWM_VADJ 19 18 GND3 60
9 8 20 19 GND2 59
9 (40) LCD_TST 20 GND1
10 21

12
10 +LCDVCC 21
22
Header_1X10 23 22
+3.3V_RUN 23

12
24
LDDC_CLK 25 24
B
LDDC_DATA 26 25 B
27 26
28 27
(21) LCD_A0+ 28
29
(21) LCD_A0- 29
30
31 30
(21) LCD_A1+ 31
32
(21) LCD_A1- 32
33
34 33
(21) LCD_A2+ 34
35
+3.3V_ALW (21) LCD_A2- 35
36
37 36
+15V_ALW (21) LCD_A3+ 37
38
+LCDVCC (21) LCD_A3- 38
39
Q29 40 39
(21) LCD_ACLK+ 40
FDC655BN 41
(21) LCD_ACLK- 41
42
R431 C390 6 43 42
(21) LCD_B0+ 43
200K 0.1uF 5 4 44
(21) LCD_B0- 44
+/-5% 2 C391 45
1 0.1uF 46 45
(21) LCD_B1+ 46
16V,X7R 47
(21) LCD_B1- 47
48
3

49 48
(21) LCD_B2+ 49
LCDVCC_ON 50
(21) LCD_B2- 50
C392 51
0.1uF 52 51
(21) LCD_B3+ 52
25V,Y5V 53
+15V_ALW (21) LCD_B3- 53
54
R433 55 54
(21) LCD_BCLK+ 55
3

100 56
(21) LCD_BCLK- 56
5 +/-5% 57
58 57
R434 Q30A 58
4

200K 2N7002DW-7-F
+/-5% TBD-CONN-WTB
6

A A
D6 2 Q30B
A C 2N7002DW-7-F
(19) MXM_LCDVCC_EN
D
1

SDM10K45-7-F
D7 Q31
1 2N7002W-7-F
(7,40) ENVDD_PCH

(40) LCD_VCC_TEST_EN
2
3 EN_LCDVCC G Discharge Path Ever Light
R1096
BAT54C
100K
+/-5%
S
Technology Limited
Title
22 -- LCD,Camera,Touch Conn
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 22 of 84

5 4 3 2 1
 5 4 3 2 1

D D

From dGPU Direct PC0 : Internal pull down 150k

+3.3V_RUN L : automatic equalization enable
H : automatic equalization disable
U13
17 9 PD : Power down control, Internal pull down 150k
18 IN_DDC_SDA VDD1 23
C408 0.1uF 16V,X7R MXM_MBDP_AUX#_C 24 IN_DDC_SCL VDD2 31 C393 C394 L : Normal operation
(19) MXM_MBDP_AUX# IN_AUXn VDD3
(19) MXM_MBDP_AUX C407 0.1uF 16V,X7R MXM_MBDP_AUX_C 25
IN_AUXp VDD4
32 0.1uF 10nF H : Chip power down
48 33 16V,Y5V 16V,Y5V
(19,40) MXM_MBDP_HPD IN_HPDX VDD5 45
VDD6
PS8311QFN48GTR-A0 PIO :
C398 0.1uF 16V,X7R MXM_MBDP_TX0_C 37 11 DP_TX0+ +3.3V_RUN Internal pull down 150k
(19) MXM_MBDP_TX0 IN_D0p OUT_D0p
(19) MXM_MBDP_TX0# C399 0.1uF 16V,X7R MXM_MBDP_TX0#_C 38
IN_D0n OUT_D0n
10 DP_TX0- L : IN_HPDX=OUT_HPD, 3.3V CMOS output
C400 0.1uF 16V,X7R MXM_MBDP_TX1_C 40 8 DP_TX1+ H : IN_HPDX=OUT_HPD#, inverted HPD, 0.9V output
(19) MXM_MBDP_TX1 IN_D1p OUT_D1p
(19) MXM_MBDP_TX1# C401 0.1uF 16V,X7R MXM_MBDP_TX1#_C 41 7 DP_TX1-
C402 0.1uF 16V,X7R MXM_MBDP_TX2_C 43 IN_D1n OUT_D1n 5 DP_TX2+ 8311_PC0 R436 *4.7K_NC +/-5%
(19) MXM_MBDP_TX2 IN_D2p OUT_D2p
C403 0.1uF 16V,X7R MXM_MBDP_TX2#_C 44 4 DP_TX2- PS8311_CFG0 R440 *4.7K_NC +/-5%
(19) MXM_MBDP_TX2# IN_D2n OUT_D2n
C404 0.1uF 16V,X7R MXM_MBDP_TX3_C 46 2 DP_TX3+ PS8311_CFG1 R441 *4.7K_NC +/-5% I2C_CTL_EN :
(19) MXM_MBDP_TX3 IN_D3p OUT_D3p
C405 0.1uF 16V,X7R MXM_MBDP_TX3#_C 47 1 DP_TX3- PIO R1073 *4.7K_NC +/-5%
(19) MXM_MBDP_TX3# IN_D3n OUT_D3n PEQ R1074 *4.7K_NC +/-5% Internal pull down 150k
DP_AUX- R438 100K +/-5% LOW : Pin control
PD 6 21 DP_AUX- HIGH : I2C control
I2C_CTL_EN 12 PD OUT_AUXn_SDA 22 DP_AUX+
8311_PC0 13 I2C_CTL_EN OUT_AUXp_SCL 34 DP_HPD DP_AUX+ R437 100K +/-5%
14 PC0/SCL_CTL OUT_HPD 35 DP_CA_DET DP_CA_DET R443 1M +/-5%
SDA_CTL OUT_CADET Chip operation mode, Internal pull down 150k
R442 4.99K +/-1% 15 PD R1075 *4.7K_NC +/-5%
C406 2.2uF 6.3V,Y5V 16 REXT PIO R1076 *4.7K_NC +/-5% CFG0
DP_AUX- C983 0.1uF 16V,X7R AC_AUX# 19 CEXT 3 I2C_CTL_EN R1087 4.7K +/-5% L : AUX CH is off when chip is in automatic powef down
DP_AUX+ C984 0.1uF 16V,X7R AC_AUX 20 AC_AUXn GND1 26
PS8311_CFG0 29 AC_AUXp GND2 27
H : AUX CH is operational when chip is in automatic powef down
C C
Close to IC PS8311_CFG1 30 CFG0 GND3 28 CFG1
CFG1 GND4
PIO 36
PIO GND5
39 L : Normal AUX interception operation
PEQ 42
PEQ H : AUX interception with fixed output swing of 600mV and no pre-emphasis
49
EPAD

VIA4
VIA3
VIA2
VIA1
PEQ : Programmable input equalization level pre-setting
Internal pull down 150k

53
52
51
50
L : Low RX EQ setting (LEQ)
H : High RX EQ setting (HEQ)

R448 0 +/-5%
0524GC:CIS OK
R449 0 +/-5%
JDP1
L11 DP_TX0+_R 1
DP_TX0+ C415 0.1uF DP_TX0+_L 2 3 DP_TX0+_R 2 LANE0+
16V,X7R DP_TX0-_R 3 LANE0_SHIELD
DP_TX0- C414 0.1uF DP_TX0-_L 1 4 DP_TX0-_R DP_TX1+_R 4 LANE0-
16V,X7R 5 LANE1+
*90 Ohm,100mA_NC DP_TX1-_R 6 LANE1_SHIELD
B
EXC24CG900U DP_TX2+_R 7 LANE1- B
8 LANE2+
R444 0 +/-5% DP_TX2-_R 9 LANE2_SHIELD
DP_TX3+_R 10 LANE2-
R445 0 +/-5% 11 LANE3+
DP_TX3-_R 12 LANE3_SHIELD
L9 DP_CA_DET 13 LANE3- 24
DP_TX1+ C410 0.1uF DP_TX1+_L 1 4 DP_TX1+_R R1088 1M +/-5% 14 CA_DET GND6 23
16V,X7R DP_AUX+_R 15 GND1 GND5 22
DP_TX1- C409 0.1uF DP_TX1-_L 2 3 DP_TX1-_R 16 AUX_CH+ GND4 21
16V,X7R DP_AUX-_R 17 GND2 GND3
*90 Ohm,100mA_NC DP_HPD 18 AUX_CH-
EXC24CG900U 19 HP_DET
U14 F1 20 RTN
R450 0 +/-5% DP_TX1+_R 1
IN1 O1 9
10 DP_TX1+_R
+3.3V_RUN * DP_PWR
DP_TX1-_R 2 DP_TX1-_R C413 CONN-Display Port
R451 0 +/-5% 3 IN2 O2 8 Polyswitch 4.7uF
DP_TX3+_R 4 GND_1 GND_2 7 DP_TX3+_R 6.3V,X5R
L12 DP_TX3-_R 5 IN3 O3 6 DP_TX3-_R A C
DP_TX2+ C417 0.1uF DP_TX2+_L 2 3 DP_TX2+_R IN4 O4 D8
16V,X7R *RCLAMP0524P.TCT_NC *RB751V-40 TE-17_NC
DP_TX2- C416 0.1uF DP_TX2-_L 1 4 DP_TX2-_R
16V,X7R U15 Polyswitch,PTC,6V,1.1A,G,SMD1206
*90 Ohm,100mA_NC DP_TX0+_R 1 10 DP_TX0+_R
EXC24CG900U DP_TX0-_R 2 IN1 O1 9 DP_TX0-_R
3 IN2 O2 8
R446 0 +/-5% DP_TX2+_R 4 GND_1 GND_2 7 DP_TX2+_R
DP_TX2-_R 5 IN3 O3 6 DP_TX2-_R
R447 0 +/-5% IN4 O4
*RCLAMP0524P.TCT_NC
L10
DP_TX3+ C411 0.1uF DP_TX3+_L 1 4 DP_TX3+_R U16
16V,X7R DP_AUX-_R 1 10 DP_AUX-_R
DP_TX3- C412 0.1uF DP_TX3-_L 2 3 DP_TX3-_R DP_AUX+_R 2 IN1 O1 9 DP_AUX+_R
16V,X7R 3 IN2 O2 8
*90 Ohm,100mA_NC DP_HPD 4 GND_1 GND_2 7 DP_HPD
EXC24CG900U DP_CA_DET 5 IN3 O3 6 DP_CA_DET
IN4 O4
A A
R452 0 +/-5% *RCLAMP0524P.TCT_NC

R453 0 +/-5%

L13
DP_AUX+ 2 3 DP_AUX+_R

DP_AUX- 1 4 DP_AUX-_R Ever Light

*90 Ohm,100mA_NC
Technology Limited
EXC24CG900U Title
22 -- Display Port & Re-Driver

Size Document Number Rev

1A

Date: Thursday, January 27, 2011 Sheet 23 of 84

5 4 3 2 1
 5 4 3 2 1

+3.3V_RUN +5V_RUN

CRT

2
+CRT_VCC
Layout Note:
A C +5V_RUN_CRT R454 0 +/-5%
Setting R,G,B treac D12 r1206h7 C418
F2
impedance to 50 ohm. D9 D10 D11 SDM10K45-7-F 1uF
*DA204UT106_NC *DA204UT106_NC *DA204UT106_NC 6.3V,X5R
2. *

3
JCRT1
6
RED_CRT FB5 0 +/-5% r0603h6 RED_CRT_L FB2 FB 22 Ohm, 400mA R *Polyswitch_NC 1 11
BK1005LL220-T 7
GREEN_CRT FB3 0 +/-5% r0603h6 GREEN_CRT_L FB4 FB 22 Ohm, 400mA G 2 12
BK1005LL220-T 8
D D
BLUE_CRT FB6 0 +/-5% r0603h6 BLUE_CRT_L FB7 FB 22 Ohm, 400mA B 3 13 JVGA_HS
BK1005LL220-T +CRT_VCC 9
C422 C423 C424 C425 C426 C427 M_ID2# 4 14 JVGA_VS
R455 R456 R457 C419 C420 C421 4.7pF 4.7pF 4.7pF 4.7pF 4.7pF 4.7pF 10
150 150 150 *3.3pF_NC *3.3pF_NC *3.3pF_NC 50V,NPO 50V,NPO 50V,NPO 50V,NPO 50V,NPO 50V,NPO C428 5 15
+/ -1% +/ -1% +/ -1% 50V,NPO 50V,NPO 50V,NPO 0.1uF
16V,Y5V CONN - D-SUB

17

16
+5V_RUN

R461 R462
*1K_NC *1K_NC
+/-5% +/-5%
DAT_DDC2_CRT

CLK_DDC2_CRT

HSYNC_CRT R463 0 +/-5% HSYNC_L2 1 2

FB8 FB 120 Ohm, 600mA
C +/-25% C

VSYNC_CRT R464 0 +/-5% VSYNC_L2 1 2

FB9 FB 120 Ohm, 600mA
+/-25%

C432 C433
*22pF_NC *22pF_NC
50V,NPO 50V,NPO

Place near JVGA1 connector <

200 mil

+3.3V_RUN +5V_RUN

C767
C955 1uF
1uF U79 10V,X5R
6.3V,X5R
11 21
VL VCC1 29
VCC2
(19) MXM_VGA_RED
7 33 RED_CRT
8 REDA RED1 32 GREEN_CRT
B (19) MXM_VGA_GRN GRNA GRN1 B
9 31 BLUE_CRT

Channel A---->MXM
(19)
(19)
MXM_VGA_BLU
MXM_VGA_HSYNC
3
4
BLUA
SHA
BLU1
SH1
37
36
HSYNC_CRT
VSYNC_CRT
Port 1---->MB CRT
(19) MXM_VGA_VSYNC SVA SV1
6 34 DAT_DDC2_CRT
(19)
(19)
MXM_G_DAT_DDC2
MXM_G_CLK_DDC2
5 SDAA MAXIM SDA1 35 CLK_DDC2_CRT
SCLA SCL1
(7) PCH_CRT_RED
17 MAX14885EETL+ 24 RED_DOCK (27)
18 REDB RED2 23
(7) PCH_CRT_GRN GRNB GRN2 GREEN_DOCK (27)
19 22
(7) PCH_CRT_BLU BLUB BLU2 BLUE_DOCK (27)
13 28
Channel B---->PCH (7)
(7)
PCH_CRT_HSYNC
PCH_CRT_VSYNC
14
16
SHB
SVB
SH2
SV2
27
25
HSYNC_DOCK (27)
VSYNC_DOCK (27) Port 2---->Docking CRT
(7) PCH_CRT_DDC_DAT SDAB SDA2 DAT_DDC2_DOCK (27)
15 26
(7) PCH_CRT_DDC_CLK SCLB SCL2 CLK_DDC2_DOCK (27)
12
R599 100K +/-5% 2 N.C. 10
+3.3V_RUN EN GND1 20
(40) EDID_SELECT#
1
CRT_SWITCH 40 S00 GND2 30
(40) CRT_SWITCH S01 GND3 41
(21,22,40) DGPU_SELECT#
39
CRT_SWITCH 38 S10 thermal pad
S11 MAX14885EETL+

Truth table

A-->Port 1 B-->Port 1 A-->Port 2 B-->Port 2

S01/S11 (CRT_SWITCH) 0 0 1 1

A S10 (DGPU_SELECT#) 0 1 0 1 A

S00 (EDID_SELECT#) 0 1 0 1

Ever Light
Technology Limited
Title
23 -- CRT & MUX
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 24 of 84

5 4 3 2 1
 5 4 3 2 1

MXM_DPC_CA_DET
Switched HDMI
DDC pull-up

DP
TI 75DP122
(Dock)
AUX_SINK(p)
Docking
MXM AUX_SINK(n) MUX
D DVI D

AUX- (Dock)
2:1 SW AUX_I2C(SCL)
AUX+
AUX_I2C(SDA)
I2C_SCL HDMI
I2C_SDA (MB)
MXM_DPC_CA_DET
+3.3V_RUN

+5V_RUN

R1918 R1919
*0_NC 0
+/-5% +/-5%

+5V_RUN +3.3V_RUN

U21
2 38
8 VDD1 VDD*1
C1053 C1054 C1055 34 VDD2 14 C1056 C1057 C1058
0.1uF 0.1uF 0.1uF 48 VDD3 VCC 17 0.1uF 0.1uF 0.1uF +5V_RUN
16V,X7R 16V,X7R 16V,X7R 54 VDD4 VCC#17 23 16V,X7R 16V,X7R 16V,X7R
VDD5 VCC
C C
SN75DP122ARTQT
C67
From dGPU (19) MXM_DPC_TX0 C456 0.1uF 16V,X7R MXM_DPC_TX0+_C 3
ML_IN 0(p) DP_SINK 0(p)
56
DOCK_DP1_TX0+ (27)
0.1uF
(19) MXM_DPC_TX0# C462 0.1uF 16V,X7R MXM_DPC_TX0-_C 4 55 16V,Y5V
ML_IN 0(n) DP_SINK 0(n) DOCK_DP1_TX0- (27)
C457 0.1uF 16V,X7R MXM_DPC_TX1+_C 6 53 U35
(19) MXM_DPC_TX1 ML_IN 1(p) DP_SINK 1(p) DOCK_DP1_TX1+ (27)
(19) MXM_DPC_TX1# C459 0.1uF 16V,X7R MXM_DPC_TX1-_C 7 52 8
ML_IN 1(n) DP_SINK 1(n) DOCK_DP1_TX1- (27) +3.3V_RUN VCC
C460 0.1uF 16V,X7R MXM_DPC_TX2+_C 9 50
(19)
(19)
MXM_DPC_TX2
MXM_DPC_TX2# C458 0.1uF 16V,X7R MXM_DPC_TX2-_C 10 ML_IN 2(p)
ML_IN 2(n)
DP_SINK 2(p)
DP_SINK 2(n)
49 DOCK_DP1_TX2+
DOCK_DP1_TX2-
(27)
(27)
To Docking DP1 Port
C463 0.1uF 16V,X7R MXM_DPC_TX3+_C 12 47 R1840 4.7K +/-5% 2 3 MXM_DPC_AUX_S
(19) MXM_DPC_TX3 ML_IN 3(p) DP_SINK 3(p) DOCK_DP1_TX3+ (27) +5V_RUN 1A 1B
(19) MXM_DPC_TX3# C461 0.1uF 16V,X7R MXM_DPC_TX3-_C 13 46 R1839 4.7K +/-5% 5 6 MXM_DPC_AUX#_S
ML_IN 3(n) DP_SINK 3(n) DOCK_DP1_TX3- (27) 2A 2B

19 36 MXM_DPC_AUX_S 1
(26) HDMI_TX0+ 18 TMDS_SINK 0(p) AUX_I2C(SCL) 35 MXM_DPC_AUX#_S MXM_DPC_CA_DET# 7 1OE 4
(26) HDMI_TX0- 22 TMDS_SINK 0(n) AUX_I2C(SDA) 45 DOCK_DP1_AUX+ R477 2OE GND
(26) HDMI_TX1+ TMDS_SINK 1(p) AUX_SINK(p) DOCK_DP1_AUX+ (27)
21 43 DOCK_DP1_AUX-
TO MB HDMI Conn (26)
(26)
HDMI_TX1-
HDMI_TX2+
25 TMDS_SINK 1(n)
TMDS_SINK 2(p)
AUX_SINK(n)
I2C_SCL
29 DOCK_DP1_AUX- (27)
HDMI_DDC_CLK (26)
10K
+/-5% SN74CBTD3306CPWR
24 28 HDMI_DDC_DAT (26)
(26) HDMI_TX2- 16 TMDS_SINK 2(n) I2C_SDA MXM_DPC_CA_DET#
(26) HDMI_CLK+ 15 TMDS_SINK CLK(p)
(26) HDMI_CLK- TMDS_SINK CLK(n) D
39 MXM_DPC_CA_DET Q42
MXM_DPC_HPD 37 CAD 41 DOCK_DP1_CA_DET 2N7002W-7-F
(19,40) MXM_DPC_HPD HPD CAD_SINK DOCK_DP1_CA_DET (27)
(27) DOCK_DP1_HPD DOCK_DP1_HPD 40
HDMI_DET 32 DP_HPD_SINK G MXM_DPC_CA_DET
(26) HDMI_DET TMDS_HPD_SINK 30 R467 10K +/-5%
LP# +3.3V_RUN
5 33 R468 10K +/-5%
11 GND1 Priority 1 R469 3.83K +/-1% S R478
20 GND2 DPVadj 26 R470 5.49K +/-1% 1M
27 GND3 VSadj 31 R471 10K +/-5% +/-5%
GND4 I2C_EN +3.3V_RUN
42
44 GND5
51 GND6 57
VIA1
VIA2
VIA3
VIA4

GND7 THERM_PAD

SN75DP122ARTQT
58
59
60
61

B B

HDMI_DET R472 100K +/-5%

MXM_DPC_HPD R474 100K +/-5%

+5V_RUN

C50
0.1uF
16V,Y5V

U81
9 8
(19) MXM_DPC_AUX NC1 V+
7 10 MXM_DPC_AUX_S
(19) MXM_DPC_AUX# NC2 COM1
C454 0.1uF 16V,X7R 2 6 MXM_DPC_AUX#_S
NO1 COM2
C453 0.1uF 16V,X7R 4 1 +5V_RUN
NO2 IN1
3 5
GND IN2
TS5A23157RSER R800
IN1/2 = L , NC to COM. 10K
IN1/2 = H , NO to COM. +/-5%

(L=HDMI; H=DP) D
Q33
2N7002W-7-F
A A
G MXM_DPC_CA_DET

Ever Light
Technology Limited
Title
24 -- MUX for HDMI
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 25 of 84

5 4 3 2 1
 5 4 3 2 1

HDMI CONN
+5V_RUN

A
RB751V-40 TE-17 CIS OK
(11.24) D14
JHDMI1

C
D D
G1
HDMI_TX2+_R 1 GND1 G2
2 D2+ GND2
HDMI_TX2-_R 3 D2 Shield
U23 HDMI_TX1+_R 4 D2-
HDMI_TX1-_R 1 10 HDMI_TX1-_R 5 D1+
HDMI_TX1+_R 2 IN1 O1 9 HDMI_TX1+_R R153 R185 HDMI_TX1-_R 6 D1 Shield
3 IN2 O2 8 HDMI_TX0+_R 7 D1-
GND_1 GND_2 7 2.2K 2.2K D0+
HDMI_TX2+_R 4 HDMI_TX2+_R 8
IN3 O3 6 +/-5% +/-5% D0 Shield
HDMI_TX2-_R 5 HDMI_TX2-_R HDMI_TX0-_R 9
IN4 O4 HDMI_CLK+_R 10 D0-
*RCLAMP0524P.TCT_NC 11 CK+
HDMI_CLK-_R 12 CK Shield
HDMI_CEC 13 CK-
R482 0 +/-5% T155 14 CE Remote
HDMI_DDC_CLK 15 NC
(25) HDMI_DDC_CLK DDC CLK
R483 0 +/-5% HDMI_DDC_DAT 16
(25) HDMI_DDC_DAT DDC DATA
U24 17
HDMI_TX0+_R 1 10 HDMI_TX0+_R L15 18 GND
HDMI_TX0-_R 2 IN1 O1 9 HDMI_TX0-_R 1 4 HDMI_TX2+_R R481 10K +/-1% HDMI_DET_R 19 +5V G3
IN2 O2 8 (25) HDMI_TX2+ (25) HDMI_DET HP DET GND3
3 G4
HDMI_CLK-_R 4 GND_1 GND_2 7 HDMI_CLK-_R 2 3 HDMI_TX2-_R GND4
IN3 O3 6 (25) HDMI_TX2-

*
HDMI_CLK+_R 5 HDMI_CLK+_R CONN-HDMI
IN4 O4 *90 Ohm,100mA_NC F3
*RCLAMP0524P.TCT_NC EXC24CG900U Polyswitch

R479 0 +/-5%
+5V_RUN
R480 0 +/-5%
C465
L14 0.1uF
RV1 1 4 HDMI_TX1-_R 16V,X7R
(25) HDMI_TX1-
*VZ0603M260APT_NC
HDMI_DDC_CLK 2 3 HDMI_TX1+_R
(25) HDMI_TX1+
*90 Ohm,100mA_NC
EXC24CG900U
C C
R484 0 +/-5%

R485 0 +/-5%

RV2 L16
*VZ0603M260APT_NC 1 4 HDMI_TX0+_R +3.3V_RUN_MXM
(25) HDMI_TX0+
HDMI_DDC_DAT
2 3 HDMI_TX0-_R
(25) HDMI_TX0-
*90 Ohm,100mA_NC HDMI_CEC R799 *10K_NC +/-5%
EXC24CG900U

R486 0 +/-5%

RV3 R487 0 +/-5%

*VZ0603M260APT_NC
HDMI_DET_R L17
1 4 HDMI_CLK-_R
(25) HDMI_CLK-
2 3 HDMI_CLK+_R
(25) HDMI_CLK+
*90 Ohm,100mA_NC
EXC24CG900U

Reserve for EMI and close to HDMI CONN

B B

A A

Ever Light
Technology Limited
Title
25 -- HDMI
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 26 of 84

5 4 3 2 1
 5 4 3 2 1

JDOCK1
CIS OK
1 2 DOCK_AC_OFF (40,74) U25
3 1 2 4 DOCK_DP1_TX0+_C 1 10 DOCK_DP1_TX0+_C
(50) DOCK_LOM_SPD100LED_GRN# 3 4 DOCK_LOM_SPD1000LED_ORG# (50) IN1 O1 9
(25) DOCK_DP1_CA_DET DOCK_DP1_CA_DET 5 6 DOCK_DP2_CA_DET DOCK_DP1_TX0-_C 2 DOCK_DP1_TX0-_C
7 5 6 8 3 IN2 O2 8
C477 0.1uF 10V,X5R DOCK_DP1_TX0+_C 9 7 8 10 DOCK_DP2_TX0+_C C478 0.1uF 10V,X5R DOCK_DP1_TX1+_C 4 GND_1 GND_2 7 DOCK_DP1_TX1+_C
(25) DOCK_DP1_TX0+ 9 10 DOCK_DP2_TX0 (19) IN3 O3 6
(25) DOCK_DP1_TX0- C479 0.1uF 10V,X5R DOCK_DP1_TX0-_C 11 12 DOCK_DP2_TX0-_C C480 0.1uF 10V,X5R DOCK_DP2_TX0# (19) DOCK_DP1_TX1-_C 5 DOCK_DP1_TX1-_C
13 11 12 14 IN4 O4
C481 0.1uF 10V,X5R DOCK_DP1_TX1+_C 15 13 14 16 DOCK_DP2_TX1+_C C482 0.1uF 10V,X5R *RCLAMP0524P.TCT_NC
(25) DOCK_DP1_TX1+ 15 16 DOCK_DP2_TX1 (19)
C472 0.1uF 10V,X5R DOCK_DP1_TX1-_C 17 18 DOCK_DP2_TX1-_C C483 0.1uF 10V,X5R
(25) DOCK_DP1_TX1- 17 18 DOCK_DP2_TX1# (19)
19 20 U26
C473 0.1uF 10V,X5R DOCK_DP1_TX2+_C 21 19 20 22 DOCK_DP2_TX2+_C C474 0.1uF 10V,X5R DOCK_DP1_TX2+_C 1 10 DOCK_DP1_TX2+_C
DP1 (25) DOCK_DP1_TX2+
C475 0.1uF 10V,X5R DOCK_DP1_TX2-_C 23 21 22 24 DOCK_DP2_TX2-_C C484 0.1uF 10V,X5R
DOCK_DP2_TX2 (19) DP2 DOCK_DP1_TX2-_C 2 IN1 O1 9 DOCK_DP1_TX2-_C
(25) DOCK_DP1_TX2- 23 24 DOCK_DP2_TX2# (19) IN2 O2 8
25 26 3
C485 0.1uF 10V,X5R DOCK_DP1_TX3+_C 27 25 26 28 DOCK_DP2_TX3+_C C486 0.1uF 10V,X5R DOCK_DP1_TX3+_C 4 GND_1 GND_2 7 DOCK_DP1_TX3+_C
(25) DOCK_DP1_TX3+ 27 28 DOCK_DP2_TX3 (19) IN3 O3 6
(25) DOCK_DP1_TX3- C476 0.1uF 10V,X5R DOCK_DP1_TX3-_C 29 30 DOCK_DP2_TX3-_C C487 0.1uF 10V,X5R DOCK_DP2_TX3# (19) DOCK_DP1_TX3-_C 5 DOCK_DP1_TX3-_C
31 29 30 32 IN4 O4
D
33 31 32 34 DOCK_DP2_AUX_S *RCLAMP0524P.TCT_NC D
(25) DOCK_DP1_AUX+ 33 34
(25) DOCK_DP1_AUX-
35 36 DOCK_DP2_AUX#_S
37 35 36 38 U27
DOCK_DP1_HPD 39 37 38 40 DOCK_DP2_HPD DOCK_DP1_AUX+ 1 10 DOCK_DP1_AUX+
(25) DOCK_DP1_HPD 39 40 DOCK_DP2_HPD (19,40) IN1 O1
41 42 DOCK_DP1_AUX- 2 9 DOCK_DP1_AUX-
+NBDOCK_DC_IN_SS 41 42 ACAV_DOCK_SRC# (74) IN2 O2
43 44 3 8
BLUE_DOCK_C 45 43 44 46 DOCK_DP1_CA_DET 4 GND_1 GND_2 7 DOCK_DP1_CA_DET
45 46 DAT_DDC2_DOCK (24) IN3 O3
47
49 47 48
48
50
CLK_DDC2_DOCK (24) CRT I2C DOCK_DP1_HPD 5
IN4 O4
6 DOCK_DP1_HPD

51 49 50 52 *RCLAMP0524P.TCT_NC
RED_DOCK_C 53 51 52 54 SATA_PRX_DKTX_P5 C490 10nF 25V,X7R
53 54 SATA_PRX_DKTX_P5_C (8)
55 56 SATA_PRX_DKTX_N5 C491 10nF 25V,X7R U28
CRT RGB VS,HS 57 55 56 58
SATA_PRX_DKTX_N5_C (8)
DOCK_DP2_TX0+_C 1 10 DOCK_DP2_TX0+_C
GREEN_DOCK_C 59 57 58 60 SATA_PTX_DKRX_P5 C492 10nF 25V,X7R SATA_PTX_DKRX_P5_C (8)
SATA DOCK_DP2_TX0-_C 2 IN1 O1 9 DOCK_DP2_TX0-_C
61 59 60 62 SATA_PTX_DKRX_N5 C493 10nF 25V,X7R 3 IN2 O2 8
61 62 SATA_PTX_DKRX_N5_C (8) GND_1 GND_2
R413 *0_NC +/-5% 63 64 DOCK_DP2_TX1+_C 4 7 DOCK_DP2_TX1+_C
HSYNC_DOCK_C 65 63 64 66 USBP8+_C DOCK_DP2_TX1-_C 5 IN3 O3 6 DOCK_DP2_TX1-_C
R419 *0_NC +/-5% VSYNC_DOCK_C 67 65 66 68 USBP8-_C IN4 O4
69 67 68 70 *RCLAMP0524P.TCT_NC
L20 CLK_MSE 71 69 70 72 USBP9+_C USB x 2
(39) CLK_MSE 71 72
90 ohm,150mA PS2 (39) DAT_MSE DAT_MSE 73
73 74
74 USBP9-_C U29
4 3 USBP8+_C 75 76 DOCK_DP2_TX2+_C 1 10 DOCK_DP2_TX2+_C
(9) USBP8+ 75 76 IN1 O1 9
DAI_BCLK# 77 78 CLK_KBD CLK_KBD (39) DOCK_DP2_TX2-_C 2 DOCK_DP2_TX2-_C
77 78 IN2 O2 8
(9) USBP8-
1 2 USBP8-_C DAI_LRCK# 79
79 80
80 DAT_KBD DAT_KBD (39) PS2 3
GND_1 GND_2 7
81 82 DOCK_DP2_TX3+_C 4 DOCK_DP2_TX3+_C
83 81 82 84 DOCK_DP2_TX3-_C 5 IN3 O3 6 DOCK_DP2_TX3-_C
I2S (61) DAI_DI
DAI_DO# 85 83 84 86 IN4 O4
R420 *0_NC +/-5% 87 85 86 88 *RCLAMP0524P.TCT_NC
DAI_12MHZ# 89 87 88 90
R425 *0_NC +/-5% 91 89 90 92 U30
93 91 92 94 DOCK_DP2_AUX_S 1 10 DOCK_DP2_AUX_S
L23 95 93 94 96 DOCK_DP2_AUX#_S 2 IN1 O1 9 DOCK_DP2_AUX#_S
90 ohm,150mA 97 95 96 98 3 IN2 O2 8
(40) D_LAD0 97 98 BREATH_LED# (39,44) GND_1 GND_2 7
4 3 USBP9+_C 99 100 DOCK_DP2_CA_DET 4 DOCK_DP2_CA_DET
(9) USBP9+ (40) D_LAD1 99 100 DOCK_LOM_ACTLED_YEL# (50) IN3 O3 6
101 102 DOCK_DP2_HPD 5 DOCK_DP2_HPD
1 2 USBP9-_C 103 101 102 104 IN4 O4
(9) USBP9- (40) D_LAD2 103 104 DOCK_LOM_TRD0+ (50)
(40) D_LAD3
105 106 DOCK_LOM_TRD0- (50) *RCLAMP0524P.TCT_NC
107 105 106 108
C
LPC (40) D_LFRAME#
109 107 108 110 DOCK_LOM_TRD1+ (50)
C

111 109 110 112

(40) D_CLKRUN# 111 112 DOCK_LOM_TRD1- (50)
113 114
115 113 114 116 LAN
(40) D_SERIRQ 115 116
117 118 +LOM_VCT C496 1uF 6.3V,Y5V
(40) D_DLDRQ1# 117 118
119 120 CLK_KBD DAT_KBD
FB27 0 CLK_PCI_DOCK 121 119 120 122
(9) CLK_PCI_DOCK 121 122 DOCK_LOM_TRD2+ (50)
123 124
123 124 DOCK_LOM_TRD2- (50)
1 2 HSYNC_DOCK_C 125 126 C494 C495
(24) HSYNC_DOCK 125 126
(39) DOCK_SMB_CLK
127 128 DOCK_LOM_TRD3+ (50) *10pF_NC *10pF_NC
FB28 0 129 127 128 130 50V,NPO 50V,NPO
(39) DOCK_SMB_DAT 129 130 DOCK_LOM_TRD3- (50)
131 132
1 2 VSYNC_DOCK_C 133 131 132 134
(24) VSYNC_DOCK (39,62) DOCK_SMB_ALERT# 133 134 DOCK_DCIN_IS+ (63)
(62) DOCK_PSID
135 136 DOCK_DCIN_IS- (63)
C999 C1000 137 135 136 138
*22pF_NC *22pF_NC 139 137 138 140
50V,NPO 50V,NPO
(39) DOCK_PWR_BTN#
141 139 140 142 DOCK_DET_R#
DOCK_POR_RST# (39)
C A
Reserve for EMI
141 142 DOCK_DET# (40)
(40,62,74) SLICE_BAT_PRES#
143 144
143 144 D19 SD103AW
Reserved for EMI

1
145 156
146 GND_145 GND_156 157 ESD13
147 GND_146 GND_157 158
148 GND_147 GND_158 159 UCLAMP0511P.TCT +3.3V_ALW
FB29 0 +DOCK_PWR_BAR 149 GND_148 GND_159 160
GND_149 GND_160 161
1 2 BLUE_DOCK_C 150 GND_161 162 +5V_RUN
(24) BLUE_DOCK
151 PWR_150 GND_162 163
To avoid conflict with source detection circuit R489

2
FB30 0 152 PWR_151 GND_163 164
PWR_152 GND_164 100K
C497 C498 153 +/-5%
1 2 RED_DOCK_C 0.1uF 0.1uF 154 PWR_153 C93
(24) RED_DOCK PWR_154
25V,X7R 25V,X7R 155 0.1uF
FB31 0 c0603h9 c0603h9 PWR_155 16V,Y5V DOCK_POR_RST# DOCK_DET#
U34
1 2 GREEN_DOCK_C 8
(24) GREEN_DOCK VCC

1
+3.3V_RUN
C1001 C1002 C1003 CONN-DOCKING ESD12
*22pF_NC *22pF_NC *22pF_NC R1837 4.7K +/-5% 2 3 DOCK_DP2_AUX_S
B
50V,NPO 50V,NPO 50V,NPO R1838 4.7K +/-5% 5 1A 1B 6 DOCK_DP2_AUX#_S UCLAMP0511P.TCT B
2A 2B

1
DOCK_DP2_DDC_EN# 7 1OE 4

2
2OE GND

SN74CBTD3306CPWR
Reserve for EMI
+3.3V_RUN
close to CONN
+5V_RUN CLK_PCI_DOCK DAT_MSE CLK_MSE

C502 C503
C991 R490 *10pF_NC *10pF_NC
1

0.1uF C92 *22_NC 50V,NPO 50V,NPO

10V,X5R FOR MXM Dongle 0.1uF
16V,Y5V
+/-5%
C504
U82 *12pF_NC
D15 D16 9 8 50V,NPO
(19) DOCK_DP2_AUX
3

*DA204UT106_NC *DA204UT106_NC NC1 V+

1

7 10 DOCK_DP2_AUX_S
(19) DOCK_DP2_AUX# NC2 COM1
C450 0.1uF 16V,X7R 2 6 DOCK_DP2_AUX#_S Reserve for EMI
NO1 COM2
C449 0.1uF 16V,X7R 4 1
D17 D18 NO2 IN1
3

*DA204UT106_NC *DA204UT106_NC 3 5 DOCK_DP1_HPD DOCK_DP2_HPD

GND IN2
TS5A23157RSER +5V_RUN
(61) DAI_BCLK# DAI_BCLK#
IN1/2 = L , NC to COM. R494 C505 R495 C506
(61) DAI_LRCK# DAI_LRCK# 100K 33nF 100K 33nF
IN1/2 = H , NO to COM. R812 +/-5% 16V,X7R +/-5% 16V,X7R
A (61) DAI_DO# DAI_DO# 10K A
+/-5%
(61) DAI_12MHZ# DAI_12MHZ#
DOCK_DP2_DDC_EN# Resistor is 110K OHM
D
Q34
2N7002W-7-F

G DOCK_DP2_CA_DET Ever Light

S R496
Technology Limited
1M Title
+/-5% 26 -- Docking Connector
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 27 of 84

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Ever Light
Technology Limited
Title
28 -- 17" HDD, ODD, G-SENSOR
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 28 of 84

5 4 3 2 1
 5 4 3 2 1

+3.3V_RUN

3-axis Fall Sensor (HDD data protector)

U32
6
HDD_FALL_INT 8 VDD 3
(9) HDD_FALL_INT INT1 RSVD(VDD)
FFS_INT2 9 1

HDD POWER
(11) FFS_INT2 INT2 VDD_IO C511 C512
7 0.1uF 10uF
CS 2 16V,X7R 6.3V,X5R
D
12 GND_0 4 D
SDO GND_1 5
13 GND_2 10
(6,10,14,15,16,17,18,35) MEM_SMBDAT SDI/SDA/SDO GND_3 11
+15V_ALW +5V_ALW +5V_HDD +5V_RUN 14 RSVD(GND)
(6,10,14,15,16,17,18,35) MEM_SMBCLK SPC/SCL
Q35
*FDC655BN_NC DE351DLTR8
6 R1131 0 +/-5%
+3.3V_ALW2 5 4
2
R499 1 R498 r0805h6 I2C Address Setting
*100K_NC *100K_NC +3.3V_RUN
R500 +/-5% +/-5%

3
*100K_NC SDO = H (3A) SDO = L (38)
+/-5% HDD_EN_3V5V Internal PU
R504 100K +/-5% HDD_FALL_INT
Addr = 0011101 Addr = 0011100

3
C516
5 *0.1uF_NC
6

25V,X7R
2 Q37A
(39) HDDC_EN

4
*2N7002DW-7-F_NC
Q37B +3.3V_RUN
1

R503 *2N7002DW-7-F_NC
*100K_NC
+/-5%

R286
10K
+/-5% HDD1_FFS_INT

3
5

6
Q130A

4
FFS_INT2 2 2N7002DW-7-F

C Q130B C

1
2N7002DW-7-F

HDD Connector
SATA3 Re-Driver For main HDD
Main HDD
JHDD2
S1
GND8 S2 PSATA_PTX_DRX_P0 C520 10nF 25V,X7R
TX+ PSATA_PTX_DRX_P0_C (8)
S3 PSATA_PTX_DRX_N0 C521 10nF 25V,X7R
TX- PSATA_PTX_DRX_N0_C (8)
S4
GND7 S5 PSATA_PRX_DTX_N0 C522 10nF 25V,X7R
RX- PSATA_PRX_DTX_N0_C (8)
S6 PSATA_PRX_DTX_P0 C523 10nF 25V,X7R
RX+ PSATA_PRX_DTX_P0_C (8)
S7
GND6

P1
V33_3 P2
V33_2 P3
V33_1 P4
GND5 P5
GND4 HDD_DET# (8)
P6
GND3 P7
V5_3 +5V_HDD
P8
V5_2 P9 C531 C532 C533
V5_1 P10 1nF 0.1uF 10uF
B GND2 P11 50V,X7R 16V,X7R 6.3V,X5R B
RSVD P12
GND1 P13
V12_3 P14
V12_2 P15
V12_1
PTH1
PTH2

HDD1_FFS_INT

CONN-SATA
G1
G2

+3.3V_RUN
+3.3V_RUN +3.3V_RUN
ODD Connector SATA port 3 +5V_ALW +5V_ODD 16V,Y5V *0.1uF_NC C996
Q40 16V,Y5V *0.1uF_NC C997 16V,Y5V *0.1uF_NC C998
FDC655BN
6 U74
JODD1

n/c

VCC
5 4 *74LVC1G08_NC U76 U77

5
S1 2 DEVICE_DET# 1 *74LVC1G08_NC *74LVC1G04GW_NC

VCC
GND1 S2 SATA_ODD_PTX_DRX_P3 C536 10nF +3.3V_ALW2 +15V_ALW 1 R516 B 4 1

GND

VCC
A+(TXP) SATA_ODD_PTX_DRX_P3_C (8) Y B
G1 S3 SATA_ODD_PTX_DRX_N3 C537 10nF 100K 2 4 2 Y 4 R520 *0_NC +/-5%

GND
PTH1 A-(TXN) SATA_ODD_PTX_DRX_N3_C (8) A Y A
S4 +/-5% MODC_EN 2
3

GND2 S5 SATA_ODD_PRX_DTX_N3 C538 10nF A

SATA_ODD_PRX_DTX_N3_C (8)

3
B-(RXN) S6 SATA_ODD_PRX_DTX_P3 C539 10nF

GND
SATA_ODD_PRX_DTX_P3_C (8) PCH_SATA_MOD_EN# (11)

3
B+(RXP) S7 R517
GND3 +5V_ODD 100K ODD_EN_5V R521
P1 DEVICE_DET# +/-5% R518 +/-5% *0_NC
DP DEVICE_DET# (39)
P2 100K
+5V +/-5%
3

A G2 P3 C545 A
PTH2 +5V P4 C540 C541 C542 C543 C544 5 0.1uF
MD P5 *10uF_NC 1uF 0.1uF *0.1uF_NC 1nF 25V,X7R
GND4
6

P6 10V,X5R 25V,X5R 16V,X7R 16V,X7R 50V,X7R Q41A

4

GND5 2 2N7002DW-7-F
(40) MODC_EN
CONN-SATA
Q41B
(11,39) EC_PCH_SATA_MOD_EN#
Ever Light
1

R519 2N7002DW-7-F
100K
R515 0 +/-5% +/-5%
ZODD_WAKE# (40)
Technology Limited
Title

R777 10K +/-5%

29 -- 15" HDD, ODD, G-SENSOR
+3.3V_RUN
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 29 of 84

5 4 3 2 1
 5 4 3 2 1

D D

USB(Back Side)
+5V_ESATA/USB2
USB+eSATA
USB Power
R546 0 C582 C583 C584 C585 C586
150uF 10uF 0.1uF 0.1uF 0.1uF
+5V_ESATA/USB2 6.3V,+10~-35% 6.3V,X5R 16V,X7R 16V,X7R 16V,X7R
L18
U37 TPS2560DRCR 4 3 USBP2-_C
+5V_ALW (9) USBP2-
1 10 0607GC: CIS OK
GND FAULT1 USB_OC1# (9)
1 2 USBP2+_C
(9) USBP2+
2 9 JESATA1
IN_1 OUT1 *90 ohm,150mA_NC S1
C587 C588 3 8 C575 10nF 25V,X7R ESATA_PTX_DRX_P4 S2 GND2 U1
IN_2 OUT2 (8) ESATA_PTX_DRX_P4_C A+(TX+) VBUS
*10uF_NC 0.1uF R547 0 C576 10nF 25V,X7R ESATA_PTX_DRX_N4 S3 U2 USBP2-_C
(8) ESATA_PTX_DRX_N4_C A-(TX-) D-
6.3V,X5R 16V,X7R 4 7 R548 28K +/-1% S4 U3 USBP2+_C
EN1 ILIM C577 10nF 25V,X7R ESATA_PRX_DTX_N4 S5 GND3 D+ U4
(8) ESATA_PRX_DTX_N4_C B-(RX-) GND1
C 5 6 C578 10nF 25V,X7R ESATA_PRX_DTX_P4 S6 C
PAD

EN2 FAULT2 USB_OC1# (9) (8) ESATA_PRX_DTX_P4_C B+(RX+)

GND5
GND6
GND7
GND8
+5V_ESATA/USB2 S7
GND4
ESD1
11

1 6 USBP2+_C

SH1
SH2
SH3
SH4
2 1 6 5 CONN-USB+eSATA
(40) ESATA_USB_PWR_EN# R(ohm) = 56250 / Ios(A) 3 2 5 4 USBP2-_C
Assume current Limit Setting = 2A, R=28k ohm. 3 4
*SRV05-4_NC

B B

A A

Ever Light
Technology Limited
Title
29 -- eSATA/USB, USB x 2
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 30 of 84

5 4 3 2 1
 5 4 3 2 1

+1.05V_USB3.0 +1.05V_USB3.0
Note:
1. Every Power trace (3.3V, 1.05V, A3.3V, 12V, 5V, VCCCH1-2) should be broad. +3.3V_SUS C605 10nF 16V,Y5V
2. 2nd layer of this entire circuit should be grounded.
3. Every high speed signal trace (USB SS/HS, PCI Express), C606 10nF 16V,Y5V
should be wired as shortly as possible.
4. Capacitors C100-113 should be located next to U1, C607 10nF 16V,Y5V C608 C609 C610
and connected to GND tightly -- by tracing shortly and broadly. 0.1uF 0.1uF 0.1uF
5. For signal traces, routing priority is as follows; C611 C612 10nF 16V,Y5V 16V,Y5V 16V,Y5V 16V,Y5V
USB SS > PCI Express > (SATA) > USB HS > (DDR > Ether > PCI, PATA > Other legacy) 0.1uF
6. At any crossing for every trace except ground, 16V,Y5V C613 10nF 16V,Y5V
sufficient area of ground plane between each other should be put.
C614 10nF 16V,Y5V
7. Follow the basic of transmission trace pair when routing any signal trace. +3.3V_SUS
> Remove any impairment or discontinuity. +3.3V_SUS
> Keep same length by each other.
C615 10nF 16V,Y5V FB25
> Keep same width and spacing. 1 2
D For more information please refer to 'USB3.0 Board Design Guide' in design kit. C616 10nF 16V,Y5V D

60 ohm,3A
C618 10nF 16V,Y5V C639
C621 C617 10uF
C620 10nF 16V,Y5V 0.1uF 10nF 6.3V,X5R
+3.3V_SUS
16V,Y5V 16V,Y5V
C623 10nF 16V,Y5V FB26
1 2

60 ohm,3A +3.3V_SUS
C671
C619 C622 10uF
0.1uF 10nF 6.3V,X5R USB30_OC2# R554 10K +/-5%

D10

H11
E11
E12

K11
K12

P13
F13
F14

L10

L13
L14
G3
G4

N4
N5
N6

C4
C5
C6
C7
D5

C8
C9
D8
D9

H3
H4

D7
P3

E3
E4
F3

L9

L5

L8
U39 16V,Y5V 16V,Y5V
USB30_OC1# R556 10K +/-5%

VDD33_1
VDD33_2
VDD33_3

VDD33_4
VDD33_5
VDD33_6

VDD33_7
VDD33_8

VDD33_9
VDD33_10

VDD33_11
VDD33_12
VDD33_13
VDD33_14

VDD10_1
VDD10_2
VDD10_3
VDD10_4
VDD10_5

VDD10_6
VDD10_7
VDD10_8
VDD10_9

VDD10_10
VDD10_11

VDD10_12
VDD10_13

VDD10_14
VDD10_15
VDD10_16

VDD10_17
VDD10_18
VDD10_19
VDD10_20

U3AVDD33

U2AVDD33
USB3.0 Trace need routing 90-ohms Diff
B2
(10) CLK_PCIE_USB30 PECLKP
B1 B6
(10) CLK_PCIE_USB30# PECLKN U3TXDP2 USB3_TXP_P2 (32)
C624 0.1uF 16V,X7R PCIE_PRX_USB30TX_P4_C D2 A6
(10) PCIE_PRX_USB30TX_P4 PETXP U3TXDN2 USB3_TXN_P2 (32)
C625 0.1uF 16V,X7R PCIE_PRX_USB30TX_N4_C D1 N8
(10) PCIE_PRX_USB30TX_N4 PETXN U2DM2 USB2_DN_P2 (32)
F2 P8
(10) PCIE_PTX_USB30RX_P4_C PERXP U2DP2 USB2_DP_P2 (32)
F1 B8
(10) PCIE_PTX_USB30RX_N4_C PERXN U3RXDP2 USB3_RXP_P2 (32)
+5V_ALW
A8
U3RXDN2 USB3_RXN_P2 (32)
H2
(9) PLTRST_USB30# PERSTB
R555 0 +/-5% K1 R588
(19,33,34,40,61) PCIE_WAKE# PEWAKEB
R557 0 +/-5% K2 G14 USB30_OC2# 100K
(10) USB30CLK_REQ# PECREQB OCI2B USB30_OC2# (32)
H13 USB30_OC1# +/-5%
OCI1B USB30_OC1# (32)
+3.3V_SUS R1049 10K +/-5% J2
R558 10K +/-5% J1 AUXDET H14 USB30_PPON2 USB30_PWR2_EN# (32)
+3.3V_SUS PSEL PPON2
R563 *0_NC +/-5% H1 J14 USB30_PPON1
(8) USB30_SMI# SMIB PPON1
C C

3
P5
USB3.0 Trace need routing 90-ohms Diff USB30_PPON2 5
Power on Reset +3.3V_SUS PONRSTB B10
U3TXDP1 USB3_TXP_P1 (32)
Q132A

4
SPISCK M2 A10 R1050 2N7002DW-7-F
SPISCK U3TXDN1 USB3_TXN_P1 (32)
SPICSB N2 N10 100K
SPICSB U2DM1 USB2_DN_P1 (32)
SPISI N1 +/-5%
C

SPISO M1 SPISI P10

SPISO U2DP1 USB2_DP_P1 (32)
D23 R560 B12
U3RXDP1 USB3_RXP_P1 (32)
SD103AW 10K
+/-5%
uPD720200 A12
USB3_RXN_P1 (32)
A

K13 U3RXDN1
+3.3V_SUS K14 GND96
J13 GND97
C626 P4 GND98
1uF GND99 P12 R561 1.6K +/-1%
6.3V,Y5V RREF N12
R586 U2AVSS +5V_ALW
*10K_NC C14 N11
GND100 U2PVSS
+/-5%
R584 0 +/-5% D6 Put R2 close to U1
(8) USB30_SMI# U3AVSS
USB3_XT1 N14 Short and broad connection to GND R559
USB3_XT2 M14 XT1 Don't split R2 into multiple resistors. 100K
XT2 +/-5%
uPD720200 : Pop R563, De-pop R584 USB3_CSEL P6
uPD720200A : Pop R584, De-pop R563 CSEL P14
GND95 P11 USB30_PWR1_EN# (32)
USB3_XT1 GND94 P9
A1 GND93 P7
A2 GND1 GND92 P2
GND2 GND91

6
USB3_XT2_L USB3_XT2 A3 P1
A4 GND3 GND90 N13 USB30_PPON1 2
R564 A5 GND4 GND89 N9
100 +/-5% A7 GND5 GND88 N7 Q132B

1
A9 GND6 GND87 N3 R562 2N7002DW-7-F
A11 GND7 GND86 M13
GND8 GND85 100K
A13 M12
B GND9 GND84 +/-5% B
X2 A14 M11
1 2 B3 GND10 GND83 M10
B4 GND11 GND82 M9
R565 XTAL 24MHz B5 GND12 GND81 M8
C627 +/-30ppm C628 +3.3V_SUS B7 GND13 GND80 M7
*0_NC 0 : 24MHz Crystal GND14 GND79
+/-5% 33pF 33pF B9 M6
50V,NPO 50V,NPO 1 : 48MHz clock in B11 GND15 GND78 M5
B13 GND16 GND77 M4
R566 B14 GND17 GND76 M3
C1 GND18 GND75 L12
*10K_NC GND19 GND74
+/-5%
C2 L11
USB3_CSEL C3 GND20 GND73 L7
C10 GND21 GND72 L6
C11 GND22 GND71
GND24
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND47
GND48
GND49
GND50
GND51
GND52
GND53
GND54
GND55
GND56
GND57
GND58
GND59
GND60
GND61
GND62
GND63
GND64
GND65
GND66
GND67
GND68
GND69
GND70

R567 GND23
10K
+/-5%
C12
C13
D3
D4
D11
D12
D13
D14
E1
E2
E13
E14
F4
F6
F7
F8
F9
F11
F12
G1
G2
G6
G7
G8
G9
G11
G12
G13
H6
H7
H8
H9
H12
J3
J4
J6
J7
J8
J9
J11
J12
K3
K4
L1
L2
L3
L4

+3.3V_SUS

A A
R568 R569
47K 10K
+/-5% +/-5% U40
SPICSB 1 8
SPISO 2 CS VCC 7
3
4
SO
WP
GND
HOLD
SCK
SI
6
5
SPISCK
SPISI Ever Light
AT25F512B-SSH-T
C629
Technology Limited
0.1uF Title
16V,Y5V 30 -- NEC USB 3.0 Chip & Power
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 31 of 84

5 4 3 2 1
 5 4 3 2 1

+5V_USB30_PWR1

+5V_USB30_PWR2

D D
U41 TPS2560DRCR
+5V_ALW 1 10
GND FAULT1 USB30_OC1# (31)
2 9
IN_1 OUT1
C630 C631 3 8
*10uF_NC 0.1uF IN_2 OUT2
6.3V,X5R 16V,X7R 4 7 R570 28K +/-1%
EN1 ILIM
5 6

PAD
EN2 FAULT2 USB30_OC2# (31)

(31) USB30_PWR1_EN#

11
R(ohm) = 56250 / Ios(A)
(31) USB30_PWR2_EN# Assume current Limit Setting = 2A, R=28k ohm.

ESD4 +5V_USB30_PWR1
USB2_DN_P1_C 1 6 USB2_DN_P1_C
Place close to JUSB3
USB2_DP_P1_C 2 TMDS_CH1- NC2 5 USB2_DP_P1_C
3 TMDS_CH1+ NC1 4
GND1 GND2
IP4282CZ6
C632 C633 C634 C635 C636
150uF 0.1uF 10uF 0.1uF 0.1uF
6.3V,+10~-35% 16V,X7R 6.3V,X5R 16V,X7R 16V,X7R

C C

ESD5
USB3_RXP_P1 1 10 USB3_RXP_P1 0824GC: Update CIS
USB3_RXN_P1 2 CH1 n.c._4 9 USB3_RXN_P1 +5V_USB30_PWR1
3 CH2 n.c._3 8 JUSB3
USB3_TXN_P1_C 4 GND1 GND2 7 USB3_TXN_P1_C
USB3_TXP_P1_C 5 CH3 n.c._2 6 USB3_TXP_P1_C 1
CH4 n.c._1 USB2_DN_P1_C 2 VBUS
IP4284CZ10-TB USB2_DP_P1_C 3 D-
4 D+
PGND
5
(31) USB3_RXN_P1 SSRX-
6 G1
(31) USB3_RXP_P1 SSRX+ ME1
16V,X7R 7 G2
C638 0.1uF USB3_TXN_P1_C 8 GND ME2 G3
(31) USB3_TXN_P1 SSTX- ME3
C637 0.1uF USB3_TXP_P1_C 9 G4
(31) USB3_TXP_P1 SSTX+ ME4
16V,X7R

CONN - USB

R572 *0_NC

90 ohm,150mA
1 2 USB2_DN_P1_C
(31) USB2_DN_P1
4 3 USB2_DP_P1_C
(31) USB2_DP_P1
L21
B +5V_USB30_PWR2 Place close to JUSB4 B
R571 *0_NC

C672 C640 C641 C642 C643

R574 *0_NC 150uF 0.1uF 10uF 0.1uF 0.1uF
6.3V,+10~-35%16V,X7R 6.3V,X5R 16V,X7R 16V,X7R

90 ohm,150mA
1 2 USB2_DN_P2_C
(31) USB2_DN_P2
4 3 USB2_DP_P2_C
(31) USB2_DP_P2
L22

R573 *0_NC

+5V_USB30_PWR2
0824GC: Update CIS
JUSB4

ESD6 1
USB2_DN_P2_C 1 6 USB2_DN_P2_C USB2_DN_P2_C 2 VBUS
USB2_DP_P2_C 2 TMDS_CH1- NC2 5 USB2_DP_P2_C USB2_DP_P2_C 3 D-
3 TMDS_CH1+ NC1 4 4 D+
GND1 GND2 PGND
IP4282CZ6 5
(31) USB3_RXN_P2 SSRX-
6 G1
(31) USB3_RXP_P2 SSRX+ ME1
16V,X7R 7 G2
C645 0.1uF USB3_TXN_P2_C 8 GND ME2 G3
(31) USB3_TXN_P2 SSTX- ME3
C644 0.1uF USB3_TXP_P2_C 9 G4
(31) USB3_TXP_P2 SSTX+ ME4
16V,X7R

CONN - USB

A A

ESD11
USB3_RXP_P2 1 10 USB3_RXP_P2
USB3_RXN_P2 2 CH1 n.c._4 9 USB3_RXN_P2
3 CH2 n.c._3 8
USB3_TXN_P2_C 4 GND1 GND2 7 USB3_TXN_P2_C
USB3_TXP_P2_C 5 CH3
CH4
n.c._2
n.c._1
6 USB3_TXP_P2_C
Ever Light
IP4284CZ10-TB
Technology Limited
Title
31 -- USB 3.0 Connector x 2

Size Document Number Rev

1A

Date: Thursday, January 27, 2011 Sheet 32 of 84

5 4 3 2 1
 5 4 3 2 1

COEX2_WLAN_ACTIVE
2nd MiniCard connector (WLAN, half size)
R575 *0_NC +/-5%

C646
MiniCard WLAN connector
*33p_NC
50V,NPO WLAN_SMBCLK S D
CARD_SMBCLK (39,61)
+3.3V_WLAN +3.3V_WLAN +1.5V_RUN +/-5% Q49
R576 *2.2K_NC *2N7002W-7-F_NC
G
CIS OK H=5.2
HOST_DEBUG_TX +3.3V_WLAN
JMINI1
D D
C647 G Q50
1 2 4.7nF R577 *2.2K_NC *2N7002W-7-F_NC
(19,31,34,40,61) PCIE_WAKE# WAKE# +3_3V1
COEX2_WLAN_ACTIVE R578 0 +/-5% 3 4 50V,X7R +/-5%
COEX1_BT_ACTIVE R579 0 +/-5% 5 BT_DATA GND1 6 WLAN_SMBDAT S D
BT_CHCLK +1_5V1 CARD_SMBDAT (39,61)
7 8
(10) MINI2CLK_REQ# CLKREQ# RESERVED1
9 10
11 GND2 RESERVED2 12
(10) CLK_PCIE_MINI2# REFCLK- RESERVED3
13 14 R580 *0_NC +/-5%
(10) CLK_PCIE_MINI2 REFCLK+ RESERVED4
15 16 HOST_DEBUG_TX
GND3 RESERVED5 HOST_DEBUG_TX (39)
17 18
(39) HOST_DEBUG_RX RESERVED6 GND4
19 20 WLAN_RADIO_DIS#_R
(39) MSCLK 21 RESERVED7 W_DISABLE# 22 R581 0 +/-5%
GND5 PERST# PCH_PLTRST#_EC (9,34,35,39,40)
23 24
(10) PCIE_PRX_WLANTX_N2 PERn0 +3_3Vaux
25 26
(10) PCIE_PRX_WLANTX_P2 PERp0 GND6
27 28
29 GND7 +1_5V2 30 WLAN_SMBCLK
31 GND8 RESERVED8 32 WLAN_SMBDAT
(10) PCIE_PTX_WLANRX_N2_C PETn0 RESERVED9
33 34
(10) PCIE_PTX_WLANRX_P2_C PETp0 GND9
35 36
GND10 RESERVED10 USBP4- (9)
37 38
RESERVED11 RESERVED12 USBP4+ (9)
39 40
41 RESERVED13 GND11 42 R582 0 +/-5%
RESERVED14 NC1 MSDATA (39)
43 44
RESERVED15 LED_WLAN# LED_WWAN_WLAN_OUT# (35,44)
(10) PCH_CL_CLK1
45 46
47 RESERVED16 NC2 48
(10) PCH_CL_DATA1 RESERVED17 +1_5V3
R583 0 +/-5% 49 50
(10) PCH_CL_RST1# RESERVED18 GND12
51 52

GND
GND
RESERVED19 +3_3V2

CONN - Mini-PCIE PCIE Express Mini Card Rev1.2 define LED pin is Open Drain.

G1
G2
C C

D24
WLAN_RADIO_DIS#_R A C
WLAN_RADIO_DIS# (40)

RB751V-40 TE-17
Suport for WoW Prevent backdrive when
R587 *0_NC +/-5% WoW is enabled.

+1.5V_RUN +3.3V_WLAN
Place caps close to WLAN connector.

C648 C649 C650 C651 C652 C653 C654 C655 C656

47nF 47nF *0.1uF_NC 0.1uF 47nF 0.1uF 47nF 4.7uF *330uF_NC
16V,X7R 16V,X7R 16V,X7R 16V,X7R 16V,X7R 16V,X7R 16V,X7R 10V,X5R 6.3V,<=25mOhm
c0805h14

MB side module side WLAN +15V_ALW +3.3V_ALW +3.3V_WLAN

B B
1:GND 1:GND 6
5 4
R589 R590 2 Q51
Wire Cable 100K 100K 1 FDC655BN
+/-5% +/-5%

3
11:USB_DN 11:USB_DN
12:USB_DP 12:USB_DP

3
Q52A
Q52B 5 2N7002DW-7-F
2N7002DW-7-F

4
2
(40) AUX_EN_WOWL
C657
R593 4.7nF

1
Support Blarney stone 375 R591 R592 *470K_NC 50V,X7R
100K *200K_NC +/-5%
+3.3V_ALW R1097 *0_NC +/-5% +3.3V_RUN_BT +/-5% +/-5%

+3.3V_RUN R1098 0 +/-5%

Bluetooth +3.3V_RUN_BT

0531GC: CIS OK
BT_PRI_STATUS R1079 *1K_NC +/-5%
+3.3V_RUN_BT BT_COEX_STATUS2 R1080 *1K_NC +/-5%
G1

Header_1X12
GND#2

12
12 USBP11+ (9)
11
11 USBP11- (9)
10
10 9
9 8 COEX2_WLAN_ACTIVE
8 COEX2_WLAN_ACTIVE (34)
7
7 BT_RADIO_DIS# (40)
A 6 A
6 BT_LED (44)
5 BT_PRI_STATUS
5 BT_PRI_STATUS (56)
4 BT_COEX_STATUS2
4 BT_COEX_STATUS2 (55,56)
3 COEX1_BT_ACTIVE
3 2 R594 100K +/-5%
GND#1

2 +3.3V_RUN_BT
1
1

JBT1
C658
0.1uF
R595
10K
C659
33pF
C660
100pF
R596
10K
C661
*0.1uF_NC
+3.3V_RUN_BT
Ever Light
G2

16V,X7R +/-1% 50V,NPO 50V,X7R +/-1% 16V,X7R

C1005
10uF
Technology Limited
6.3V,X5R Title
wire to board c0603h9 33 -- WLAN(1/2 Mini cad), BT
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 33 of 84

5 4 3 2 1
 5 4 3 2 1

D D

3rd MiniCard connector (Flash, half size)

MiniCard connector

+3.3V_PP +3.3V_PP
CIS OK H=5.2 +1.5V_RUN
JMINI2

1 2
(19,31,33,40,61) PCIE_WAKE# WAKE# +3_3V1
R597 0 +/-5% 3 4
(33) COEX2_WLAN_ACTIVE BT_DATA GND1
5 6
7 BT_CHCLK +1_5V1 8 R633 0 +/-5%
(10) MINI3CLK_REQ# CLKREQ# RESERVED1 LPC_LFRAME# (8,39,40,55)
9 10 R634 0 +/-5%
GND2 RESERVED2 LPC_LAD3 (8,39,40,55)
11 12 R635 0 +/-5% For Debug (80 port)
(10) CLK_PCIE_MINI3# REFCLK- RESERVED3 LPC_LAD2 (8,39,40,55)
13 14 R636 0 +/-5%
(10) CLK_PCIE_MINI3 REFCLK+ RESERVED4 LPC_LAD1 (8,39,40,55)
C 15 16 R637 0 +/-5% C
GND3 RESERVED5 LPC_LAD0 (8,39,40,55)
R638 0 +/-5% 17 18
(9,33,35,39,40) PCH_PLTRST#_EC RESERVED6 GND4
For Debug (80 port) 19 20
(9) CLK_DEBUG RESERVED7 W_DISABLE#
21 22 R598 0 +/-5%
23 GND5 PERST# 24 PCH_PLTRST#_EC (9,33,35,39,40)
(10) PCIE_PRX_CARDTX_N5 PERn0 +3_3Vaux
25 26
(10) PCIE_PRX_CARDTX_P5 PERp0 GND6
27 28
29 GND7 +1_5V2 30
31 GND8 RESERVED8 32
(10) PCIE_PTX_CARDRX_N5_C PETn0 RESERVED9
33 34
(10) PCIE_PTX_CARDRX_P5_C PETp0 GND9
35 36 USBP6- (9)
37 GND10 RESERVED10 38
RESERVED11 RESERVED12 USBP6+ (9)
39 40 USB_MCARD3_DET#
41 RESERVED13 GND11 42
43 RESERVED14 NC1 44
45 RESERVED15 LED_WLAN# 46
47 RESERVED16 NC2 48
49 RESERVED17 +1_5V3 50
51 RESERVED18 GND12 52

GND
GND
RESERVED19 +3_3V2

CONN - Mini-PCIE

G1
G2
+15V_ALW +15V_ALW +3.3V_ALW +3.3V_PP

6
5 4
R1108 R1109 2 Q126
B B
100K 100K 1 FDC655BN
+/-5% +/-5%
USB_MCARD3_DET#

3
3
Q127A C993 R1110
Q127B 5 2N7002DW-7-F 10uF 20K
C662 2N7002DW-7-F 6.3V,X5R +/-5%

6
4.7nF

4
50V,X7R 2
(40) MCARD_MISC_PWREN
c0603h9 C994
R1113 4.7nF

1
WPAN Noise *100K_NC 50V,X7R
+/-5%

+1.5V_RUN +3.3V_PP

C663 C664 C665 C666 C667 C668 C669 C670

47nF 47nF 4.7uF 47nF 47nF 0.1uF 0.1uF *0.1uF_NC
16V,X7R 16V,X7R 6.3V,X5R 16V,X7R 16V,X7R 16V,X7R 16V,X7R 16V,X7R
c0603h9

A A

Ever Light
Technology Limited
Title
34 -- Flash /PP(1/2Mini cad)
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 34 of 84

5 4 3 2 1
 5 4 3 2 1

MiniCard WWAN connector

+1.5V_RUN +3.3V_RUN_WWAN_PWR
Place caps close to WWAN connector.
+1.5V_RUN
CIS OK H=5.2
C692 C693 C694 C695 C696 C697 C698 C699
+3.3V_RUN_WWAN_PWR +3.3V_RUN_WWAN_PWR 47nF 33pF 10uF 33pF 47nF 33pF 47nF 330uF
+SIM_PWR 16V,X7R 50V,NPO 6.3V,X5R 50V,NPO 16V,X7R 50V,NPO 16V,X7R 6.3V,<=25mOhm
JMINI4

1 2 33pF close WWAN connector pin 2 and 52

3 WAKE# +3_3V1 4
BT_DATA GND1 33pF close WWAN connector pin 6
5 6
7 BT_CHCLK +1_5V1 8
(10) MINI1CLK_REQ# CLKREQ# RESERVED1
9 10 UIM_DATA
D
11 GND2 RESERVED2 12 UIM_CLK D
(10) CLK_PCIE_MINI1# REFCLK- RESERVED3
13 14 UIM_RESET
(10) CLK_PCIE_MINI1 REFCLK+ RESERVED4
15 16 UIM_VPP
17 GND3 RESERVED5 18
19 RESERVED6 GND4 20 +15V_ALW +15V_ALW +3.3V_ALW +3.3V_RUN_WWAN_PWR
RESERVED7 W_DISABLE# WWAN_RADIO_DIS# (40)
21 22 R619 0
GND5 PERST# PCH_PLTRST#_EC (9,33,34,39,40)
PCIE_PRX_WWANTX_N1_SW 23 24 +/-5% 6
PCIE_PRX_WWANTX_P1_SW 25 PERn0 +3_3Vaux 26 5 4
27 PERp0 GND6 28 R621 R622 2 Q58
29 GND7 +1_5V2 30 WWAN_SMBCLK 100K 100K 1 FDC655BN
PCIE_PTX_WWANRX_N1_C_SW 31 GND8 RESERVED8 32 WWAN_SMBDAT +/-5% +/-5%
PCIE_PTX_WWANRX_P1_C_SW 33 PETn0 RESERVED9 34

3
35 PETp0 GND9 36
GND10 RESERVED10 USBP5- (9)
37 38
RESERVED11 RESERVED12 USBP5+ (9)

3
39 40 Q59A C700 R623
41 RESERVED13 GND11 42 Q59B 5 2N7002DW-7-F 10uF 20K
RESERVED14 NC1 LED_WWAN_WLAN_OUT# (33,44)
43 44 2N7002DW-7-F 6.3V,X5R +/-5%
RESERVED15 LED_WLAN#

6
45 46

4
47 RESERVED16 NC2 48 2
RESERVED17 +1_5V3 (40) MCARD_WWAN_PWREN
49 50 C701
MCARD_PCIE_SATA# 51 RESERVED18 GND12 52 R625 4.7nF

GND
GND
(40) MCARD_PCIE_SATA#

1
RESERVED19 +3_3V2 *100K_NC 50V,X7R
+/-5%
CONN - Mini-PCIE

G1
G2

R627 *0_NC +/-5%

C C

+3.3V_RUN WWAN_SMBCLK S D
MEM_SMBCLK (6,10,14,15,16,17,18,29)
+/-5% Q60
R629 2.2K 2N7002W-7-F
G
+3.3V_RUN_WWAN_PWR
MCARD_PCIE_SATA# R648 100K +/-5%
G Q61
R630 2.2K 2N7002W-7-F
+/-5%
WWAN_SMBDAT S D
MEM_SMBDAT (6,10,14,15,16,17,18,29)

R632 *0_NC +/-5%

+3.3V_RUN_WWAN_PWR +1.5V_RUN
+1.5V_RUN

R650
R649
100K
+/-5%
100K
+/-5% PCIE/SATA MUX IC C717 C718
MCARD_PCIE_SATA_1.5V# 0.1uF 0.1uF
16V,Y5V 16V,Y5V SATA signal impedence keep on 90ohm
3

Q64A
MCARD_PCIE_SATA 5 2N7002DW-7-F
The pin-out of the SATA mini card module was changed.
Function SEL

28
26
19
13
11
4
6

9
Q64B U43 The change was the RX-&RX+ were swapped on the module.
MCARD_PCIE_SATA# 2 2N7002DW-7-F Port A to Port B 0

VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
B B

Port A to Port C 1
1

2
NC_0 24 SATA_PRX_WWANTX_N2 C719 10nF 25V,X7R
B0+ SATA_PRX_WWANTX_N2_C (8)
23 SATA_PRX_WWANTX_P2 C720 10nF 25V,X7R
B0- SATA_PRX_WWANTX_P2_C (8)
MCARD_PCIE_SATA_1.5V# 3 22 SATA_PTX_WWANRX_P2 C721 10nF 25V,X7R
SEL B1+ SATA_PTX_WWANRX_P2_C (8)
21 SATA_PTX_WWANRX_N2 C722 10nF 25V,X7R
B1- SATA_PTX_WWANRX_N2_C (8)

SIM CARD PCIE_PRX_WWANTX_P1_SW

PCIE_PRX_WWANTX_N1_SW
4

5
A0+ PI2DBS212ZHE
+SIM_PWR A0-
0824GC: Update CIS
JSIM3 PCIE_PTX_WWANRX_P1_C_SW 6 18
A1+ C0+ PCIE_PRX_WANTX_P1 (10)
C1 C5 17
VCC GND C0- PCIE_PRX_WANTX_N1 (10)
PCIE_PTX_WWANRX_N1_C_SW 7
C702 UIM_RESET C2 C6 UIM_VPP A1- 16
RST VPP C1+ PCIE_PTX_WANRX_P1_C (10)
1uF Keep impedence on 85ohm 15
C1- PCIE_PTX_WANRX_N1_C (10)
6.3V,X5R UIM_CLK C3 C7 UIM_DATA 8
CLK I/O NC_1
GND_0
GND_1
GND_2
GND_3
GND_4
GND_5

GND_6

GND_7
GND1
GND2

Keep impedence on 85ohm

CONN-SIM Card PI2DBS212ZHE
G1
G2

1
10
12
14
20
25

27

29
Place UIM_PWR cap close to
SIM card connect.

+SIM_PWR
Place as close as possible to JSIM1 connector
A Primary Power A
ESD9 PWR Rail Voltage Tolerance Aux Power
UIM_RESET 1 6 UIM_VPP
2 1 6 5
UIM_CLK 3 2 5 4 UIM_DATA Peak Normal Normal
3 4
C703 C704 SRV05-4 C705 C706
*33pF_NC
50V,NPO
*33pF_NC
50V,NPO
*33pF_NC
50V,NPO
*33pF_NC
50V,NPO
+3.3V +-9% 1000 750
Ever Light
250 (wake enable)
+-9% 330 250 5 (Not wake enable)
Technology Limited
Title
+1.5V +-5% 500 375 NA 35 -- 15" WWAN+ SIM+MUX

Size Document Number Rev

1A

Date: Thursday, January 27, 2011 Sheet 35 of 84

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Ever Light
Technology Limited
Title
36 -- 17" WWAN+ SIM

Size Document Number Rev

1A

Date: Thursday, January 27, 2011 Sheet 36 of 84

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Ever Light
Technology Limited
Title
37 -- 17" NVRAM+MUX
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 37 of 84

5 4 3 2 1
 5 4 3 2 1

+3.3V_ALW
Monitor Charger current
R681 2.2K +/-5% LCD_SMBDAT
+3.3V_ALW +3.3V_ALW R682 2.2K +/-5% LCD_SMBCLK

C768 C1007
1uF 0.1uF R747 R813
D D
10V,X5R 16V,Y5V 10K *10K_NC
+/-5% +/-5%

U83
5 8
VDD THERM DYN_TURB_SYS_PWR_ALRT# (40)
9
LCD_SMBCLK 1 ALERT 10 LCD_SMBDAT
(39) LCD_SMBCLK SMCLK SMDATA LCD_SMBDAT (39)
3
(63) 8731_CSSN_P SENSE-
4 2
(63) 8731_CSSP_P SENSE+ N/C
6 7
ADDR_SEL GND
R624
20K EMC1701-2-AIZL-TR
+/-5%

RESISTOR (5%) SMBUS ADDRESS RESISTOR (5%) SMBUS ADDRESS

0 1001_100(r/w) 1600 0101_000(r/w)

100 1001_101(r/w) 2000 0101_001(r/w)

180 1001_110(r/w) 2700 0101_010(r/w)

U84
300 1001_111(r/w) 3600 0101_011(r/w)

430 1001_000(r/w) 5600 0101_100(r/w)

C 560 1001_001(r/w) 9100 0101_100(r/w) C

750 1001_010(r/w) 20000 0101_101(r/w)

U83
1270 1001_011(r/w) Open 0111_000(r/w)

Monitor PWR_SRC_MXM
+3.3V_ALW +3.3V_ALW

C769 C1008
1uF 0.1uF R821 R820
10V,X5R 16V,Y5V 10K *10K_NC
+/-5% +/-5%

U84
5 8
VDD THERM DYN_TURB_GPU_PWR_ALRT# (39)
9
LCD_SMBCLK 1 ALERT 10 LCD_SMBDAT
3 SMCLK SMDATA
(19) EMC1700_SENSE_N SENSE-
4 2
(19) EMC1700_SENSE_P SENSE+ N/C
6 7
ADDR_SEL GND

R822 EMC1701-2-AIZL-TR
2.7K
+/-5%

B B

A A

Ever Light
Technology Limited
Title
38 -- Express Card & Power
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 38 of 84

5 4 3 2 1
 5 4 3 2 1

+3.3V_ALW

+RTC_CELL +3.3V_ALW
R661 8.2K +/-5% DOCK_SMB_DAT

R662 8.2K +/-5% DOCK_SMB_CLK R664 0 +/-5%

R665 2.2K +/-5% PBAT_SMBDAT C734 C735 C736 C737 C738 C739 C740 C741 C953 C954
C743 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 4.7uF 4.7uF
R666 2.2K +/-5% PBAT_SMBCLK 0.1uF 16V,X7R 16V,X7R 16V,X7R 16V,X7R 16V,X7R 16V,X7R 16V,X7R 16V,X7R 6.3V,X5R 6.3V,X5R
16V,X7R c0603h9 c0603h9
R667 100K +/-5% BC_DAT_ECE1077

B64

A11
A22
B35
A41
A58
A52

A26
B3
R668 100K +/-5% BC_DAT_EMC4002 U45

VTR[1]
VTR[2]
VTR[3]
VTR[4]
VTR[5]
VTR[6]
VTR[7]
VTR[8]
VBAT
R669 100K +/-5% BC_DAT_ECE5048
D +3.3V_ALW D

PS/2 INTERFACE MISC INTERFACE

R671 *100K_NC+/-5% LPC_LDRQ#_MEC pull up 2.2K A5 A10 SYSTEM_ID
(10) SML1_SMBDAT B6 GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA GPIO021/RC_ID1 B10 BOARD_ID
on PCH side (10) SML1_SMBCLK GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK GPIO020/RC_ID2
R672 2.2K +/-5% CHARGER_SMBDAT A37 B14 DDR_ON C745
(41) CLK_TP_SIO B40 GPIO110/PS2_CLK2/GPTP-IN6 GPIO025/UART_CLK B44 HOST_DEBUG_TX DDR_ON (65) 0.1uF
pull up 4.7K (41) DAT_TP_SIO GPIO111/PS2_DAT2/GPTP-OUT6 GPIO120/UART_TX
R673 2.2K +/-5% CHARGER_SMBCLK CLK_KBD A38 B46 HOST_DEBUG_RX HOST_DEBUG_TX (33) 16V,X7R
on TP side (27) CLK_KBD GPIO112/PS2_CLK1A GPIO124/GPTP-OUT5/UART_RX HOST_DEBUG_RX (33)
DAT_KBD B41 B26
(27) DAT_KBD GPIO113/PS2_DAT1A VCC_PRWGD

5
R683 2.2K +/-5% CARD_SMBDAT CLK_MSE A39 A25 EN_INVPWR RUNPWROK_R1 (2,40) U46
(27) CLK_MSE DAT_MSE B42 GPIO114/PS2_CLK0A GPIO060/KBRST B36 EC_PCH_SATA_MOD_EN# EN_INVPWR (22) 2
(27) DAT_MSE GPIO115/PS2_DAT0A GPIO101/ECGP_SCLK EC_PCH_SATA_MOD_EN# (11,29) 1.05V_VTTPWRGD (67,68)
R684 2.2K +/-5% CARD_SMBCLK PBAT_SMBDAT B59 B37 TOUCH_SCREEN_PD# 4
(62) PBAT_SMBDAT GPIO154/I2C1C_DATA/PS2_CLK1B GPIO103/ECGP_MISO TOUCH_SCREEN_PD# (22) (6,71) 1.05V_0.8V_PWROK
PBAT_SMBCLK A56 B38 1
(62) PBAT_SMBCLK GPIO155/I2C1C_CLK/PS2_DAT1B GPIO105/ECGP_MOSI T167 0.8V_VCCPWROK (67)
A34
GPIO102/HSPI_SCLK DDR_HVREF_RST_GATE (2)
R674 10K +/-5% DOCK_SMB_ALERT# A35 74AHC1G08GW

3
GPIO104/HSPI_MISO A36
GPIO106/HSPI_MOSI CPU1.5V_S3_GATE (4)
JTAG INTERFACE A40 MSDATA
GPIO116/MSDATA MSDATA (33)
JTAG_TDI A51 B43 MSCLK
9. JTAG_TDO B55 GPIO145/I2C1K_DATA/JTAG_TDI GPIO117/MSCLK A45 MSCLK (33)
GPIO146/I2C1K_CLK/JTAG_TDO GPIO127/A20M SIO_A20GATE (11)
JTAG_CLK B56 A55
+3.3V_RUN JTAG_TMS A53 GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK GPIO153/LED3 A57 PS_ID (62) Bat1= Amber LED
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS GPIO156/LED1 BAT_A_LED# (61)
JTAG_RST# B57 B61 Bat2= White LED
JTAG_RST# GPIO157/LED2 BAT_W_LED# (61) 16mA drive pins
B65 FWP#
nFWP A46 R675 0 +/-5%
R677 2.2K +/-5% MXM_SMBDAT C746 0.1uF PROCHOT#/PWM4 H_PROCHOT# (2,71) pull up 62 ohm to +1.05V_RUN_VTT on CPU side
16V,X7R FAN PWM & TACH FAE SUGGESTION
R678 2.2K +/-5% MXM_SMBCLK DOCK_POR_RST# B22 GENERAL PURPOSE I/O
(27) DOCK_POR_RST# GPIO050/FAN_TACH1
SUS_ON A21 B2
(2,72) SUS_ON GPIO051/FAN_TACH2 GPIO001/ECSPI_CS1 VOL_MUTE# (61)
AUX_ON B23 A2 DOCK_SMB_ALERT#
(49) AUX_ON GPIO052/FAN_TACH3 GPIO002/ECSPI_CS2 DOCK_SMB_ALERT# (27,62)
R676 100K +/-5% DEVICE_DET# B24 B8
(27,44) BREATH_LED# GPIO053/PWM0 GPIO014/GPTP-IN7/HSPI_CS1 VOL_UP# (61)
PCH_ALW_ON A23 B18 VOL_DOWN# (61) +3.3V_ALW
(72) PCH_ALW_ON GPIO054/PWM1 GPIO040/GPTP-OUT3/HSPI_CS2
R792 100K +/-5% EC_PCH_SATA_MOD_EN# B25 A8
(22) BIA_PWM_EC GPIO055/PWM2 GPIO015/GPTP-OUT7 ME_SUS_PWR_ACK (7)
A24 B9
(29) HDDC_EN GPIO056/PWM3 GPIO016/GPTP-IN8 1.5V_SUS_PWRGD (65)
A9
GPIO017/GPTP-OUT8 PM_APWROK (7)
A14 R685 R686 R687 R688 R689
GPIO026/GPTP-IN1 1.05V_A_PWRGD (69)

G2
BC-LINK B15 10K 10K 10K 10K 49.9
GPIO027/GPTP-OUT1 ALW_PWRGD_3V_5V (64)
A43 A17 DEVICE_DET# +/-5% +/-5% +/-5% +/-5% +/-1% JP1
(40) BC_CLK_ECE5048 GPIO123/BCM_A_CLK GPIO041 DEVICE_DET# (29)
C BC_DAT_ECE5048 B45 B39 RESET_OUT# C

GND
(40) BC_DAT_ECE5048 GPIO122/BCM_A_DAT GPIO107/nRESET_OUT RESET_OUT# (7)
A42 A44 A_ON 6
(40) BC_INT#_ECE5048 GPIO121/BCM_A_INT# GPIO125/GPTP-IN5 A_ON (69,72) 6
A12 B47 JTAG_TDO 5
(46) BC_CLK_EMC4002 GPIO022/BCM_B_CLK GPIO126 PCH_RSMRST# (6,7) 5
BC_DAT_EMC4002 B13 A54 AC_PRESENT JTAG_CLK 4
(46) BC_DAT_EMC4002 GPIO023/BCM_B_DAT GPIO151/GPTP-IN4 AC_PRESENT (7) 4
A13 B58 JTAG_TMS 3
(46) BC_INT#_EMC4002 GPIO024/BCM_B_INT# GPIO152/GPTP-OUT4 SIO_PWRBTN# (7) 3
B20 JTAG_TDI 2
A18 GPIO044/BCM_C_CLK 1 2

GND
+5V_RUN B19 GPIO043/BCM_C_DAT 1
(38) DYN_TURB_GPU_PWR_ALRT# GPIO042/BCM_C_INT# SMBUS INTERFACE T173
A20 A3 DOCK_SMB_DAT
(41) BC_CLK_ECE1077 GPIO047/LSBCM_D_CLK GPIO003/I2C1A_DATA DOCK_SMB_DAT (27) T174
R690 4.7K +/-5% CLK_KBD BC_DAT_ECE1077 B21 B4 DOCK_SMB_CLK
(41) BC_DAT_ECE1077 DOCK_SMB_CLK (27) T181

G1
A19 GPIO046/LSBCM_D_DAT GPIO004/I2C1A_CLK A4
(41) BC_INT#_ECE1077 GPIO045/LSBCM_D_INT# GPIO005/I2C1B_DATA LCD_SMBDAT (38) T182
A16 B5
(61) BEEP GPIO032/GPTP-IN3/BCM_E_CLK GPIO006/I2C1B_CLK LCD_SMBCLK (38)
R691 4.7K +/-5% DAT_KBD B16 B7 *Header_1X6_NC
(7) SIO_SLP_S5# A15 GPIO31/GPTP-OUT2/BCM_E_DAT GPIO012/I2C1H_DATA/I2C2D_DATA A7
(40,63,74) ACAV_IN_NB GPIO30/GPTP-IN2/BCM_E_INT# GPIO013/I2C1H_CLK/I2C2D_CLK B48 MXM_SMBDAT
GPIO130/I2C2A_DATA MXM_SMBDAT (19)
R692 4.7K +/-5% CLK_MSE B49 MXM_SMBCLK
GPIO131/I2C2A_CLK MXM_SMBCLK (19)
HOST INTERFACE A47 CHARGER_SMBDAT
GPIO132/I2C1G_DATA CHARGER_SMBDAT (63)
A6 B50 CHARGER_SMBCLK
(6,9) SIO_EXT_SMI# GPIO011/nSMI GPIO140/I2C1G_CLK CHARGER_SMBCLK (63)
R693 4.7K +/-5% DAT_MSE (11) SIO_RCIN#
A27 B52 CARD_SMBDAT
GPIO061/LPCPD# GPIO141/I2C1F_DATA/I2C2B_DATA CARD_SMBDAT (33,61)
LPC_LDRQ#_MEC B29 A49 CARD_SMBCLK
LDRQ# GPIO142/I2C1F_CLK/I2C2B_CLK CARD_SMBCLK (33,61)
+3.3V_ALW_PCH A28 B53 pull up 2.2K
(8,40,55) IRQ_SERIRQ SER_IRQ GPIO143/I2C1E_DATA USH_SMBDAT (55)
B30 A50 on UHS side
(9,33,34,35,40) PCH_PLTRST#_EC LRESET# GPIO144/I2C1E_CLK USH_SMBCLK (55)
(9) CLK_PCI_5055 CLK_PCI_5055 A29
R694 10K +/-5% AC_PRESENT B31 PCI_CLK +3.3V_ALW
(8,34,40,55) LPC_LFRAME# LFRAME#
(8,34,40,55) LPC_LAD0 A30 DELL PWR SW INF
B32 LAD0 A59
(8,34,40,55) LPC_LAD1 LAD1 BGPO0
pull up 100K to +RTC_CELL on conn side
R699 100K+/-5% SUS_ON (8,34,40,55) LPC_LAD2 A31 B63 VCI_IN2#
B33 LAD2 VCI_IN2# A60 R695 R696 R697 R698
(8,34,40,55) LPC_LAD3 LAD3 VCI_OUT ALWON (64)
R700 100K+/-5% DDR_ON (7,40) CLKRUN# A32 A63 VCI_IN1# pull up 100K to +RTC_CELL on conn side 10K 10K 10K *100K_NC
CLKRUN# VCI_IN1#

G2
(11) SIO_EXT_SCI#
A33 B67 +/-5% +/-5% +/-5% +/-5%
GPIO100/nEC_SCI VCI_IN0# POWER_SW_IN# (43,46)
R703 2.7K +/-5% AUX_ON B1 JDEG1
VCI_OVRD_IN ACAV_IN (46,63,74)
LPC have internal pull up in PCH A1 DOCK_PWR_SW#

GND
R707 100K+/-5% DOCK_POR_RST# VCI_IN3# 6
MASTER CLOCK 6
MEC_XTAL1 A61 PECI B51 +PECI_VREF R701 0 +/-5% HOST_DEBUG_RX R702 0 +/-5% 5
XTAL1 PECI_VREF +1.05V_RUN_VTT 5
R710 100K+/-5% A_ON MEC_XTAL2 A62 A48 PECI_EC_R R704 43+/-1% HOST_DEBUG_TX R705 0 +/-5% 4
XTAL2 PECI PECI_EC (11) 4
R706 0 +/-5% B62 MSDATA 3
(46) EC_32KHZ_EMC4002 GPIO160/32KHZ_OUT 3
R712 *8.2K_NC +/-5% RESET_OUT# I2S B17 T159 MSCLK 2
R708 *0_NC +/-5% I2S_DAT B27 EC_I2S_SCLK_L R709 *0_NC +/-5% 1 2

GND
(40) EC_32KHZ_ECE5048
VSS_RO

I2S_CLK 1
VR_CAP

B B
R713 100K+/-5% EN_INVPWR B28 EC_I2S_LRCLK_L R711 *0_NC +/-5%
VSS[1]
VSS[4]

I2S_WS
AGND

Pin A6 (SIO_EXT_SMI#) and 5028 de-pop

NC1
NC2
NC3

R714 10K +/-5% MSDATA 5048 pop C747

EP

A33 (SIO_EXT_SCI#) are

G1
0.1uF
R715 100K+/-5% PCH_ALW_ON
open drain output, and have MEC5055-LZY 16V,X7R PECI_VREF Trace width 20mils
B34
A64
B68

B66

B11
B60

B12

B54

C1

pull up resister on PCH side C747 close to U45 at least 250 mils *Header_1X6_NC
R716 10K +/-5% 1.05V_0.8V_PWROK DB Version 0.12
Pop R709 & R711 for 5045,
R1836 *10K_NC +/-5% TOUCH_SCREEN_PD# C748 R709 and R711 are not required
4.7uF if MEC5055's I2S block is disabled in firmware.
6.3V,X5R if MEC5055's I2S function is enabled,
7. c0603h9 then the pull down is required, 5055's
I2S DMA controller is default disabled.

15 mil at least 15 mil remove one bead

+3.3V_ALW circuit close to U49 B57 CLK_PCI_5055 +3.3V_M

+RTC_CELL
R717 R718 +3.3V_ALW
10K *10_NC R723 +RTC_CELL
+/-5% +/-5% +RTC_CELL 100K
R724 +/-5%
JTAG_RST# R719 10K
PCH_PWRGD# (46)
100K +/-5% D R803
C749 R720 C750 +/-5% R721 100K
0.1uF *100_NC *4.7pF_NC VCI_IN1# 100K FWP# +/-5%
16V,X7R +/-5% 50V,NPO +/-5%
follow SMSC-FAE suggestion DOCK_PWR_SW# R722 10K +/-5% R726 RESET_OUT# G 2N7002W-7-F VCI_IN2#
short pad and pull-up (46) DOCK_PWR_SW# DOCK_PWR_BTN# (27)
*10K_NC Q67
MISS STH HERE
Close pin A29 C751 +/-5%
1uF S
10V,X5R

MEC_XTAL2
2
1

A C753 A
33pF
Y2 50V,NPO +3.3V_ALW
XTAL 32.768KHz Cap Value (C755) Resistor Value (R725) +/- 5% Board Ver Cap Value (C744) Resistor Value (R663) +/- 5% System
+3.3V_ALW
3
4

4700PF 240K SSI (X00) 4700PF 240K Brooks 15

R663

MEC_XTAL1 R725
4700PF 130K PT (X01) 240K
+/-5%
4700PF 130K Brooks 17 Ever Light
8.2K 4700PF ST (X02) SYSTEM_ID 4700PF Brooks 15 10 BIT
62K/33K 62K /33K
C754
33pF
+/-1%
BOARD_ID 4700PF 8.2K /4.3K QT(A00) C744 4700PF 8.2K /4.3K Brooks 17 10 BIT
Technology Limited
50V,NPO 4.7nF Title
C755 4700PF 2K (X04) 50V,X7R 4700PF 2K 38 -- SIO (MEC5055)
4.7nF
50V,X7R 4700PF 1K 4700PF 1K Size Document Number Rev
32KHz Thunder 1A
DIFFERERNT FROM DELL
Date: Thursday, January 27, 2011 Sheet 39 of 84
5 4 3 2 1
 5 4 3 2 1

+3.3V_ALW
+3.3V_ALW2

R727 100K +/-5% SLICE_BAT_PRES# +3.3V_ALW CLK_PCI_5048 CLK_SIO_14M

R728 10K +/-5% PCIE_WAKE# R729 10K +/-5% USB_SIDE_EN#

R732 R733
R730 100K +/-5% DCIN_CBL_DET# 8. R731 10K +/-5% ESATA_USB_PWR_EN# 10 *10_NC
C756 C757 C758 C759 C760 C761 +/-1% +/-1%
R734 *100K_NC +/-5% VGA_ID 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF
16V,X7R 16V,X7R 16V,X7R 16V,X7R 16V,X7R 10V,X7R
R736 100K +/-5% CPU_DETECT#
C762 C763
R737 100K +/-5% TP_DET# 4.7pF *4.7pF_NC
50V,NPO 50V,NPO

D Close pin 56 Close pin 64 D

+3.3V_ALW
+3.3V_RUN

R739 100K +/-5% DGPU_PWR_LEVEL

A17
B30
A43
A54
R738 100K +/-5% WIRELESS_ON#/OFF

B5
+3.3V_ALW
U47
R742 100K +/-5% D_CLKRUN#

VCC1
VCC1
VCC1
VCC1
VCC1
R743 100K +/-5% D_DLDRQ1# B52 B63 SIO_SLP_A# (7,69) C764
(24) CRT_SWITCH GPIOA0 GPIOI1
A49 A60 0.75V_DDR_VTT_ON 0.1uF
(65) DDR_1.5V_CNTRL0 GPIOA1 GPIOI2/TACH0 0.75V_DDR_VTT_ON (65,72)
R744 100K +/-5% D_SERIRQ B53 A61 SIO_SLP_S4# (7,18) 16V,X7R
(34) MCARD_MISC_PWREN GPIOA2 GPIOI3
DCIN_CBL_DET# A50 B65 SIO_SLP_S3# (7)
(62) DCIN_CBL_DET# GPIOA3 GPIOI4
R1072 100K +/-5% DGPU_ALERT# LID_CL_SIO# B54 A62 IMVP_PWRGD (71)
A51 GPIOA4 GPIOI5 B66 R745 0 +/-5%
T179 GPIOA5 GPIOI6 IMVP_VR_ON (71)

5
R746 *10K_NC +/-5% SP_TPM_LPC_EN PCIE_WAKE# B55 A63 U48 D25
(19,31,33,34,61) PCIE_WAKE# GPIOA6 GPIOI7 DOCK_AC_OFF_EC (74)
DGPU_PWR_LEVEL A52 (39,63,74) ACAV_IN_NB
2 SDM10K45-7-F
(19) DGPU_PWR_LEVEL GPIOA7 B67 AUX_EN_WOWL (33)
4 A C DOCK_AC_OFF (27,74)
USB_SIDE_EN# A33 GPIOJ0 A64 TP_DET# DOCK_AC_OFF_EC 1
(61) USB_SIDE_EN# GPIOB0 GPIOJ1/TACH1 TP_DET# (41)
B36 A5
(61) EN_I2S_NB_CODEC# GPIOB1 GPIOJ2/TACH2 SIO_SLP_LAN# (7,49)
A34 B6 SIO_SLP_SUS# (7) 74AHC1G08GW R748
(55) USH_PWR_STATE#

3
B37 GPOC2 GPIOJ3 A6 33K
(74) EN_DOCK_PWR_BAR GPOC3 GPIOJ4 GPIO_PSID_SELECT (62)
A35 B7 +/-5%
(22) PANEL_BKEN_EC GPOC4 GPIOJ5 MODC_EN (29)
B38 A7
(7,22) ENVDD_PCH GPOC5 GPIOJ6 DOCK_HP_DET (61)
LCD_TST A36 B8 DOCK_MIC_DET (61)
(22) LCD_TST GPOC6/TACH4 GPIOJ7
R740 100K +/-5% PBATT_OFF A37
(62) PSID_DISABLE# GPIOC7
B40 A8 ME_FWP ME_FWP (8)
(62) PBAT_PRES# GPIOD0 GPIOK0
R741 100K +/-5% RUN_ON A38 B9
(50) DOCKED GPIOC1 GPIOK1/TACH3 MASK_SATA_LED# (44)
B41 B10
(27) DOCK_DET# GPIOC0 GPIOK2 1.8V_RUN_PWRGD (66)
R750 10K +/-5% SYS_LED_MASK# A39 A10 LED_SATA_DIAG_OUT# (44)
(61) AUD_NB_MUTE# GPIOB7 GPIOK3
B42 B11
(35) MCARD_WWAN_PWREN GPIOB6 GPIOK4 TEMP_ALERT# (6,11)
R751 100K +/-5% 0.75V_DDR_VTT_ON A40 A11 RUN_ON
(22) LCD_VCC_TEST_EN GPIOB5 GPIOK5 RUN_ON (4,61,66,67,72,73)
B43 B12
(22) CCD_OFF GPIOB4 GPIOK6 LED_WLAN_WWAN_DIAG_OUT# (44)
R1068 100K +/-5% RUN_GFX_ON A41 A12 SPI_WP#_SEL (42)
(61) AUD_HP_NB_SENSE GPIOB3 GPIOK7
ESATA_USB_PWR_EN# B44
(30) ESATA_USB_PWR_EN# GPIOB2
C R752 100K +/-5% LCD_TST B60 R1062, R1057, R1058, R1059 C
(5028) IRTX GPIOL0/PWM7 A57 R1062 10K +/-5% Pop
R753 100K +/-5% DGPU_PWR_EN NVRAM_PWR_EN B32
(5028) IRRX GPIOL1/PWM8 B64 R1057 0 +/-5% R1060, R1061, R1056
GPIOD1 (5028) VSS GPIOL2/PWM0 5028
PBATT_OFF A31 B68
(74) PBATT_OFF GPIOD2 (5028) NC GPIOL3/PWM1
R754 100K +/-5% VGA_ID B33 A9 R1058 0 +/-5% De-pop N/A
(27,62,74) SLICE_BAT_PRES# GPIOD3 (5028) VSS GPIOL4/PWM3
B15 B1
(73) 1.5V_RUN_PWRGD GPIOD4 (5028) NC GPIOL5/PWM2
R755 100K +/-5% CPU_VTT_ON A15 A18 R1059 0 +/-5%
(4,67) VCCSA_CNTRL1 GPIOD5 (5028) VSS GPIOL6
B16 A44 R1060 0 +/-5% Pop
(4,67) VCCSA_CNTRL0 GPIOD6 (5028) VSS GPIOL7/PWM5
A16 5048 Floating all pin and
(65) DDR_1.5V_CNTRL1 GPIOD7 B34
R1099 *100K_NC +/-5% DGPU_SELECT#
(5028) NC GPIOM1 B39 R1061 0 +/-5% firmware must to set.
(5028) VSS GPIOM3/PWM4 De-pop
A1 B51 R1056 0 +/-5%
(44) VOL_MUTE_LED# GPIOE0/RXD (5028) VSS GPIOM4/PWM6
B2
(44) NUM_LED# GPIOE1/TXD
A2
B3 GPIOE2/RTS# A27
(35) MCARD_PCIE_SATA# GPIOE3/DSR# LAD0 LPC_LAD0 (8,34,39,55)
CPU_DETECT# A3 A26
(2) CPU_DETECT# GPIOE4/CTS# LAD1 LPC_LAD1 (8,34,39,55)
SMSC FAE suggestion GPIOE6:5048-A42 no connect DGPU_PWR_EN B45 B26 LPC_LAD2 (8,34,39,55)
(19) DGPU_PWR_EN GPIOE5/DTR# LAD2
when it is not used,but the EC firmware should DGPU_ALERT# A42 B25 +3.3V_ALW
configure this GPIO as GPO (output) to avoid it (19) DGPU_ALERT# GPIOE6/RI# LAD3 LPC_LAD3 (8,34,39,55)
MXM_DP_HDMI_HPD B4 A21 LPC_LFRAME# (8,34,39,55)
from floating.This pin's default function is GPI (input). GPIOE7/DCD# LFRAME# B22
LRESET# PCH_PLTRST#_EC (9,33,34,35,39)
A28 CLK_PCI_5048
PCICLK CLK_PCI_5048 (9)
A59 B20 R757
(29) ZODD_WAKE# GPIOF0 CLKRUN# CLKRUN# (7,39)
B62 A23 LPC_LDRQ0# (8) 100K
(55) BCM5882_ALERT# GPIOF1 LDRQ0#
A58 A22 LPC_LDRQ1# (8) +/-5%
(7) SUSACK# GPIOF2 LDRQ1#
B61 B21 IRQ_SERIRQ (8,39,55)
(24) EDID_SELECT# GPIOF3/TACH8 SER_IRQ
VGA_ID A56 A32 CLK_SIO_14M LID_CL_SIO# R758 10 +/-5%
(11,19) DGPU_PWROK GPIOF4/TACH7 14.318MHZ/GPIOM0 CLK_SIO_14M (10) LID_CL# (44,61)
VGA_ID B59 B35
1 = UMA RUN_GFX_ON A55 GPIOF5 (5028) NC CLK32/GPIOM2 EC_32KHZ_ECE5048 (39)
C765
(19) RUN_GFX_ON GPIOF6
0 = DIS/SGfx (6,11) SLP_ME_CSW_DEV#
B58
GPIOF7
47nF
B29 D_LAD0 (27) 16V,X7R
DLAD0 B28
DLAD1 D_LAD1 (27)
B47 A25 D_LAD2 (27)
(49) LAN_DISABLE#_R GPIOG0/TACH5 DLAD2
17" AUX_MODE_EN A45 A24 D_LAD3 (27)
SYS_LED_MASK# B48 GPIOG1 DLAD3 B23
(44) SYS_LED_MASK# GPIOG2 DLFRAME# D_LFRAME# (27)
R756 *1K_NC +/-5% ME_FWP A46 A19 D_CLKRUN#
(38) DYN_TURB_SYS_PWR_ALRT# GPIOG3 DCLKRUN# D_CLKRUN# (27)
R759 0 +/-5% B49 B24 D_DLDRQ1# D_DLDRQ1# (27)
(11) SIO_EXT_WAKE# GPIOG4 DLDRQ1#
ME_FWP PCH has internal 20K PD. WIRELESS_LED# A47 A20 D_SERIRQ D_SERIRQ (27)
B50 GPIOG5 DSER_IRQ +3.3V_RUN
B (7) PCH_PCIE_WAKE# GPIOG6 B
A48
(33) WLAN_RADIO_DIS# GPIOG7/TACH6 A29 BC_INT#_ECE5048 (39)
BC_INT# B31
BC_DAT BC_DAT_ECE5048 (39)
WIRELESS_ON#/OFF B13 A30 BC_CLK_ECE5048 (39) R760
(44) WIRELESS_ON#/OFF GPIOH0 BC_CLK
A13 10K
(33) BT_RADIO_DIS# GPIOH1
A53 +/-5%
(35) WWAN_RADIO_DIS# SYSOPT1/GPIOH2
B57 A4 RUNPWROK_R1 RUNPWROK_R1
(6,7) SYS_PWROK SYSOPT0/GPIOH3 PWRGD RUNPWROK_R1 (2,39)
DGPU_SELECT# B14 D
(21,22,24) DGPU_SELECT# GPIOH4
A14 B56 SP_TPM_LPC_EN
GPIOH5 OUT65 SP_TPM_LPC_EN (55)
CPU_VTT_ON B17
(68) CPU_VTT_ON GPIOH6
B18
(7) PCH_DPWROK GPIOH7 2N7002W-7-F
B19 TEST_PIN G
TEST_PIN Q68 RUN_ON# (72)
B46 CAP_LDO
CAP_LDO S
B27 C766 R762
VSS C1 4.7uF
EP 1K
6.3V,X5R +/-5%
c0603h9 +3.3V_ALW +3.3V_ALW
ECE5028-LZY

R1065
100K R1066
+/-5% 100K
+/-5%

MXM_DP_HDMI_HPD

D D D D

G Q118 G Q119 G Q120 G Q121

(19,25) MXM_DPC_HPD (19,23) MXM_MBDP_HPD (19,27) DOCK_DP2_HPD
2N7002W-7-F
2N7002W-7-F 2N7002W-7-F 2N7002W-7-F
S S S S

A A

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Technology Limited
Title
39 -- SIO (ECE5048)
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 40 of 84

5 4 3 2 1
 5 4 3 2 1

D D

+3.3V_RUN
TP Module
0524GC: CIS OK
R765 R766 CONN-FPC
4.7K 4.7K G4
8 GND4 G3
+/-5% +/-5% (40) TP_DET# 8 GND3
PS2_CLK_TS 7 G2
FB15 1 2 600 ohm,200mA +/-25% TP_CLK PS2_DAT_TS 6 7 GND2 G1
(39) CLK_TP_SIO 6 GND1
+3.3V_RUN
5
FB16 1 2 600 ohm,200mA +/-25% TP_DATA 4 5
(39) DAT_TP_SIO 4
TP_DATA 3
TP_CLK 2 3
C772 C773 C774 C775 1 2
10pF 10pF 10pF 10pF 1
50V,NPO 50V,NPO 50V,NPO 50V,NPO
+3.3V_RUN JTP1

C771
0.1uF
16V,X7R

C C

Keyboard Module

1116: update to CIS.

JKB1

1 +5V_RUN +3.3V_ALW
(11) KB_DET# 1
PS2_CLK_TS 2
PS2_DAT_TS 3 2
4 3
+3.3V_ALW 4
+5V_RUN
5 G1 C776 C777
6 5 GND1 G2 0.1uF 0.1uF
(39) BC_INT#_ECE1077 6 GND2
7 G3 16V,X7R 16V,X7R
(39) BC_DAT_ECE1077 7 GND3
8 G4
9 8 GND4
(39) BC_CLK_ECE1077 9
10
10
Place close to Connector
CONN-FPC
B B

A A

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Title
40 -- ECE1099+KB+TP
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 41 of 84

5 4 3 2 1
 5 4 3 2 1

D PCH, EC SPI ROM For BIOS (2M Byte) D

+3.3V_SPI
JSPI1
EC_SPI_CS1# 1
PCH_SPI_CS1# 2 1
(8) PCH_SPI_CS1# 2
C780 EC_SPI_DO 3
0.1uF R769 R770 PCH_SPI_DO 4 3
(8) PCH_SPI_DO 4
R768 16V,X7R 4.7K 3.3K EC_SPI_DIN 5
3.3K +/-5% +/-5% PCH_SPI_DIN 6 5
(8) PCH_SPI_DIN 6
+/-5% U52 EC_SPI_CLK 7
8 1 EC_SPI_CS1# PCH_SPI_CLK 8 7
VCC CS (8) PCH_SPI_CLK 8
7 2 SPI_DIN32 R771 33 +/-5% EC_SPI_DIN EC_SPI_CS0# 9
EC_SPI_CLK R772 33 +/-5% SPI_CLK32 6 HOLD DO 3 R773 *0_NC +/-5% PCH_SPI_CS0# 10 9
CLK WP SPI_WP#_SEL (40) (8) PCH_SPI_CS0# 10
EC_SPI_DO R774 33 +/-5% SPI_DO32 5 4 11
DI GND +3.3V_SPI 11
12
+3.3V_M 12
C781 W25Q16CVSSIG 13 G1
*22pF_NC 14 13 GND G2
50V,NPO 15 14 GND
16 15
16

*CONN-FPC_NC

PCH SPI ROM For iAMT (8M Byte)

+3.3V_M +3.3V_SPI +3.3V_SPI
+3.3V_ALW R775 0 +/-5% EC_SPI_CS1# R1819 0 +/-5% PCH_SPI_CS1#
R776 *0_NC +/-5%
EC_SPI_DO R1820 0 +/-5% PCH_SPI_DO

C EC_SPI_DIN R1821 0 +/-5% PCH_SPI_DIN C

C782
R779 R780 R781 0.1uF EC_SPI_CLK R1822 0 +/-5% PCH_SPI_CLK
3.3K 3.3K 4.7K 16V,X7R
+/-5% +/-5% +/-5% EC_SPI_CS0# R1823 0 +/-5% PCH_SPI_CS0#
U53
8 1 EC_SPI_CS0#
7 VDD CE# 2 SPI_DIN64 R785 33 +/-5% EC_SPI_DIN
EC_SPI_CLK R787 33 +/-5% SPI_CLK64 6 HOLD# SO 3 R788 *0_NC +/-5% SPI_WP#_SEL
EC_SPI_DO R789 33 +/-5% SPI_DO64 5 SCK WP# 4
SI Vss Put close to JSPI1
W25Q64CVSSIG
C783
*22pF_NC
50V,NPO

B B

A A

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Title
41 -- BIOS ROM(4M+8M)
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 42 of 84

5 4 3 2 1
 5 4 3 2 1

D D

C C

POWER Button Board MB Side

7
JPB1

GND1
POWER_SW# 1
2 1
BREATH_PWRLED 3 2
(44,61) BREATH_PWRLED 3
4
5 4 0531GC: CIS OK
5

GND2
6
6

CONN-WTB

8
B B

+RTC_CELL +RTC_CELL
D31
*DA204UT106_NC
1

A R805 A
100K
+/-5%
3

R806 10K +/-5% POWER_SW#

(39,46) POWER_SW_IN#

C787 C788 From Power Button board Ever Light

1uF *1uF_NC
10V,X5R 10V,X5R
Technology Limited
Title
43 -- DB Connector x 7
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 43 of 84

5 4 3 2 1
 5 4 3 2 1

MASK_BASAE_LEDS#
WLAN/WWAN BT MASK_BASAE_LEDS#
+3.3V_ALW
+5V_ALW Q74
G2N7002W-7-F
+3.3V_RUN
R809

E
R808 Q75 Q73
100K G 2N7002W-7-F 100K S D
BT_LED# (61)
+/-5% +/-5%
47K
SDM10K45-7-F D65 D
S D C A S D B
(33,35) LED_WWAN_WLAN_OUT#
10K Q76
2N7002W-7-F
G
G 2N7002W-7-F (33) BT_LED
R811 *0_NC MUN5114T1G

C
Q87 +/-5%
D (40) MASK_SATA_LED# S D
LED_WLAN_WWAN_OUT (61)
SDM10K45-7-F D66 BT Connector side ave pull-down resistor
C A
(40) LED_WLAN_WWAN_DIAG_OUT#

+5V_RUN

E
Q72

47K
B
(40) NUM_LED#
10K

MUN5114T1G
C

NUM_LED (61)
HDD MASK_BASAE_LEDS#

+5V_RUN +3.3V_ALW +5V_ALW

+3.3V_ALW
E

Q81

E
R817 Q83 Q82
100K G2N7002W-7-F
47K

5
+/-5% U54
47K
B SDM10K45-7-F D63 2
(40) VOL_MUTE_LED# (40,61) LID_CL#
S D C A S D B 4 MASK_BASAE_LEDS#
10K (8) SATA_ACT#
10K
1
(40) SYS_LED_MASK#
*MUN5114T1G_NC 74AHC1G08GW
C

3
G 2N7002W-7-F R818 *0_NC MUN5114T1G
VOL_MUTE_LED (61)

C
Q84 +/-5%
(40) MASK_SATA_LED#
HDD_LED (61)
SDM10K45-7-F D64
C C A C
(40) LED_SATA_DIAG_OUT#

White Amber
Charge

From TOP View:

WIRELESS_OFF
B B

WIRELESS_ON
BREATH PWRLED
+3.3V_SUS +5V_ALW +5V_ALW

R827
G 100K U55
5

+/-5% TC7SZ04FU

S D B_LED_R# 2 4 BREATH_PWRLED (43,61)

(27,39) BREATH_LED#
NC
Q88 JSWITCH1
3

2N7002W-7-F Header_1X3
HN13030-0000-9H
PU at EC side. 1
2 1 G1
3 2 GND1 G2
(40) WIRELESS_ON#/OFF 3 GND2
C789
1uF
10V,X5R

A A

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Title
44 -- LED+Control, Wirele
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 44 of 84

5 4 3 2 1
 5 4 3 2 1

D D

Remove IOL Board

C C

B B

A A

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Technology Limited
Title
45 -- Hall sensor
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 45 of 84

5 4 3 2 1
 5 4 3 2 1

REM_DIODE1_N REM_DIODE2_N REM_DIODE4_N REM_DIODE8_N

E
C791
A B Q89 C792
B C793
A B Q90 C794
B C795
A B Q91 C796
B B Q92 C797
A
2.2nF MMST3904-7-F 2.2nF MMST3904-7-F 2.2nF MMST3904-7-F MMST3904-7-F
50V,X7R *100pF_NC 50V,X7R *100pF_NC 50V,X7R *100pF_NC *100pF_NC
Q Q Q Q

C
REM_DIODE1_P REM_DIODE2_P REM_DIODE4_P REM_DIODE8_P

Put A close to Guardian. Put A close to Guardian. Put A close to Guardian. Put A close to Q
Put B close to Diode Q Put B close to Diode Q Put B close to Diode Q

Place Q under CPU for OTP sensor. Put Q on the Bot side of ??? for Skin temperature. Place Q under Butterfly's CH A (BOT side). Place Q under Butterfly's CH B (BOT side).
D D
REM_DIODE3_N
E

C798
A B Q93 C799
B
2.2nF +RTC_CELL
50V,X7R
Q
MMST3904-7-F
*100pF_NC OTP temperature 88C U57
C

74AHC1G08GW

5
REM_DIODE3_P
2
DOCK_PWR_SW# (39)
Put A close to Guardian. PWR_SW#_4022 4
1
Put B close to Diode Q POWER_SW_IN# (39,43)
U58

3
Place Q near Docking CONN on BOT side.
10
(39) BC_DAT_EMC4002 SMDATA/BC-LINK_DATA
11 39
(39) BC_CLK_EMC4002 SMBCLK/BC-LINK-CLK VIN1 48 R830 *0_NC +/-5%
+3.3V_M REM_DIODE1_P 36 VCP1 45 R831 0 +/-5%
DP1/VREF_T VCP2 IINP (63)
REM_DIODE1_N 35 R832 *0_NC +/-5%
DN1/THERM 44 REM_DIODE4_P
REM_DIODE2_P 38 DP4/DN8 43 REM_DIODE4_N
REM_DIODE2_N 37 DP2 DN4/DP8 REM_DIODE8_N
R833 DN2 47 REM_DIODE5_P REM_DIODE8_P
8.2K REM_DIODE3_P 41 DP5/DN9 46 REM_DIODE5_N
+/-5% REM_DIODE3_N 40 DP3/DN7 DN5/DP9 Thermal Sensor Location
THERMATRIP2# DN3/DP7 1
DP6/VREF_T2 2 R834 10K +/-5%
DN6/VIN2 +3.3V_ALW CH NO. Device
+3.3V_M R1086 22 +/-5% 4
VDD 12
ATF_INT#BC-LINK_IRQ# BC_INT#_EMC4002 (39)
+RTC_CELL
21 26 PWR_SW#_4022 D1 OTP
C801 RTC_PWR3V POWER_SW# 27
+3.3V_M discharge circuit on power page ACAVAIL_CLR ACAV_IN (39,63,74)
C986 0.1uF 20 FAN1_PWM R835 10K +/-5%
THERMTRIP_SIO/PWM1/GPIO5 +3.3V_RUN
1uF 16V,X7R C800 R836 10K +/-5% 18 25 D2 SKIN (BOT)
+3.3V_M VDD_PWRGD SYS_SHDN# THERM_STP# (64) Open Drain (5V)
6.3V,X5R 1uF R837 1K +/-5% 17
(39) PCH_PWRGD# 3V_PWROK#
10V,X5R R838 10K +/-5%
THERMATRIP1# 22 D3 Dokcing (BOT)
THERMATRIP2# 23 THERMTRIP1#
C C
THERMATRIP3# 24 THERMTRIP2# 19 R840 *10K_NC +/-5%
THERMTRIP3# LDO_SHDN# +3.3V_M
D4 Butterfly DIMM 1 (BOT)
42 34
VSET LDO_POK
R841 4.7K 3 33 D5 TOP DIMM (stack)
C802 R842 +/-5% ADR_MODE/XEN LDO_SET
Vset resistor setting 0.1uF 953 6 32
16V,X7R +/-1% 5 VDDH1 VDDH2 31
VDDH1 VDDH2 D8 Butterfly DIMM 2 (BOT)
Ttrip Rset Rset R843
9 28 1K
(degree C) (ohm) VDDL1 VDDL2
+/-5% REST NO USE
7 29
8 FAN_OUT1 LDO_OUT/FAN_OUT2 30
85 787 FAN_OUT1 LDO_OUT/FAN_OUT2
FAN1_TACH_FB 15 16 FAN2_TACH_FB
14 TACH1/GPIO3 TACH2/GPIO4 13 FAN2_PWM R844 10K +/-5%
86 845 (39) EC_32KHZ_EMC4002 CLK_IN/GPIO2 PWM2/GPIO1 +3.3V_RUN

VSS
87 909

49
88 953 EMC4002-HZH

+3.3V_M
Pull-up Resistor
on ADDR_MODE/XEN
For Remotel
mode
SMBUS
Address
CPU Fan

G1
R845 CIS OK
Put A close to Guardian. 8.2K <=4.7K 2N3904 2F(r/w) FAN1_PWM JFAN1
+/-5%

GND1
1
THERMATRIP1# 2 1
30MIL 5V 2
10K 2N3904 2E(r/w) 3
C803 R846 0 +/-5% CPU_FAN_PWR 4 3
A +5V_RUN
C

GND2
Q94 0.1uF 5
B
R847 2.2K THERM_B1 B 16V,X7R 5 REM_DIODE5_N B
+1.05V_RUN_VTT 18K Thermistor 2F(r/w)
+/-5% MMST3904-7-F C804 C806

E
10uF 0.1uF Header_1X5
A B
E

G2
6.3V,X5R 16V,X7R C805 B Q95 C807
(2,11) H_THERMTRIP#
>=33K Thermistor 2E(r/w) 2.2nF MMST3904-7-F
50V,X7R *100pF_NC
Q

C
REM_DIODE5_P

Put A close to Guardian.

+3.3V_RUN R848 4.7K FAN1_TACH_FB
+/-5% Put B close to Diode Q

Place Q under Stack_SODIMM on TOP side.

+3.3V_RUN +3.3V_M
+3.3V_RUN +3.3V_RUN
1

R849
8.2K D42 D56
R850 R851 +/-5% *DA204UT106_NC *DA204UT106_NC
8.2K
+/-5%
2.2K
+/-5% THERMATRIP3# GFX Fan
3

G1
C808 FAN1_PWM FAN2_PWM
A
C

Q96 0.1uF FAN2_PWM JFAN2

B 16V,X7R

GND1
MMST3904-7-F 1
2 1
30MIL 5V
E

3 2
(19) DGPU_THERMTRIP# 3
R852 0 +/-5% GPU_FAN_PWR 4
+5V_RUN 4

GND2
Put A close to Guardian. 5
5
C809 C810
10uF 0.1uF Header_1X5

G2
6.3V,X5R 16V,X7R

A A

+3.3V_RUN R853 4.7K FAN2_TACH_FB

+/-5%
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Title
45 -- Thermal 4002 & FAN x 2
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 46 of 84

5 4 3 2 1
 5 4 3 2 1

D D

C C

Move to IOL board

B B

A A

Ever Light
Technology Limited
Title
47 -- AUDIO(92HD90B)+SPK+JACK
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 47 of 84

5 4 3 2 1
 5 4 3 2 1

D D

Move to IOL board

C C

B B

A A

Ever Light
Technology Limited
Title
48 -- AUDIO for Docking+Crystal
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 48 of 84

5 4 3 2 1
 5 4 3 2 1

+3.3V_RUN

R891 U?
10K U63
+/-5%
48 13 LAN_TX0+
(10) LANCLK_REQ# CLK_REQ_N MDI_PLUS0 LAN_TX0+ (50)
36 14 LAN_TX0-
(9) PLTRST_LAN# PE_RST_N MDI_MINUS0 LAN_TX0- (50)
44 17 LAN_TX1+
(10) CLK_PCIE_LAN PE_CLKP MDI_PLUS1 LAN_TX1+ (50)
45 18 LAN_TX1-
(10) CLK_PCIE_LAN# PE_CLKN MDI_MINUS1 LAN_TX1- (50)

PCIE
MDI
C849 0.1uF 16V,X7R PCIE_PRX_GLANTX_P7_C 38 20 LAN_TX2+
(10) PCIE_PRX_GLANTX_P7 PETp MDI_PLUS2 LAN_TX2+ (50)
C850 0.1uF 16V,X7R PCIE_PRX_GLANTX_N7_C 39 21 LAN_TX2-
D (10) PCIE_PRX_GLANTX_N7 PETn MDI_MINUS2 LAN_TX2- (50) D
41 23 LAN_TX3+ +3.3V_LAN
(10) PCIE_PTX_GLANRX_P7_C PERp MDI_PLUS3 LAN_TX3+ (50)
42 24 LAN_TX3-
(10) PCIE_PTX_GLANRX_N7_C PERn MDI_MINUS3 LAN_TX3- (50)

28 6 +3.3V_LAN C723
(10) LAN_SMBCLK SMB_CLK RSVD_NC

SMBUS
SMBus Address = 0xC8 31 22uF
(10) LAN_SMBDATA SMB_DATA 1 +RSVD_VCC3P3_1 R895 4.7K +/-1% 6.3V,X5R
R896 10K +/-5% RSVD_VCC3P3_1 2 +RSVD_VCC3P3_2 R897 4.7K +/-1% c0805h14
+3.3V_LAN RSVD_VCC3P3_2 5
R898 0 +/-5% LAN_DISABLE#_R 3 VDD3P3_IN
(11) PM_LANPHY_ENABLE LAN_DISABLE_N
R899 *10K_NC +/-5% 4 +3.3V_LAN_OUT Place close to pin5
VDD3P3_OUT
(40) LAN_DISABLE#_R
15 +3.3V_LAN_OUT_R R900 0 +/-5% r0603h6 C851
26 VDD3P3_15 19 1uF +1.0V_LAN
(50) LOM_ACTLED_YEL# 27 LED0 VDD3P3_19 29 10V,X5R
(50) LOM_SPD1000LED_ORG# 25 LED1 VDD3P3_29

LED
c0603h9
(50) LOM_SPD100LED_GRN# LED2
47 +1.0V_LAN
VDD1P0_47 46 C852 C853 C854 C855
+3.3V_LAN TP_LAN_JTAG_TDI 32 VDD1P0_46 37 +1.0V_LAN_4 R901 0 +/-5% r0603h6 0.1uF 0.1uF 0.1uF 0.1uF
T160 JTAG_TDI VDD1P0_37
TP_LAN_JTAG_TDO 34 10V,X5R 10V,X5R 10V,X5R 10V,X5R
T161 JTAG_TDO
R902 10K +/-5% TP_LAN_JTAG_TMS 33 43

JTAG
+1.0V_LAN_3 R903 0 +/-5% r0603h6
R904 10K +/-5% TP_LAN_JTAG_TCK 35 JTAG_TMS VDD1P0_43
JTAG_TCK 11 +1.0V_LAN_2 R905 0 +/-5%
VDD1P0_11
XTALO_R R906 0 +/-5% XTALO 9 40
XTALI 10 XTAL_OUT VDD1P0_40 22
XTAL_IN VDD1P0_22 16
VDD1P0_16 8 +1.05V_M
LAN_TEST_EN 30 VDD1P0_8
TEST_EN
RES_BIAS 12 7 REGCTL_PNP10 L24 R907 *0_NC +/-5%
RBIAS CTRL_1P0 4.7uH r0805h6
Y4 49
2 1 R908 R909 VSS_EPAD C856 C857
1K 3.01K WG82579LM[VER.C0,SLHA5] 22uF 0.1uF
C XTAL 25MHz +/-5% +/-1% 6.3V,X5R 10V,X5R C
c0805h14

C858 C859
33pF 33pF
50V,NPO 50V,NPO

Place these components close to WG82579.

+3.3V_ALW +3.3V_LAN

6
5 4
2 Q101
1 FDC655BN
C860 C861
10uF 0.1uF

3
+15V_ALW 6.3V,X5R 10V,X5R
c0805h14

+3.3V_ALW2
R911
100K
R912 +/-5%
B B
100K
+/-5%
3

5
6

R913 0 +/-5% 2 Q102A C862

(39) AUX_ON
2N7002DW-7-F 2.2nF
Q102B 50V,X7R
1

R914 *0_NC +/-5% 2N7002DW-7-F

(7,40) SIO_SLP_LAN#

A A

Ever Light
Technology Limited
Title
48 -- LOM 82579
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 49 of 84

5 4 3 2 1
 5 4 3 2 1

No need for Intel LAN.

D D

U64

3 37 SW_LAN_TX0-
(49) LAN_TX0- A0- B0-
(49) LAN_TX0+
2 38 SW_LAN_TX0+
7 A0+ B0+ 33 SW_LAN_TX1-
(49) LAN_TX1- A1- B1-
6 34 SW_LAN_TX1+
(49) LAN_TX1+ A1+ B1+
10 28 SW_LAN_TX2-
(49) LAN_TX2- A2- B2-
(49) LAN_TX2+
9 29 SW_LAN_TX2+
12 A2+ B2+ 24 SW_LAN_TX3-
(49) LAN_TX3- A3- B3-
(49) LAN_TX3+
11 25 SW_LAN_TX3+
A3+ B3+
LOM_ACTLED_YEL# 15 17 LAN_ACTLED_YEL#
(49) LOM_ACTLED_YEL# LEDA0 LEDB0
LOM_SPD1000LED_ORG# 16 18 LED_1000_ORG#
(49) LOM_SPD1000LED_ORG# LEDA1 LEDB1
LOM_SPD100LED_GRN# 42 41 LED_100_GRN#
(49) LOM_SPD100LED_GRN# LEDA2 LEDB2
13 35
(40) DOCKED SEL C0- DOCK_LOM_TRD0- (27)
36 DOCK_LOM_TRD0+ (27)
5 C0+ 31
+3.3V_LAN T162 PD C1- DOCK_LOM_TRD1- (27)
32
C1+ DOCK_LOM_TRD1+ (27)
26
C2- DOCK_LOM_TRD2- (27)
1 27 DOCK_LOM_TRD2+ (27)
4 VDD_1 C2+ 22
DOCKED 8 VDD_2 C3- 23
DOCK_LOM_TRD3- (27)
DOCK_LOM_TRD3+ (27)
SEL 0: RJ45. C863 C864 C865 14 VDD_3 C3+
21 VDD_4 19
SEL 1: Dock. 0.1uF 0.1uF 0.1uF
30 VDD_5 LEDC0 20
DOCK_LOM_ACTLED_YEL# (27)
16V,X7R 16V,X7R 16V,X7R VDD_6 LEDC1 DOCK_LOM_SPD1000LED_ORG# (27)
39 40 DOCK_LOM_SPD100LED_GRN# (27)
VDD_7 LEDC2
43
GND
Reserve pull up.
PI3L720ZHE

+3.3V_LAN
LAN Switch table
C C

DOCKED(SEL) LOM signals LED SIGNALS Switch

R915 *10K_NC +/-5% LOM_SPD100LED_GRN#

R916 *10K_NC +/-5% LOM_SPD1000LED_ORG# L Ax to Bx LEDAx to LEDBx MB

R917 *10K_NC +/-5% LOM_ACTLED_YEL# Need to update connecter PN.
H Ax to Cx LEDAx to LEDCx DOCK

+3.3V_LAN

RJ/MAG Connector
JLOM1
17 R918 150 +/-5% LED_100_GRN#
GREEN
SW_LAN_TX0+ 11 15 R919 150 +/-5% LED_1000_ORG#
TRD1+ ORANGE
12
TRCT1
SW_LAN_TX0- 10 16
TRD1- COMMON
SW_LAN_TX1+ 4
TRD2+
6
TRCT2
SW_LAN_TX1- 5 13 R920 150 +/-5% LAN_ACTLED_YEL#
TRD2- YELLOW
SW_LAN_TX2+ 3
TRD3+
1 14
TRCT3 COMMON0
SW_LAN_TX2- 2
B TRD3- B
SW_LAN_TX3+ 8
TRD4+
7
TRCT4
SW_LAN_TX3- 9
TRD4-

GND1
GND2
GND3
GND4
+LOM_VCT_MB
C866 C867 C868 C869 C871 C872 C873 C875
*4.7pF_NC *4.7pF_NC *4.7pF_NC *4.7pF_NC *4.7pF_NC *4.7pF_NC *4.7pF_NC *4.7pF_NC C870 C874

G1
G2
G3
G4
50V,NPO 50V,NPO 50V,NPO 50V,NPO 50V,NPO 50V,NPO 50V,NPO 50V,NPO 0.1uF 1uF CONN-RJ45
10V,X5R 6.3V,X5R

+3.3V_LAN

LAN_ACTLED_YEL# R921 *10K_NC +/-5%

LED_100_GRN# R922 *10K_NC +/-5%

LED_1000_ORG# R923 *10K_NC +/-5%

A A

Ever Light
Technology Limited
Title
49 -- RJ45+MID, MUX Switch
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 50 of 84

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Ever Light
Technology Limited
Title
50 -- TPM for China
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 51 of 84

5 4 3 2 1
 5 4 3 2 1

D D

Move to IOL board

C C

B B

A A

Ever Light
Technology Limited
Title
51 -- Card Reader & Conn
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 52 of 84

5 4 3 2 1
 5 4 3 2 1

D D

Move to IOL board

C C

B B

A A

Ever Light
Technology Limited
Title
52 -- 15" 1394 Conn
Size Document Number Rev
<Doc> 1A

Date: Thursday, January 27, 2011 Sheet 53 of 84

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Ever Light
Technology Limited
Title
53 -- 17" 1394 Conn+ Power
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 54 of 84

5 4 3 2 1
 5 4 3 2 1

Q103 +3.3V_ALW_PCH
USB_GPIO27 R951 *0_NC +/-5% FDN338P
D D
USBP7+ R952 1.5K +/-5% 3 2

S
D
R953

G
1
4.7K
D +/-5%

Q104 G USB_GPIO27
2N7002W-7-F
S

U68A
+3.3V_ALW_USH +3.3V_ALW_USH

(9) USBP7- R957 0 +/-5% USBP7-_R P5 P7 FP_USBD-

R954 0 +/-5% USBP7+_R P6 USBD_DN USBH_DN_0 P8 FP_USBD+
(9) USBP7+ USBD_UP USBH_UP_0
USB_GPIO27 N7 P9 USBH_OC0# R955 4.7K +/-5%
USBD_ATTACH_GPIO_27 USBH_OC_0
P11
R956 *10K_NC +/-5% PLTRST1#_USH USBH_DN_1 P12
USBH_UP_1 P10 USBH_OC1
R958 *4.7K_NC +/-5% USH_LPCEN USBH_OC_1
CLK_PCI_TPMP2
(10) CLK_PCI_TPM LCLK
R959 *4.7K_NC +/-5% LPD# R960 0 +/-5% N3
(8,34,39,40) LPC_LAD0 LAD0_GPIO_20
R961 0 +/-5% M4
(8,34,39,40) LPC_LAD1 LAD1_GPIO_21
R962 4.7K +/-5% IRQ_SERIRQ_R R963 0 +/-5% K5
(8,34,39,40) LPC_LAD2 LAD2_GPIO_22
R964 0 +/-5% N4 G3 SPI_CLK
(8,34,39,40) LPC_LAD3 LAD3_GPIO_23 SSP_CLK0_GPIO_6
R965 2.2K +/-5% USH_SMBCLK R966 0 +/-5% K4 G2 SPI_CS
(8,34,39,40) LPC_LFRAME# LFRAME_N_GPIO_18 SSP_FSS0_GPIO_7
R967 *0_NC +/-5% IRQ_SERIRQ_R L4 H1 SPI_RXD
(8,39,40) IRQ_SERIRQ LSERIRQ_GPIO_19 SSP_RXD0_GPIO_8
R968 2.2K +/-5% USH_SMBDAT H2 SPI_TXD
R969 0 +/-5% PLTRST1#_USH M3 SSP_TXD0_GPIO_9
(9) PLTRST_USH# LRESET_N_GPIO_17
R970 2.2K +/-5% BCM5882_ALERT# USH_LPCEN M5 C3
(61) USH_LPCEN LPCEN SSP_CLK1_GPIO_10 T163
C R971 0 +/-5% LPD# N6 B2 C
(40) SP_TPM_LPC_EN LPCPD_N_GPIO_24 SSP_FSS1_GPIO_11 T164
R972 4.7K +/-5% USH_PWR_STATE# A2
SSP_RXD1_GPIO_12 T165
A1
SSP_TXD1_GPIO_13 T166
R973 4.7K +/-5% USBH_OC1 USH_SMBCLK M9
(39) USH_SMBCLK USH_SMBDAT L9 SMBCLK +SC_PWR
(39) USH_SMBDAT K9 SMBDAT
(40) BCM5882_ALERT# SMBALERT_N
R974 100 +/-5% M7 M11 SC_CLK R975 0 +/-5%
(61) SC_DET# SMB_GPIO_0 SC_CLK BCM5882_SCCLK (61)
R1015 *0_NC +/-5% N8 M12 SC_FCB R976 0 +/-5%
(33,56) BT_COEX_STATUS2 SMB_GPIO_1 SC_FCB AUX1UC (61)
F2 R977 0 +/-5%
R978 10 +/-5% CLK_PCI_TPM R979 0 +/-5% L7
USH_PWR_STATE#_R SC_SEL5V_GPIO_25 F1 R980 0 +/-5% BCM5882_GPIO25 (61)
(40) USH_PWR_STATE# WAKEUP_N SC_SEL18_GPIO_26 BCM5882_GPIO26 (61) C896
M2 R981 0 +/-5% C898
K1 SC_DET L11 SC_IO R982 0 +/-5% BCM5882_SCDET (61) 0.1uF *1uF_NC
C897 IDDQ_EN SC_IO M10 R983 0 +/-5% BCM5882_IO (61) 10V,X5R
SC_RST BCM5882_SCRST (61) 16V,X7R
4.7pF P1 N14 c0603h9
CORE_PWRDN SC_PWR_N14 P14
50V,NPO SC_PWR_P14 +SC_PWR
E12 L10 SC_TESTR984 0 +/-5%
ALDO_PWRDN SC_VCC SCC_CMDVCC_N (61)

R985 R986 R987 BCM5882B0KFBG

R988 *4.7K_NC +/-5% USH_LPCEN 1K 1K 1K Closer to chip pin-N14 and pin-P14.
+/-1% +/-1% +/-1%

Check internal PU from BCM5882

+3.3V_ALW_USH

+3.3V_ALW_USH
R989
*4.7K_NC U69
SPI_TXD 1 6
+/-5% SI VCC
SPI_CLK 2
3 SCK 8 SPI_RXD
(56) SPI_RST# RESET# SO C899
B B
SPI_CS 4 0.1uF
5 CS# 7 16V,X7R
(56) BCM5882_GPIO15 WP# GND
M45PE16-VMW6TG
R990
4.7K
Biometric Reader +/-5%

R1051 *0_NC +/-5%

+3.3V_ALW_USH need check part ST_M45PE16-VMW6TG
+3.3V_RUN R1052 0 +/-5% +3.3V_BIO ATMEL_AT45DB161D-SU-SL955
0524GC: CIS OK REV: H
C900
R991 *0_NC +/-5% 0.1uF
50V,X7R JBIO1 UPEK(TCEFA1FH011) Module
fingerprint reader R992 *0_NC +/-5%
1 Pin-1: VCC(3.3V)
2 1
FP_USBD- 4 3 BTO_USBP-_R 3 2 Pin-2: (NC)
4 3 G1 Pin-3: USBD-
FP_USBD+ 1 2 BTO_USBP+_R 5 4 GND1 G2
6 5 GND2 G3 Pin-4: USBD+
6 GND3
L37
GND4
G4 Pin-5: nRESET
90 ohm,150mA
+/-20% CONN-FPC Pin-6: GND
cks0504h9

(56) FP_RESET#

A A
ESD10
BTO_USBP-_R 1 6
2 1 6 5 +3.3V_BIO
BTO_USBP+_R 3 2 5 4
3 4
*SRV05-4_NC
Ever Light
Technology Limited
Title
55 -- USH 1/3 BCM5882 SmartCard
Size Document Number Rev
1A

Date: Thursday, January 27, 2011 Sheet 55 of 84

5 4 3 2 1
 5 4 3 2 1

JTAG_TDI_USH R994 *0_NC +/-5% JTAG_CLK_USH +3.3V_ALW_USH

JTAG_TMS_USH R995 *0_NC +/-5% JTAG_TDO_USH

JTCE_USH R996 *0_NC +/-5% JTAG_RST#_USH U68B

+3.3V_ALW_USH

G2
R1000 JTEST1
4.7K
+3.3V_ALW_USH REF_XIN G14 D4 UART_TX/GPIO1

GND2
REFCLK_XTALIN UART_TX_GPIO_1 +/-5%
HF_RX_TEST1 R997 *0_NC +/-5% HF_RX_TEST0 REF_XOUT F14 C4 UART_RX/GPIO0 5
REFCLK_XTALOUT UART_RX_GPIO_0 B3 FP_RESET# 4 5
UART_CTS_GPIO_2 FP_RESET# (55) 4
HF_RX_TEST3 R998 *0_NC +/-5% HF_RX_TEST2 R999 4.7K +/-5% G1 A3 UART_TX/GPIO1 3
RST_N UART_RTS_GPIO_3 BT_COEX_STATUS2 (33,55) 3
UART_RX/GPIO0 2
2

GND1
1
JTAG_CLK_USH L1 L14 1
D
JTAG_TDI_USH M1 JTAG_TCK NC D
JTAG_TDO_USH N1 JTAG_TDI *Header_1X5_NC
27.12Mhz regardless support RFID or not.

G1
JTAG_TMS_USH N2 JTAG_TDO J1 CONTACTLESS_DET#
R1002 1K +/-5% JTAG_RST#_USH L3 JTAG_TMS GPIO_4 D2
JTAG_TRSTN GPIO_14 SCC_CMDVCC_N_R (61)
R1003 *0_NC +/-5% JTCE_USH L2 C2
C901 Follow TXC recommend JTCE GPIO_15 BCM5882_GPIO15 (55)
B1
GPIO_16 BT_PRI_STATUS (33)
REF_XIN
R1004 4.7K +/-5% E1 D3
+3.3V_ALW_USH OVSTB CLKOUT T168
15pF
2

E3 C1 UART_TX/GPIO1, UART_RX_GPIO0, 3.3V_ALW_USH

50V,NPO T169 SCANACCMODE RSTOUT_N SPI_RST# (55)
X4
XTAL2 NC-2

NC-4 XTAL1

27.12MHz SBOOT E2 and GND to a connector. This is required

R1005 SECURE_BOOT J13 for BIOS/FW debugging and EVMCo
POR_MONITOR T170
*10M_NC R1006 *1K_NC +/-5% USH_TESTMODE D1 certification test.
+/-5% TESTMODE K11
SWV T171
POR_EXTR J14
POR_EXTR
C902 PLL_TESTOUT
C13
T172 Connector should be placed in place to be
easy access by opening cover.
3

REF_XOUT_R R1007 0 +/-5% REF_XOUT

BCM5882B0KFBG Connector can be depop for production.
15pF
50V,NPO

* XTAL CIRCUIT (COMPONENTS + WIRING) SHOULD BE ON TOP

LAYER ONLY, TO CONTROL INTERFERENCE

U68C
+3.3V_ALW_USH
L63 must be 100mA or higher rating.
R1008 0 +/-5% RFTAG_VRXP A6 A8 RFREADER_TXP1
R1010 0 +/-5% RFTAG_VRXN B6 HF_RFIDTAG_VRX_P HF_TX_P B8 RFREADER_TXN1 +1.2V_ALW_AVDD
HF_RFIDTAG_VRX_N HF_TX_N L38
C5 A10 RFREADER_RXP +RFID_AVDD1P2 1 2
R1009 R1011 HF_RFIDTAG_VTX HF_RX_P B10 RFREADER_RXN
C C
5.1MOhm HF_RX_N C903 C904 C905
4.7K FB 10 Ohm, 500mA
+/-5% +/-5% 0.1uF 1uF 1uF
SBOOT A5 B9 HF_RX_TEST0 16V,X7R 10V,X5R 10V,X5R
HF_RFIDTAG_VREF HF_RX_TEST0 C9 HF_RX_TEST1 c0603h9 c0603h9
POR_EXTR B4 HF_RX_TEST1 C10 HF_RX_TEST2
+1.2V_ALW_AVDD HF_RFIDTAG_DVDD1P2 HF_RX_TEST2 E9 HF_RX_TEST3
C6 HF_RX_TEST3
R1012 C906 E6 HF_RFIDTAG_AVDD2P5_C6 D7 L64 must be 100mA or higher rating
3.3M 10nF
Close +2.5V_ALW_AVDD HF_RFIDTAG_AVDD2P5_E6 HF_TX_AVDD1P2 F8 +RFID_AVDD1P2
+/-5% 25V,X7R pin A5 HF_RX_AVDD1P2 D10 +2.5V_ALW_AVDD
D6 HF_RX_ADC_AVDD1P2
B5 HF_RFIDTAG_AVSS_D6 F9
HF_RFIDTAG_AVSS_B5 HF_RX_AVDD2P5 A7 +RFID_AVDD2P5 L39
+1.2V_ALW_AVDD A4 HF_TX_AVDD2P5 +RFID_AVDD2P5 1 2
HF_RFIDTAG_DVSS D8
HF_TX_AVDD3P3_D8 B7 +RFID_AVDD3P3 C907 C908 C909
HF_TX_AVDD3P3_B7 FB 10 Ohm, 500mA
0.1uF 1uF 1uF
C910 C911 C912 16V,X7R 10V,X5R 10V,X5R
10uF 1uF 1uF C7 c0603h9 c0603h9
6.3V,X5R 10V,X5R 10V,X5R HF_TX_AVSS_C7 C8
c0603h9 c0603h9 c0603h9 HF_TX_AVSS_C8 E7
HF_TX_AVSS_E7
A9
HF_RX_AVSS_A9 B11
HF_RX_AVSS_B11 L65 must be able to carry high 500mA current?! Surge +3.3V_ALW_USH
E8 current can be high as 1A.
+2.5V_ALW_AVDD HF_RX_ADC_AVSS1 D9
HF_RX_ADC_AVSS2
L40
BCM5882B0KFBG +RFID_AVDD3P3 1 2

C917 C918 FB 10 Ohm, 500mA C919

C913 C914 C915 C916 0.1uF 1uF 4.7uF
10uF 4.7uF 1uF 1uF 16V,X7R 10V,X5R 10V,X5R
6.3V,X5R 6.3V,X5R 10V,X5R 10V,X5R c0603h9 c0603h9
c0603h9 c0603h9 c0603h9 c0603h9
RFREADER_RXP C920 1uF 10V,X5R RFREADER_RXP_R R1013 15K
B B
c0603h9 +/-1%
D50 L41 and L42 should be wire-wood
2
inductor to carry more than
3 400mA DC current.
1
L41,L42,C921,C922,C923 and C924
+3.3V_ALW_USH tolerance should be 2% or less.
*DA204UT106_NC

RFREADER_TXP1 L41 150nH RFREADER_TXN1_PI

D51
2 C921 C922
390pF 390pF
+3.3V_ALW_USH 3 50V,NPO 50V,NPO

1 CIS OK
BRCM : D50, D51, D52, D53 are required for

7
JCS1
ESD protection, but they could be removed *DA204UT106_NC

GND1
1
if ODM can guarantee 8kV protection to 2 1
USH after contacted ESD test. 3 2
4 3
5 4
5

GND2
CONTACTLESS_DET# 6
(11) CONTACTLESS_DET# 6
Note: USH only protect upto 2kV at I/O pins.
CONN-WTB

8
RFREADER_TXN1 L42 150nH RFREADER_TXP1_PI

D52
2 C923 C924
390pF 390pF
3 50V,NPO 50V,NPO

1
+3.3V_ALW_USH
A A
*DA204UT106_NC

RFREADER_RXN C925 1uF 10V,X5R RFREADER_RXN_R R1014 15K

c0603h9 +/-1%

2
D53
Ever Light
+3.3V_ALW_USH 3
Technology Limited
1 Title
56 -- USH 2/3 BCM5882 RFID
*DA204UT106_NC
Size Document Number Rev
1A

Date: Thursday, January 27, 2011 Sheet 56 of 84

5 4 3 2 1
 5 4 3 2 1

D D

+VDDC_5882

+3.3V_ALW +3.3V_ALW_USH
+1.2V_ALW_PLL
C926 C927 C928 C929 C930 C931 C932
10uF 1uF 1uF 1uF 1uF 1uF 1uF U68D
PJP5 +1.2V_ALW_AVDD
6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R
2 1 c0603h9
H14
A11 AVDD_1P2I_REF C11
*PL-281302G_NC A12 AVDD_1P2O_A11 AVSS_LDO12
+2.5V_ALW_AVDD AVDD_1P2O_A12 B13
H13 AVSS_LDO25_B13 C12
E10 AVDD_2P5I AVSS_LDO25_C12
E11 AVDD_2P5O_E10 B14
+3.3V_ALW_USH AVDD_2P5O_E11 AVSS_PLL
A13 F13
B12 AVDD25_LDO12_A13 AVSS_REF
AVDD25_LDO12_B12 D12
C933 A14 PLL_AVSS
4.7uF AVDD25_PLL_A14 E13
+SC_PWR 6.3V,X5R PLL_DVSS
c0603h9 D11
AVDD33_LDO25
P13 G13
OTP_PWR POR_AVSS
C985 C934 +1.2V_ALW_PLL D14
1uF 0.1uF E14 PLL_AVDD_1P2I
6.3V,X5R 16V,X7R C14 PLL_AVDD_1P2O F4
PLL_DVDD_1P2I VSSC_F4 F5
D13 VSSC_F5 F6
C C
F3 VDDC_D13 VSSC_F6 F7
J4 VDDC_F3 VSSC_F7 F10
Close to pin-P13. +VDDC_5882 J5 VDDC_J4 VSSC_F10 F11
J6 VDDC_J5 VSSC_F11 F12
J7 VDDC_J6 VSSC_F12 G5
J8 VDDC_J7 VSSC_G5 G6
J10 VDDC_J8 VSSC_G6 G7
J11 VDDC_J10 VSSC_G7 G8
K7 VDDC_J11 VSSC_G8 G9
K8 VDDC_K7 VSSC_G9 G10
VDDC_K8 VSSC_G10 G11
E4 VSSC_G11 G12
J2 VDDO_33_E4 VSSC_G12 H5
K3 VDDO_33_J2 VSSC_H5 H6
L8 VDDO_33_K3 VSSC_H6 H7
N10 VDDO_33_L8 VSSC_H7 H8
VDDO_33_N10 VSSC_H8 H9
G4 VSSC_H9 H10
H3 VDDO_33CORE_G4 VSSC_H10 H11
H4 VDDO_33CORE_H3 VSSC_H11 H12
J3 VDDO_33CORE_H4 VSSC_H12 J9
VDDO_33CORE_J3 VSSC_J9 J12
+3.3V_ALW_USH M13 VSSC_J12 K2
+3.3V_ALW_USH N13 VDDO_33SC_M13 VSSC_K2 K6
VDDO_33SC_N13 VSSC_K6 K13
L6 VSSC_K13 K14
M6 VDDO_LPC_L6 VSSC_K14 L5
VDDO_LPC_M6 VSSC_L5 M8
K10 VSSC_M8 M14
C935 C936 C937 C938 C939 C940 C941 C942 K12 VDDO_SC_K10 VSSC_M14 N9
1uF 1uF 1uF 1uF 1uF 1uF 1uF 10uF L12 VDDO_SC_K12 VSSC_N9 N11
6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R L13 VDDO_SC_L12 VSSC_N11 N12
c0603h9 VDDO_SC_L13 VSSC_N12 P3
D5 VSSC_P3 P4
E5 VDDO_VAR_D5 VSSC_P4
VDDO_VAR_E5
N5
B VESD B

+3.3V_ALW_USH BCM5882B0KFBG

C943 C944 C945 C946 C947 C948 C949

1uF 1uF 1uF 1uF 1uF 1uF 1uF
6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R
+1.2V_ALW_PLL

C950 C951 C952

10uF 1uF 1uF
6.3V,X5R 6.3V,X5R 6.3V,X5R
c0603h9

A A

Ever Light
Technology Limited
Title
57 -- USH 3/3 BCM5882 Power
Size Document Number Rev
1A

Date: Thursday, January 27, 2011 Sheet 57 of 84

5 4 3 2 1
 5 4 3 2 1

D D

Move to IOL board

C C

B B

A A

Ever Light
Technology Limited
Title
58 -- Smart Card IC & Conn
Size Document Number Rev
1A

Date: Thursday, January 27, 2011 Sheet 58 of 84

5 4 3 2 1
 5 4 3 2 1

D D

+RTC_CELL +3.3V_RTC_LDO
RTC BATTERY CR2032 Wire Type

D54
C A

RB751V-40 TE-17 C963

C C
2.2uF UBOM1
10V,X5R

G2
D55

G2
C A +RTC_1 R1033 1K +RTC 2 JRTC1
+/-1% 1 2 CONN-WTB
1 HN24020-0000-7H

G1
C964 RB751V-40 TE-17
1uF

G1
25V,X5R

B B

A A

Ever Light
Technology Limited
Title
58 -- System Reset, RTC
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 59 of 84

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Ever Light
Technology Limited
Title
Blank Page
Size Document Number Rev
1A

Date: Thursday, January 27, 2011 Sheet 60 of 84

5 4 3 2 1
 5 4 3 2 1

D D

0607GC: CIS OK
+5V_RUN JIOL3

C965 C966
0.1uF 0.1uF G2 G1
16V,X7R 16V,X7R +5V_ALW

2 1
4 3
6 5 C967 C968 C969
8 7 10uF 0.1uF 0.1uF
10 9 6.3V,X5R 16V,X7R 16V,X7R
12 11
14 13
(8) PCH_AZ_CODEC_BITCLK
16 15
18 17 Pin 17 is PAID loop GND for IOL_DET#.
(8) PCH_AZ_CODEC_SDIN0
20 19
(8) PCH_AZ_CODEC_SDOUT
22 21
(8) PCH_AZ_CODEC_SYNC
24 23
(8) PCH_AZ_CODEC_RST#
26 25
28 27
(27) DAI_12MHZ#
30 29
32 31
(27) DAI_DI
34 33
Audio (27) DAI_DO#
(27) DAI_BCLK#
36 35
USB_SIDE_EN# (40)
USB_OC0# (9)
38 37
(27) DAI_LRCK#
40 39
(40) EN_I2S_NB_CODEC# USBP0- (9)
42 41
C
(22) DMIC_CLK
(22) DMIC_DATA
44 43 USBP0+ (9) USB x 2 C
46 45
(40,44) LID_CL# USBP1- (9)
+3.3V_ALW
48 47
USBP1+ (9)
(40) DOCK_HP_DET
50 49
(40) DOCK_MIC_DET
52 51
USBP10- (9)
54 53
(40) AUD_HP_NB_SENSE USBP10+ (9)
56 55
58 57 PCIE_PRX_EXPTX_N3 (10)
(40) AUD_NB_MUTE#
60 59
(39) BEEP PCIE_PRX_EXPTX_P3 (10)
62 61
(8) SPKR
64 63 PCIE_PTX_EXPRX_N3_C (10)
(43,44) BREATH_PWRLED
66 65 PCIE_PTX_EXPRX_P3_C (10)
68 67
(44) BT_LED#
70 69
(44) LED_WLAN_WWAN_OUT CLK_PCIE_EXP# (10)
(44) NUM_LED
72 71 CLK_PCIE_EXP (10)
74 73
(39) BAT_A_LED#
(39) BAT_W_LED#
76 75 Express Card
CARD_SMBCLK (33,39)
78 77
Media Control (44) HDD_LED
(44) VOL_MUTE_LED
80 79
CARD_SMBDAT (33,39)

(39) VOL_UP#
82 81 EXPCLK_REQ# (10)
84 83
(39) VOL_DOWN# PLTRST_IOL# (9)
86 85
(39) VOL_MUTE# RUN_ON (4,40,66,67,72,73)
88 87
90 89
(11) TPM_ID0
92 91 PCIE_PRX_CARDTX_N8 (10)
94 93
TPM Support Select (11) TPM_ID1
96 95
PCIE_PRX_CARDTX_P8 (10)

(55) USH_LPCEN
98 97 PCIE_PTX_CARDRX_N8_C (10)
100 99 PCIE_PTX_CARDRX_P8_C (10)
102 101
(19,31,33,34,40) PCIE_WAKE#
104 103
CLK_PCIE_CARD# (10)
Card Reader & 1394
(55) BCM5882_SCCLK
106 105 CLK_PCIE_CARD (10)
108 107
110 109
(55) AUX1UC CARDCLK_REQ# (10)
112 111
(55) BCM5882_IO
114 113 IOL_DET# (11)
(55) BCM5882_GPIO26
116 115
118 117
B (55) BCM5882_GPIO25 B
120 119
Smart Card (55) BCM5882_SCRST
(55) BCM5882_SCDET
122 121
+1.5V_RUN
124 123
126 125
128 127
(55) SCC_CMDVCC_N
(56) SCC_CMDVCC_N_R
130 129
(55) SC_DET#
132 131 +3.3V_RUN
134 133
136 135
138 137
+3.3V_ALW
140 139 +3.3V_SUS

CONN-BTB

+3.3V_RUN +3.3V_SUS +3.3V_ALW +1.5V_RUN

C970 C971 C972 C973

0.1uF 0.1uF 0.1uF 0.1uF
16V,X7R 16V,X7R 16V,X7R 16V,X7R

A A

Ever Light
Technology Limited
Title
76 -- Blank Page

Size Document Number Rev

1A

Date: Thursday, January 27, 2011 Sheet 61 of 84

5 4 3 2 1
 5 4 3 2 1

+5V_ALW

2
PD8
PR64 *DA204UT106_NC

3
0
+/-5%
D D
DCIN_CBL_DET# (40)

PC21
470nF
10V,X5R PFB2
JDCIN1 1 2 +DC_IN
10
10 9 DB_PSID PQ2 +DC_IN_SS
9 60 ohm,6A
8 AO4413
8 7 PFB1 3 8
7 6 +DCIN_JACK 1 2 2 7
6 5 1 6
5 4 5

S
4 60 ohm,6A

D
3 PC7 PC8 PC9 PC10 PC1 PC2 PC3 PC4 PC5 PC6
3

G
2 2.2nF 1nF 100nF 100pF 100nF 22nF PR1 10nF PR2 100nF 100nF 10uF
2 1 50V,X7R 50V,X7R 25V,X5R 50V,X7R 25V,X5R 50V,X7R 1M 25V,X7R 100K 25V,X5R 25V,X5R 25V,X5R

4
1 +/-1% +/-5%
CONN-WTB
PRV1
*VZ0603M260APT_NC
PR3
1M
+/-1% PR94
10K
+/-5%

SOFT_START_GC (74)
C C

+5V_ALW +3.3V_ALW

PR97 (27) DOCK_PSID

PBATT+ *0_NC PR6

2
PC12 +/-5% 2.2K
2.2nF +/-5%
50V,X7R PU19
1 6
PQ76 NO IN GPIO_PSID_SELECT (40)
PD1
PC13 FDV301N PR8 2 5
+5V_ALW

3
1nF PFB3 33 +/-5% *DA204UT106_NC GND V+
50V,X7R DB_PSID 1 2 D S NB_PSID_TS5A63157 3 4
NC COM PS_ID (39)
+3.3V_ALW

C
120 ohm,200mA TS5A3157DCKR
PC14 PC11 PD2 +5V_ALW
100nF 100pF *BAS316_NC PR9 G
25V,X5R 50V,X7R 100K

A
1

+/-5% PR10
10K PR11
+/-1% *100_NC
+/-5%
PD4 PD5 PSID_DISABLE# (40)
B
*DA204UT106_NC *DA204UT106_NC +3.3V_ALW B
3

C
1

3
B
G1
G2

PQ3 PD3
Battery Connector MMST3904-7-F *DA204UT106_NC
Adress : 16H
PR13
PTH
PTH

E
1 PD6 100K PR12
BATT1+ 2 *DA204UT106_NC +/-5% 15K
3

2
BATT2+ 3 +/-5%
SMB_CLK 4 PR14 100 +/-1%
SMB_DAT 5 PR15 100 +/-1%
PBAT_SMBCLK (39) +5V_ALW
BATT_PRES# 6 PBAT_SMBDAT (39)
SYSPRES# 7 PR16 100 +/-1%
BATT_ALBERT 8 PBAT_PRES# (40)
BATT1- 9
BATT2-
C

JBAT1
T183 PD9
RB751V-40 TE-17 PQ79
FDN338P
A

3 2
S
D

DOCK_SMB_ALERT# (27,39)
PR65
0
G
1

+/-5%

(27,40,74) SLICE_BAT_PRES#

PC23
A 1.5nF A
50V,X7R

Ever Light
Technology Limited
Title
PW_DCin & Batt
Size Document Number Rev
Brook 1A

Date: Thursday, January 27, 2011 Sheet 62 of 84

5 4 3 2 1
 5 4 3 2 1

PR18
1M
+/-1%

+DC_IN BQ24747_REF +5V_ALW BQ24747_REF +3.3V_ALW

PD17 PC15 PC16

A C 10nF 100pF
50V,X7R 50V,X7R PR21 PR22
*B340B-13-F_NC PR19 PR20 100K *100K_NC
D PQ4 +SDC_IN +PWR_SRC 232K 47K +/-1% +/-1% D
AO4413 PR23 +/-1% +/-1%

8
8 3 5m
+DC_IN_SS +DC_IN_SS 7 2 1 2 3
+
6 1 1 PR24 *0_NC_short ACAV_IN_NB (39,40,74)
5 2 +/-5%

S
-

4
D
PU1A

4 G

4
PC17 8731_CSSN_P1 LM393DR2

8731_CSSP_P1
25V,Y5V PC19
*100nF_NC 100pF PR27 PR28 PC18
(74) DC_BLOCK_GC
50V,X7R 22.1K 42.2K 100pF

D
PR25 +/-1% +/-1% 50V,X7R
0 PR26
+/-5% 0 +/-5% PQ5
G NTR4502PT1G
(74) CSS_GC
r0603h6 r0603h6

S
G PQ6
NTR4502PT1G
8731_CSSN_P (38)

S
+5V_ALW

(38) 8731_CSSP_P S D
DOCK_DCIN_IS+ (27)
PQ8
NTR4502PT1G

8731_CSSN_P
8731_CSSP_P

G
PQ11
S D
DOCK_DCIN_IS- (27)
PR39

8
NTR4502PT1G PC22 PC20
5 *100pF_NC *10nF_NC
+

G
PR37 PR38 7 50V,NPO 25V,X7R
100K 100K 6
PR42 -
C *10K_NC +/-5% +/-5% C
+/-1% PU1B
DK_CSS_GC (74)

4
PR43 PR44 LM393DR2
*0_NC_short *0_NC_short PR505
+/-5% +/-5% 0 0
+/-5% +/-5%
PC24 PC25

*0.1uF_NC *0.1uF_NC
25V,X7R PC28 25V,X7R

100nF
(74) +CHGR_DC_IN 25V,X5R
GND_CHG GND_CHG

AON7410L
PR517 PR98
2 2 BQ24747_LDO
Current:20A
+SDC_IN +/-1% +/-1% RDS(ON):[email protected]

A
MLP-3 X 3
PD10
BQ24747_CSSN
BQ24747_CSSP

PR49 *0_NC PC318 BAT54HT1G

+/-5% *1uF_NC
10V,X5R

C
PC29 PC35 PC30 PC32
PR51
BQ24747_REF PR50 PC31 2.2nF 0.1uF 10uF 10uF
316K 0.1uF BQ24747_BSTP 50V,X7R 25V,X7R 25V,X5R 25V,X5R
+/-1% 25V,X7R
BQ24747_LDO
PR52 49.9K 2.2
28

27
1

+/-1% +/-1% PQ14

5
PR342 PR53 BQ24747_DCIN 22 26 BQ24747_ICOUT AON7410L PQ42
ICREF

CSSP

CSSN

10K *10K_NC DCIN ICOUT AON7410L

+/-5% +/-5% PC33 10nF BQ24747_ACIN 2 25 BQ24747_BST Max Charging current setting 8A
25V,X7R ACIN BOOT PC34
B B
BQ24747_ACOK 13 100nF 4 4
PR55 0 ACOK PR343 +VCHGR
(39,46,74) ACAV_IN 25V,X5R
+/-5% GND_CHG 11 *33_NC FDVE1040-H-5R6M=P3

1
2
3

1
2
3
VDDSMB +/-1%
+5V_ALW PC39 PC37 DCR: 13.8mΩ
10
PR56 SCL 21 BQ24747_LDO 1uF PC38 DC Current: 9A
GND_CHG VDDP
*15.8K_NC SMBUS Address 12 9 10V,X5R *3.3nF_NC
+/-1% SDA 24 BQ24747_UGATE 50V,X7R PL1 PR58
UGATE PJP8
PR59 0 +/-5% 0.1uF
BQ24747_SCL GND_CHG
14 5.6uH 0.01 +/-1%
(39) CHARGER_SMBCLK NC1
PR60 0 +/-5% 25V,X7R
BQ24747_SDA 23 BQ24747_PHASE PR57 1 BQ24747_LXP 1 2 CHG_CS 2 1 +VCHGR_P 2 1
(39) CHARGER_SMBDAT 8 PHASE +/-1%
VICM

3
BQ24747_FBO 6 *PL-281302G_NC
FBO
BQ24747_EAI 5 PR61 PR103
EAI

5
PC52 2.2nF PR344 7.5K 20 BQ24747_LGATE *2.2_NC *1.8K_NC
PR54 50V,X7R +/-1% BQ24747_EA0 4 LGATE PQ15 PC43 PC40 PC44 PC41 PC47 PC42 PC48 PR101 +/-1%
EAO +/-5%
+/-1% 19 AON7702L AON7702L 1nF 2.2nF 3.3nF 0.1uF 10uF 10uF *10uF_NC
*0_NC_short
200K BQ24747_REF 3 PGND 50V,X7R 50V,X7R 50V,X7R 25V,X7R 25V,X5R 25V,X5R 25V,X5R+/-5%
Current:20A

D
PR345 10K VREF 18 4
4.7K PR346 BQ24747_CE 7 CSOP 17 RDS(ON):[email protected] PR62 PQ24

+VCHGR_P_FB
CE CSON PC319
+/-1% PC45 PC46 MLP-3 X 3 *0_NC_short

1
2
3
PC51 +/-1% 12 15 BQ24747_VFB 3.3nF *1nF_NC GND_CHG +/-5%
G
56pF GND VFB 50V,X7R 50V,X7R *BSS138W-7-F_NC
PC53
50V,NPO 29 16 PR66

S
TP NC2 100 100nF
(46) IINP
+/-5% 25V,X5R
BQ24747RHDR BQ24747_CSIP
120pF
50V,NPO PC320
100nF
25V,X5R
BQ24747_CSIN
ACAV_IN
PR347 PC321 PC322 PC323 PC324 PC325 PC326
*8.45K_NC 220pF *10nF_NC *10nF_NC *10nF_NC 1uF *100nF_NC
+/-1% 50V,X7R 25V,X7R 25V,X7R 25V,X7R 6.3V,X5R 25V,X5R PC50
A *220pF_NC A
PR63
50V,X7R
PR67
+VCHGR_P_FB

*0_NC
0 +/-5%
+/-5%
r0805h6 PBATT+ PR99 Ever Light
GND_CHG

*0_NC_short
Technology Limited
Title
+/-5%
Charger (ISL88731HRZ)
Size Document Number Rev
1A
Brooks
Date: Thursday, January 27, 2011 Sheet 63 of 84
5 4 3 2 1
 5 4 3 2 1

D D

+5V_ALW / +3.3V_ALW POWER SUPPLY

PR96
0
+/-5%
+3.3V_RTC_LDO
PR68
10
PR69
+/-5%
+3.3V_ALW2 +5V_ALW2 80mil
0 PC56 PR70 PC57
+PWR_SRC +/-5%1uF *0_NC_short PR71 1uF
PJP9 PJP10
200mil 10V,X5R +/-5% *0_NC 25V,X5R 100mil
2 1 P_5V_VIN_SHAPE +/-5% P_3V_VIN_SHAPE 2 1
+PWR_SRC PR72 +PWR_SRC
PC97 PC58 PC59 PC60 PC61 *0_NC_short SGND_SYS
C
*PL-281302G_NC 10uF 10uF 10uF 100nF 2.2nF +/-5% PR74 PC62 PC63 PC64 PC65 *PL-281302G_NC C
25V,X5R 25V,X5R 25V,X5R 25V,X5R 50V,X7R PR73 *0_NC 2.2nF 100nF 10uF 10uF
*0_NC +/-5% 50V,X7R 25V,X5R 25V,X5R 25V,X5R
PR506 +/-5%
+/-5% PR75
0
+5V_ALW2 *0_NC

5
P_5V3V_ONLDO
PC66 PC67 +/-5%

AON6414AL
100nF 4.7uF

P_5V3V_VCC
P_5V3V_TON
P_5V3V_RTC

P_5V3V_REF
P_5V3V_VIN
5

PQ18
25V,X5R 6.3V,X5R
PQ16 PQ17 PC68
AON6428L AON6428L 100nF 4
25V,X5R
4 4

1
2
3
SGND_SYS FDVE1040-H-1R5M=P3

3
2
1

3
2
1

8
7
6
5
4
3
2
1
TDC : 20.841A SGND_SYS *PL-281302G_NC
DCR: 4.6mΩ PJP11

LDOREFIN
LDO
VIN
RTC
ONLDO
VCC
TON
REF
OCP : 32.06A DC Current: 17.1A 2 1
PJP12 FDUE1040D-H-1R0M=P3 40mil TDC : 10.39A
*PL-281302G_NC 40mil +5V_ALW_VO 33
2 1 DCR: 2.51mΩ PAD PL2 OCP : 15.98A
9 32 1.5uH PJP13
PL3 BYP REFIN2 200mil
480mil P_5VSUS_VO 10
OUT1 ILIM2
31 P_3VSUS_ILIM 40mil 1 2 +3.3V_ALW_VO 2 1
+3.3V_ALW
PJP14 1uH P_5VSUS_FB 11 30 P_3VSUS_VO
2 1 +5V_ALW_VO 1 2 12 FB1 OUT2 29
+5V_ALW P_5VSUS_ILIM P_5V3V_SKIP# 200mil

4
P_5VSUS_PGOOD1 13 ILIM1 SKIP# 28 P_3VSUS_PGOOD2 PC69 PC70 *PL-281302G_NC
EN_3V_5V 14 PGOOD1 PGOOD2 27 EN_3V_5V 2.2nF 100nF
3

*PL-281302G_NC ON1 ON2

5
480mil P_5VSUS_DH 15 26 P_3VSUS_DH PR77 50V,X7R 25V,X5R
PC75 PC72 PC71 PC73 PC74 PR76 P_5VSUS_LX 16 DH1 DH2 25 P_3VSUS_LX *2.2_NC PR78

AON6716L
PJP29 LX1 LX2
5

PQ20
330uF 330uF 330uF 100nF 2.2nF *2.2_NC 40mil +/-5% PC77 *0_NC_short
2 1 25V,X5R 50V,X7R +/-5% 330uF +/-5%
AON6716L

AON6716L

SECFB
AGND
PGND
PQ19

PQ21
PR79 PC76 4

BST1

BST2
VDD
DL1

DL2
*0_NC_short 60mil PC80 0.1uF PR81
*PL-281302G_NC 4 4
+/-5% PR80 220nF 25V,X7R 0 PR82 PC78 PC79

1
2
3
113K 25V,X7R PU3 PR83 +/-5% 100K 2.2nF *1.5nF_NC

17
18
19
20
21
22
23
24
PC82 PC81 +/-1% MAX17020ETJ+ 0 +/-1% 50V,X7R 50V,X7R
3
2
1

3
2
1
*1.5nF_NC 4.7nF PR84 +/-5% Cap: 330uF/6.3V
50V,X7R 50V,X7R 0 P_3VSUS_BST
B
+/-5%
ESR: 25mΩ B

P_5V3V_SECFB_10
Cheng 2.2nF to 4.7nF with PC81 SGND_SYS P_5VSUS_BST SGND_SYS

Cap: 330uF/6.3V PR85 P_3VSUS_DL

PC83 309K 40mil
ESR: 25mΩ *150pF_NC +/-1% P_5VSUS_DL
50V,NPO
+5V_ALW2 SGND_SYS
PC84 PR86
1uF *0_NC PR88
PR87 AON6716L +3.3V_ALW +/-5% 100K
10V,X5R
49.9K +/-1%
+/-1%
Current:20A
RDS(ON):[email protected] +15V_ALW_P
MLP-5 X 6 PR91 PR89
*0_NC_short 100K PR90
SGND_SYS +/-5% +/-5% 20K +3.3V_ALW PR348 PR350
+/-1% 2K 0
(39) ALW_PWRGD_3V_5V
+/-5% +/-5%
EN_3V_5V
(39) ALWON THERM_STP# (46)
SGND_SYS PR93 PR92
*0_NC_short *100K_NC Open Drain
+/-5% +/-5% PR349
(39) ALW_PWRGD_3V_5V 200K
+/-5%
+5V_ALW_VO

PC85 SGND_SYS
PR95
PC86 100nF
100nF 25V,X5R
1

25V,X5R PD11
P_5VSUS_DL P_5V3V_CP1 3 BAT54S 0
+/-5%
2

P_5V3V_CP3 SGND_SYS r0805h6

A PC87 A
100nF
25V,X5R
PC88
100nF
<Variant Name>
1

25V,X5R
P_5V3V_CP2 3 PD12 PR100
BAT54S 0
+/-5% Ever Light
2

+15V_ALW_P +15V_ALW
Imax=10mA
Technology Limited
Title
PC89 PW_SYSTEM(MAX17020)
100nF
25V,X5R Size Document Number Rev
Brooks 1A

Date: Thursday, January 27, 2011 Sheet 64 of 84

5 4 3 2 1
 5 4 3 2 1

+5V_ALW +5V_ALW
+3.3V_ALW

PR109 PC90 PC91 PC92 PC93 PC94

10 22uF 22uF 22uF 0.1uF 1uF
+/-5% 6.3V,X5R 6.3V,X5R 6.3V,X5R 16V,X7R 16V,X5R
PR351
10K
+/-5% PC95
D D
220nF
6.3V,X5R
PU74

B3 +1.5V_AVDD
AVDD VT358_AGND
(39) 1.5V_SUS_PWRGD
B5
PR123 STAT G5
0 A5 VDD6 G4
(39) DDR_ON +/-5% OE VT358FCX-ADJ VDD5 E5
PC96 VDD4 E4 Design current=16.1A
*10nF_NC VDD3 C5 OCP Setting=24.77A
VDD2 ETQP4LR36AFM
50V,X7R B4 C4
TEMP VDD1 DCR: 1.5mΩ
+1.5V_IRIPL B2 DC Current: 25A +1.5V_MEM
VT358_AGND IRIPL
+1.5V_R_SEL/ILOAD A2 F5 +1.5V_VX PL4 *PL-281302G_NC
R_SEL/ILOAD VX10 360nH PJP16
F4
+1.5V_BIAS A1 VX9 F3 1 2 +1.5V_SUS_P 2 1
BIAS VX8 F2
VX7 F1 *PL-281302G_NC
PJP17

4
B1 VX6 D5 PR507
AGND VX5 D4 *2.2_NC PC109 PC110 PC105 PC106 PC107 PC108 PR104 2 1
VX4 D3 +/-5% 0.1uF 6.8nF 22uF 22uF 22uF 22uF
VX3 *0_NC_short
D2 16V,X7R 25V,X7R 4V,X6S 4V,X6S 4V,X6S 4V,X6S
VX2 +/-5%
D1 PC411
PR105 PR106 PR107 VX1 *1.5nF_NC
28.7K 6.65K 44.2K 50V,X7R
+/-1% +/-1% +/-0.5%
+1.5VGND_VSENSE-
A4 +1.5V_VSENSE+ PR508 0
VSENSE+ +/-5%
A3 +1.5V_VDES
VDES +5V_ALW

GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
C1
C2
C3
E1
E2
E3
G1
G2
G3
C PR102 PC330 PR110 C
60.4K 2.2nF *750K_NC PC122
+/-1% 50V,X7R +/-1% 4.7uF
10V,X7R
c0805h14
PR111
+1.5VGND_VSENSE-

PR128 0 +/-5%
*0_NC_short +1.5V_MEM
VT358_AGND +/-5% DDR_ON (39)
PU5
1 10 PR127 0 +/-5%
+0.75V_VLDOIN 2 VDDQSNS VIN 9
3 VLDOIN S5 8 0.75V_DDR_VTT_ON (40,72)
VTT GND

EPAD
PC114 PC115 PC117 4 7
PR112 10uF 10uF PC116 1nF 5 PGND S3 6
VDDQ_VREF_0 0 6.3V,X5R 6.3V,X5R 0.1uF VTTSNS VTTREF

50V,X7R
+/-5% c0805h14 c0805h14 25V,X7R TPS51100DGQR

11
c0603h9
PR113
+V_DDR_REF
1.8M
+/-1% PC112
D 0.1uF
25V,X7R
PQ22 c0603h9
PR116
0 G +0.75V_DDR_VTT
(40) DDR_1.5V_CNTRL0 +/-5% 2N7002W-7-F
PR117 Peak current=2A
PC113 S
100K *100nF_NC
Design current=1.4A
+/-5% 25V,X5R OCP Setting=2.15A
+1.5VGND_VSENSE- PR122 PC120 PC119 PC118
*0_NC_short 10uF 10uF 10uF
PR120 +/-5% 6.3V,X5R 6.3V,X5R 6.3V,X5R
VDDQ_VREF_1 0 c0805h14 c0805h14 c0805h14
+/-5%
B B
PR121
1M
+/-1%
D +0.75V_VTTSNS

PQ23
PR118
0 G
(40) DDR_1.5V_CNTRL1 +/-5% 2N7002W-7-F
PR124
100K PC121 S
+/-5% *100nF_NC
25V,X5R
+1.5VGND_VSENSE- +3.3V_ALW
+1.5V_MEM

PC400
PU18 0.1uF PC401
74AHC02BQ 16V,X7R 10nF
25V,X7R
2 14
3 1A VCC PR493 PR492
1B PR491
1 12 3.3 3.3
1Y 4B 11 +/-1% +/-1%
PR490 4A
5 13
6 2A 4Y
(40) DDR_1.5V_CNTRL0 2B 52.3K
4 9
52.3K 2Y 3B 8 +/-1%
PAD

3A DDR_1.5V_CNTRL1 (40)
+/-1% 7 10
GND 3Y +3.3V_ALW
15

VDDQ_CNTROL1 VDDQ_CNTROL0 +1.5V_MEM PC402

A 0.1uF A
PC359 16V,X7R
HIGH HIGH 1.513V 10nF
25V,X7R
5

1
2
5
6
PU17
HIGH LOW 1.561V 2 PQ37
4 3 FDC655BN

LOW HIGH 1.601V

1
Ever Light
74AHC1G32GW
Technology Limited
3

LOW LOW 1.655V

Title
DDR_1.5V/0.75V
Size Document Number Rev
Brooks 1A

Date: Thursday, January 27, 2011 Sheet 65 of 84

5 4 3 2 1
 5 4 3 2 1

D D

+1.8V_RUN POWER SUPPLY

+3.3V_ALW
+3.3V_SUS +3.3V_RUN
+5V_ALW
PC124 PC125
10uF 0.1uF
6.3V,X5R 16V,X7R
PR380 PR355
*10K_NC 10K PR131 PDMB053T-2R2MS
+/-1% +/-1% 10 P_1VS8_LX_20
+/-1%
DCR: 35Ω
PC332 DC Current: 5.5A
0.1uF
16V,X7R

13

14
PU6

5
6
7
PL5
PJP19
PR132 2.2uH 80mil 80mil

VIN1

VIN2

SW1
SW2
SW3
0 P_1VS8_VDD_10 12 4 +1.8V_RUN_VO 2 1
C
+/-5% VDD VBST +1.8V_RUN C
P_1VS8_PGOOD_10 3
(40) 1.8V_RUN_PWRGD PGOOD PC126 PC127 PC128 PC407 *PL-281302G_NC

+/-5%
2 10 P_1VS8_FB_10 PR133 10uF 10uF 0.1uF 2.2nF
RES FB 1.43K 6.3V,X5R 6.3V,X5R 16V,X7R 50V,X7R
Freq=1.1MHz TPS51311RGTR PC333 Design current=1A
P_1VS8_RCEN_10 1 +/-1%

*0_NC_short
(4,40,61,67,72,73) RUN_ON EN OCP Setting=1.5A
9 P_1VS8_COMP_10

PR135
PR136 P_1VS8_SHDNRT_10 8 COMP

PGND1
PGND2
0 PC132 MODE PR503

VIA1
VIA2
VIA3
VIA4
VIA5
PAD
+/-5% *33nF_NC PR134 11 18nF 10
AGND PC129 PC131 Added 10ohm in series with PC131
16V,X7R 56.2K 16V,X7R +/-1%
+/-1%

15
16
17
18
19
20
21
22
PC130 PR138
0.1uF 100pF 2K 1.8nF P_1VS8_SENSE_10
16V,X7R 50V,X7R +/-1% 50V,X7R

PR356 Ra
Rb PR137
1K
0 +/-1%

B
+/-5% B
r0805h6
SGND_1.8V SGND_1.8V

<Variant Name>

A
Ever Light A

Technology Limited
Title
PW_SW_+1.8V(TPS51311)
Size Document Number Rev
Brooks 1A

Date: Thursday, January 27, 2011 Sheet 66 of 84

5 4 3 2 1
 5 4 3 2 1

+5V_ALW +5V_RUN
+5V_ALW

+3.3V_RUN
PR143 PR139
10 *10_NC
+/-5% +/-5%
PC133 PC134 PC135
22uF 0.1uF 1uF

VCCSA_AVDD
6.3V,X5R 16V,X7R 16V,X5R

D PR140 D
10K PC136
+/-5% 220nF
6.3V,X5R

PR509 PC412
PR150

B3
0 PU7 SGND_VCCSA
Design current=4.2A
+/-5% C5 OCP Setting=6.46A

AVDD
B5 VDD *2.2_NC *1.5nF_NC
(39) 0.8V_VCCPWROK STAT +/-5% 50V,X7R
A5 ETQP4LR42AFM
+0.85V_RUN
PD14 OE
*SD103AW_NC C4 VCCSA_VX PL6 DCR: 1.5mΩ
VX3 420nH DC Current: 17A PJP21
C A B4 C3
TEMPVT355FCX-ADJ VX2 C2 1 2 VCCSA_VOUT 2 1
VX1
B2
(4,40,61,66,72,73) RUN_ON

4
IRIPL PC138 PC139 PC140 PC141 PC142 PC143 PC144 *PL-281302G_NC
PR141 VCCSA_R_SEL/ILOAD
A2 22uF 22uF 22uF 22uF 22uF 0.1uF 6.8nF
*0_NC PC145 R_SEL/ILOAD 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 16V,X7R 25V,X7R
+/-5% *0.1uF_NC VCCSA_BIAS
A1 PR142
16V,X7R BIAS A4 VCCSA_VSENSE+
VSENSE+ *0_NC_short

GND
(39,68) 1.05V_VTTPWRGD +/-5%
B1 A3 VCCSA_VDES
PR152 AGND VDES
0

C1
+/-5% PR144 PR145 PR146
18.2K 6.65K 44.2K
C +/-1% +/-1% +/-0.5% VCCSA_FB C

PR147 PR148
33K *750K_NC PR357
+/-1% +/-1% 10
+/-5%
PC146
2.2nF
50V,X7R
PR149
PR391

VCCSA_SENSE (4)
*0_NC_short
+/-5% 0
+/-5%
PR358
SGND_VCCSA
VCCSA_SENSE_GND_P
VCCSA_SENSE_GND (4)

0
PR359 +/-5%
10
+/-5%

PR360
VCCSA_VREF_0 0
+/-5%
VCCSA_CNTRL1 VCCSA_CNTRL0 +VCCSA
B PR361 B
261K LOW NC 0.904V
+/-1%
D
HIGH NC 0.803V
PQ77
PR158
G
(4,40) VCCSA_CNTRL1
2N7002W-7-F
PR362
0 PC334 S
+/-5% 100K *100nF_NC
+/-5% 25V,X5R
VCCSA_SENSE_GND_P

PR363
VCCSA_VREF_1 *0_NC
+/-5%

PR364
*357K_NC
+/-1%
D
PQ78
PR159
G
(4,40) VCCSA_CNTRL0
*2N7002W-7-F_NC
PR365
*0_NC *100K_NC PC335 S
A +/-5% +/-5% *100nF_NC A
25V,X5R
VCCSA_SENSE_GND_P
Ever Light
Technology Limited
Title
+0.85V(VT355)
Size Document Number Rev
Brooks 1A

Date: Thursday, January 27, 2011 Sheet 67 of 84

5 4 3 2 1
 5 4 3 2 1

D D

+5V_RUN +3.3V_SUS

+5V_ALW

+3.3V_ALW

PR172 PC147 PC148 PC149 PC150 PC151

100K 22uF 22uF 22uF 0.1uF 1uF
*9.31K_NC +/-5% 6.3V,X5R 6.3V,X5R 6.3V,X5R 16V,X7R 16V,X5R
PR171 PR151 PR157
*0_NC_short +/-1% 0
C +/-5% +/-5% Design current=6A C
1.05V_VTTPWRGD (39,67) OCP Setting=9.2A
ETQP4LR42AFM
PR170
DCR: 1.5mΩ
PC152
10uF *13.3K_NC
PC336
0.1uF DC Current: 17A +1.05V_RUN_VTT
PR162
6.3V,X5R +/-1% 25V,X7R
17
21

18
19
20

22
16
PU8 PL7
8
c0805h14 c0603h9
PR366 420nH PJP23 *PL-281302G_NC
SW

VIN
17VIA

16VIA
VIN#17

8VIA1
8VIA2
8VIA3
1 15 +1.05V_VTT_BST +1.05V_VTT_VX 1 2 +1.05V_VTT_VOUT 2 1
*0_NC_short VCCA VBST 3.3 +/-1%
+/-5% 2 14

4
GNDA_VTT GNDA_VTT GND PGOOD PR367
CPU_VTT_ON (40) PJP24
+1.05V_VTT_COMP 3 13 +1.05V_VTT_EN PC160 PC161 PC162 PC165 PC171 PC174 PC182 PC183 PC184 PC164 PC163
COMP EN 22uF 22uF 22uF 22uF 22uF 22uF 22uF 6.8nF 0.1uF PR153 2 1
+1.05V_VTT_VFB 4 SN1003055RUWR 12 +1.05V_VTT_FSET 0 +/-5% PC337 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S *22uF_NC *22uF_NC 25V,X7R 16V,X7R *0_NC_short
VFB FSET *0.1uF_NC +/-5%
5 11 +1.05V_VTT_MODE 25V,X7R 4V,X6S 4V,X6S PC408 *PL-281302G_NC
PGND#9

PC338 +1.05V_VTT_SS 6 VOUT MODE c0603h9 2.2nF

SS
PGND
7VIA1
7VIA2

9VIA1
9VIA2

680pF 10 50V,X7R
50V,X7R IMON
PR155 PR368
PC340 PR156 PR154
*0_NC_short *4.7_NC
7
23
24

9
25
26

10nF 22.1K PC153 +/-5% *22.1K_NC +/-1%

50V,X7R +/-1% *10nF_NC +/-1%
B 50V,X7R B
PC339 PR369
100pF 5.6K
50V,X7R +/-5% GNDA_VTT
PR163
*0_NC_short
+/-5%
PR370
VTT_GND (4)
+1.05V_VSENSE+_FB
PR161
*0_NC_short
+/-5%
*0_NC
+/-5% VTT_SENSE (4)
GNDA_VTT

PR160 10
+/-1%

PR371
0 PR372
+/-5% 2K
+/-1%
PC341
1.8nF
50V,X7R

A A

PR373 PR400 Ever Light

20K 3.09K
+/-1% +/-1%
Technology Limited
Title

GNDA_VTT
PW_+1.05V_VTT(SN1003055RUWR)
Size Document Number Rev
Brooks 1A

Date: Thursday, January 27, 2011 Sheet 68 of 84

5 4 3 2 1
 5 4 3 2 1

+5V_ALW

+3.3V_ALW
+3.3V_ALW
D PC166 PC167 PC168 PC169 PC170 D
*22uF_NC 22uF 22uF 0.1uF 1uF
PR179 PR165 6.3V,X5R 6.3V,X5R 6.3V,X5R 16V,X7R 16V,X5R
*0_NC_short 100K PR167
+/-5% +/-5% 0
+/-5%
Design current=4.2A
1.05V_A_PWRGD (39) OCP Setting=6.46A
ETQP4LR42AFM
DCR: 1.5mΩ
PC173
10uF DC Current: 17A +1.05V_M
PR177
6.3V,X5R PC342

17
21

18
19
20

22
16
PL8

8
c0805h14 PU9 220nF
PR374 420nH PJP26
25V,X7R

SW

VIN
17VIA

16VIA
VIN#17

8VIA1
8VIA2
8VIA3
1 15 +1.05V_M_BST +1.05V_M_VX 1 2 2 1
*0_NC_short VCCA VBST 3.3 +/-1%
+/-5% 2 14 PR166 0 +/-5%

4
GNDA_1.05V GNDA_1.05V GND PGOOD A_ON (39,72) *PL-281302G_NC
+1.05V_M_COMP 3 13 +1.05V_M_EN PC177 PC178 PC179 PC175 PC176 PC181 PC180
COMP EN 22uF 22uF 22uF 6.8nF 0.1uF 22uF 22uF
+1.05V_M_VFB 4 SN1003055RUWR 12 +1.05V_M_FSET SIO_SLP_A# (7,40)
PC343 4V,X6S 4V,X6S 4V,X6S 25V,X7R 16V,X7R 4V,X6S 4V,X6S PR169
VFB FSET PR168 *0.1uF_NC *0_NC_short
5 11 +1.05V_M_MODE *0_NC 25V,X7R +/-5%

PGND#9
PC172 +1.05V_M_SS 6 VOUT MODE +/-5% c0603h9
SS

PGND
7VIA1
7VIA2

9VIA1
9VIA2
680pF 10 +1.05V_M_IMON
50V,X7R IMON
C C
PR375
PC344 PC345 *4.7_NC

7
23
24

9
25
26
100pF 10nF +/-1%
50V,X7R 25V,X7R

PR164
5.6K PR178 PC185 PR174 PR173
+/-5% GNDA_1.05V +/-1% *10nF_NC 10K *22.1K_NC
*1.33K_NC 50V,X7R +/-1% +/-1%
PR376

*0_NC
+/-5% GNDA_1.05V

+1.05V_M_VSENSE+_FB

PR377
0 PR378
+/-5% 2K
+/-1%
B PC346 B
1.8nF
50V,X7R

PR379
2.67K
+/-1%

GNDA_1.05V

A A
Ever Light
Technology Limited
Title
PW_+1.05VM(VT355)
Size Document Number Rev
Brooks 1A

Date: Thursday, January 27, 2011 Sheet 69 of 84

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev

A <Doc> <RevCod

Date: Thursday, January 27, 2011 Sheet 70 of 84

5 4 3 2 1
 5 4 3 2 1

IMVP7 CPU/GPU VCORE REGULATOR

+1.05V_RUN_VTT

VCC VDD PJP27 +PWR_SRC

PR180 PR181 P_VCORE_VIN1_SHAPE 2 1
PR501 PR500 PR504 10 *0_NC_short +5V_ALW
54.9 130 *130_NC +/-5% +/-5%
+/-1% +/-1% +/-1% PC186 PC188 PC189 PC190 PC191 PC192 PC193 PC194 *PL-281302G_NC
1uF 2.2nF 0.1uF 10uF 10uF *100uF_NC 1uF 1uF
10V,X5R 50V,X7R 25V,X7R 25V,X7R 25V,X7R 25V,+/-20% 25V,X5R 25V,X5R
PR182 0 +/-5% PC187
(4) ALERT
2.2uF
PR183 0 +/-5% 10V,X5R
(4) VDIO
D D
PR184 0 +/-5%
(4) CLK

46

29
+3.3V_RUN P_GFX_VIN1_SHAPE P_VCORE_VIN1_SHAPE PU10
PQ26
17411_ALERT# 22 27 17411_DHA1 ETQP4LR36AFC

VDDA
VCC
17411_VDIO 21 ALERT# DHA1 1 8
17411_CLK 23 VID0 25 17411_BSTA1 VIN VSW3 DCR: 0.76mΩ
PR186
PR191 200K +/-1% CLK BSTA1 7 DC Current: 30A_Peck_34A
17411_TONA 48 PR185 VSW2 PL9
10K TONA PC195
PR187 17411_TONB 1 4.7 3 6 360nH
+/-1% TONB 220nF TG VSW1
200K +/-1% 26 +/-1% 17411_LXA1_P 1 2
PR193 0 +/-5% 17411_POKA 24 LXA1 17411_LXA1 25V,X7R 4 5
(40) IMVP_PWRGD POKA TGR BG

4
16 PR189
VIA7

PGND

25V,X5R
100nF
PC196
PR201 *0_NC +/-5% 17411_POKB 12 2.2 PC197 PC198

VIA1
VIA2
VIA3
VIA4
VIA5
VIA6
POKB 28 17411_DLA1 +/-5% 470uF 470uF
DLA1 PR194 1 2V,+/-20% 2V,+/-20%
PR202 *0_NC +/-5% 17411_EN 47 PC200 CSD86350Q5D PC199
(40) IMVP_VR_ON

9
10
11
12
13
14
15
EN 30 1nF 1.5nF +/-1%
PGNDA
(6,39) 1.05V_0.8V_PWROK
PR302 0 +/-5% 50V,X7R 50V,X7R EEFSX0D471E4
PR195
Cap: 470uF/2V
2.1K
VCC 17411_IMAXA 35 ESR: 4.5mΩ
+/-1%
IMAXA
PR197 PR198 PR199 PR200 17411_IMAXB 36 42 17411_CSPA1 PR206
PR196 5.62K 5.62K 130K 169K IMAXB CSPA1
1K +/-1% +/-1% +/-1% +/-1% PC201 PC202
+/-1% 39 1nF 1nF 16.5K
THERMA 50V,X7R PC203 50V,X7R +/-1%
17411_THERMA
40 0.22uF
THERMB 10V,X7R
38 43
+PWR_SRC SR CSNA1
17411_CSNA
+1.05V_RUN_VTT PC204
PJP30 +PWR_SRC
PJP31 VDD
8
17411_CSPBAVE PR213 0.1uF P_VCORE_VIN2_SHAPE 2 1
CSPBAVE *75_NC +/-1% 16V,X7R
2 1 P_GFX_VIN1_SHAPE PR210 PR211 PR212 PR209 4
100K 100K 162K 100K PC205 19 VRHOT# PC206 PC207 PC208 PC209 PC210 PC211 PC212 *PL-281302G_NC
+/-1% +/-1% +/-1% +/-1% 2.2uF VDDB H_PROCHOT# (2,39) 2.2nF 0.1uF 10uF 10uF *47uF_NC 1uF 1uF
*PL-281302G_NC PC214 PC215 PC216 10V,X5R PC347 47pF50V,NPO 50V,X7R 25V,X7R 25V,X7R 25V,X7R 25V,+/-20% 25V,X5R 25V,X5R
PC213 0.1uF 10uF 10uF PC217 PC218 PC219
2.2nF 25V,X7R 25V,X7R 25V,X7R *47uF_NC 1uF 1uF 17411_DHB1 16 32 17411_DHA2
DHB DHA2
50V,X7R 25V,+/-20% 25V,X5R 25V,X5R
PR214 PR215
PQ30 4.7 +/-1% 4.7 +/-1%
14
17411_BSTB1 34 17411_BSTA2
BSTB BSTA2 PQ29
C 8 1 PC221 C
VSW3 VIN 1 8
PL10 220nF VIN VSW3 PL11
7 PC220
360nH VSW2 25V,X7R 360nH
220nF 7
P_GFX_VOUT_SHAPE 1 2 17411_LXB1_P 6 3 15 33 17411_LXA2 VSW2 17411_LXA2_P 1 2
VSW1 TG 25V,X7R LXB LXA2 3 6 Design current=62A
ETQP4LR36AFM TG VSW1
5 4 17411_LXB1 OCP Setting=105A
DCR: 1.35mΩ

4
PR216 BG TGR 4 5
DC Current: 20A TGR BG

25V,X5R
100nF
PC222
2.2 16 17411_DLB1 18 31 17411_DLA2 PC223 PC224
VIA7 DLB DLA2

PGND
+/-5% 16 PR217 470uF 470uF
+VCC_CORE

VIA6
VIA5
VIA4
VIA3
VIA2
VIA1
VIA7

PGND
17411_CSPB1 9 2.2 2V,+/-20% 2V,+/-20%

VIA1
VIA2
VIA3
VIA4
VIA5
VIA6
CSPB1
25V,X5R
100nF
PC227

PC261 1 PR218 PC228 +/-5%

470uF CSD86350Q5D PC260 PC230 1nF PR219 1

15
14
13
12
11
10
9
2V,+/-20% +/-1% PC229 1nF 1nF 50V,X7R CSD86350Q5D

9
10
11
12
13
14
15
PR220 1.5nF 50V,X7R 50V,X7R PC231 +/-1%
1.65K 50V,X7R 10 1.5nF
+/-1% CSNB 50V,X7R PR222
17411_CSNB
TDC=23.1A EEFSX0D471E4
PR224
2.1K
+/-1%
OCP:35.5A Cap: 470uF/2V 44 17411_CSPA2 PR230
ESR: 4.5mΩ PC234 PC235 CSPA2
3.57K 1nF PC232 0.1uF PC233 PC236
+/-1% 50V,X7R 0.22uF 16V,X7R 1nF 1nF 16.5K
10V,X7R 50V,X7R PC237 *1nF_NC PC238 50V,X7R +/-1%
50V,X7R 0.22uF
17411_CSNA 10V,X7R
+VCC_GFXCORE PR236
6 3
PR237
PR235 10 FBB FBA PR238 10
17411_FBB 17411_FBA
(4) VAXG_SENSE VCCSENSE (4)
+/-1% +/-1%
13K
PR240 10 PC240 11.8K 7 2 +/-1% PC239
+VCC_GFXCORE_FB 50V,X7R +/-1% GNDSB GNDSA *1nF_NC
*1nF_NC 50V,X7R
+/-5%

PR243 10 PR244 10
(4) VSSAXG_SENSE 17411_GNDSB 17411_GNDSA
VSSSENSE (4)
PR282 PC404 +/-1%
*0_NC_short +/-5% PC406 50V,X7R 1nF
1nF VDD 50V,X7R
+/-5% VDD
PR246 13
17411_DRVPWMB 41 17411_CSPAAVE
+PWR_SRC 10 DRVPWMB CSPAAVE
+PWR_SRC
+/-5%
+VCC_GFXCORE_FB PJP36 11 37 17411_DRVPWMA PJP37
B PR303 B
2 1 P_GFX_VIN2_SHAPE PR315 CSPB2 DRVPWMA P_VCORE_VIN3_SHAPE 2 1
PC249 17411_CSPB2 *0_NC_short PC241
*0_NC_short +/-5%
17 45
+/-5% PGNDB CSPA3
*PL-281302G_NC PC243 PC244 PC245 50 PC250 PC251 PC252 PC253 PC254 PC255 PC256 *PL-281302G_NC
PC242 0.1uF 10uF 10uF PC246 PC247 PC248 51 VIA1 2.2nF 0.1uF 10uF 10uF 100uF 1uF 1uF
25V,X7R 25V,X7R 25V,X7R 1uF 52 VIA2 1uF 50V,X7R 25V,X7R 25V,X7R 25V,X7R 25V,+/-20% 25V,X5R 25V,X5R
2.2nF *47uF_NC 1uF 1uF

5
PR248 25V,X5R PU11 53 VIA3 PU12 25V,X5R

AGND2

AGND1
50V,X7R 25V,+/-20% 25V,X5R 25V,X5R VIA4
4.7 +/-1% 17411_DHB2 8 54 8 17411_DHA3

VDD

VDD
PAD
1 DH VIA5 DH 1 17411_BSTA3
BST 2 2 BST
PWM PWM PQ36
17411_LXB2 7 7 17411_LXA3 PR249
PQ35

20

49
5
LX MAX17411GTM+ LX 4.7 +/-1% 1 8
8 1 17411_DLB2 4 6 6 4 VIN VSW3
VSW3 VIN PC257 3 DL SKIP SKIP DL 3 PC258 7
PL12 7 GND GND VSW2 PL13
220nF 220nF
VIA4
VIA3
VIA2
VIA1

VIA1
VIA2
VIA3
VIA4
PAD

PAD
360nH VSW2 3 6 360nH
25V,X7R 25V,X7R TG VSW1
P_GFX_VOUT_SHAPE 1 2 17411_LXB2_P 6 3 17411_LXA3_P 1 2
VSW1 TG 4 5
13
12
11
10
9
PR250

9
10
11
12
13
5 4 TGR BG
3

4
PR251 BG TGR MAX17491GTA+T MAX17491GTA+T 16 PR252
VIA7

PGND

25V,X5R
100nF
PC259
2.2 16 17411_DLA3 2.2

VIA1
VIA2
VIA3
VIA4
VIA5
VIA6
VIA7
PGND
25V,X5R
100nF
PC265

PC264 +/-5% +/-5%

VIA6
VIA5
VIA4
VIA3
VIA2
VIA1

470uF *0_NC_short
2V,+/-20% +/-5% PC262 CSD86350Q5D

9
10
11
12
13
14
15
PR253 1 PC266 CSD86350Q5D PC263 1nF PC267 PR254 1
15
14
13
12
11
10
9

+/-1% 1.5nF 1nF 50V,X7R 1.5nF

PR255 50V,X7R 50V,X7R 50V,X7R +/-1%
1.65K
+/-1% PR257
2.1K
PR259
+/-1%

17411_CSPA3 PR264
PC268
3.57K *1nF_NC PC269 PC270 PC272
+/-1% 50V,X7R 0.22uF 1nF PC271 1nF 16.5K
10V,X7R 50V,X7R 1nF PC273 50V,X7R +/-1%
17411_CSNB 50V,X7R 0.22uF
17411_CSNA 10V,X7R
PC409
33nF
PC274 16V,X7R
*1nF_NC PC275
PC410
50V,X7R *1nF_NC
A 50V,X7R A
17411_CSPAAVE
17411_CSPBAVE
*3.3nF_NC
50V,X7R PC277 0.33uF PR489 1 PR270 4.53K
PC276 0.22uF PR488 1 PR269 3.48K 17411_CSNA 17411_LXA1_P
17411_CSNB 17411_LXB1_P +/-1%
10V,X7R +/-1% 10V,X7R +/-1%
+/-1% PR274 4.53K
PR272 3.48K PR273 17411_LXA2_P
PR271 5.11K 17411_LXB2_P 100K
+/-1%
PR275
+/-1% PRT2
+/-1%
10K PR276 2.1K PR277
+/-1%
4.53K Ever Light
PRT1 10K 17411_LXA3_P
Technology Limited
*
T
*

+/-1% +/-1% +/-1%

T

+/-1% Title
2K
+/-1%
CPU_CORE
Size Document Number Rev
Brooks 1A

Date: Thursday, January 27, 2011 Sheet 71 of 84

5 4 3 2 1
 5 4 3 2 1

+3.3V_ALW: 6A +3.3V_SUS: 0.2A

+5V_RUN: 2.67A
+3.3V_ALW PQ71 +3.3V_SUS
+5V_ALW +5V_RUN +15V_ALW FDC655BN
PQ41
+15V_ALW AO4430 6
30V,18A,[email protected] PR278 5 4
8 3 100K 2
7 2 +/-5% 1
PR279 6 1 +3.3V_ALW2 PC278
100K 5 0.1uF

3
+3.3V_ALW2 +/-5% SUS_3.3V_ENABLE 16V,X7R
PC279

4
0.1uF PR280 D
PR281 RUN_ENABLE_5V 16V,X7R 100K PC280
100K D +/-5% 4.7nF
D D
+/-5% 50V,X7R
PC281 G PQ43
4.7nF SUS_ON_3.3V# 2N7002W-7-F
RUN_ON# G PQ44 50V,X7R
2N7002W-7-F S
D D
S

G PQ45 G PQ46
4,40,61,66,67,73) RUN_ON (2,39) SUS_ON
2N7002W-7-F 2N7002W-7-F

S +3.3V_ALW: 6A +3.3V_RUN:3A S

+3.3V_ALW +3.3V_RUN

+15V_ALW PQ52
+3.3V_SUS: 0.1992A
+3.3V_ALW PQ51
AO4430
30V,18A,[email protected] +15V_ALW FDC655BN +3.3V_ALW_PCH
8 3
PR287 7 2 6
100K 6 1 PR285 5 4
+/-5% 5 100K 2
PC288 +/-5% 1
0.1uF +3.3V_ALW2

4
16V,X7R PC286

3
RUN_ENABLE_3.3V PCH_ALW_ENABLE 0.1uF
D 16V,X7R
PR286 D PQ53
PC289 100K 2N7002W-7-F PC287
4.7nF +/-5% 4.7nF
G PQ56 50V,X7R 50V,X7R
2N7002W-7-F PCH_ALW_ON# G
S
+1.05V_RUN: 3.1A S
D
+1.05V_M +1.05V_RUN +5V_ALW PQ54 +5V_ALW_PCH
C PQ48 2N7002W-7-F C
AO4430 G PQ55
+15V_ALW (39) PCH_ALW_ON
30V,18A,[email protected] 2N7002W-7-F D S
8 3
7 2 S PC290
PR283 6 1 0.1uF
100K 5 G 16V,X7R
+/-5% PC283
0.1uF
4

16V,X7R
RUN_ENABLE_1.05V
+0.75V_DDR_VTT
D
PC285
0.5A
4.7nF
G PQ50 50V,X7R Reserve discharge path +5V_ALW PR294 +3.3V_ALW +3.3V_M
2N7002W-7-F 22 PQ74
+/-1% FDC655BN
S PR297 +15V_ALW
100K D 6
+/-5% 5 4
PR338 2
100K 1
RUN_ON# (40)
G PQ62 +/-5%
2N7002W-7-F +3.3V_ALW2
D

3
S M_ENABLE PC316
10uF PR340
G PQ65 PR339 D 10V,X7R *20K_NC
(40,65) 0.75V_DDR_VTT_ON
2N7002W-7-F 100K PC317 +/-5%
+/-5% 4.7nF
S 50V,X7R
M_ON_3.3V# G PQ72
2N7002W-7-F

+1.5V_CPU_VDDQ S
D

B B
PR298 G PQ73
(39,69) A_ON
220 2N7002W-7-F
+/-1%
S
D

G PQ66
(2,4) RUN_ON_CPU1.5VS3#
2N7002W-7-F

Reserve discharge path

+3.3V_M
+5V_RUN +3.3V_RUN +1.8V_RUN +1.5V_RUN
+3.3V_SUS +1.5V_MEM

PR289 PR290 PR291 PR292

*1K_NC *1K_NC *1K_NC *1K_NC PR341 PR295 PR296
A +/-1% +/-1% +/-1% +/-1% 56 *1K_NC *1K_NC A
+/-5% +/-1% +/-1%
+3.3V_M_CHG
D D D D
D D D <Variant Name>
PQ75
RUN_ON# G PQ57
*2N7002W-7-F_NC
G PQ58
*2N7002W-7-F_NC
G PQ59
*2N7002W-7-F_NC
G PQ60
*2N7002W-7-F_NC M_ON_3.3V# G
2N7002W-7-F
SUS_ON_3.3V# G PQ63 G PQ64 Ever Light
*2N7002W-7-F_NC *2N7002W-7-F_NC
S S S S
S S S Technology Limited
Title
PW_Run Power Switch
Size Document Number Rev
Brooks 1A

Date: Thursday, January 27, 2011 Sheet 72 of 84

5 4 3 2 1
 5 4 3 2 1

D D

+1.5V_RUN POWER SUPPLY

80mil
+3.3V_ALW
+3.3V_ALW
PC348 PC349
10uF 0.1uF
6.3V,X5R 16V,X7R
PR381
100K PR382 PDMB053T-2R2MS
+/-1% 10 P_1VS5_LX_20
DCR: 35Ω
+/-1%
DC Current: 5.5A
PC350
C
PR392 0.1uF +1.5V_RUN C

13

14
PU16

5
6
7
16V,X7R PL16
0 PJP46
PR383 +/-5% 2.2uH 80mil 80mil

VIN1

VIN2

SW1
SW2
SW3
0 P_1VS5_VDD_10 12
VDD VBST
4 +1.5V_RUN_VO 2 1
+/-5%
P_1VS5_PGOOD_10 3
(40) 1.5V_RUN_PWRGD PGOOD PC351 PC352 PC353 *PL-281302G_NC

+/-5%
2 10 P_1VS5_FB_10 PR387 10uF 10uF 0.1uF Design current=1.75A
RES FB 3K 6.3V,X5R 6.3V,X5R 16V,X7R
Freq=1.1MHz TPS51311RGTR PC354 OCP Setting=2.69A
P_1VS5_RCEN_10 1 +/-1%

*0_NC_short
4,40,61,66,67,72) RUN_ON EN 9 P_1VS5_COMP_10

PR385
PR384 P_1VS5_SHDNRT_10 8 COMP

PGND1
PGND2
0 MODE PR502

VIA1
VIA2
VIA3
VIA4
VIA5
PAD
+/-5% PR386 11 3.3nF 10
AGND 50V,X7R PC357 PC358
PC355 56.2K PC356 +/-1%
*33nF_NC +/-1% 0.1uF

15
16
17
18
19
20
21
22
16V,X7R 16V,X7R
PR389
100pF 1.5K 2.2nF P_1VS5_SENSE_10
50V,X7R +/-1% 50V,X7R

Ra
B B

Rb PR388
PR390 1K
*0_NC_short
+/-5% +/-1%

SGND_1.5V_RUN
SGND_1.5V_RUN

<Variant Name>

A
Ever Light A

Technology Limited
Title
PW_SW_+1.8V(TPS51311)
Size Document Number Rev
Brooks 1A

Date: Thursday, January 27, 2011 Sheet 73 of 84

5 4 3 2 1
 5 4 3 2 1

PD15
B340LA-13-F
A C

+DOCK_PWR_BAR PQ67
SI4835DDY-T1-E3
D D
8 3
7 2
6 1
5

4
PR299
330K PC291
+/-5% 470nF
25V,X5R

STSTART_DCBLOCK_GC

PR300
0 +/-5%

PR301 PD16
Need confirm this circuit by TI side. B340LA-13-F
A C

330K
PQ68 PBATT+ PQ69 +/-5% PQ70
+VCHGR SI4835DDY-T1-E3 SI4835DDY-T1-E3 SI4835DDY-T1-E3 +PWR_SRC
8 3 3 8 8 3
7 2 2 7 PBATT_IN_SS 7 2
6 1 1 6 6 1
5 5 5

PR313 PR309

4
0 0 PC292 PC293
+/-5% +/-5% 2.2nF 0.1uF
50V,X7R 25V,X7R

PR304
C *1K_NC C
PC294 +/-5%
+DOCK_PWR_BAR 1uF
PR332 0 +/-5% 25V,X5R
PC295
*1uF_NC
+DC_IN_SS PR331 0 +/-5% 25V,X5R

DSCHRG_MOSFET_GC
PR329 0 +/-5%
+DC_IN PR306
47 (63) +CHGR_DC_IN
+/-5% PR305
CD3301_DCIN 0
+/-5%
PC296 PR316
0.1uF *0_NC_short+5V_ALW
36

35

34

33

32

31

30

29

28
50V,X7R PU13 +/-5%
P50ALW
ChargerVR DCIN

DK_PWRBAR

N.C.

BLOCK MOSFET GC

DISCHARGE MOSFET GC

PBatt+
DC_IN_SS
N.C.#36

GND#32

PR317 0 +/-5%
CD_PBATT_OFF
(62) SOFT_START_GC PBATT_OFF (40)
PR318 0 +/-5%
+3.3V_ALW2 1 27
PR310 DC_IN P50ALW DOCK_AC_OFF (27,40)
2 26
SOFT START GC PBATT_OFF
ERC1 3 25 DK_AC_OFF
100K PR352 0 +/-5% ERC1 DK_AC_OFF PR319 0 +/-5%
+/-5% ACAVDK_SRC 4 24 3301_ACAV_IN_NB
(27) ACAV_DOCK_SRC# ACAVDK_SRC# ACAV_IN_NB ACAV_IN_NB (39,40,63)
+SDC_IN 5 23
PR326 0 +/-5% GND CD3301RHHR GND#23 PR320 0 +/-5%
CD3301_SDC_IN 6 22 DK_AC_OFF_EN PR314 1M +/-5%
SDC_IN DK_AC_OFF_EN
SOFTSTART DCBLOCK GC

DOCK_AC_OFF_EC (40)
7 21 SL_BAT_PRES#
B (63) DC_BLOCK_GC DC BLOCK GC SL_BAT_PRES# B
PR328 0 +/-5%
(39,46,63) ACAV_IN
8 20 BLKNG_MOSFET_GC
ACAV_IN BLOCKING MOSFET GC
EN_DK_PWRBAR

P33ALW2 9 19
PR330 0 +/-5% P33ALW2 NBDK_DCINSS
DK_CSS GC

PR321 0 +/-5%
+3.3V_ALW2
PWR_SRC

SLICE_BAT_PRES# (27,40,62)
P33ALW
GND#14
CSS GC

37
TP
ERC3

ERC2

PR322 0 +/-5% +NBDOCK_DC_IN_SS

10

11

12

13

14

15

16

17

18

PC297
0.1uF +3.3V_ALW
25V,X7R
(63) CSS_GC PR323 0 +/-5%
P33AWL
ERC2

(63) DK_CSS_GC
ERC3 PR327 0 +/-5%
EN_DK_PWRBAR
EN_DOCK_PWR_BAR (40)
PC298 PC299
47nF *100nF_NC
25V,X7R 25V,X5R
PR324 *1M_NC +/-5%

STSTART_DCBLOCK_GC +PWR_SRC

PR325 0 +/-5%
3301_PWRSRC

A A

Ever Light
Technology Limited
Title
Docking Selector(CD3301)
Size Document Number Rev
Brooks 1A

Date: Thursday, January 27, 2011 Sheet 74 of 84

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A
Ever Light A

Technology Limited
Title
Black
Size Document Number Rev
Brooks 1A

Date: Thursday, January 27, 2011 Sheet 75 of 84

5 4 3 2 1
 5 4 3 2 1

D D

+1.05V_USB3.0
+3.3V_SUS
PL15 PJP44
PU15 1.2uH
8 7 1 2 +1.05V_USB3.0_P 2 1
IN LX
PC309 PC311 50V,NPO

4
C 10uF 1 4 22uF *PL-281302G_NC C
6.3V,X5R VCC FB 6.3V,X5R PC310 PR334 47pF

PGND
PR333 5 2 0.1uF 6.2k PC312

GND
10 COMP REF 16V,X7R +/-1%
+/-5%

6
MAX1951ESA+T
PR335
18K
+/-1%
PC313
0.1uF PR336
10V,X5R 20K
PC314 PC315 +/-1%
680pF 0.1uF
50V,NPO 10V,X5R

B B
PR337 +/-5%
*0_NC_short

1951_AGND

1951_AGND

Ever Light
A Technology Limited A

Title
+1.05V_USB3.0
Size Document Number Rev
Brooks 1A

Date: Thursday, January 27, 2011 Sheet 76 of 84

5 4 3 2 1
 5 4 3 2 1

+1.05V_M
VT356FCX-ADJ
RUN_ON
+1.05V_RUN_VTT AO4406AL +1.05V_RUN
ADAPTER
DDR_ON
FDC658AP +1.5V_MEM TPS51200DRCR
D +BL_PWR_SRC D

0.75V_DDR_VTT_ON FDC655BN FDC655BN

BATTERY
+PWR_SRC
+VCC_GFXCORE
MAX17039GTN+
TPS51200DRCR
+VCC_CORE

CHARGER
+5V_HDD +5V_MOD
+0.75V_DDR_VTT
+15V_ALW
MAX17020ETJ+ 5V_ALW

RUN_ON
ISL95870AHRUZ-T +0.8V_VCC_SA

AO4406AL
C C

+3.3V_ALW

AUX_EN_WOWL
+5V_RUN
RUN_ON

AUX_ON
RUN_ON

PCH_ALW

SUS_ON

RUN_ON

M_ON
TPS51311 ISL8014IRZ-T FDC655BN SI3456DV SI3456DV FDC655BN AO4430 SI3456DV

+1.5V_RUN +1.8V_RUN +3.3V_WLAN +3.3V_ALW_PCH +3.3V_SUS +3.3V_LNA +3.3V_RUN +3.3V_M

B B

+1.0V_LAN +1.05V_M

A A

Ever Light
Technology Limited
Title
99 -- Media Control

Size Document Number Rev

1A

Date: Thursday, January 27, 2011 Sheet 77 of 84

5 4 3 2 1
 5 4 3 2 1

H1 H2 H3 H4 H5 H6 H7

D D

1
*HOLETC260BC339D220_NC *HOLETC260BC339D220_NC *HOLETC260BC339D220_NC *HOLETC260BC339D220_NC *HOLETC260BC339D220_NC *HOLETSH276X303BSH354X323D236_NC
*holeto276x315bc354d236x276_NC

H8 H9 H10
1

1
*HOLEC315D118_NC *HOLEC315D118_NC *HOLEC315D118_NC

H11 H12 H13 H14

1

1
*HOLEC315D138_NC *HOLEC315D138_NC *HOLEC315D138_NC *HOLEC315D138_NC

C C
H15 H16
1

*HOLEC217D118_NC *HOLEC236D118_NC

H17
1

*HOLEC256D118_NC

H18
1

B B

*HOLEC150D110_NC

H19
1

*holec315d118_NC

H21 H22 H23 H25 H24

A A
1

*HOLEO150X189D110X150_NC *o-15_brooks-1_NC *o-15_brooks-1_NC *MHD32_NP_NC *MHD32_NP_NC

Ever Light
Technology Limited
Title
71 -- PAD,SCREW & Stiching CAPs
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 78 of 84

5 4 3 2 1
 5 4 3 2 1

+3.3V_ALW_PCH +3.3V_RUN

2.2K 2.2K 2.2K 2.2K

+3.3V_RUN
H14 PCH_SMBCLK 2N_7002W MEM_SMBCLK
SMBCLK
C8 PCH_SMBDATA MEM_SMBDATA JDIM1 SMBU Address [0xA0]
SMBDATA 2N_7002W
+3.3V_RUN

JDIM2 SMBU Address [0xA2]

PCH
+3.3V_LAN SMBU Address [0xA4]
JDIM3

D D

2.2K 2.2K JDIM4 SMBU Address [0xA6]

G6 LAN_SMBCLK
SML0CLK LOM SMBU Address [0xC8]
G8 LAN_SMBDATA XDP conn SMBU Address [TBD] +3.3V_RUN_WWAN_PWR
SML0DATA

+3.3V_ALW_PCH
G Sensor SMBU Address [0x3B]
2.2K 2.2K
2.2K 2.2K +3.3V_RUN_WWAN_PWR
2N_7002W WWAN_SMBCLK
WWAN SMBU Address [TBD]
E10 SML1_SMBCLK WWAN_SMBDATA
SML1CLK 2N_7002W
G12 SML1_SMBDATA
SML1DATA
+3.3V_RUN_WWAN_PWR

A5
I2C1D/I2C3A_CLK
B6
I2C1D/I2C3A_DATA
+3.3V_RUN

2.2K 2.2K
+3.3V_RUN_MXM
B48 MXM_SMBCLK 2N_7002W MXM Internal PU.
I2C2A_CLK MXM SMBU Address [0x98,0x9E,56,32]
B49 MXM_SMBDATA
I2C2A_DATA 2N_7002W
+3.3V_RUN_MXM
+LCDVCC
SIO
MEC5055 EMC1701 SMBU Address [0x54]
U84
2.2K 2.2K
C C

A4 LCD_SMBCLK
I2C1B_CLK SMBU Address [0x58]
eDP (17" only)
B5 LCD_SMBDATA
I2C1B_DATA

EMC1701 SMBU Address [0x5A]

U83

B7
A7

+3.3V_RUN +3.3V_WLAN

2.2K 2.2K *2.2K_NC *2.2K_NC

+3.3V_WLAN
A49 CARD_SMBCLK WLAN_SMBCLK
I2C2B/I2C1F_CLK *2N_7002W_NC WLAN SMBU Address [TBD]
B52 CARD_SMBDATA WLAN_SMBDATA
I2C2B/I2C1F_DATA
*2N_7002W_NC
+3.3V_WLAN
+3.3V_SUS

2.2K 2.2K
+3.3V_SUS
2N_7002W EXP_SMBCLK
B EXPRESS SMBU Address [TBD] B

EXP_SMBDATA
2N_7002W
+3.3V_SUS

+3.3V_ALW

2.2K 2.2K

B4 DOCK_SMB_CLK SMBU Address

I2C1A_CLK DOCK APR_EC: 0x48
A3 DOCK_SMB_DAT SPR_EC: 0x70
I2C1A_DATA USB: 0x59

+3.3V_ALW

2.2K 2.2K

A56 PBAT_SMBCLK
I2C1C_CLK BATTERY SMBU Address [0x16]
B59 PBAT_SMBDAT
I2C1C_DATA
+3.3V_ALW

2.2K 2.2K

A47 CHARGER_SMBCLK
I2C1G_CLK CHARGER SMBU Address [0x12]
B50 CHARGER_SMBDAT
I2C1G_DATA
+3.3V_ALW_USH
A A

2.2K 2.2K

A50 USH_SMBCLK
I2C1E_CLK BCM5882 SMBU Address [0xA4]
B53 USH_SMBDAT
I2C1E_DATA

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Title
72 -- SMBus Block Diagram
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 79 of 84

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D D

C C

B B

A A

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Title
73 -- Power Sequency Diagram
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 80 of 84

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D D

C C

B B

A A

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Title
74 -- Power Sequency Timing
Size Document Number Rev
Thunder 1A

Date: Thursday, January 27, 2011 Sheet 81 of 84

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Change List
Item Date Page# Issue Description
A00
1. 0112 02 Per Intel DG, eDP_HPD can be NC. NC R57.
2. 0112 02 R39 change from 5.1K to 4.99K.
3. 0112 39 Per Macallan sch, RESET_OUT# PD 8.2K is no necessary. NC R712.
D D
4. 0112 42 JSPI1 NC.
5. 0112 9 PCI_REQ2# PU resistor change from 100K to 10K.
6. 0112 12 Per Intel DG, +PCH_V5REF_SUS C184 change from 1uF to 0.1uF.
7. 0112 39 TOUCH_SCREEN_PD# PD resistor is not necessary. NC R1836.
8. 0112 40 DCIN_CBL_DET# PU resistor change from 10K to 100K.
9. 0112 39 DOCK_SMB_ALERT# PU resistor change from 100K to 10K.
10. 0117 55~57 Update Broadcom 5882 PN from BCM5882TB0KFBG to BCM5882B0KFBG.
11. 0117 27 Change C499 to ESD12 and delete C500. adding ESD13 at DOCK_RST_R# and update to CIS part.
12. 0117 39 Update board ID to A00.
13. 0117 44 Remove volume mute LED, NC Q81.
14. 0117 23 Change F1 from fuse (2411) to Polyswitch type (1206).
15. 0117 23 Adding two NPTH screw hole (MHD32_NP)
16. 0117 22 Populate camera USB common mode choke.
17. 0120 11 Update PCH GPIO28 circuit, delete Q36 and connect SLP_ME_CSW_DEV# to PCH GPIO28 dircetly. Adding 4.7K PU to +3.3V_ALW_PCH.
18. 0120 39 Update board ID value to 8.2K.
19. 0120 25 Brooks 15 change R470 from 5.11k ohms to 5.49k ohms, Brooks 17 change R1927 from 5.11k ohms to 5.6k ohms
20. 0127 Update PCH and LOM PN. 5055 new PN has no available and change to TBD.

C C

B B

A A

Ever Light
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Title
75 -- Change List
PROJECT : Thunder DOC. NO. : xxx REV : M00
Size Document Number Rev
Thunder 1A
APPROVED BY : Cory Lin CHECKED BY: Cory Lin DRAWN BY: SHEET 1 OF 1
Date: Thursday, January 27, 2011 Sheet 82 of 84
5 4 3 2 1
 5 4 3 2 1

POWER SATES
USB PORT# DESTINATION
Signal SLP SLP SLP S4 SLP ALWAYS M SUS RUN
S3# S4# S5# STATE# M# PLANE PLANE PLANE PLANE CLOCKS 0 Right Side top
State
1 Right Side bot
2 Back Side
S0(Full ON) / M0 HIGH HIGH HIGH HIGH HIGH ON ON ON ON ON
3 NC
D D
S3(Suspend to RAM) / M1 LOW HIGH HIGH HIGH HIGH ON ON ON OFF OFF 4 2nd Mini Card (WLAN/WIMAX)
5 1st Mini Card (WWAN)
S4 (Suspend to HDD) / M1 LOW LOW HIGH LOW HIGH ON ON OFF OFF OFF
6 3rd Mini Card
PCH
S5 (Soft off) / M1 LOW LOW LOW LOW HIGH ON ON OFF OFF OFF 7 USH
8 DOCKING
S3(Suspend to RAM) / M-OFF LOW HIGH HIGH HIGH LOW ON ON ON OFF OFF
9 DOCKING
S4 (Suspend to HDD) / M-OFF LOW LOW HIGH LOW LOW ON OFF OFF OFF OFF 10 Express Card
11 BlueTooth
S5 (Soft off) / M-OFF LOW LOW LOW LOW LOW ON OFF OFF OFF OFF
12 Camera
13 LCD Touch or Nvidia 3D IR

PM TABLE USH
0
1
BIO
NC
+5V_RUN
Power
+3.3V_RUN
Plane +1.8V_RUN +3.3V_M
+3.3V_M
+1.5V_RUN +1.05V_M
+15V_ALW +1.05V_M (M-OFF) PCI EXPRESS DESTINATION
+5V_ALW +3.3V_SUS +0.75V_DDR_VTT
Lane 1 1st Mini Card WWAN
State +3.3V_ALW_PCH +1.5V_MEM +VCC_CORE
C +1.05V_RUN_VTT Lane 2 2nd Mini Card WLAN C
+3.3V_RTC_LDO Lane 3 Express Card
+1.05V_RUN
PCH Lane 4 USB 3.0
S0 ON ON ON ON ON Lane 5 3rd Mini-Card
Lane 6 4th Mini-Card
S3 ON ON OFF ON OFF Lane 7 LAN
Lane 8 Card Reader
S5 S4/AC ON OFF OFF ON OFF
S5 S4/AC
doesn't exist OFF OFF OFF OFF OFF
SATA DESTINATION
SATA 0 HDD 1st
SATA 1 HDD 2nd
PCH SATA 2 MINI CARD
SATA 3 ODD
SATA 4 E-SATA
SATA 5 Docking

B B

MXM PORT CONNECTION

MXM PORT A MB DP Port
Graphics PORT B DOCK DP2
Module PORT C DOCK DP1 and MB HDMI
PORT D eDP Panel

A A

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Title
99 -- Media Control

Size Document Number Rev

1A

Date: Thursday, January 27, 2011 Sheet 83 of 84

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Change List
Item Date Page# Issue Description
ST2_power
1. 1229 62 PR2 change from 10K to 100K for E3 levrage
2 1229 64 Change to skip mode: PR75 to NC, PR81 to stuff
3 1230 63 PR58 footprint change from r2512_1h7 to r2512_1h7_mlk
D 4 1231 63 PD17 no stuff D

A00_power
5 0117 62 PR13 change from 10K to 100K
6 0117 62 PR8 change from 100 to 33 (change from 0603 t0 0402)
7 0117 62 PR8 change from 100 to 33
8 0117 63 PC24 stuff to follow on E3
9 0117 Udpate total 23 jumps
10 0118 62 PR16 move to front of battery connector.
11 0125 63 PC24 no stuff.
12 0125 62 PC21 stuff.
13 0126 71 AL cap change from PC192 to PC254. PC192 no stuff for temp.

C C

B B

A A

Ever Light
Technology Limited
Title
75 -- Change List
PROJECT : Thunder DOC. NO. : xxx REV : M00
Size Document Number Rev
Thunder 1A
APPROVED BY : Cory Lin CHECKED BY: Cory Lin DRAWN BY: SHEET 1 OF 1
Date: Thursday, January 27, 2011 Sheet 84 of 84

5 4 3 2 1