Scrambling Code and Channelisation Code Parallel Generation For WCDMA On Vector Core
Scrambling Code and Channelisation Code Parallel Generation For WCDMA On Vector Core
Scrambling Code and Channelisation Code Parallel Generation For WCDMA On Vector Core
Abstract—In a Wideband Code Division Multiple Access intelligent terminal chips with its advantage of low design
(WCDMA) environment, each user is assigned a unique period, low design cost, high flexibility, easy upgradation,
complex-valued spreading codes to encode its information- low design risk, smaller chip area and low power
bearing signal. The spreading sequence composed of consumption due to multi communication systems
scrambling codes and channelisation codes spread transmitted integration.
symbols and despread received chips. This essay presents the Mature research and application have come into use with
parallel generation method of scrambling code and the help of large and simple data processing by 4G system as
channelisation code for WCDMA on vector core. TD-LTE/LTE-FDD , which are easily realized by VCORE.
This essay discusses the technology of realizing 3G CDMA
Keywords- scrambling code;channellisation code;spreading
code;parallel generation; WCDMA; vector core;
on VCORE. The transport channel encoding & decoding and
physical channel transmiting & receiving in physical layer
I. INTRODUCTION have the large amount of computation. The Convolutional
code and Turbo code are used to transport channel encoding
The CDMA technology is widely used in 3G wireless
and decoding, which can be kept as hardware acceleration in
communications. Scrambling code is used in WCDMA and
vector core. While the physical channel transmiting and
CDMA2000.Channelisation code is used in WCDMA,
receiving vary in different communication systems, it is
CDMA2000 and TDS-CDMA. Scrambling code is generated
more reasonable for implementing in the vector core.. The
from Gold sequence while channelisation code is generated
spreading codes composed of scrambling codes and
from OVSF(Orthogonal Variable Spreading Factor) code[1].
channelisation codes spread transmitted symbols and
The typical implementation methods of 3G system adopt the
despread received chips. In this paper, it discusses the
method of ASIC(Application Specific Integrated Circuit),
parallel generation method of scrambling code and
which is optimal in the chip area and power consumption,
channelisation code for WCDMA on vector core.
while deficient in long design period, high cost, low
flexibility, difficult upgradation and high design risk. Thus II. PSEUDO-RANDOM SEQUENCES
the advantage of ASIC chip is merged only in case of large
quantity and regardless of chip cost. With the fast Pseudo-random sequences are sequences of 1s and 0s
development of wireless communication, the 3G system like generated by an algorithm so that the resulting numbers look
WCDMA, CDMA2000 and TDS-CDMA requires a multi- statistically independent and uniformly distributed. A
mode coexist with 4G system like TD-LTE and LTE-FDD in random signal differs from a pseudo-random signal in that a
base stations or with WLAN and Bluetooth in terminal random signal cannot be predicted. A pseudo-random signal
stations. And it will be a large waste in the chip area and is not random at all; it is a deterministic and periodic signal
power consumption if every system uses a ASIC chip. known to both the transmitter and the receiver. Even though
Besides, taking it into consideration that the typical evolution the signal is deterministic, it appears to have the statistical
of 4G system requires continuous evolution of base station properties of sampled white noise. To an unauthorized
and terminal station chips, it will increase chip cost by using listener, it appears to be a truly random signal. Pseudo-
ASIC chips. To avoid those demerits, the SDR(Software random sequences are typically generated using a system of
Defined Radio) scheme defined by using RISC (Reduced linear feedback shift registers (LFSRs). The LFSR
Instruction Set Computer) should enjoy priority in generators produce a sequence that depends on the number
developing base station chips that require low power of stages, the feedback tap connections, and the initial
consumption, rather than terminal station chips that require conditions.[2]
high power consumption. Yet, with the evolution and In a CDMA scheme, all users transmit on the same
blending of those communication systems, alone with the frequency and are differentiated by their unique spreading
mature application of VCORE(Vector Core), which is multi- codes composed of scrambling codes and channelisation
core, efficient in power consumption and fast calculation, the codes. The spreading codes appear to have the statistical
SDR scheme of RISC technology will be a new trend of properties of sampled white noise, so the spreading signal
appear to have the statistical properties of sampled white
downlink physical
S
channel
Modulation
Cch,SF,m
I+jQ S
X10+X18 .
Mapper
The sequence depending on the chosen scrambling
P Q
code number n is denoted zn, in the sequel. Furthermore, let
x(i), y(i) and zn(i) denote the i:th symbol of the sequence x, y,
j and zn, respectively.
(a) Spreading for WCDMA all downlink physical channels The m-sequences x and y are constructed as:
I Initial conditions:
S Cch,SF,m Sdl,n - x is constructed with x(0)=1, x(1)= x(2)=...= x
Someone downlink
(16)= x (17)=0.
Modulation I+jQ S
physical channel
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4880 0000 𝐷𝐷𝐷𝐷 8000
2440 0000 6𝐸𝐸𝐸 𝐶000
1220 0000 𝐵7𝐸3 4000
0910 0000 𝐷𝐵65 8000
17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0488 0000 6𝐷𝐵2 𝐶000
0244 0000 𝐵64𝐷 4000
I 0122 0000 𝐷𝐵𝐵2 8000
0091 0000 6𝐷𝐷9 4000
0048 8000 𝐵678 8000
0024 4000 5𝐵3𝐶 4000
8002 0000 𝐴𝐷0𝐴 0000
Q 4001 0000 5685 0000
17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 4000 8000 2𝐵42 8000
1000 4000 15𝐴1 4000
8810 0000 8𝐴44 8000
𝐴𝑥,0 =
4408 0000
2204 0000
, 𝐴𝑦,0 =
4522 4000
𝐴205 0000
(15)
1102 0000 5102 8000
0881 0000 2881 4000
(a)Downlink scrambling code typical LFSR generator 0440 8000 94𝐷4 8000
0220 4000 4𝐴6𝐴 4000
32 8100 0000 𝐴5𝐴1 0000
4080 0000 52𝐷0 8000
x MAC 32 MAC 2040 0000 2968 4000
1020 0000 9420 0000
32
32x32 32x32 0810 0000 4𝐴10 0000
32 0408 0000 2508 0000
Ax,0 Ax,4096 0204 0000 1284 0000
0102 0000 0942 0000
I Q 0081 0000 04𝐴1 0000
+ 32 + 32 0040 8000 0250 8000
0020 4000 0128 4000
The n:th Gold code sequence zn is then defined as:
Ay,0 32
Ay,4096 - zn=xn,m+ym mod 2 (16)
32x32 32x32 32
- zn+131072= Ax,131072* xn,m +Ay,131072* ym mod 2 (17)
y MAC 32 MAC Ax,131072 and Ay,131072 can be respectively achieved from
32 Ax,0 and Ay,0.
(b) Downlink scrambling code parallel generator The xn,m is defined as:
Fig. 2. Downlink scrambling code generator xn,m= Ax,m *xn,0 mod 2, (18)
and xn,0 can be merged from xn/32 and xn/32+1 .
Scrambling code Parallel Generation on Vector Core These binary sequences are converted to real valued
sequences Zn by the following transformation:
The scrambling code typical generation on asic is a chip- 1 if zn (i) 0
by-chip way, which is not suitable for fast generation and Z n (i) for i 0,1,,218 2.
1 if zn (i) 1 (19)
cannot use the fast calculation of vector core. The following
introduces a scrambling code parallel gerneration which can Finally, the n:th complex scrambling code sequence Sdl,n
be used on vector core. Let is defined as:
xm=[x(m*32+31), …,x(m*32+1),x(m*32) ]T (7) -Sdl,n=Zn+jZn+131072 (20)
and Fig 2(b) illustrates the scrambling code parallel generator
ym=[y(m*32+31), …,y(m*32+1),y(m*32) ]T. (8) on vector core.
The m-sequences x and y are constructed as:
Initial conditions: V. CHANNELISATION CODE GENERATION FOR WCDMA
- x0=[0010 0000 0000 0100 0000 0000 0000 Channelisation Code Typical Generation on ASIC
0001 ]T=[2004 0001]T. (9)
For all physical channels (except SCH) in the WCDMA
- y0=[1001 1100 0000 0011 1111 1111 1111
environment the I and Q branches shall be spread to the chip
1111]T=[9c03 ffff]T. (10)
rate by the same real-valued channelisation code Cch,SF,m, i.e.
Recursive definition of subsequent symbols;
the output for each input symbol on the I and the Q branches
- xm=Ax,m *x0 mod 2 (11)
shall be a sequence of SF chips corresponding to the
- ym=Ay,m *y0 mod 2 (12)
channelisation code chip sequence multiplied by the real-
Ax,m is defined as:
valued symbol. The channelisation code sequence shall be
- Ax,m= Ax,0m mod 2. (13)
aligned in time with the symbol boundary.[1]
Ay,m is defined as:
The channelisation codes in WCDMA are Orthogonal
- Ay,m= Ay,0m mod 2. (14)
Variable Spreading Factor (OVSF) codes that preserve the
orthogonality between a user‟s different physical channels.
Initial conditions:
The OVSF codes can be defined using the formula (21).The
channelisation codes are uniquely described as Cch,SF,k, where
SF is the spreading factor of the code and k is the code
number, 0 k SF-1.
The leftmost value in each channelisation code word
corresponds to the chip transmitted first in time.
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Cch,1,0 1 and Q-branches are further multiplied by complex-valued
Cch , 2,0 Cch ,1,0 Cch ,1,0 1 1 scrambling code, where I and Q denote real and imaginary
parts, respectively. The spreading operation is defined as
Cch , 2,1 Cch ,1,0 Cch ,1,0 1 1 R = SF −1
n=0 S ∗ (Sdl n + Cch (n)) (25)
C ch , 2 n1, 0 C ch , 2n , 0 C ch , 2n , 0 Where SF is Spreading Factor, S is the transmitting
C C C ch , 2n , 0 complex-valued symbol, and R is the transmitting complex-
ch , 2 n 1 ,1
ch , 2 , 0
n
VII. RESULTS
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Fig 5(a) shows the signal constellation for the I-Q/code
multiplexed signal before complex spreading, and Fig 5(b)
shows the signal constellation after the complex spreading
operations. The I-Q/code multiplexed signal with complex
spreading results in a rotated QPSK constellation. Fig 5(b)
shows the resulting constellation achieved by both the typical
spreading and the parallel spreading.
(a)QPSK Constellation Before Complex Spreading
REFERENCES
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