Operational Amplifiers and Application

Introduction
An operational amplifier, or op-amp, is the most important and versatile analog IC. It is a
direct coupled multistage voltage amplifier with an extremely high gain. With the help of op-
amp, the circuit design becomes very simple. The variety of useful circuits can be built without
the necessity of knowing about the complex internal circuitry.
Fig. 1 shows circuit symbol and circuit model of an op-amp.

Fig. 1 Circuit symbol and model of an op-amp

An op-amp has two input terminals – an inverting input 𝑉1 and a non-inverting input 𝑉2,
and an output 𝑉𝑜. It requires two power supplies: +𝑉𝐶𝐶 and −𝑉𝐸𝐸. It has a very high input
impedance 𝑍𝑖𝑛, a very low output impedance 𝑍𝑜𝑢𝑡 and a very high gain 𝐴.

Advantages of Op-Amps
 Low cost
 Small size
 Versatility
 Flexibility
 Dependability

Applications of Op-Amps
 Op-amps have become an integral part of almost every electronic circuit which uses
linear integrated circuits.
 Op-amps are used in analog signal processing and analog filtering.
 They are used to perform mathematical operations such as addition, subtraction,
multiplication, integration, differentiation, etc.

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  They are used in the fields of process control, communications, computers, power and
signal sources, displays and measuring systems.
 They are used in linear applications like voltage follower, differential amplifier, inverting
amplifier, non-inverting amplifier, etc. and non-linear applications like precision
rectifiers, comparators, clampers, Schmitt trigger circuit, etc.

Ideal Op-Amp
Fig. 2 gives the representation of ideal and practical op-amps.

Fig. 2 Representation of ideal and practical op-amps

An ideal op-amp has the following characteristics:

1. Infinite voltage gain (𝑨𝒐𝒍 = ∞): The voltage gain, also known as differential open loop
gain is infinite in an ideal op-amp.
2. Infinite input impedance (𝒁𝒊𝒏 = ∞): The input impedance is infinite in an ideal op-amp.
This means that no current can flow into an ideal op-amp.
3. Zero output impedance (𝒁𝒐𝒖𝒕 = 𝟎): The output impedance is zero in an ideal op-amp.
This means that the output voltage remains the same, irrespective of the value of the load
connected.
4. Zero offset voltage (𝑽𝑶𝑺 = 𝟎): The presence of the small output voltage even when 𝑉1=
𝑉2 = 0 is called offset voltage. In an ideal op-amp, offset voltage is zero. This means the
output is zero if the input is zero.
5. Infinite bandwidth (𝑩𝑾 = ∞): The range of frequencies over which the amplifier
performance is satisfactory is called its bandwidth. The bandwidth of an ideal op-amp is
infinite.
6. Infinite CMRR (𝑪𝑴𝑹𝑹 = ∞): The ratio of differential gain to common mode gain is
called common mode rejection ratio (CMRR). In an ideal op-amp, CMRR is infinite. This
means that the common mode gain is zero in an ideal op-amp.
7. Infinite slew rate (𝑺 = ∞): Slew rate is the maximum rate of change of output voltage
with time. In an ideal op-amp, slew rate is infinite. This means that the changes in the
output voltage occur simultaneously with the changes in the input voltage.
 8. No effect of temperature: The characteristics of an ideal op-amp do not change with the
changes in temperature.
9. Zero PSRR (𝑷𝑺𝑹𝑹 = 𝟎): Power supply rejection ratio (PSRR) is defined as the ratio of
the change in input offset voltage due to the change in supply voltage producing it,
keeping other power supply voltage constant. In an ideal op-amp, PSRR is zero.

Practical Op-Amp
Characteristics of a practical op-amp are very high voltage gain, very high input
impedance, and very low output impedance.

Internal Block Diagram of an Op-Amp

A typical op-amp is made up of three types of amplifier circuits: a differential amplifier, a
voltage amplifier, and a push-pull amplifier, as shown in Fig. 3.

Fig. 3 Basic internal arrangement of an op-amp

 The differential amplifier is the input stage for the op-amp. It provides amplification of
the difference voltage between the two inputs.
 The second stage is usually a class A amplifier that provides additional gain. Some op-
amps may have more than one voltage amplifier stage.
 A push-pull class B amplifier is typically used for the output stage.

Op-Amp IC 741
IC 741is the most popular IC version of op-amp. It is an 8-pin IC as shown in Fig. 4.

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  Pin 6 is the output terminal
 Pin 4 is for −𝑉𝐸𝐸 (𝑉−) supply and pin 7 is for +𝑉𝐶𝐶 (𝑉+) supply
 Pins 1 and 5 are offset null pins. These are used to nullify offset voltage
 Pin 8 is a dummy pin and no connection is made to this pin

Op-Amp Input Modes

The input signal modes are determined by the differential amplifier input stage of the op-
amp.

Differential Mode
In the differential mode, either one signal is applied to an input with the other input
grounded or two opposite-polarity signals are applied to the inputs.

Single-Ended Differential Mode

When an op-amp is operated in the single-ended differential mode, one input is grounded
and a signal voltage is applied to the other input, as shown in Fig. 5.

Fig. 5 Single-ended differential mode

In the case where the signal voltage is applied to the inverting input as in Fig. 5 (a), an
inverted, amplified signal voltage appears at the output. In the case where the signal is applied
to the noninverting input with the inverting input grounded, as in Fig. 5(b), a noninverted,
amplified signal voltage appears at the output.

Double-Ended Differential Mode

In the double-ended differential mode, two opposite-polarity (out-of-phase) signals are
applied to the inputs, as shown in Fig. 6(a). The amplified difference between the two inputs
appears on the output.

Fig. 6 Double-ended differential mode

 Equivalently, the double-ended differential mode can be represented by a single source
connected between the two inputs, as shown in Fig. 6(b).

Common Mode
In the common mode, two signal voltages of the same phase, frequency, and amplitude
are applied to the two inputs, as shown in Fig. 7.

Fig. 7 Common mode operation

When equal input signals are applied to both inputs, they tend to cancel, resulting in a
zero output voltage. This action is called common-mode rejection. Its importance lies in the
situation where an unwanted signal appears commonly on both op-amp inputs. Common-mode
rejection means that this unwanted signal will not appear on the output and distort the desired
signal.

Op-Amp Parameters
Open-Loop Voltage Gain (Differential Gain)
An op-amp amplifies the difference between the two input signals 𝑽𝒅 = 𝑽𝟐 − 𝑽𝟏. The
output voltage is given by
𝑽𝒐 = 𝑨𝒐𝒍𝑽𝒅 = 𝑨𝒐𝒍(𝑽𝟐 − 𝑽𝟏)
𝑽𝒐
where Aol is the open-loop voltage gain, also called differential gain given by 𝑨𝒐𝒍 = 𝑽
𝒅

The open-loop voltage gain of an op-amp is the internal voltage gain of the device and
represents the ratio of output voltage to input voltage when there are no external components.
Generally 𝐴 is expressed in decibel (dB) as 𝑨 = 𝟐𝟎 𝒍𝒐𝒈 (𝑽𝒐
𝑜𝑙 𝒐𝒍 𝟏𝟎 ) 𝒅𝑩 .
𝑽𝒅

Common Mode Gain

If we apply two input voltages which are equal i.e. if 𝑉1 = 𝑉2, then ideally the output must
be zero. But practically, the output voltage not only depends on the difference voltage but also
depends on the average common level of the two inputs. Such a common level is called common
𝑽𝟏+𝑽𝟐
mode signal 𝑽 𝒄 = 𝟐 .
The differential amplifier produces the output voltage proportional to common mode
signal and the output voltage is given as
𝑽𝒐 = 𝑨𝒄𝒎𝑽𝒄
𝑽𝒐
where 𝐴 𝑐𝑚 is the common mode gain given by 𝑨𝒄𝒎 =
𝑽𝒄

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Common Mode Rejection Ratio
Common mode rejection ratio (CMRR) is the ability of an op-amp to reject a common
mode signal. It is defined as the ratio of open-loop voltage gain 𝑨𝒐𝒍 to common mode gain
𝑨𝒄𝒎.
𝑨𝒐𝒍
𝑪𝑴𝑹𝑹 =
𝑨𝒄𝒎
The higher the CMRR, the better. A very high value of CMRR means that the open-loop
gain, 𝐴𝑜𝑙, is high and the common-mode gain, 𝐴𝑐𝑚, is low.
CMRR is a large value and is often expressed in decibel as
𝑨𝒐𝒍
𝑪𝑴𝑹𝑹 = 𝟐𝟎 𝒍𝒐𝒈𝟏𝟎 (𝑨 ) 𝒅𝑩
𝒄𝒎

Maximum Output Voltage Swing 𝑽𝑶(𝒑−𝒑)

With no input signal, the output of an op-amp is ideally 0 V. This is called the quiescent
output voltage. When an input signal is applied, the ideal limits of the peak-to-peak output signal
are ±𝑉𝐶𝐶. In practice, however, this ideal can be approached but never reached. 𝑉𝑂(𝑝−𝑝) varies
with the load connected to the op-amp and increases directly with load resistance.

Input Offset Voltage

The ideal op-amp produces zero volts out for zero volts in. In a practical op-amp, a small
dc voltage appears at the output when no differential input voltage is applied.
The input offset voltage, 𝑉𝑂𝑆, is the differential dc voltage required between the inputs
to force the output to zero volts.
Typical values of input offset voltage are in the range of 2 mV or less. In the ideal case, it
is 0 V.

Input Offset Current

Ideally, the two input bias currents are equal, and thus their difference is zero. In a
practical op-amp, however, the bias currents are not exactly equal.
The input offset current, 𝐼𝑂𝑆, is the difference of the input bias currents, expressed as an
absolute value.
𝑰𝑶𝑺 = |𝑰𝟏 − 𝑰𝟐|

Input Bias Current

The input bias current is the average of the two input currents of the op-amp. It is
calculated as follows:
𝑰𝟏 + 𝑰𝟐
𝑰𝑩𝑰𝑨𝑺 =
𝟐
It is the dc current required by the inputs of the amplifier to properly operate the first
stage. The concept of input bias current is illustrated in Fig. 8.
 Fig. 8 Input bias current
Input Impedance
Two basic ways of specifying the input impedance of an op-amp are the differential and
the common mode.

Fig. 9 Op-amp input impedance

The differential input impedance is the total resistance between the inverting and the
noninverting inputs, as illustrated in Fig. 9(a). It is measured by determining the change in bias
current for a given change in differential input voltage.
The common-mode input impedance is the resistance between each input and ground
and is measured by determining the change in bias current for a given change in common-mode
input voltage. It is depicted in Fig. 9(b).

Output Impedance
The output impedance is the resistance viewed from the output terminal of the op-amp,
as indicated in Fig. 10.

Fig. 10 Op-amp output impedance

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Slew Rate
Slew rate is defined as the maximum rate of change of output voltage in response to a
step input voltage.
∆𝑽𝒐𝒖𝒕
𝑺𝒍𝒆𝒘 𝒓𝒂𝒕𝒆 = 𝑺 =
∆𝒕
where ∆𝑉𝑜𝑢𝑡 = +𝑉𝑚𝑎𝑥 − (−𝑉𝑚𝑎𝑥). The unit of slew rate is volts per microsecond (𝑉/𝜇𝑠).

Operation of an Op-Amp
An op-amp is basically differential amplifier which amplifies the difference between the
two input signals.
Fig. 11 shows the basic operation of an op-amp as inverting and non-inverting amplifiers.

Fig. 11 Basic operation of an op-amp

When a voltage 𝑉1is applied to the inverting input with the non-inverting input grounded
(𝑉2 = 0), the output voltage is
𝑉𝑜 = 𝐴(𝑉2 − 𝑉1) = 𝐴(0 − 𝑉1) = −𝐴𝑉1
This indicates that the output voltage is amplified with a gain 𝐴 and inverted (phase or
polarity reversed) with respect to the input voltage as shown in Fig. 11 (a).
On the other hand, when a voltage 𝑉2 is applied to the non-inverting input with the
inverting input grounded (𝑉1 = 0), the output voltage is
𝑉𝑜 = 𝐴(𝑉2 − 𝑉1) = 𝐴(𝑉2 − 0) = 𝐴𝑉2
This indicates that the output voltage is amplified with a gain 𝐴 and is in the same phase
or polarity as the input voltage as shown in Fig. 11 (b).
Assumptions
While analyzing the operation of op-amp circuits, two assumptions are made:
1. Zero Input Current: Since the input resistance of an ideal op-amp is infinite, no current
flows into an op-amp. This makes the input current zero.
2. Virtual Ground: An ideal op-amp has 𝑉an infinite gain. We know that output voltage
𝑉 = 𝐴(𝑉 − 𝑉 ). That makes 𝑉( − 𝑉 ) 𝑜. If gain 𝐴 is infinite, that means the difference
=
𝑜 2 1 2 1 𝐴
𝑉2 − 𝑉1 = 0, or 𝑉1 = 𝑉2.
This means that the input terminals of an op-amp are always at the same
potential. Thus if one terminal is grounded, the other one can be treated to be virtually
grounded.

Basic Op-Amp Circuits

Inverting Amplifier
An amplifier which produces a phase shift of 180° between input and output is called
inverting amplifier. Fig. 12 shows an inverting amplifier using op-amp.

𝑅𝑓
𝐼𝑓
𝑅1

𝐼1

Fig. 12 Inverting amplifier

From the circuit, the potential at node B, 𝑉𝐵 = 0.
From the concept of virtual ground, the two input terminals are at same potential.
Therefore, the potential at node A, 𝑉𝐴 = 𝑉𝐵 = 0.
From the circuit,
𝑉𝑖𝑛− 𝑉𝐴 𝑉𝑖𝑛 − 0
𝐼1 = = (∵ 𝑉𝐴 = 0)
𝑅1 𝑅1
𝑽𝒊𝒏
𝑰𝟏 =
𝑹𝟏

and
𝑉𝐴− 𝑉𝑜 0 − 𝑉 𝑜
𝐼𝑓 = =
𝑅𝑓 𝑅𝑓
𝑽𝒐
𝑰𝒇 = −
𝑹𝒇

Since op-amp input current is zero, 𝐼1 passes through 𝑅𝑓 as 𝐼𝑓. That is,

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 𝐼1 = 𝐼𝑓
𝑉𝑖𝑛 = − 𝑉𝑜
𝑅1 𝑅𝑓
𝑹𝒇
𝑽𝒐 = − ( )𝑽 𝒊𝒏
𝑹𝟏
𝑅𝑓
Here is called the gain of the amplifier and negative sign indicates that the output is
𝑅1
inverted.
Fig. 13 shows the input and output waveforms of an inverting amplifier.

Fig. 13 Waveforms of inverting amplifier

Non-Inverting Amplifier
An amplifier which amplifies the input without producing any phase shift between input
and output is called non-inverting amplifier. Fig. 14 shows a non-inverting amplifier using op-
amp.

𝑅𝑓
𝐼𝑓
𝑅1

𝐼1

Fig. 14 Non-inverting amplifier

From the circuit, the potential at node B, 𝑉𝐵 = 𝑉𝑖𝑛.
From the concept of virtual ground, the two input terminals are at same potential.
Therefore, the potential at node A, 𝑉𝐴 = 𝑉𝐵 = 𝑉𝑖𝑛.
From the circuit,
𝑉𝐴 − 0 𝑉𝑖𝑛 − 0
𝐼1 = = (∵ 𝑉𝐴 = 𝑉𝑖𝑛)
𝑅1 𝑅1
 𝑽𝒊𝒏
𝑰𝟏 =
𝑹𝟏

and
𝑉𝑜 − 𝑉𝐴 𝑉𝑜− 𝑉𝑖𝑛
𝐼𝑓 = =
𝑅𝑓 𝑅𝑓
𝑽𝒐 − 𝑽𝒊𝒏
𝑰𝒇 = 𝑹
𝒇

Since op-amp input current is zero, 𝐼𝑓 passes through 𝑅1 as 𝐼1. That is,
𝐼1 = 𝐼𝑓
𝑉𝑖𝑛 = 𝑉𝑜 − 𝑉𝑖𝑛
𝑅1 𝑅𝑓
𝑉𝑖𝑛 = 𝑉𝑜 − 𝑉 𝑖𝑛
𝑅1 𝑅𝑓 𝑅𝑓
𝑉𝑜 𝑉𝑖𝑛 𝑉 𝑖𝑛
= +
𝑅𝑓 𝑅1 𝑅𝑓
𝑉𝑜 1 1
= ( + ) 𝑉𝑖
𝑅𝑓 𝑅1 𝑅𝑓
𝑅1 + 𝑅𝑓
𝑉𝑜 = 𝑅𝑓 ( 𝑅 𝑅 ) 𝑉 𝑖 𝑛
1 𝑓

𝑅1 + 𝑅𝑓
𝑉𝑜 = ( ) 𝑉 𝑖𝑛
𝑅1
𝑹𝒇
𝑽𝒐 = (𝟏 + )𝑽
𝑹𝟏 𝒊𝒏
𝑅𝑓
Here (1 + ) is called the gain of the amplifier. Fig. 15 shows the input and output
𝑅1
waveforms of an inverting amplifier.

Fig. 15 Waveforms of non-inverting amplifier

Op-Amp Applications
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Voltage Follower
A circuit in which the output voltage follows the input voltage is called voltage follower.
Fig. 16 shows a voltage follower circuit using an op-amp.

Fig. 16 Voltage follower

From the circuit, the potential at node B, 𝑉𝐵 = 𝑉𝑖𝑛.
From the concept of virtual ground, the two input terminals are at same potential.
Therefore, the potential at node A, 𝑉𝐴 = 𝑉𝐵 = 𝑉𝑖𝑛.
The node 𝐴 is directly connected to the output. Hence
𝑉𝑜 = 𝑉𝐴
Now since 𝑉𝐴 = 𝑉𝑖𝑛,
𝑽𝒐 = 𝑽𝒊𝒏
In a voltage follower gain is unity (𝐴 = 1). A voltage follower is also called source
follower, unity gain amplifier, buffer amplifier or isolation amplifier. Fig. 17 shows the input
and output waveforms of a voltage follower.

Fig. 17 Waveforms of voltage follower

Advantages of Voltage Follower

1. Very large input resistance
2. Very low output resistance
3. Large bandwidth
4. The output follows the input exactly without any phase shift

Summing Amplifier (Summer or Adder)

12
Mr. Amod Kumar , Dept. of ECE, Faculty of Engineering & Technology, KMCUAF University, Lucknow
 Electronics Engineering Operational Amplifiers and Applications

Inverting Summing Amplifier

In this circuit, the input signals to be added are applied to the inverting input terminal.

𝑅1
𝑅𝑓
𝐼1 𝐼𝑓

𝑅2

𝐼2

Fig. 18 Inverting summing amplifier (adder) with two inputs

An adder with two inputs is shown in Fig. 18.

From the circuit, the potential at node B, 𝑉𝐵 = 0.

From the concept of virtual ground, the two input terminals are at same potential.
Therefore, the potential at node A, 𝑉𝐴 = 𝑉𝐵 = 0.
From the circuit,
𝐼 = 𝑉1 − 𝑉𝐴 = 𝑉1 − 0 (∵ 𝑉𝐴 = 0)
1
𝑅1 𝑅1
𝑽𝟏
𝑰𝟏 =
𝑹𝟏
Similarly,
𝑉2 − 𝑉𝐴 𝑉2 − 0
𝐼2 = =
𝑅2 𝑅2
𝑽𝟐
𝑰𝟐 =
𝑹𝟐
and
𝑉𝐴 − 𝑉𝑜 0 − 𝑉𝑜
𝐼𝑓 = =
𝑅𝑓 𝑅𝑓
𝑽𝒐
𝑰𝒇 = −
𝑹𝒇
Now since op-amp input current is zero, 𝐼1 and 𝐼2 together pass through 𝑅𝑓 as 𝐼𝑓. That is,
𝐼𝑓 = 𝐼1 + 𝐼2
𝑉𝑜 𝑉1 𝑉2
− = +
𝑅𝑓𝑅1 𝑅2
𝑉1 𝑉2
𝑉 = −𝑅 ( + )
𝑜 𝑓
𝑅1 𝑅2
𝑅𝑓 𝑅𝑓
𝑉𝑜 = − ( 𝑉1 + 𝑉2)
𝑅1 𝑅2
If 𝑅1 = 𝑅2 = 𝑅,

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 𝑅𝑓
𝑉 =− (𝑉 + 𝑉 )
𝑜 1 2
𝑅
If 𝑅1 = 𝑅2 = 𝑅𝑓,
𝑉𝑜 = −(𝑉1 + 𝑉2)
This shows that the output is the sum of the input signals. The negative sign indicates that
the phase is inverted.

Three-Input Adder (Inverting Summing Amplifier)

An adder with three inputs is shown in Fig. 19.

𝑅1
𝑉1 𝑅𝑓
𝑅2 𝐼1 𝐼𝑓
𝑉2
𝑅3 𝐼2
𝑉3
𝐼3

Fig. 19 Inverting summing amplifier (adder) with three inputs

From the circuit, the potential at node B, 𝑉𝐵 = 0.
From the concept of virtual ground, the two input terminals are at same potential.
Therefore, the potential at node A, 𝑉𝐴 = 𝑉𝐵 = 0.
From the circuit,
𝐼 = 𝑉1 − 𝑉𝐴 = 𝑉1 − 0 (∵ 𝑉𝐴 = 0)
1
𝑅1 𝑅1
𝑽𝟏
𝑰𝟏 =
𝑹𝟏
Similarly,
𝑉2 − 𝑉𝐴 𝑉2 − 0
𝐼2 = =
𝑅2 𝑅2
𝑽𝟐
𝑰𝟐 =
𝑹𝟐

Also
𝑉3 − 𝑉𝐴 𝑉3 − 0
𝐼3 = =
𝑅3 𝑅3
𝑽𝟑
𝑰𝟑 =
𝑹𝟑
and
𝑉𝐴 − 𝑉𝑜 0 − 𝑉𝑜
𝐼𝑓 = =
𝑅𝑓 𝑅𝑓
 𝑽𝒐
𝑰𝒇 = −
𝑹𝒇

Now since op-amp input current is zero, 𝐼1, 𝐼2 and 𝐼3 together pass through 𝑅𝑓 as 𝐼𝑓. That
is,
𝐼𝑓 = 𝐼1 + 𝐼2 + 𝐼3
𝑉𝑜 𝑉1 𝑉2 𝑉3
− = + +
𝑅𝑓
𝑅1 𝑅2 𝑅3
𝑉1 𝑉2 𝑉3
𝑉 = −𝑅 ( + + )
𝑜 𝑓
𝑅1 𝑅2 𝑅3
𝑅𝑓 𝑅𝑓 𝑅𝑓
𝑉𝑜 = − ( 𝑉1 + 𝑉2 + 𝑉3)
𝑅1 𝑅2 𝑅3
If 𝑅1 = 𝑅2 = 𝑅3 = 𝑅,
𝑅𝑓
𝑉 = − (𝑉 + 𝑉 + 𝑉 )
𝑜 1 2 3
𝑅
If 𝑅1 = 𝑅2 = 𝑅3 = 𝑅𝑓,
𝑉𝑜 = −(𝑉1 + 𝑉2 + 𝑉3)
This shows that the output is the sum of the input signals. The negative sign indicates that
the phase is inverted.

Non-Inverting Summing Amplifier

In this circuit, the input signals to be added are applied to the non-inverting input
terminal. Fig. 20 shows a non-inverting summing amplifier with two inputs.
𝑅𝑓

𝑅 𝐼𝑓

𝐼
𝑅1
𝐼1

𝑅2 𝐼2
Fig. 20 Non-inverting summing amplifier
Let the potential at node B be 𝑉𝐵.
From the concept of virtual ground, the two input terminals are at same potential.
Therefore, the potential at node A, 𝑉𝐴 = 𝑉𝐵.
From the circuit,
𝑉1 − 𝑉𝐵
𝐼1 =
𝑅1
and
𝑉2 − 𝑉𝐵
𝐼2 =
𝑅2

15
Now since op-amp input current is zero,
𝐼1 + 𝐼 2 = 0
𝑉1− 𝑉𝐵 𝑉2 − 𝑉𝐵
∴ + =0
𝑅1 𝑅2
𝑉1− 𝑉𝐵 + 𝑉2 − 𝑉𝐵 = 0
𝑅1 𝑅1 𝑅2 𝑅2
𝑉1 + 𝑉2 = 𝑉𝐵 + 𝑉𝐵
𝑅1 𝑅2 𝑅1 𝑅2
𝑅2𝑉1 + 𝑅1𝑉2 𝑅1 + 𝑅2
𝑅𝑅 = 𝑉 𝐵 ( 𝑅𝑅 )
1 2 1 2
𝑅2𝑉1 + 𝑅1𝑉2
𝑉𝐵 = (1)
𝑅1 + 𝑅2
At node 𝐴,
𝑉𝐴 𝑉𝐵
𝐼= = (∵ 𝑉𝐴 = 𝑉𝐵)
𝑅 𝑅
and
𝑉𝑜 − 𝑉𝐴 𝑉𝑜 − 𝑉 𝐵
𝐼𝑓 = =
𝑅𝑓 𝑅𝑓
Now since op-amp input current is zero,
𝐼 = 𝐼𝑓
𝑉𝐵= 𝑉𝑜 − 𝑉𝐵
𝑅 𝑅𝑓
𝑉𝐵 = 𝑉𝑜 − 𝑉𝐵
𝑅 𝑅𝑓 𝑅𝑓
𝑉𝑜 = 𝑉𝐵 + 𝑉𝐵
𝑅𝑓 𝑅 𝑅𝑓
𝑉𝑜 𝑅 + 𝑅𝑓
= 𝑉𝐵 ( )
𝑅𝑓 𝑅𝑅𝑓
𝑅 + 𝑅𝑓 (2)
𝑉𝑜 = 𝑉𝐵 ( )
𝑅
Substituting Eqn. (1) in (2),
𝑅2𝑉1 + 𝑅1𝑉2 𝑅 + 𝑅𝑓
𝑉𝑜 = ( )( )
𝑅1 + 𝑅2 𝑅
𝑅2(𝑅 + 𝑅𝑓) 𝑅1(𝑅 + 𝑅𝑓)
𝑉𝑜 = 𝑉1 + 𝑉2
𝑅(𝑅 1+ 𝑅 )2 𝑅(𝑅1+ 𝑅 )2
If 𝑅1 = 𝑅2 = 𝑅,
𝑅 + 𝑅𝑓
𝑉= (𝑉 + 𝑉 )
𝑜 1 2
2𝑅
 Unit-5
Electronics Engineering Operational Amplifiers and Applications
If 𝑅1 = 𝑅2 = 𝑅 = 𝑅𝑓,

𝑉𝑜= 𝑉1 + 𝑉2
This shows that the output is the sum of the input signals.

Subtractor
In a subtractor circuit, the output is the difference between the two inputs. Fig. 21 shows
a subtractor circuit using an op-amp.

𝑅1 𝐼𝑓 𝑅𝑓

𝐼1
𝑅2

𝐼2
𝑅𝑓
𝐼2

Fig. 21 Subtractor
From the circuit, the potential at node B,

𝑅𝑓
𝑉𝐵 = ( ) 𝑉2
𝑅2 + 𝑅𝑓
From the concept of virtual ground, the two input terminals are at same potential.
Therefore, the potential at node A,
𝑅𝑓
𝑉𝐴 = 𝑉𝐵 = ( ) 𝑉2 (3)
𝑅 2 + 𝑅𝑓
From the circuit,
𝑉1 − 𝑉𝐴
𝐼1 =
𝑅1
and
𝑉𝐴 − 𝑉𝑜
𝐼𝑓 =
𝑅𝑓
Since op-amp input current is zero, 𝐼1 passes through 𝑅𝑓 as 𝐼𝑓. That is,
𝐼1 = 𝐼𝑓
𝑉1 − 𝑉𝐴 = 𝑉𝐴 − 𝑉𝑜
𝑅1 𝑅𝑓
𝑉1 − 𝑉𝐴 = 𝑉𝐴 − 𝑉𝑜
𝑅1 𝑅1 𝑅𝑓 𝑅𝑓
𝑉𝑜 = 𝑉𝐴 + 𝑉𝐴 − 𝑉1
𝑅𝑓 𝑅1 𝑅𝑓 𝑅1
17
 𝑉𝑜 1 1 𝑉1
= 𝑉𝐴( )−
𝑅𝑓 𝑅1 𝑅𝑓 𝑅1
𝑉𝑜 𝑅1 + 𝑅𝑓 𝑉1
𝑅𝑓 = 𝑉 𝐴 ( 𝑅1𝑅𝑓 ) − 𝑅1
𝑅1 + 𝑅𝑓 𝑅𝑓
𝑉𝑜 = 𝑉𝐴𝑅𝑓 ( 𝑅 𝑅 ) − 𝑅 𝑉1
1 𝑓 1

𝑉 = 𝑉 ( 𝑅1 + 𝑅𝑓 ) − 𝑅𝑓 𝑉 (4)
𝑜 𝐴
𝑅1 𝑅1 1
Substituting Eqn. (3) in (4),
𝑅𝑓 𝑅1 + 𝑅𝑓 𝑅𝑓
𝑉𝑜 = ( ) 𝑉2( ) − 𝑉1
𝑅2 + 𝑅𝑓 𝑅1 𝑅1

𝑅𝑓(𝑅1 +𝑅𝑓) 𝑅𝑓
𝑉𝑜= 𝑉2 − 𝑉1
𝑅1(𝑅2 + 𝑅 𝑓) 𝑅1

If 𝑅1 = 𝑅2,
𝑅𝑓 𝑅𝑓
𝑉𝑜 = 𝑉 2 − 𝑉1
𝑅2 𝑅1
If 𝑅1 = 𝑅2 = 𝑅,
𝑅𝑓
𝑉 = (𝑉 − 𝑉 )
𝑜 2 1
𝑅
If 𝑅1 = 𝑅2 = 𝑅 = 𝑅𝑓,

𝑉𝑜= 𝑉2 − 𝑉1
This shows that the output is the difference between the two input signals.

Integrator
In an integrator circuit, the output is the integration of the input voltage. Fig. 22 shows an
integrator circuit using an op-amp.

𝑅1 𝐼𝑓 𝐶𝑓

𝐼1

Fig. 22 Integrator
From the circuit, the potential at node B, 𝑉𝐵 = 0.
From the concept of virtual ground, the two input terminals are at same potential.
Therefore, the potential at node A, 𝑉𝐴 = 𝑉𝐵 = 0.
From the circuit,

18
 𝑉𝑖𝑛− 𝑉𝐴 𝑉𝑖𝑛 − 0
𝐼1 = = (∵ 𝑉𝐴 = 0)
𝑅1 𝑅1
𝑽𝒊𝒏
𝑰𝟏 =
𝑹𝟏

and
𝑑(𝑉𝐴 − 𝑉𝑜) 𝑑(0 − 𝑉𝑜)
𝐼𝑓 = 𝐶𝑓 = 𝐶𝑓
𝑑𝑡 𝑑𝑡
𝒅𝑽𝒐
𝑰𝒇 = −𝑪𝒇
𝒅𝒕
Since op-amp input current is zero, 𝐼1 passes through 𝑅𝑓 as 𝐼𝑓. That is,
𝐼1 = 𝐼𝑓
𝑉𝑖𝑛 = −𝐶 𝑑𝑉𝑜
𝑓
𝑅1 𝑑𝑡
𝑑𝑉𝑜 𝑉 𝑖𝑛
=−
𝑑𝑡 𝑅1𝐶𝑓
Integrating both sides with respect to t,
𝑑𝑉𝑜 1
∫ 𝑑𝑡 𝑑𝑡 =− 𝑅 𝐶 ∫ 𝑉 𝑖𝑛 𝑑𝑡
1 𝑓

1
𝑉𝑜= − ∫ 𝑉𝑖𝑛𝑑𝑡
𝑅1𝐶𝑓
1
This shows that the output is the integration of the input voltage. The term (− )
𝑅1 𝐶 𝑓
indicates the gain of the amplifier.

Differentiator
In a differentiator circuit, the output is the differentiation of the input voltage. Fig. 23
shows a differentiator circuit using an op-amp.

𝐶1 𝐼𝑓 𝑅𝑓

𝐼1

Fig. 23 Differentiator
From the circuit, the potential at node B, 𝑉𝐵 = 0.
From the concept of virtual ground, the two input terminals are at same potential.
Therefore, the potential at node A, 𝑉𝐴 = 𝑉𝐵 = 0.
From the circuit,

19
 𝑑(𝑉𝑖𝑛 − 𝑉𝐴) 𝑑(𝑉𝑖𝑛 − 0)
𝐼1 = 𝐶 1 = 𝐶1
𝑑𝑡 𝑑𝑡
𝒅𝑽𝒊𝒏
𝑰𝟏 = 𝑪𝟏
𝒅𝒕
and
𝑉𝐴 − 𝑉𝑜 0 − 𝑉𝑜
𝐼𝑓 = =
𝑅𝑓 𝑅𝑓
𝑽𝒐
𝑰𝒇 = −
𝑹𝒇
Since op-amp input current is zero, 𝐼1 passes through 𝑅𝑓 as 𝐼𝑓. That is,
𝐼1 = 𝐼𝑓
𝑑𝑉𝑖𝑛 𝑉𝑜
𝐶1 =−
𝑑𝑡 𝑅𝑓
𝑑𝑉𝑖𝑛
𝑉𝑜 = −𝑅𝑓𝐶1
𝑑𝑡
This shows that the output is the differentiation of the input voltage. The term (−𝑅𝑓𝐶1)
indicates the gain of the amplifier.

Comparator
In a comparator circuit, the amplitude of one voltage is compared with another. In this
application, op-amp is used in the open-loop configuration with the input voltage on one input
and reference voltage on the other. Fig. 24 shows a comparator circuit using an op-amp.

Fig. 24 Comparator
Here 𝑉2 = 𝑉𝑖𝑛 and 𝑉1 = 0.
When 𝑉𝑖𝑛 > 𝑉1 = 0, 𝑉𝑜 = +𝑉𝑠𝑎𝑡 ≅ +𝑉𝐶𝐶
When 𝑉𝑖𝑛 < 𝑉1 = 0, 𝑉𝑜 = −𝑉𝑠𝑎𝑡 ≅ −𝑉𝐸𝐸
Fig. 25 shows the input and output voltages.

20
Low Pass Filter Using Op Amp

Op-Amps or operational amplifiers supply very efficient low pass filters without
using inductors. The feedback loop of an op-amp can be incorporated with the basic
elements of a filter, so the high-performance LPFs are easily formed by using the
required components except for inductors. The applications of op-amp LPFs are used
in different areas of power supplies to the outputs of DAC (Digital to Analog
Converters) for eliminating alias signals as well as other applications.

First Order Active LPF Circuit using Op-Amp

The circuit diagram of the single pole or first order active low pass filter is shown
below. The circuit of the low pass filter using op-amp uses a capacitor across the
feedback resistor. This circuit has an effect when the frequency increases for
enhancing the feedback level then the capacitor’s reactive impedance falls.

First Order Low Pass Filter Using Op Amp

The calculation of this filter can be done by working on the frequency at which the
capacitor reactance can equal the resistance of the resistor. This can be obtained by
using the following formula.

Xc = 1/ 2π f C
Where ‘Xc’ is the capacitive reactance in ohms
‘π’ is the standard letter and the value of this is 3.412

‘f’ is the frequency (Units-Hz)

‘C’ is the capacitance (Units-Farads)

The in-band gain of these circuits can be calculated in a simple way by eliminating
the capacitor’s effect.

As these types of circuits are helpful to give a reduction within gain at high
frequencies, as well as offers an ultimate speed for roll-off of 6 dB for each octave,
which means the o/p voltage divides for each repetition in frequency. So, this kind of
filter is named as first order or single pole low pass filter.

Second Order Active LPF Circuit using Op-Amp

By using an operational amplifier, it is possible for designing filters in a wide range

with dissimilar gain levels as well as roll-off models. This filter offers a bandwidth
response as well as unity gain.

Second Order Active LPF Circuit using Op-Amp

The cir
cuit values calculations are uncomplicated for the response of Butterworth low pass
filter & unity gain. Significant damping is necessary for these circuits & the ratio
values of the capacitor and resistor conclude this.
R1 = R2
C1 = C2
f = 1 – √4 π R C2
While selecting the values, make sure that the values of the resistor will drop in the
region among 10 kilos ohm to 100 kilo-ohms. This is worthwhile as the circuit’s o/p
impedance increases by the frequency & outside values of this section may change
the act.

Active High Pass Filter :

The basic operation of an Active High Pass Filter (HPF) is the same as for its
equivalent RC passive high pass filter circuit, except this time the circuit has an
operational amplifier or included within its design providing amplification and gain
control.

Like the previous active low pass filter circuit, the simplest form of an active high
pass filter is to connect a standard inverting or non-inverting operational amplifier
to the basic RC high pass passive filter circuit as shown.

First Order High Pass Filter

Technically, there is no such thing as an active high pass filter. Unlike Passive High
Pass Filters which have an “infinite” frequency response, the maximum pass band
frequency response of an active high pass filter is limited by the open-loop
characteristics or bandwidth of the operational amplifier being used, making them
appear as if they are band pass filters with a high frequency cut-off determined by
the selection of op-amp and gain.

In the Operational Amplifier tutorial we saw that the maximum frequency response
of an op-amp is limited to the Gain/Bandwidth product or open loop voltage gain
( A V ) of the operational amplifier being used giving it a bandwidth limitation, where
the closed loop response of the op amp intersects the open loop response.

A commonly available operational amplifier such as the uA741 has a typical “open-
loop” (without any feedback) DC voltage gain of about 100dB maximum reducing at a
roll off rate of -20dB/Decade (-6db/Octave) as the input frequency increases. The
gain of the uA741 reduces until it reaches unity gain, (0dB) or its “transition
frequency” ( ƒt ) which is about 1MHz. This causes the op-amp to have a frequency
response curve very similar to that of a first-order low pass filter and this is shown
below.

Active High Pass Filter

A first-order (single-pole) Active High Pass Filter as its name implies, attenuates
low frequencies and passes high frequency signals. It consists simply of a passive
filter section followed by a non-inverting operational amplifier. The frequency
response of the circuit is the same as that of the passive filter, except that the
amplitude of the signal is increased by the gain of the amplifier and for a non-
inverting amplifier the value of the pass band voltage gain is given as 1 + R2/R1, the
same as for the low pass filter circuit.
Active High Pass Filter with Amplification

This first-order high pass filter, consists simply of a passive filter followed by a
non-inverting amplifier. The frequency response of the circuit is the same as that of
the passive filter, except that the amplitude of the signal is increased by the gain of
the amplifier.

For a non-inverting amplifier circuit, the magnitude of the voltage gain for the filter
is given as a function of the feedback resistor ( R2 ) divided by its corresponding
input resistor ( R1 ) value and is given as:

Gain for an Active High Pass Filter

• Where:
• AF = the Pass band Gain of the filter, ( 1 + R2/R1 )
• ƒ = the Frequency of the Input Signal in Hertz, (Hz)
• ƒc = the Cut-off Frequency in Hertz, (Hz)
Just like the low pass filter, the operation of a high pass active filter can be verified
from the frequency gain equation above as:
 • 1. At very low frequencies, ƒ < ƒc

• 2. At the cut-off frequency, ƒ = ƒc

• 3. At very high frequencies, ƒ > ƒc

Then, the Active High Pass Filter has a gain AF that increases from 0Hz to the low
frequency cut-off point, ƒC at 20dB/decade as the frequency increases. At ƒC the gain
is 0.707*AF, and after ƒC all frequencies are pass band frequencies so the filter has a
constant gain AF with the highest frequency being determined by the closed loop
bandwidth of the op-amp.

Second-order Active High Pass Filter Circuit

Higher-order high pass active filters, such as third, fourth, fifth, etc are formed simply
by cascading together first and second-order filters. For example, a third order high
pass filter is formed by cascading in series first and second order filters, a fourth-
order high pass filter by cascading two second-order filters together and so on.

Then an Active High Pass Filter with an even order number will consist of only
second-order filters, while an odd order number will start with a first-order filter at
the beginning as shown.

Digital to Analog Converter

A digital-to-analog converter (DAC, D/A, D2A or D-to-A) is a circuit that converts

digital data (usually binary) into an analog signal (current or voltage). One important
specification of a DAC is its resolution. It can be defined by the numbers of bits or its
step size.

Digital to Analog Converter using the Summing Amplifier

The following diagram shows a 3 bit digital to analog converter implemented using a
summing op amp amplifier.

From the summing amplifier circuit, the output voltage is

Output Table
V2 V1 V0 Digital Value Vout
0 0 0 0 0
0 0 1 1 -0.25
0 1 0 2 -0.5
0 1 1 3 -0.75
1 0 0 4 -1.0
1 0 1 5 -1.25
1 1 0 6 -1.5
1 1 1 7 -1.75
From the table, we can conclude the following

• The inputs can be thought of as a binary number, one that can run from 0 to 7.
• V2 is the MSB (most significant bit) and V0 is the LSB (least significant bit).
• The output is a voltage that is proportional to the binary number input.
 • The resolution of this DAC is 3 (the number of bits) or -0.25V (the step size).
• To have more bits, add an additional resistor for each additional bit. Note the
relationship between adjacent resistor values.

2-bit Analogue to Digital Converter Circuit

• This will give us a 2-bit output code for all four possible values of analogue
input of:
2-bit Analog to Digital converter Output

Analog input Digital voltage

Comparator output
voltage output

Vin D3 D2 D1 D0 Q1 Q0

0 to 1 V 0 0 0 0 0 0

1 to 2 V 0 0 1 X 0 1

2 to 3 V 0 1 X X 1 0

3 to 4 V 1 X X X 1 1

• Where: “X” is a “don’t care”, that is either a logic “0” or a logic “1” condition.
• So how does this analogue-to-digital converter work. For an A/D converters
to be useful it has to produce a meaningful digital representation of the
analogue input signal. Here in this simple 2-bit ADC example we have
assumed for simplicity that the input voltage VIN is between 0 and 4 volts, so
 have set VREF and the resistive voltage-divider network to drop 1 volt across
each resistor.
• When VIN is between 0 and 1 volt, (<1V) the input on all three comparators will
be less than the reference voltage, so their outputs will be LOW and the
encoder will output a binary zero (00) condition on pins Q 0 and Q1. When
VIN increases and exceeds 1 volt but is less than 2 volts, (1V<VIN<2V) comparator
U1 which has a reference voltage input set at 1 volt, will detect this voltage
difference and produce a HIGH output. The priority encoder which is used as
the 4-to-2 bit encoding detects the change of input at D1 and produces a binary
output of “1” (01).
• Note that a Priority Encoder such as the TTL 74LS148 allocates a priority level
to each individual input. The priority encoders output corresponds to the
currently active input which has the highest priority. So when an input with a
higher priority (D1 compared to D0) is present, all other inputs with a lower
priority will be ignored. So if there are two or more inputs at logic level “1” at
the same time, the actual output code on D 0 and D1 would only correspond to
the input with the highest designated priority.
• So now as VIN increases above 2 volts, the next reference voltage level,
comparator U2 detects the change and produces a HIGH output. But because
input D2 has a higher priority than inputs D0 or D1, the priority encoder outputs
a binary “2” (10) code, and so on when VIN exceeds 3 volts producing a binary
code output of “3” (11). Clearly as VIN reduces or changes between each
reference voltage level, each comparator will output either a HIGH or a LOW
condition to the encoder which in turn produces a 2-bit binary code between
00 and 11 relative to VIN.
• This is all well and good, but priority encoders are not available as 4-to-2 bit
devices, and if we use a commercially available one such as the TTL 74LS148
or its CMOS 4532 equivalent which are both 8-bit devices, then six of the binary
bits would not be used. But a simple encoder circuit can be made using digital
Ex-OR gates and a matrix of signal diodes as shown.