Application Notes: AN_SY8213

High Efficiency Fast Response, 3A, 30V Input

Synchronous Step Down Regulator

General Description Features

SY8213 develops a high efficiency synchronous step-  Low RDS(ON) for internal switches (top/bottom):
down DC-DC converter capable of delivering 3A 90/60 mΩ
output current. SY8213 operates over a wide input  4.5-30V input voltage range
voltage range from 4.5V to 30V and integrates main  Instant PWM architecture to achieve fast transient
switch and synchronous switch with very low RDS(ON) responses
to minimize the conduction loss.  External softstart limits the inrush current
 Pseudo-constant frequency: 500kHz
SY8213 adopts the proprietary instant PWM  3A continuous load current capability
architecture to achieve fast transient responses for high
 1.5% 0.6V reference
step down applications and high efficiency at light loads.
 Output over current limit
In addition, it operates at pseudo-constant frequency of
500kHz under continuous conduction mode to minimize  Output short circuit protection with current fold
the size of inductor and capacitor. back
 Thermal shutdown and auto recovery
Ordering Information  RoHS Compliant and Halogen Free
SY8213 □(□□)□  Compact package: SO8E
Temperature Code
Package Code
Applications
Optional Spec Code  LCD-TV
 SetTop Box
Temperature Range: -40°C to 85°C
 Notebook
Ordering Number Package type Note  High power AP router
SY8213FCC SO8E --  LCD Monitor
 DVR/NVR
 NAS

Typical Applications

Figure 1. Schematic Diagram

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Pinout (top view)

Top Mark: AJYxyz (device code: AJY, x=year code, y=week code, z= lot number code)

Pin Name Pin Number Pin Description

EN 3 Enable control.
BS 1 Boot-Strap Pin. Supply high side gate driver. Decouple this pin to LX pin
with 0.1uF ceramic cap.
LX 2 Inductor pin. Connect this pin to the switching node of inductor
VCC 6 Internal 3.3V LDO output. Power supply for internal analog circuits and
driving circuit. Add a 1uF bypass capacitor between this pin and GND.
SVIN 7 Analog supply input. Bypass a 1uF capacitor to ground.
Power supply input. Decouple this pin to GND pin with at least 10uF ceramic
PVIN 8
cap
FB 5 Output Feedback Pin. Connect this pin to the center point of the output
resistor divider (as shown in Figure 1) to program the output voltage:
Vout=0.6*(1+R1/R2)
GND Exposed Ground pin.
Paddle
Softstart programming pin. Connect a capacitor from this pin to ground to
SS 4
program the softstart time. Tss(ms)=Css(nF)*0.6(V)/10(uA)

Absolute Maximum Ratings (Note 1)

PVIN, SVIN, LX, BS, EN------------------------------------------------------------------------------------------------------------ V
VCC, FB, SS, BS-LX----------------------------------------------------------------------------------------------------------------- V
Power Dissipation, PD @ TA = 25°C SO8E------------------------------------------------------------------------------------- 3.3W
Package Thermal Resistance (Note 2)
θ JA-------------------------------------------------------------------------------------------------------------------------------------------------------------------------- 30°C/W
θ JC-------------------------------------------------------------------------------------------------------------------------------------------------------------------------- 10°C/W
Junction Temperature Range------------------------------------------------------------------------------------------40°C to 150°C
Lead Temperature (Soldering, 10 sec.)---------------------------------------------------------------------------------------- 260°C
Storage Temperature Range-------------------------------------------------------------------------------------------65°C to 150°C

Recommended Operating Conditions (Note 3)

Supply Input Voltage----------------------------------------------------------------------------------------------------- -- 4.5V to 30V
Junction Temperature Range--------------------------------------------------------------------------------------------40°C to 125°C
Ambient Temperature Range---------------------------------------------------------------------------------------------40°C to 85°C

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Electrical Characteristics
(VIN = 12V, VOUT = 5V, COUT = 47uF, TA = 25°C, IOUT = 1A unless otherwise specified)

Parameter Symbol Test Conditions Min Typ Max Unit

Input Voltage Range VIN 4.5 30 V
Quiescent Current IQ IOUT=0, VFB =V REF *105% 200 µA
Shutdown Current ISHDN EN=0 5 10 µA
Feedback Reference VREF 0.591 0.6 0.609 V
Voltage
FB Input Current IFB VFB =VCC -50 50 nA
Top FET RON RDS(ON)1 90 mΩ
Bottom FET RON RDS(ON)2 60 mΩ
Bottom FET Current ILIM 4 A
Limit
EN falling threshold VENL 1.1 1.2 1.3 V
EN threshold hysteresis VEN,HYS 0.1 V
Input UVLO threshold VUVLO 4 V
UVLO hysteresis VHYS 0.2 V
Oscillator Frequency FOSC IOUT=200mA 0.5 MHz
Min ON Time 80 ns
Min OFF Time 120 ns
Internal LDO Output VVCC VIN=4V 3.2 3.3 3.4 V
Thermal Shutdown TSD 160 °C
Temperature
Thermal Shutdown TSD,HYS 20 °C
Hysteresis

Note 1: Stresses beyond the “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.

Note 2: θ JA is measured in the natural convection at TA = 25°C on a low effective single layer thermal conductivity
test board of JEDEC 51-3 thermal measurement standard. Paddle of SO8E packages is the case position for θ JC
measurement.

Note 3: The device is not guaranteed to function outside its operating conditions.

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Function Block

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Typical Performance Characteristics
Efficiency (%)

Efficiency (%)
Efficiency (%)

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Short Circuit Protection Short Circuit Protection

(VIN=12V, VOUT=1.8V, 0A to Short) (VIN=12V, VOUT=1.8V, 3A to Short)

VOUT 1V/div VOUT 1V/div

IL 2A/div
IL 2A/div

Time (2ms/div) Time (2ms/div)

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Operation PVIN/GND pins. In this case, a 10uF low ESR ceramic
capacitor is recommended.
SY8213 is a synchronous buck regulator IC that
integrates the PWM control, top and bottom switches
on the same die to minimize the switching transition
loss and conduction loss. With ultra low Rds(on) power
switches and proprietary PWM control, this regulator
IC can achieve the highest efficiency and the highest
switch frequency simultaneously to minimize the
external inductor and capacitor size, and thus achieving The internal analog circuit is powered from SVIN. To
the minimum solution footprint. avoid the noise issue, a 1uF ceramic capacitor
connected closely from SVIN to GND is recommended.
SY8213 provides protection functions such as cycle by An RC filter can also be added from power input to
cycle current limiting and thermal shutdown protection. SVIN.
SY8213 will sense the output voltage conditions for the
fault protection. Output capacitor COUT :
The output capacitor is selected to handle the output
Applications Information ripple noise requirements. Both steady state ripple and
transient requirements must be taken into consideration
Because of the high integration in the SY8213 IC, the when selecting this capacitor. For the best performance,
application circuit based on this regulator IC is rather it is recommended to use X5R or better grade ceramic
simple. Only input capacitor CIN, output capacitor COUT, capacitor greater than 47uF capacitance.
output inductor L and feedback resistors (R1 and R2)
need to be selected for the targeted applications Output inductor L:
specifications. There are several considerations in choosing this
inductor.
Feedback resistor dividers R1 and R2: 1) Choose the inductance to provide the desired
Choose R1 and R2 to program the proper output voltage. ripple current. It is suggested to choose the ripple
To minimize the power consumption under light loads, current to be about 40% of the maximum output
it is desirable to choose large resistance values for both current. The inductance is calculated as:
R1 and R2. A value of between 10kΩ and 1MΩ is VOUT (1  VOUT /VIN, MAX )
highly recommended for both resistors. If Vout is 3.3V, L
R1=100k is chosen, then using following equation, R2 FSW  IOUT,MAX  40%
can be calculated to be 22.1k:
VOUT
where Fsw is the switching frequency and IOUT,MAX is
R2  0.6V R1 the maximum load current.
V  0.6V R1 . 0.6VFB The SY8213 regulator IC is quite tolerant of different
OUT
ripple current amplitude. Consequently, the final choice
GND R2
of inductance can be slightly off the calculation value
without significantly impacting the performance.
2) The saturation current rating of the inductor must
Input capacitor CIN:
be selected to be greater than the peak inductor
The ripple current through input capacitor is calculated
current under full load conditions.
as：
I  I  D(1 D) . VOUT(1-VOUT/VIN,MAX)
ISAT, MIN  IOUT, MAX 
CIN _ RMS OUT

2 FSW L
To minimize the potential noise problem, place a
typical X5R or better grade ceramic capacitor really 3) The DCR of the inductor and the core loss at the
close to the PVIN and GND pins. Care should be taken switching frequency must be low enough to
to minimize the loop area formed by CIN, and achieve the desired efficiency requirement. It is

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desirable to choose an inductor with DCR<10mΩ responses. In applications with high step load current,
to achieve a good overall efficiency. adding an RC network RFF and CFF parallel with R1
may further speed up the load transient responses.
Soft-start
Connect a capacitor from softstart programming pin to
ground to program the softstart time.

Tss(ms)=Css(nF)*0.6(V)/10(uA)

Enable Operation
Pulling the EN pin low (<1.2V) will shut down the
device. During shutdown mode, the SY8213 Layout Design:
shutdown current drops to lower than 5uA, Driving the The layout design of SY8213 regulator is relatively
EN pin high (>1.3V) will turn on the IC again. simple. For the best efficiency and minimum noise
problem, we should place the following components
External Boostrap Cap close to the IC: CIN, CVCC L, R1 and R2.
This capacitor provides the gate driver voltage for 1) It is desirable to maximize the PCB copper area
internal high side MOSEFET. A 100nF low ESR connecting to GND pin to achieve the best thermal and
ceramic capacitor connected between BS pin and LX noise performance. If the board space allowed, a
pin is recommended. BS ground plane is highly desirable.
CBS
100nF 2) CIN must be close to IN and GND Pins. The loop
area formed by CIN and GND must be minimized.
LX

3) The PCB copper area associated with LX pin must

be minimized to avoid the potential noise problem.
VCC LDO
The 3.3V LDO is for internal analog circuit and driving 4) The components R1 and R2, and the trace connecting
circuit. Bypass this pin to ground with a 1uF ceramic to the FB pin must NOT be adjacent to the LX net on
capacitor. The VCC LDO is capable of sourcing 20mA the PCB layout to avoid the noise problem.
current.
5) If the system chip interfacing with the EN pin has a
high impedance state at shutdown mode and the IN pin
is connected directly to a power source such as a Li-Ion
battery, it is desirable to add a pull down 1Mohm
resistor between the EN and GND pins to prevent the
. noise from falsely turning on the regulator at shutdown
Load Transient Considerations: mode.
The SY8213 regulator IC adopts the instant PWM
architecture to achieve good stability and fast transient

VOUT GND VIN

COUT CIN

R3
L BS PVIN
CBS
LX SVIN CSVIN
GND
EN VCC CVC
C
SS FB

Css R2 R1
C1

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SO8E Package outline & PCB layout design

1.55
1.27 TYP

3.20 3.80 - 4.00

5.80 - 6.120
2.55
5.40

0.60 0.30 – 0.50

Recommended Pad Layout

0.18 - 0.25

0.25 - 0.50
4.80 - 5.00
0.00 - 0.25
0.25 base

1.30 - 1.60

0.60 - 0.85 1.27 (TYP)

Notes: All dimensions are in millimeters.

All dimensions don’t include mold flash & metal burr.

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