6c qsfp28 zr4
6c qsfp28 zr4
6c qsfp28 zr4
PRODUCT FEATURES
LC duplex connector
APPLICATIONS
Telecom networking
DESCRIPTIONS
6COM’s 6C-QSFP28-ZR4 is designed for 80km optical communication applications. This module contains 4-
lane optical transmitter, 4-lane optical receiver and module management block including 2 wire serial inter-
face. The optical signals are multiplexed to a single-mode fiber through an industry standard LC connector. A
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SHENZHEN 6COM TECHNOLOGY CO., LTD
Tel: +86-0755-85293396 E-mail: [email protected]
Web: www.6comgiga.com
Transceiver Block Diagrams
SCL/SDA
ModpresL
IntL
ResetL
LPMode
Controller 100G QSFP28 ZR4
ModselL
ModSelL:
The ModSelL is an input pin. When held low by the host, the module responds to 2-wire serial communication
commands. The ModSelL allows the use of multiple modules on a single 2-wire interface bus. When the Mod-
SelL is "High", the module shall not respond to or acknowledge any 2-wire interface communication from the
host. ModSelL signal input node shall be biased to the "High" state in the module.
In order to avoid conflicts, the host system shall not attempt 2-wire interface communications within the Mod-
SelL de-assert time after any modules are deselected. Similarly, the host shall wait at least for the period of the
ModSelL assert time before communicating with the newly selected module. The assertion and de-asserting
periods of different modules may overlap as long as the above timing requirements are met.
ResetL :
The ResetL pin shall be pulled to Vcc in the module. A low level on the ResetL pin for longer than the mini-
mum pulse length (t_Reset_init) initiates a complete module reset, returning all user module settings to their
default state. Module Reset Assert Time (t_init) starts on the rising edge after the low level on the ResetL pin
is released. During the execution of a reset (t_init) the host shall disregard all status bits until the module indi-
cates a completion of the reset interrupt. The module indicates this by asserting "low" an IntL signal with the
LPMode:
The LPMode pin shall be pulled up to Vcc in the module. The pin is a hardware control used to put modules
into a low power mode when high. By using the LPMode pin and a combination of the Power override,
Power_set and High_Power_Class_Enable software control bits (Address A0h, byte 93 bits 0,1,2).
ModPrsL:
ModPrsL is pulled up to Vcc_Host on the host board and grounded in the module. The ModPrsL is asserted
"Low" when inserted and deasserted "High" when the module is physically absent from the host connector.
IntL:
IntL is an output pin. When IntL is "Low", it indicates a possible module operational fault or a status critical
to the host system. The host identifies the source of the interrupt using the 2-wire serial interface. The IntL pin
is an open collector output and shall be pulled to host supply voltage on the host board. The INTL pin is deas-
serted "High" after completion of reset, when byte 2 bit 0 (Data Not Ready) is read with a value of '0' and the
Pin Descriptions
Notes
1.Circuit ground is internally isolated from chassis ground.
It has to be noted that the operation in excess of any individual absolute maximum ratings might cause perma-
Relative Humidity RH 15 85 % 1
Notes
1. Non-condensing
Operating Environments
Electrical and optical characteristics below are defined under this operating environment, unless otherwise spec-
ified.
Electrical Characteristics
Receiver
Optical Characteristics
Transmitter
1294.53 1296.59
1299.02 1301.09
Transmit wavelengths nm
1303.54 1305.63
1308.09 1310.19
Side-Mode Suppression Ratio
dB 30
(SMSR)
Total Average Launch Power dBm 8.0 12.5
Receiver
1294.53 1296.59
1299.02 1301.09
Receive wavelengths nm
1303.54 1305.63
1308.09 1310.19
Notes
0 R 1 Identifier Identifier
15~18 R 4 Reserved
24-25 R 2 Reserved
Device moni-
26-27 R 2 Supply voltage
tors
28-29 R 2 Reserved
58-73 R 16 Reserved
82-85 R 4 Reserved
86 RW 1 Tx Disable
87 RW 1 Rx_Rate_select
88 RW 1 Tx _Rate_select
93 RW 1 Power
94~97 RW 4 Tx_Application_Select
98 RW 1 TX/RX CDR_control
99 RW 1 Reserved
Free Side De-
vice and
100-104 RW 4 Module and Channel Masks
Channel
Masks
107 RW 1 Reserved
Free Side De- Most significant byte of propagation de-
108-109 R 2
vice Properties lay
Advanced Low Power Mode / Far Side
110 R 1
Managed / Min Operating Voltage
Assigned for
111-112 RW 2 use by PCI PCI
Express
Free Side De-
113 R 1 End Implementation
vice Properties
114-118 RW 6 Reserved
148 R 1
149 R 1
150 R 1
151 R 1
152 R 1
153 R 1
154 R 1
155 R 1
Vendor name Free side device vendor
156 R 1
157 R 1
158 R 1
159 R 1
160 R 1
161 R 1
162 R 1
163 R 1
Extended
164 R 1
Module
165~167 R 1 Vendor OUI
168 R 1
169 R 1
170 R 1
171 R 1
174 R 1
175 R 1
176 R 1
177 R 1
178 R 1
179 R 1
180 R 1
181 R 1
182 R 1
183 R 1
196 R 1
197 R 1
198 R 1
199 R 1
200 R 1
201 R 1
202 R 1
203 R 1
Vendor SN Serial number provided by vendor
204 R 1
205 R 1
206 R 1
207 R 1
208 R 1
209 R 1
210 R 1
211 R 1
212 R 1
213 R 1
214 R 1
Date Code Vendor's manufacturing date code
215 R 1
216 R 1
217 R 1
218 R 1
219 R 1
Diagnostic Average RX power measurement,
220 R 1 Monitoring Transmitter power measurement sup-
Type ported
Indicates which optional enhanced fea-
Enhanced Op-
221 R 1 tures are implemented (if any) in the free
tions
side device.
Nominal bit rate per channel, units of
222 R 1 BR, nominal
250Mbps.
223 R 1 CC_EXT Check Code for Address 192 to 222
224 R 1
225 R 1
226 R 1
227 R 1
228 R 1
229 R 1
230 R 1
233 R 1
234 R 1
235 R 1
236 R 1
237 R 1
238 R 1
239 R 1
Vendor Spe-
242 R 1
cific
243 R 1 Reserved
244 R 1
245 R 1
246 R 1
247 R 1
248 R 1
249 R 1
250 R 1 Checksum
251 R 1
252 R 1
Vendor Spe-
253 R 1
cific
254 R 1
255 R 1
6C-QSFP28-ZR4 support the I2C-based Diagnostic Monitoring Interface (DMI) defined in document .
The host can access real-time performance of transmitter and receiver optical power, temperature, sup- ply
Note
1,Actual temperature test point is fixed on module case around Laser.
2,Full operating temperature range
6C-QSFP28-ZR4 support alarms function, indicating the values of the preceding basic performance are
Performance Item Alarm Threshold Bytes(A0[03] memory) Unit Low threshold High threshold
Mechanical Specifications
6COM’s 100G ZR4 QSFP28 transceivers are compatible with the QSFP28 Specification for pluggable
Safety
EN 60950-1
EN/IEC 60825-1:2007,Edition 2
TUV TUV certificate
EN/IEC 60825-1:2014,Edition 3
EN/IEC 60825-2:2004+A1:2006+A2:2010
Electromagnetic Compatibility
Class B digital device with a mini-
EMC Directive 2014/30/EU mum -6dB margin to the limit when
tested with a metal enclo-sure. Final
margin may vary de-pending on sys-
EN 55032 tem application, good system EMI de-
sign practice, ie: suitable metal enclo-
Radiated emissions
sure and well-bonding, is required to
CISPR 32 achieve Class B margins at the system
level. Tested frequency range: 30
MHz to 40 GHz or 5th harmonic (5
AS/NZS CISPR 32 times the highest frequency), which-
ever is less.
EN 55024
Withstands discharges of ± 8 k V
ESD CISPR 24
contact, ±15 k V air.
IEC/EN 61000-4-2
EN 55024
Field strength of 10 V/m from 80
Radiated immunity CISPR 24
MHz to 6 GHz.
IEC/EN 61000-4-3
Normal ESD precautions are required during the handling of this module. This transceiver is shipped in ESD
protective packaging. It should be removed from the packaging and otherwise handled in an ESD protected
environment utilizing standard grounded benches, floor mats, and wrist straps.
1) Do not look into fiber end faces without eye protection using an optical meter (such as magnifier and mi-
croscope) within 100 mm, unless you ensure that the laser output is disabled. When operating an optical
2) The RX input optical power cannot be higher than the damage threshold. You need the optical attenuator
3) The 6C-QSFP28-ZR4 is the customized module, it can only interconnect with the 6C-QSFP28-ZR4
module. CAUTION: Use of controls or adjustments or performance of procedures other than those specified
Nameplate information
TBD
END