TRB Computer - PG TRB Computer Instructor - Computer System Study Materials - Kalam Academy
TRB Computer - PG TRB Computer Instructor - Computer System Study Materials - Kalam Academy
TRB Computer - PG TRB Computer Instructor - Computer System Study Materials - Kalam Academy
com
BUS:
The CPU sends various data values, instructions and information to all the devices and
components inside the computer.
If you look at the bottom of a motherboard you'll see a whole network of lines or
electronic pathways that join the different components together.
This network of wires or electronic pathways is called the 'Bus'.
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DATA BUS:
A collection of wires through which data is transmitted from one part of a computer to
another.
Data Bus can be thought of as a highway on which data travels within a computer.
This bus connects all the computer components to the CPU and main memory.
The data bus may consist of 32, 64, 128, or even more separate lines.
The number of lines being referred to as the width of the data bus. Because each line
can carry only 1 bit at a time, the number of lines determines how many bits can be
transferred at a time.
It is a bidirectional bus.
The size (width) of bus determines how much data can be transmitted at one time.
E.g. • A 16-bit bus can transmit 16 bits (2 bytes)of data at a time.
32-bit bus can transmit 32 bits(4 bytes) at a time.
The size (width) of bus is a critical parameter in determining system performance.
The wider the data bus, the better, but they are expensive.
ADDRESS BUS
A collection of wires used to identify particular location in main memory is called
Address Bus.
Or in other words, the information used to describe the memory locations travels along
the address bus.
Clearly, the width of the address bus determines the maximum possible memory
capacity of the system.
N address lines directly address 2 𝑁 memory locations.
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It is an unidirectional bus.
The CPU sends address to a particular memory locations and I/O ports.
The address bus consists of 16 , 20 , 24 or more parallel signal lines.
8086: 20 address lines – Could address 1 MB of memory
Pentium: 32 address lines – Could address 4 GB of memory
Itanium: 64 address lines – Could address 264 bytes of memory ADDRESS BUS cont’d
CONTROL BUS
Because the data and address lines are shared by all components, there must be a
means of controlling their use.
The control lines regulates the activity on the bus.
Control signals transmit both command and timing information among system
modules. • The control bus carries signals that report the status of various devices.
Typical control bus signals are :
Memory Read : causes data from the addressed location to be placed on the data bus.
Memory Write : causes data on the bus to be written into the addressed location
I/O write: causes data on the bus to be output to the addressed I/O port
I/O read: causes data from the addressed I/O port to be placed on the bus CONTROL
BUS
CPU sends out the address value 2453 on the address bus
Simultaneously, CPU sends out the signal R/W = 1 on the control bus, which indicates
a READ operation
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CPU then waits for the data from memory on the data bus
The R/W = 1 signal and the address bus value 2453 will cause the memory to retrieve
the value at memory location 2453 to be sent out on the data bus Example: Memory
Read cont’d
• CPU sends out the address value 2453 on the address bus
• Simultaneously, CPU also sends out the value 53 on the data bus
• And the signal R/W = 0 on the control bus which indicating a WRITE operation
• The R/W = 0 signal along with the address bus value 2453 and data bus value 53 will
cause the memory to store the value 53 at the location 2453...
Transfer ACK: indicates that data have been accepted from or placed on the bus.
Bus request: indicates that a module needs to gain control of the bus.
Bus grant: indicates that a requesting module has been granted control of the bus. Control
Bus cont’d
Interrupt request: indicates that an interrupt is pending.
Interrupt ACK: acknowledges that the pending interrupt has been recognized.
Reset: initializes all modules. Control Bus cont’d
Bus Type
Dedicated buses
• Separate buses dedicated to carry data and address information.
• Good for performance.
• But increases cost.
Multiplexed buses
• Data and address information is time multiplexed on a shared bus.
• Poor Performance
• But Reduces cost.
Some people say that COMPUTER stands for Common Operating Machine Purposely Used
for Technological and Educational Research. ... "A computer is a general purpose electronic
device that is used to perform arithmetic and logical operations automatically”
There are a few basic components that aids the working-cycle of a computer i.e. the Input-
Process- Output Cycle and these are called as the functional components of a computer. It
needs certain input, processes that input and produces the desired output. The input unit
takes the input, the central processing unit does the processing of data and the output unit
produces the output. The memory unit holds the data and instructions during the processing.
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Digital Computer: A digital computer can be defined as a programmable machine which reads
the binary data passed as instructions, processes this binary data, and displays a calculated
digital output. Therefore, Digital computers are those that work on the digital data.
Input Unit :The input unit consists of input devices that are attached to the computer.
These devices take input and convert it into binary language that the computer
understands. Some of the common input devices are keyboard, mouse, joystick, scanner
etc.
Central Processing Unit (CPU): Once the information is entered into the computer by the
input device, the processor processes it. The CPU is called the brain of the computer
because it is the control center of the computer. It first fetches instructions from memory
and then interprets them so as to know what is to be done. If required, data is fetched
from memory or input device. Thereafter CPU executes or performs the required
computation and then either stores the output or displays on the output device. The CPU
has three main components which are responsible for different functions – Arithmetic
Logic Unit (ALU), Control Unit (CU) and Memory registers
Arithmetic and Logic Unit (ALU) : The ALU, as its name suggests performs mathematical
calculations and takes logical decisions. Arithmetic calculations include addition,
subtraction, multiplication and division. Logical decisions involve comparison of two
data items to see which one is larger or smaller or equal.
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Control Unit : The Control unit coordinates and controls the data flow in and out of CPU
and also controls all the operations of ALU, memory registers and also input/output
units. It is also responsible for carrying out all the instructions stored in the program. It
decodes the fetched instruction, interprets it and sends control signals to input/output
devices until the required operation is done properly by ALU and memory.
Memory Registers : A register is a temporary unit of memory in the CPU. These are used
to store the data which is directly used by the processor. Registers can be of different
sizes(16 bit, 32 bit, 64 bit and so on) and each register inside the CPU has a specific
function like storing data, storing an instruction, storing address of a location in memory
etc. The user registers can be used by an assembly language programmer for storing
operands, intermediate results etc. Accumulator (ACC) is the main register in the ALU
and contains one of the operands of an operation to be performed in the ALU.
Memory : Memory attached to the CPU is used for storage of data and instructions and is
called internal memory The internal memory is divided into many storage locations, each
of which can store data or instructions. Each memory location is of the same size and
has an address. With the help of the address, the computer can read any memory
location easily without having to search the entire memory. when a program is executed,
it’s data is copied to the internal memory ans is stored in the memory till the end of the
execution. The internal memory is also called the Primary memory or Main memory. This
memory is also called as RAM, i.e. Random Access Memory. The time of access of data
is independent of its location in memory, therefore this memory is also called Random
Access memory (RAM).
Output Unit : The output unit consists of output devices that are attached with the
computer. It converts the binary data coming from CPU to human understandable form.
The common output devices are monitor, printer, plotter etc.
A computer consists of input unit that takes input, a CPU that processes the input and an
output unit that produces output. All these devices communicate with each other through a
common bus. A bus is a transmission path, made of a set of conducting wires over which
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data or information in the form of electric signals, is passed from one component to another
in a computer. The bus can be of three types – Address bus, Data bus and Control Bus.
The address bus carries the address location of the data or instruction. The data bus carries
data from one component to another and the control bus carries the control signals. The
system bus is the common communication path that carries signals to/from CPU, main
memory and input/output devices. The input/output devices communicate with the system
bus through the controller circuit which helps in managing various input/output devices
attached to the computer.
Memory is the most essential element of a computing system because without it computer
can’t perform simple tasks. Computer memory is of two basic type – Primary memory /
Volatile memory and Secondary memory / non-volatile memory. Random Access Memory
(RAM) is volatile memory and Read Only Memory (ROM) is non-volatile memory.
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data from it, expose it to ultra violet light. To reprogram it, erase all the previous data.
3. EEPROM (Electrically erasable programmable read only memory) – The data can be
erased by applying electric field, no need of ultra violet light. We can erase only portions
of the chip.
Levels of memory:
Level 1 or Register –
It is a type of memory in which data is stored and accepted that are immediately stored
in CPU. Most commonly used register is accumulator, Program counter, address register
etc.
It is the fastest memory which has faster access time where data is temporarily stored
for faster access.
It is memory on which computer works currently it is small in size and once power is off
data no longer stays in this memory
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It is external memory which is not fast as main memory but data stays permanently in
this memory
Cache Memory
It is a special very high-speed memory. It is used to speed up and synchronizing with high-
speed CPU. Cache memory is costlier than main memory or disk memory but economical
than CPU registers. Cache memory is an extremely fast memory type that acts as a buffer
between RAM and the CPU. It holds frequently requested data and instructions so that they
Cache memory is used to reduce the average time to access data from the Main memory. The
cache is a smaller and faster memory which stores copies of the data from frequently used
main memory locations. There are various different independent caches in a CPU, which
Cache Performance:
When the processor needs to read or write a location in main memory, it first checks for a
corresponding entry in the cache.
If the processor finds that the memory location is in the cache, a cache hit has occurred
and data is read from cache
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If the processor does not find the memory location in the cache, a cache miss has
occurred. For a cache miss, the cache allocates a new entry and copies in data from
main memory, then the request is fulfilled from the contents of the cache.
The performance of cache memory is frequently measured in terms of a quantity called Hit
ratio.
Hit ratio = hit / (hit + miss) = no. of hits/total accesses
We can improve Cache performance using higher cache block size, higher associativity,
reduce miss rate, reduce miss penalty, and reduce Reduce the time to hit in the cache.
Cache Mapping:
There are three different types of mapping used for the purpose of cache memory which are
as follows: Direct mapping, Associative mapping, and Set-Associative mapping. These are
explained as following below.
1. Direct Mapping –
The simplest technique, known as direct mapping, maps each block of main memory
into only one possible cache line. or
In Direct mapping, assigned each memory block to a specific line in the cache. If a line is
previously taken up by a memory block when a new block needs to be loaded, the old
block is trashed. An address space is split into two parts index field and a tag field. The
cache is used to store the tag field whereas the rest is stored in the main memory. Direct
mapping`s performance is directly proportional to the Hit ratio.
i = j modulo m
where
For purposes of cache access, each main memory address can be viewed as consisting
of three fields. The least significant w bits identify a unique word or byte within a block
of main memory. In most contemporary machines, the address is at the byte level. The
remaining s bits specify one of the 2s blocks of main memory. The cache logic interprets
these s bits as a tag of s-r bits (most significant portion) and a line field of r bits. This
latter field identifies one of the m=2r lines of the cache.
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2. Associative Mapping –
In this type of mapping, the associative memory is used to store content and addresses
both of the memory word. Any block can go into any line of the cache. This means that
the word id bits are used to identify which word in the block is needed, but the tag
becomes all of the remaining bits. This enables the placement of any word at any place
in the cache memory. It is considered to be the fastest and the most flexible mapping
form.
3. Set-associative Mapping –
This form of mapping is an enhanced form of direct mapping where the drawbacks of
direct mapping are removed. Set associative addresses the problem of possible
thrashing in the direct mapping method. It does this by saying that instead of having
exactly one line that a block can map to in the cache, we will group a few lines together
creating a set. Then a block in memory can map to any one of the lines of a specific
set..Set-associative mapping allows that each word that is present in the cache can have
two or more words in the main memory for the same index address. Set associative
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cache mapping combines the best of direct and associative cache mapping techniques.
In this case, the cache consists of a number of sets, each of which consists of a number
of lines. The relationships are
m=v*k
i= j mod v
where
v=number of sets
time, but this number is small compared to the total number of blocks in the main
memory.
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2. The correspondence between the main memory blocks and those in the cache is
Types of Cache –
Primary Cache –
A primary cache is always located on the processor chip. This cache is small and
Secondary Cache –
Secondary cache is placed between the primary cache and the rest of the memory.
It is referred to as the level 2 (L2) cache. Often, the Level 2 cache is also housed on
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