SG1543/SG2543/SG3543

Power Supply Output Supervisory Circuit

Description Features
This monolithic integrated circuit contains all the functions necessary to  Over-Voltage, Under-Voltage, and
monitor and control the output of a sophisticated power supply system. Current Sensing Circuits all included.
Over-voltage (O.V.) sensing with provision to trigger an external SCR
 Reference Voltage Trimmed to 1%
“crowbar” shutdown; an under-voltage (U.V.) circuit which can be used to
Accuracy.
monitor either the output or to sample the input line voltage; and a third
op amp/comparator usable for current sensing (C.L.) are all included in  SCR "Crowbar" Drive of 300mA.
this IC, together with an independent, accurate reference generator.
 Programmable Time Delays.
Both over and under-voltage sensing circuits can be externally  Open-Collector Outputs and Remote
programmed for minimum time duration of fault before triggering. All Activation Capability.
functions contain open collector outputs which can be used
independently or wire-ORed together; and although the SCR trigger is  Total Standby Current less than 10mA.
directly connected only to the over-voltage sensing circuit, it may be
optionally activated by any of the other outputs, or from an external
signal. The O.V. circuit also includes an optional latch and external reset High Reliability
capability.

The current sense circuit may be used with external compensation as a

Features
linear amplifier or as a high gain comparator. Although nominally set for
 Available to MIL-STD-883, ¶ 1.2.1
zero input offset, a fixed threshold may be added with an external
resistor. Instead of current limiting, this circuit may also be used as an  MSC-AMS level “S” Processing
additional voltage monitor. Available
 Available to DSCC
The reference generator circuit is internally trimmed to eliminate the need
– Standard Microcircuit Drawing (SMD)
for external potentiometers and the entire circuit may be powered directly
from either the output being monitored or from a separate bias voltage.

Block Diagram

February 2015 Rev. 1.2 www.microsemi.com 1

© 2015 Microsemi Corporation
Absolute Maximum Ratings (Note 1)
Input Supply Voltage (+VIN)................................................. 40V Indicator Output Sink Current .......................................... 50mA
Sense Inputs ...................................................................... +VIN Operating Junction Temperature
SCR Trigger Current (Note 2) ......................................... 300mA Hermetic (J, L Packages) ............................................ 150°C
Indicator Output Voltage ..................................................... 40V Plastic (N, DW Packages) ........................................... 150°C
Storage Temperature Range ............................ -65°C to 150°C
Note 1. Values beyond which damage may occur.
Note 2. At higher input voltages, a dissipation limiting resistor, RG RoHS Peak package Solder Reflow Temp. (40 sec. max. exp.)..... 260°C (+0. -5)
is required. See Figure 1.

Thermal Data
J Package:
Thermal Resistance-Junction to Case, θJC ............. 30°C/W Note A. Junction Temperature Calculation: TJ = TA + (PD x θJA).
Thermal Resistance-Junction to Ambient, θJA .... .... 80°C/W
N Package: Note B. The above numbers for θJC are maximums for the
Thermal Resistance-Junction to Case, θJC ............. 40°C/W limiting thermal resistance of the package in a standard
Thermal Resistance-Junction to Ambient, θJA ........ 65°C/W mounting configuration. The θJA numbers are meant to
DW Package: be guidelines for the thermal performance of the
Thermal Resistance-Junction to Case, θJC ............. 40°C/W device/pc-board system. All of the above assume no
Thermal Resistance-Junction to Ambient, θJA ......... 95°C/W ambient airflow.
L Package:
Thermal Resistance-Junction to Case, .................. 35°C/W
Thermal Resistance-Junction to Ambient, θJA ....... 120°C/W

Recommended Operating Conditions (Note 3)

Input Supply Voltage (+VIN ) .................................... 4.7V to 40V Delay Timing Capcitor (Note 4) ........................... 0 to 1µF
Current Limit Common Mode Operating Ambient Temperature Range
Input Voltage Range ........................................... 0V to +VIN -3V SG1543 ....................................................... -55°C to 125°C
Reference Load Current ........................................... 0 to 10mA SG2543 ........................................................ -25°C to 85°C
Indicator Output Voltage ......................................... 4.7V to 40V SG3543 ........................................................ 0°C to 70°C
Indicator Output Current ........................................... 0 to 10mA
Note 3: Range over which the device is functional.
Note 4. Larger value capacitor may be used with peak current limiting. See Figure 7.

Electrical Characteristics
(Unless otherwise specified, these specifications apply over the operating ambient temperatures for SG1543 with -55°C ≤ TA ≤ 125°C, SG2543 with
-25°C ≤ TA ≤ 85°C, SG3543 with 0°C ≤ TA ≤ 70°C, and +VIN = 10V. Indicator outputs have 2kΩ pull-up resistor. Low duty cycle testing techniques
are used which maintains junction and case temperatures equal to the ambient temperature.)

SG1543/SG2543 SG3543
Parameter Test Conditions Units
Min. Typ. Max. Min. Typ. Max.
Supply Section
Input Voltage Range TJ = 25°C to TMAX 4.5 40 4.5 40 V
4.7 40 4.7 40 V
Supply Current +VIN = 40V, Outputs open, TJ = 25°C 7 10 7 10 mA
Reference Section
Output Voltage TJ = 25°C 2.48 2.50 2.52 2.45 2.50 2.55 V
2.45 2.55 2.40 2.60 V
Line Regulation +VIN = 5 to 30V 1 5 1 5 mV
Load Regulation IREF = 0 to 10mA 1 10 1 10 mV
Short Circuit Current VREF = 0V 12 25 40 12 25 40 mA
Temperature Stability .005 .005 %/°C

2
Electrical Characteristics (Continued)
SG1543/SG2543 SG3543
Parameter Test Conditions Units
Min. Typ. Max. Min. Typ. Max.
Comparator Section
Input Threshold (Note 5) TJ = 25°C 2.45 2.50 2.55 2.40 2.50 2.60 V
2.40 2.60 2.35 2.65 V
Input Hysteresis 25 25 mV
Input Bias Current Sense input = 0V 0.3 1.0 0.3 1.0 µA
Delay Saturation 0.2 0.5 0.2 0.5 V
Delay High Level 6 8 6 8 V
Delay Charging Current VD = 0V 200 250 300 200 250 300 µA
Indicate Saturation IL = 10mA 0.2 0.5 0.2 0.5 V
Indicate Leakage VIND = 40V .01 1.0 0.1 1.0 µA
Propagation Delay VO.V. INPUT = 2.7V, VU.V. INPUT = 2.3V , TJ = 25°C
CD = 0 400 400 ns
CD = 1µF 10 10 ms
SCR Trigger Section
Peak Output Current +VIN = 5V, RG = 0, VO = 0 100 200 400 100 200 400 mA
Peak Output Voltage +VIN = 15V, IO = 100mA 12 13 12 13 V
Output Off Voltage +VIN = 40V, RL = 1kΩ 0 0.1 0 0.1 V
Remote Activate Current REM. ACT. pin = Gnd 0.4 0.8 0.4 0.8 mA
Remote Activate Voltage REM. ACT pin open 2 6 2 6 V
Reset Current RESET pin = Gnd, REM. ACT. = Gnd 0.4 0.8 0.4 0.8 mA
Reset Voltage RESET pin open, REM. ACT. = Gnd 2 6 2 6 V
Output Current Rise Time RL = 50Ω, TJ = 25°C, CD = 0 400 400 mA/µs
Prop. Delay from REM. ACT. Pin VREM. ACT. = 0.4V 300 300 ns
Prop. Delay fom O.V. INPUT Pin VO.V. INPUT = 2.7V 500 500 ns
Current Limit Section
Input Voltage Range 0 VIN-3V 0 VIN -3V V
Input Bias Current OFFSET/COMP pin open, V CM = 0V 0.3 1.0 0.3 1.0 µA
Input Offset Voltage OFFSET/COMP pin open, V CM = 0V, 0 10 0 15 mV
10kΩ from OFFSET/COMP pin to Gnd,TJ =25°C 80 100 120 70 100 130 mV
CMRR 0 ≤ VCM ≤ 12V, VIN = 15V 60 70 60 70 dB
AVOL OFFSET/COMP pin open, V CM = 0V 72 80 72 80 dB
Output Saturation IL = 10mA 0.2 0.5 0.2 0.5 V
Output Leakage VIND = 40V .01 1.0 .01 1.0 µA
Small Signal Bandwidth AV = 0dB, TJ = 25°C 5 5 MHz
Propagation Delay VOVERDRIVE = 100mV, TJ = 25°C 200 200 ns
Note 5. Input voltage rising on O.V. Input and falling on U.V. Input.

Characteristics Curves

10ms/µF

Figure 1 · SCR Trigger Power Limiting Figure 2 · Activation Delay Vs. Capacitor Value

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Characteristics Curves (Continued)

RL = 2kΩ

1k 3k 5k 10k 30k 50k .1M .3M .5M 1M

Figure 3 · Comparator Input Hysteresis Figure 4 · Current Limit Input Threshold

RL = 2kΩ RL = 2kΩ
RT = 100kΩ

RT = 30kΩ

RT = 10kΩ

10µF

Figure 5 · Current Limit Amplifier Gain Figure 6 · Current Limit Amplifier Frequency Response

Application Information

Figure 7 · Surge Limit Circuit for Large Delay Capacitors

Figure 8 · Input Line Monitor
The 100 ohm resistor limits the peak discharge current into the
SG1543 while the external PNP transistor provides a high peak-current
discharge path for the delay capacitor.

4
Application Information (Continued)
The values for the external components are
determined as follows:
1000
Current limit input threshold, VTH ≈
R1
CS is determined by the current loop dynamics

( R +R )
VTH V R2
Peak current to load, IP ≈ + O
RSC RSC 2 3

VTH
Short circuit current, ISC =
RSC
2.5 (R4+R5+R6)
Low output voltage limit, VO (Low) = R5+R6
2.5 (R4+R5+R6)
High output voltage limit, VO (High) = R6
Voltage sensing delay, tD = 10,000 CD
Figure 9 · Typical Application Circuit VIN - 5
SCR trigger power limiting resistor, RG >
0.2

Figure 10 · Sensing Multiple Supply Voltages

Figure 11 · Over Current Shutdown

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Connection Diagrams and Ordering Information (See Notes Below)
Ambient
Package Part No. Connection Diagram
Temperature Range

16-PIN CERAMIC DIP SG1543J-883B -55°C to 125°C S.C.R. TRIGGER 1 16 +VIN

J - PACKAGE SG1543J-DESC -55°C to 125°C REMOTE ACTIVATE 2 15 VREF
SG1543J -55°C to 125°C RESET 3 14 GROUND
O.V. INDICATE 4 13 C.L. OUTPUT
O.V. DELAY 5 12 OFFSET/COMP
O.V. INPUT 6 11 C.L. N.I. INPUT
U.V. INPUT 7 10 C.L. INV. INPUT
U.V. DELAY 8 9 U.V. INDICATE
16-PIN PLASTIC DIP SG2543N -25°C to 85°C
N - PACKAGE SG3543N 0°C to 70°C
N Package: RoHS Compliant / Pb-free Transition DC: 0503
N Package: RoHS / Pb-free 100% Matte Tin Lead Finish

16-PIN WIDE BODY SG2543DW -25°C to 85°C S.C.R. TRIGGER 1 16 +VIN

PLASTIC SOIC SG3543DW 0°C to 70°C REMOTE ACTIVATE 2 15 VREF
DW - PACKAGE RESET 3 14 GROUND
O.V. INDICATE 4 13 C.L. OUTPUT
O.V. DELAY 5 12 OFFSET/COMP
O.V. INPUT 6 11 C.L. N.I. INPUT
U.V. INPUT 7 10 C.L. INV. INPUT
U.V. DELAY 8 9 U.V. INDICATE

DW Package: RoHS Compliant / Pb-free Transition DC: 0516

DW Package: RoHS / Pb-free 100% Matte Tin Lead Finish

20-PIN CERAMIC SG1543L-883B -55°C to 125°C 3 2 1 20 19

1. N.C. 11. N.C.
LEADLESS CHIP CARRIER SG1543L-DESC -55°C to 125°C 2. SCR TRIGGER 12. U.V. INDICATE
L - PACKAGE SG1543L 3. REMOTE ACTIVATE 4 18 13. C.L. INV. INPUT
(Note 3) 4. RESET 5 17 14. C.L. N.I. INPUT
5. O.V. INDICATE 15. OFFSET/COMP
6 16
6. N.C. 16. N.C.
7. O.V. DELAY 7 15 17. C.L. OUTPUT
8. O.V. INPUT 8 14 18. GROUND
9. U.V. INPUT 19. VREF
10. U.V. DELAY 20. +VIN
9 10 11 12 13

Note 1. Contact factory for DESC product availablity.

2. All packages are viewed from the top.
3. Consult factory for product availability.
4. Hermetic Packages J & L use Pb37/Sn63 hot solder lead finish, contact factory for availability of RoHS versions.

6
 Package Outline Dimensions
Controlling dimensions are in inches, metric equivalents are shown for general information.

MILLIMETERS INCHES
D DIM
MIN MAX MIN MAX
16 9 A - 5.08 - 0.200
b 0.38 0.51 0.015 0.020
E b2 1.04 1.65 0.045 0.065
1 8 c 0.20 0.38 0.008 0.015
b2 eA D 19.30 19.94 0.760 0.785
E 5.59 7.11 0.220 0.280
e 2.54 BSC 0.100 BSC
Q A
eA 7.37 7.87 0.290 0.310
H 0.63 1.78 0.025 0.070
Seating Plane
L c L 3.18 5.08 0.125 0.200
θ θ - 15° - 15°
H e b
Q 0.51 1.02 0.020 0.040

Note:
Dimensions do not include protrusions; these shall not
exceed 0.155mm (.006”) on any side. Lead dimension
shall not include solder coverage.

Figure 12 · J 16-Pin Ceramic Dip

MILLIMETERS INCHES
DIM
MIN MAX MIN MAX
D
A - 5.33 - 0.210
A1 0.38 - 0.015 -
A2 3.30 Typ. 0.130 Typ.
E1
b 0.36 0.56 0.014 0.022
1 b1 1.14 1.78 0.045 0.070
b1 c 0.20 0.36 0.008 0.014
E D 18.67 19.69 0.735 0.775
A2
e 2.54 BSC 0.100 BSC
A
c E 7.62 8.26 0.300 0.325
A1

L
E1 6.10 7.11 0.240 0.280
L 2.92 0.381 0.115 0.150
e
SEATING PLANE
b
θ θ - 15° - 15°
Note:
Dimensions do not include protrusions; these shall not
exceed 0.155mm (.006”) on any side. Lead dimension
shall not include solder coverage.

Figure 13 · N 16-Pin Plastic Dual Inline Package Dimensions

7
Package Outline Dimensions (Continued)

MILLIMETERS INCHES
DIM
MIN MAX MIN MAX
A 2.06 2.65 0.081 0.104
A1 0.10 0.30 0.004 0.012
A2 2.03 2.55 0.080 0.100
B 0.33 0.51 0.013 0.020
c 0.23 0.32 0.009 0.013
D 10.08 10.50 0.397 0.413
E 7.40 7.60 0.291 0.299
e 1.27 BSC 0.05 BSC
H 10.00 10.65 0.394 0.419
L 0.40 1.27 0.016 0.050
θ 0° 8° 0° 8°
*LC - 0.10 - 0.004
*Lead co planarity
Note:
Dimensions do not include protrusions; these shall
not exceed 0.155mm (.006”) on any side. Lead
dimension shall not include solder coverage.

Figure 14 · DW 16-Pin SOWB Package Dimensions

E3
D MILLIMETERS INCHES
DIM
MIN MAX MIN MAX
D/E 8.64 9.14 0.340 0.360
E3 - 8.128 - 0.320
e 1.270 BSC 0.050 BSC
E
B1 0.635 TYP 0.025 TYP
L 1.02 1.52 0.040 0.060
A 1.626 2.286 0.064 0.090
h 1.016 TYP 0.040 TYP
A1 1.372 1.68 0.054 0.066
A L2 L
A1 8 A2 - 1.168 - 0.046
L2 1.91 2.41 0.075 0.95
3 B3 0.203R 0.008R

Note:
1 All exposed metalized area shall be gold plated 60 micro-
inch minimum thickness over nickel plated unless
otherwise specified in purchase order.
13

h
A2 18
B3
e
B1

Figure 15 · L 20-Pin Ceramic LCC Package Outline Dimensions

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SG1543-1.2/02.15