NFE2159 Assignment Brief 17-18 Embedded System
NFE2159 Assignment Brief 17-18 Embedded System
NFE2159 Assignment Brief 17-18 Embedded System
Approach/Guidelines
Generally, digital clock circuits derive pulses (frequency of 32768 Hz) from a crystal
oscillator, which produce timing waveforms of very high stability with minimal drift (tolerance)
due to temperature change. However, due to the expense of crystal oscillators a function
generator is to be used, which can be set to give a square wave output equivalent to a crystal
oscillator.
Limrose
F S
Switch
1Hz
15-stage Square
Oscillator counter wave
32768Hz
Start/Stop
Counter Counter
0 to5 0 to 9
Draw the schematic circuit diagram in block form showing all IC connections.
How can the resolution of the stopwatch be increased to display either 1/16th and 1/128th
OR 1/10th and 1/100th of a second.
Calculate the cost to produce your design, taking account of the IC costs, power supplies
and crystal oscillator etc.
Deliverable: Logbook
The log of work should be in an appropriate laboratory exercise book and should be hand
written.
It should include
o schematic/circuit diagrams of the final design and subsections where appropriate.
o explanation of each IC/subsection operation/functions and thus why each is
required.
o suitable test results for each system block, which demonstrates the operation.
o Livewire or MultiSim schematic, plus simulations.
o indicate what problems were encountered and how they were overcome or, if not
overcome, what attempts were made to solve them.
o any suggestions for improvements that could be made.
Although designs that meet all requirements will receive the highest marks, it is not
necessary to achieve this to reach a pass level. Marks will be awarded for a systematic
methodical approach, sensible investigation into design alternatives, the demonstration
of an understanding of the behaviour of circuit elements used, clarity of log book records
kept for the design work.
You may work in small groups to discuss ideas, designs and build a prototype but detailed
copying of logbook reports and background technical information is forbidden and will be
penalised in accordance with the Universitys regulations on plagiarism.
Dr. P. J. Mather
Guidance: Electronics 1 Logbook Structure
2. Experimental Procedure
Discuss how each block/section of the circuit was developed and how it functions, detailing all
the relevant circuit diagrams and ICs used (pin-outs and appropriate datasheets).
3. Result
Detail the results for each circuit section (this could include typical waveforms)
Detailed costing information
Relevant data sheet information for all the ICs used in the circuit design.
4. Discussion
This is a major section of any logbook/report
- Discuss your findings
- How is the displayed accuracy increased, as specified in the assignment
specification.
- How accurate is the circuit (if a crystal oscillator was used i.e accurate signal source
were other inaccuracies are present)
- CLUE: look at the gating of the start signal and the clock source before the 15
stage counter.
- Possible circuit refinements
- PCB, surface mount etc
- Increased device resolution (1/2 sec, 1/10th etc)
- Possible circuit integration. Briefly discuss the process of integrating all the circuitry
on to silicon.
- Overall cost, in terms of ICs, to produce the circuit (give full cost breakdown).
5. Conclusions
In this section you discuss your findings and conclude the report (did the circuit work and were
there any possible improvements that could be performed.
- Was the final circuit design efficient.
- Could it have been improved (refer to the discussion)
- How could it be adapted for a commercial product
- Did you learn anything, if so, what.
Version 1
We measured the output voltage with an oscilloscope and after a while we managed to
measure the voltage at 3 V. The tutor said that this was not correct and that it should have
been 3.5 V. We are not sure why this is the case.
Version 2
The output voltage Vout was 3 V for and input voltage Vin of 0.5 V, giving a gain of 6 (Vout/Vin).
However the expected value of Vout was 3.5 V to give a gain of 7. The approx 17 % difference
between the expected and achieve results is due to several non-idealities, which are .
Version 3
Results
Measured Expected
Vin (V) Vout(V) Gain Vout(V) Gain Difference (%)
0.5 3 6 3.5 7 17
Discussion of Results
The first activity involves the use of a laboratory Log-book. This is a concise record, made in
the laboratory, while work is in progress.
The second activity involves the production of a Formal Report. This is a more thoughtful and
comprehensive written presentation, understandable by an informed reader not directly
connected with the work described.
The Log-book
If you want to write a good Formal Report, take good laboratory notes in your log-book. Do not
try to write the report as you carry out the work. You must take good clear notes of everything
that you do no matter how trivial it may seem at the time. Do not rely on your memory.
Record every measurement as soon as you make it taking readings directly from the instrument.
Note any scaling factors to be applied and calculate final values in the log-book. Do not carry
out mental arithmetic on readings and then write the calculated values down. Draw graphs, if
necessary, as you work, so that erroneous readings are easily spotted. (Make sure you write
down values as well.) Use a pencil to plot graphs so that points and lines can be altered.
Sketch the oscilloscope traces and always record details of the timebase settings and voltage
sensitivity.
All diagrams and circuits should be large enough and clear enough so that you or someone else
can understand them later.
When you record their value, also note the tolerance of resistors and other components,
especially if the values are to be used in calculations.
CMOS ICs
Common cathode displays (slightly wrong pitch pinout for Limrose boards, but OK)
4511 BCD to 7 segment decoder/driver
4024 7 stage counter, suitable for the above
4060 14 stage counter
4081 quad 2 I/P AND
4011 quad 2 I/P NAND
- Plus various other gates in the stores.
f b
g c
e n/c
d com
270
University of Huddersfield
School of Computing and Engineering
Assignment Cover Sheet
Where to submit assignment reports: Student Support Office CW1/01. You must download
a coversheet, to go with your assignment, using the following link:
http://ecover.hud.ac.uk/assignments/.
This contains a unique barcode and you will be emailed a receipt. Assignments without a
coversheet will not be accepted.
The signature below confirms that you have read and understood the regulations concerning hand-
in deadlines, penalties for late submission, plagiarism and extenuating circumstances procedures and
that the work submitted is your own.
This assignment will NOT be marked unless the following section is fully completed
Signature
NFE2159 Electronics 1
PERFORMANCE FEEDBACK REPORT
b) Accuracy (5%)
c) Resolution (5%)
d) Costing (5%)
General Feedback/Comments:
Grading Rubric for NFE2159 Electronics 1 Assignment
This assignment grading rubric has been developed to show how the assignment will be graded, you should therefore use it to enable you to maximise your
assignment grade in all areas. Post grading: the rubric can be used as feedback to show the aspects/areas that would be expected in any future related
assignment, to gain a higher grade.
Note: All circuit designs, including software versions should be your own individual effort, thus you need to show full printouts, from Livewire/Multisim, which
include filename and date etc.
Awarded Grade
0 1-2 3 -4 5-6 7-8 9-10
Criterion 1 Log Book: weighting 50%
Covering: Presentation, Discussion and Conclusions, Datasheets
Log book structure + Structured fully as given in the module
Presentation (5%) Confused layout with Basic logbook handbook;
Basic logbook
no obvious structure. structure.
structure reasonably easy to follow
Illegible/untidy in Inadequately presented
presented throughout and
No many sections - untidy
neatly presented
evidence
Problem definition provided Limited detail on the Basic details on the Assignment brief and aims detailed.
Aims and Objectives assignment aims assignment aims (only)
(5%) given. given. No details given. Brief Extensive
explanation/discussi explanation given for
on of the aims the assignment brief
and aims
Awarded Grade
0 1-2 3 -4 5-6 7-8 9-10
Discussion (a-d: 25%)
a) Overall design Only minimal Basic explanation of Basic explanation of Extensive explanation of the circuit design
(10%) reference to the the some aspects of the circuit design and and detailed reasons for circuit select
functionality of the the circuit design and reasons for circuit Discuss design limitations and
design presented reasons for selection select. possible improvements
b) Accuracy (5%) Considered signal source waveforms only Consider signal source and circuitry issues
All accurate
calculations included
incorrect explanation correct explanation Incorrect or no Limited explanation Extensive, correct
explanation given given explanation given
c) Resolution (5%) Considered/discussed: incorrect solution Correct and Correct and second resolution circuitry
second resolution given plus full explanation
circuitry provided circuitry given but no 1/10 and 1/100 second
explanation resolution considered
No
d) Costing (5%) evidence Only overall costing Overall costing given Full detailed costing for all ICs used.
provided given with incomplete
Including details for Information on costs
component list or
1 or multiple associated with PCB or
incorrect costings
quantities IC development
Conclusions and Future Limited/inadequate conclusions not Basic conclusions Extensive detailed conclusions
work (5%) accounting for achievements and or not given related to reference to possible
relating to original Aims and Objective (A&Os) original A&Os Future Work
Datasheets + Only basic reference All relevant datasheet data supplied for all IC
references (5%) to ICs no datasheet Incomplete list of IC datasheet given and or Accurate list of
or reference reference information supplied references supplied
information supplied theory, costings etc
Diagrams (schematics Larger number of Extensive number of diagrams/schematics
etc) (5%) Limited number of
Limited unclear diagrams supplied but Relevant
diagrams/schematics Limited
diagrams not well drawn labels/annotation
with additional labels labels/annotation
(untidy) provided in all cases
Awarded Grade
0 1-2 3 -4 5-6 7-8 9-10
Criterion 2 Design Process: weighting 30%
Covering: Theory, Research, Build, Analysis, LiveWire schematic
Theory & Research
(15%) Extensive
Block diagram showing the main circuit functions with accompanying information (including
Block diagram information regarding each. block diagrams
showing the main
where necessary)
circuit functions but
and reasoning for all
no or minimal
Limited reference to a the main circuit
accompanying Reference to all the main circuit functions,
number of main circuit functions and
information. calculations (requirement for 15 stage etc)
functions and related extensive related ICs
No and related ICs required required
ICs required.
evidence
MultiSim/Livewire provided Schematic attempted but only partially Correctly developed, working schematic
schematic completed or incorrect structure (relative to
(10%) given design) Neat and clearly
presented.
Analysis of the final Limited results for Results for the final Results for the final Results documented for all sections
design operation the final design design given for most and interim designs Clearly documented/analysed -
(5%) circuit blocks no given for most circuit
analysis blocks minimal Neat and clearly
analysis presented.