Analysis, Design and Implementation of An Active Clamp Flyback Converter PDF
Analysis, Design and Implementation of An Active Clamp Flyback Converter PDF
Analysis, Design and Implementation of An Active Clamp Flyback Converter PDF
David Wang
Mean Well Enterprises Co., Ltd.
No. 28, Wu-Chuan 3rd Road, Wu Ku Ind. Park,
Taipei Hsien 248, Taiwan, ROC
and implementation of a 120W active clamp flyback converter
is presented in this paper to achieve zero voltage switching
(ZVS) for main switch. With the auxiliary switch, clamp
capacitor and resonant circuit, the surge energy stored at the
leakage inductance can be recycled by the active clamp circuit.
The voltage stress at the main switch is also reduced. The
circuit operation and mathematical analysis are provided in the
paper. A design example is also included in the paper. Finally
the experimental results based on a 120W prototype circuit are
provided in the paper to verify the effectiveness of the active
performance.
INTRODUCTION
The flyback converters are widely used in the conventional
switching mode power supplies to supply low power and low
I.
LS+
Icam
Cd.mpT'm
switching
vvmp
l
tCo veut
Lepa|E
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VG+nV
I I I
J.
ill
I-+Wj
DDr
L
v,,..
C.
L~~~~~~~~~~~~~~~~~~V.........W;
'i
..
M f
__L___ L
VC,I
D,
Vi, 0=_
LS S ,
VCI
l___It_l_T_
Da~ ~ ~ ~ ~ ~ ~ ~
r|.,,
.141t
II tt3
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14
+iDI
L_
Mainwaveformsofth_ activ
(a) interval I
IgL;
~~~~~~~~~~expressedas:
+I 1 L
v...p
+
*,",
to
(2)
LLm(t)lLr(t)lLm(tO)+ L n (t-to)
_ 4 -The secondary side diode Do is turned off. In this interval the
1 .dinput energy is stored in the magnetizing inductance L,,. The
clamp capacitor voltage is equal to nV, and the clamp
capacitor current i,camp(t) = 0. This interval ends (t=11) when
main switch is turned off and the primary current at t=t1 is
iLr (tl) = iLm (t0 ) + L + (tl -to).
Interval 2 (t, - td: This interval starts at time t=t1 when main
switch Smain is turned off. The parasitic capacitance of main
switch is charged from OV to Vin+V1,,,p =V-,+nV,. The
resonant circuit is composed of capacitor Cr, L and Lm. The
resonant capacitor voltage and resonant inductor current are
expressed as:
VCr(t) = Vin (1- COS(wi (t-tl))) +Lr(t)ZIsin(z(t- t1)),
= i/
where a2/
vt
Vpr( =-v
I
z = I Lm + r
(4)
+Lr)
Cr (Lm+Lr
Cr
In the circuit operation, the magnetizing current is operated in
the CCM mode. Therefore iL=iL,,, is always positive in this
interal. Therefore the time interval in this state must be less
than one fourth of resonant period. The resonant capacitance is
very small and capacitor voltage is charged quickly. The
resonant capacitor and inductor current are approximately
given as:
VCr (t) = Vin (1- cos(a (t -tl))) + iLr (ti )Z1 sin(aX (t-t )) as:
(5)
(tt) )
iLr (t] )ZI a)] (t t=
cr
) *'I +
v,.ntl)l+(0iQ11)
z-n , (t tl )
-
(t3 td:
4 At time t1t3 the primary side voltage Vp,
so that the secondary diode D0 is tumed on. The
equals -nV0
begin to
Lm
The clamp capacitor voltage and leakage current are expressed
iDm (t) = lLr(t) = iLr (11 )cos[i (t- l )]+ insin(c, (t-t,))
=iL(t
The
LT
(10)
Lm + Lr
This interval is ended when the transformer primary voltage
Vpl equals -nV, at time t=t3. In this moment the clamp
capacitor voltage Vclamp equals nV0(Jm + Lr)lLm and
secondary side diode conducts.
Interval 4
where
and Z2
=a
d Ze
(
L
v.
iL,r (tl ) +
t~t
Vcr(t) =
(6)
t) 'L
In
this
time
(nJK=
Vmp(3)sin(w3(t - 0))(2
( L() Z3
In this time intervalamp
interval the resonant capacitor VCr is less- than
Vi,+nV0 so that no current flows through auxiliary switch
+'Lr(,3) Cos(w3 (t-t3))
=
0.
is
The
voltage
still
equal
to
clamp
capacitor
nVo.
iclamp(t)
. The
an Z LIC
. . . where as3=1
The transformer primary winding voltage is
side current is given as:
=LrVtl)
Cr (t- t)
(7) secondary
(13)
iDo(t) = n(iLm(t) -Lr( ))
Vpri(t)=Vin
The auxiliary switch is turned on in this interval to ensure the
This time inte l is eZVS turn-on operation. This interval is ended when the clamp
Vcr equals Vi1+nV0 at time t=12. Therefore this time interval current is zero.
can be expressed as:
Interval 5 (t4- ts): The system analysis in this interval is the
(Vin
same as in interval 4 except the clamp capacitor current is
nVo)Cr
+
-tl
(8)
At12 =2t2
reversed. This interval is ended when the auxiliary switch is
iLr (tl)
Interval 3 (t2 t): At time t2 the resonant capacitor voltage turned off.
Vcr equals to Vcr=Vin+ Vciamp so that the body diode across Interval 6 (tS- t4): At time t=t5 the auxiliary switch is tumed
auxiliary switch is turned on. The secondary side diode is still off. In this interval the secondary side diode Do still turns on
turned off. The energy stored in the inductors Lm and Lr is and Vpr =-n V. The magnetizing current is
nVm
released to charge clamp capacitor in this interval. Since the
Lm
clamp capacitance CcIamp is much larger than resonant
capacitance Cr. Therefore almost the magnetizing current is TThe nlegative current iL, will discharge capacitor voltage VC,.
o chrge
lampcapaitor.The
crren and
The resonant circuit is formed by the resonant inductance Lr
cor current
used toused
charge
capacitor. The inducor
clamp
and parasitic capacitance Cr. The capacitor voltage
and
Vclamp (t) = nV0 co(w2 (t -1t2 )) + iLr (t2 )Z2 sin(w2 (t -1t2 )),
inductor current iLr, are expressed as:
Vc.
VCr (t) =
(t- t2))
iclamp (t) iLr (t) = iL, (t2 ) COS2 (t-t2 )]--sin(w2
Z 2
Vcr (t) = Vi, + nV0 COS(@2 (t- t2)) + iL, (t2 )Z2 sin(.2 (t t2)) (9)
=
426
Vin
+ n
VO
(VJn
nV
(t-ts))
iLr(t) = iLr(t5)
cos(cu^(t t5))
-
+ (Vin + n V
(15)
The clamped
and iclamp(t) =0 The
capacitor voltage
secondary side diode current is expressed as:
and Z4
where w4 =1 / ~J57
Vciamp(t) =lnV
/Lr / Cr
(16)
Lm
(t - t6)
The
lLr(t)=ir(t6)+-
(t-t6)
n0n(
-n Vn
The
diDo
(19)
dt
Lr
Lr
Lm
The secondary side diode current iDO,(t)=n(iL,(t)-iL,(t)).
The clamped capacitor voltage Vcjamp-nVo and icja,p=0. Before
the inductor current iLr is positive, the main switch is turned on
to ensure ZVS operation. This interval is ended when main
switch is tumed on.
Interval 8 (t7 t0): This interval starts when the main switch is
tumed on at time t=t7. The transformer secondary side current
iL- is decreasing and the leakage inductor current iLr is
increasing. At time 1=t0 the transformer secondary side current
iDo=O and this interval is ended. In this interval the main
voltage and current in the circuit are expressed as:
Vpri (t) = -nV0, Vcr (t) =O, Vciamp (t) = nVO,
lLr(t) = Lr(t7)+
(VYn +nVO)
L
(t-t7),
(20)
N- Vin,nmn
V0
N2
Dmax
Il-Dmax
-=rjLrCclamp
Ccmp
clamp
(21)
=[(1-DminVin)Ts]2
iZ2L
(26)
Vin ma27
ma
nDO max = inoma + V0
'D
o(
max
(27)
(28)
Dmax Po
V0
V. AVO
where AVO is output voltage ripple.
(29)
nV
Smain,p
with
Po=120W
N, Vin,min Dmax
N2
V0
l -Dmax
427
Tek
-. -
-_
Vsaugs
resonant i
V. EXPERIMENTAL RESULTS
A 120W prototype circuit was built and tested in the
laboratory. The system parameters of converter are shown in
section IV. Fig. 4 shows the experimental prototype circuit of
active clamp flybacj converter. Fig. 5 shows the experimental
waveforms of the gate-to-source voltages of main switch and
auxiliary switch and the drain-to-source voltage of main
switch. There is a time delay between the auxiliary switch
turn-off and main switch turn-on to ensure main switch turnon at ZVS. Fig. 6 gives the experimental waveforms of gate
signals of main switch VSma,n gs and auxiliary switch VSags and
transformer primary voltage vp,,. When main switch is turned
on, the transformer primary side voltage is equal to Vj,. If the
main switch is turned off, the primary side voltage equals nVo=-96V. Fig. 7 illustrates the measured results of gate
signals VSma,ng; and vs.Ug, and clamped capacitor voltage Vc,amp.
When the auxiliary switch is turned on, the clamp capacitance
is resonant with resonant inductance. Therefore the clamp
voltage is resonant in this period. When the auxiliary switch is
turned off, the clamp capacitor voltage is clamped to nV,=96V.
Fig. 8 shows the measured results of gate-to-source and drainto-source voltage for main switch. Before the mains switch is
turned on the drain-to-source voltage has been reached zero.
Therefore the main switch is ZVS turn-on. Fig. 9 gives the
experimental waveform of output capacitor voltage v. at
120W output load. The system efficiency of the adopted
system is about 83%.
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rT
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_r_~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~.......
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power and very wide input voltage range applications", IEEEAPEC, vol. 1, pp. 242-248, 2002.
[2] C. T. Choi, C. K. Li and S. K. Kok, "Control of an active clamp
'.
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ACKNOWLEDGMENT
This project is supported by Mean Well Enterprises Co.,
Ltd. and National Science Council in Taiwan, under grant
NSC93-2622-E-224- 15-CC3.
REFERENCES
[1] P. Alou, 0. Garcia, J. A. Cobos, and J. Uceda, "Rascon,
429