A Comparative Evaluation of Isolated Bi-Directional DC - DC Converters With Wide Input and Output Voltage Range
A Comparative Evaluation of Isolated Bi-Directional DC - DC Converters With Wide Input and Output Voltage Range
A Comparative Evaluation of Isolated Bi-Directional DC - DC Converters With Wide Input and Output Voltage Range
\
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+ +
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\
|
+
=
. (2)
2) Converter converter design
The proposed design method is based on the converter
specifications presented in Section I. Moreover, the maximum
switch current I
L2
= i
L
(t
2
) is taken into consideration in order to
achieve low switching losses on the primary side.
The evaluation of the transformer turns ratio n and inductor
value L is an iterative process that starts with the selection of n.
Thereafter a condition for the minimum value for the inductor L
which is necessary to fulfil the above mentioned requirements is
derived from (2),
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+ +
|
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|
+ |
.
|
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|
.
|
\
|
+ |
.
|
\
|
= <
2
2 2 1 2
1 1
2
2
2
2 2 3
1 2
2 3
1
2
2
2
2
3
2 2 3
1 2
min
2
2
n
V
n
V V
V V I f
n
V
P V PI
n
V
V I
n
V
n
V
P
n
V
V I
L L
L S
L L L
.(3)
This procedure enables a search for a combination of values
for the transformer turns ratio n and inductor L that results in a
minimum rms transformer current for the specified input and
output voltage range.
B. Series resonant converter (topology SRC
1
)
Also the series resonant converter (Fig. 1(b)) can be operated
with bi-directional power flow. In [5] the working principle of this
circuit is described for a modulation scheme similar to the
V1 = 11V, V2 = 447V V1 = 12V, V2 = 336V V1 = 16V, V2 = 220V
t
v
T2
nv
T1
i
L
/ n
t0
t1 t2
t3
T1
T2 T3
t
v
T2
nv
T1
i
L
/ n
t
v
T2
nv
T1
i
L
/ n
t0 t1
t2
t3
T1
T2 T3
I
L2
(a1) (a2) (a3)
t
v
T2
nv
T1
i
LC
/ n
nv
C
T1
T2
t0
t1
t2
t
v
T2
nv
T1
i
LC
/ n
nv
C
t
v
T2 nv
T1
i
LC
/ n
nv
C
(b1) (b2) (b3)
Figure 3. Simulated waveforms for secondary side referred transformer current iL(t) / n respectively iLC(t) / n, transformer voltages nvT1(t) and vT2(t), and the
resonant capacitor voltage nvC(t) for the dual active bridge converter DAB1 ((a1) to (a3)) and the series resonant converter (topology SRC1, (b1) to (b3)). Different
operating points at 2kW output power are shown for energy flowing from the low voltage (primary) to the high voltage (secondary) side. Input and output voltages
specified on top of this figure apply to all waveforms of the belonging column; time scale: 2s/Div., voltage scale: 200V/Div., and current scale: 20A/Div.
rectangular modulation scheme described for the DAB. However,
a different modulation scheme is investigated here that provides an
improvement in the utilization of the primary side converter
components.
1) Converter modulation method
A modulation scheme similar to triangular current mode
modulation for the DAB can be applied with variable switching
frequency to the series resonant converter. This enables pure ZCS
on the primary side, and combined ZVS/ZCS on the secondary
side, and allows for an efficient utilization of the primary side
switches. There, the low voltage side switches are operated with
50% duty cycle with the switching time instant at the zero crossing
of the resonant current (t = t
0
and t = t
2
in Fig. 3(b1)). For the case
of power flowing from the primary to the secondary side, only the
primary voltage V
1
is applied to the transformer during time
interval T
1
and the resonant current starts to increase according to
Figure 3(b1). As the converter is operated above its resonance
frequency f
0
, the voltage V
2
is applied to the secondary side of the
resonant circuit at time instant t
1
< 1/(2f
0
). For a transformer turns
ratio of
max , 1
min , 2
0
V
V
n n = <
, (4)
the resonant current i
LC
(t) is finally forced back to zero at time
instant t
2
. In steady state operation, the duty cycle of the secondary
side converter stage is derived as
( )
|
|
|
|
.
|
\
|
|
.
|
\
|
+ = =
n
V
f T
n
V
V
T f T
T
D
2
0 12
2
1
12 0 12
2
sin 2
arcsin
2
1
2
1
, (5)
with T
12
= T
1
+T
2
. Again, the direction of power transfer is reversed
when the time intervals T
1
and T
2
are transposed.
2) Converter design
In addition to the specifications given in Section I, minimum
and maximum switching frequency (f
S,min
and f
S,max
) at full power
operation are required to carry out the design method proposed in
this paper.
First of all, the transformer turns ratio is selected in order to
meet condition (4). A suggested value of n close to n
0
improves
the utilization of the secondary side. In a second step the resonance
frequency is set to a temporary value below the minimum
switching frequency,
min , , 0
9 . 0 8 . 0
S temp
f f =
. (6)
Together with (5) and the expression for the transferred power,
( ) ( ) ( ) ( )
( ) ( )
12 0 0 12 0
2 0
2
12 0 1 1
2 cos 1
2 cos 1 2 cos 1
T f Z T f
T f
n
V
T f V V
P
+
|
.
|
\
|
=
, (7)
this enables one to numerically solve for the steady state switching
frequency at a given operating point. This in turn allows to search
for the characteristic impedance Z
0
of the series resonant circuit
needed to achieve the desired frequency ratio f
S,min
/f
S,max
. Finally,
the switching frequency is adjusted to
desired S
num S
temp
f
f
f f
min, ,
min, ,
, 0 0
=
b
, (8)
with the numerically evaluated minimum switching frequency
f
S,min,num
and the desired minimum switching frequency f
S,min,desired
.
C. Two stage topologies (topologies DAB
2
and SRC
2
)
The requirement for the converter to be operated within a wide
input and output voltage range results in operation regions of
inefficient switch and transformer utilization. Therefore, a two
stage solution is considered which consists of two separate
conversion stages: an isolation stage and a non-isolated voltage
converter. Initially four different possibilities were investigated:
1. primary side voltage converter with V
1
<V
i
2. primary side voltage converter with V
1
>V
i
3. secondary side voltage converter with V
i
<V
2
4. secondary side voltage converter with V
i
>V
2
Low conversion efficiency is expected for the primary side
voltage converters (concepts 1 and 2) (below 85% for the boost
converter in [7] operated with an output power of 2kW). The third
concept seems to be promising, however only inefficient
semiconductor switches are available for the resulting voltage
range of V
i
. Therefore, the last proposal was investigated more
detailed.
1) Converter design
The most efficient operation of the converters DAB
1
and SRC
1
is achieved for the primary voltage V
1
being close to the reflected
secondary voltage V
2
/n. Moreover, the proposed modulation
method for topology SRC
1
only allows for V
2
>V
1
n and also the
discussed method for topology DAB
1
primarily suggests that kind
of operation.
In order to achieve a balanced utilization of the two converter
stages, it is proposed that either the isolation stage is operated with
an amplification v
1
v
1,0
or that the non-isolated voltage converter
is operated with v
2
1,
0 , 1
1
2
2
2
0 , 1 1
v
V
V
V
V
v
v v
i
<
=
=
, (9)
0 , 1
1
2
2
1
1
1
v
V
V
v
V
V
v
i
=
= , (10)
b
The switching frequency fS = 1/(2T12) is directly proportional to the
resonance frequency f0 in (5) and (7).
C
DC,2
T
10
T
9
D
2
D
3
D
4
D
1
+
V
i
-
C
DC,3
+
V
2
-
L
DC
Figure 4. Voltage level converter with V2 Vi . Realization is based on
silicon carbide Schottky diodes for improved switching performance.
where v
1,0
is the voltage transformation ratio of the isolation stage
needed for maximum input and output voltage,
max , 1
max , 2
0 , 1
V
V
v =
, (11)
v
1
the amplification of the isolation stage,
1
1
V
V
v
i
=
, (12)
and v
2
the amplification of the non-isolated voltage converter
i
V
V
v
2
2
=
. (13)
With this, the transistors are utilized up to the maximum operating
voltage in order to reduce the secondary side currents.
The non-isolated voltage converter stage is realized according
to Figure 4. Silicon carbide Schottky diodes (D
1
to D
4
) are used to
achieve low switching losses. The designed values for the
components of all converters are summarized in Table I.
III. COMPARISON OF CONVERTER TOPOLOGIES
For comparing the different converter systems key quantities
such as converter efficiency and volume are taken into
consideration.
A. Power losses of active and passive components
The conduction losses of all active and passive components are
considered as a significant part of the total converter power loss.
Other important sources of power loss are the transformer and the
low voltage side PCB which carries high currents.
The MOSFET conduction losses are calculated based on the
on resistance R
DS,on
and the energy stored in the parasitic capacitors
is used to evaluate the losses due to ZCS. For ZVS the inductive
turn off losses are considered and are experimentally estimated for
the primary side transistors at given switch voltage V
DS
and current
I
D
,
ns 500
2
=
D DS
off
I V
E
, (14)
for transistor currents I
D
< 100A. For the secondary side inductive
turn off switching losses, the given datasheet values for V
DS
=
350V were scaled with the applied switch voltage,
( )
V 350
, V 350
,
DS
D Datasheet off off
V
I E E =
. (15)
Finally, the switching losses for the non-isolated voltage converter
in topologies DAB
2
and SRC
2
are calculated with the measurement
data given in [8].
Power losses of the DC capacitors C
DC
are calculated with the
currents being approximated with the fundamental component at a
frequency of 200kHz,
( ) ( ) kHz 200 tan kHz 200 2
2
2
=
C
I
I R P
RMS
RMS ESR
; (16)
for the resonant capacitor C
R
a frequency of 100kHz is considered.
For the DC choke L
DC
the dissipated power is calculated with the
rms current value and the DC resistance of the choke,
2
RMS DC
I R P =
. (17)
Since the resonant inductor L
R
is integrated into the transformer,
its power losses are considered as part of the transformer losses.
The auxiliary power supply accounts for a fixed amount of 20W
power loss.
The converter efficiency is calculated with the total dissipated
power P
loss
and the output power P
out
of the converter
( )
out loss
P P =1
. (18)
B. Transformer losses
The estimation of the transformer power losses is split into the
winding losses (including HF losses) and the losses dissipated in
the transformer magnetic core.
1) Winding losses
For the numeric calculation an interleaved arrangement of the
primary and the secondary winding (S-P-S) is assumed, which
consists of copper foils with the same width w as the transformer
winding area. Moreover, the number of turns N is already defined
by the converter design and it is the same as the number of copper
foil layers p: p = N. Then, the overall winding losses can be
minimized for a given current waveform with DC component I
DC
and harmonic components I
n
by optimizing the thickness d of the
copper foil (one dimensional approximation, [9, 10],
0
is the skin
depth at the fundamental frequency of the current)
4
1
2 2
1
2 2
4
2 0
1 5
15
=
+
=
n
n
n
n DC
opt
I n
I I
p
d .
(19)
With this, an effective winding resistance and the winding
losses for all the given current waveforms can be calculated as
opt
w
p opt DC
RMS p opt DC p opt Wdg
d w
l N
R with
I R P
=
=
, ,
2
, , , ,
3
4
.
(20)
With (20) the losses in the primary (P
Wdg,opt,p
) and in the
secondary winding (P
Wdg,opt,s
) are calculated and added to
determine the total winding losses
P
Wdg,opt
= P
Wdg,opt,p
+ P
Wdg,opt,s
. (21)
2) Core losses
The transformer core losses are calculated using
TABLE I. CALCULATED CONVERTER COMPONENT VALUES
Single Stage Converters Two Stage Converters
Top.
L, LR CR n L, LR CR n
DAB1, DAB2 63nH 13 40nH 21
SRC1, SRC2 212nH 16F 12 161nH 25F 25
( )
( )
( )
,
,
,
j p i Core
Core p j
p C
j
j p
j
p C
j
V k B V
P t
2 T N A
V
with B t
N A
=
=
(22)
which is a simplified expression for the improved general
Steinmetz equation (iGSE) proposed in [11] and valid for flux
waveforms with no minor loops (i.e. monotonic waveforms) as
given for the compared converter topologies. There, the voltage
waveform is given as a piecewise linear waveform V
j
that is
constant during the time intervals t
j
. It is used for calculating the
rate of change of the flux density and the peak to peak amplitude
of the flux density B. (A
C
represents the core cross section area
and V
Core
the core volume; k
i
, , and are called Steinmetz
coefficients which can be calculated with information from the
datasheet).
The total core losses P
Core
= P
Core,p
+ P
Core,s
are calculated
assuming that in half of the core volume the flux is linked with the
primary winding and in the other half with the secondary winding.
This is an approximation of the actual flux distribution which is
accurate enough for the considered comparison of converter
topologies.
C. Low voltage side PCB power loss
High rms currents (up to 200A) with a fundamental frequency
of more than 100kHz on the primary converter side lead to
significant ohmic power loss in the PCB, therefore the layout of
the primary converter side is investigated separately. Low parasitic
inductance and well distributed currents are achieved with a four
layer PCB with the current planes on top of each other and the
semiconductors being placed at the left and at the right borders of
the PCB (Fig. 5).
Information about the current distribution is obtained from
FEA simulation (Fig. 5). High current densities appear at the outer
borders where the semiconductors are located. Therefore,
additional layers are used to increase the copper thickness close to
the transistors for the hardware realization of the converter. The
power loss from this simulation amounts 23.36W for a rms current
of 200A, and this corresponds to an equivalent resistance of
R = 0.58m.
IV. CONVERTER EVALUATION
The power converters, which have been designed in Section II,
are evaluated based on the methods described in Section III. The
calculated current and voltage ratings for the switches suggest
MOSFET semiconductors to be most suitable. The DC link
capacitors C
DC
are chosen such that the peak to peak capacitor
voltage ripple is less than 5% of the minimum DC voltage. The
boost inductor L
DC
is chosen to achieve a peak to peak inductor
current ripple below 2A. The design leads to the following
component values for the converters:
- Primary side switches: R
DS,on
= 3m/2 (two IRF2804S in
parallel, T
junction
= 150C)
- Secondary side switches: R
DS,on
= 150m (CoolMOS
SPW47N60C3, T
junction
= 150C)
- Silicon carbide diodes, voltage level converter: V
F
= 1.8V
- Primary side DC capacitor: C
DC,1
= 800F, R
ESR
= 111
- Secondary side DC capacitors: C
DC,2
= 3F, R
ESR
= 880 and
C
DC,3
= 470nF with R
ESR
= 5.3m
- Equivalent series resistance of the resonant capacitors for
topologies SRC
1
and SRC
2
: R
ESR,1
= 45m, R
ESR,2
= 72m
- Boost inductor in topologies DAB
2
and SRC
2
: L
DC
= 560H,
R
DC
= 90m, core: ELP64 ferrite core / EPCOS
- Transformer core: ELP64 / EPCOS
The calculated values for the leakage inductances, the resonant
components and the transformer turns ratios are summarized in
Tab. I.
For converter topology DAB
1
and the isolation stage of DAB
2
operation with constant switching frequency (f
S
= 100kHz) as well
as with variable switching frequency (f
S
100kHz) is investigated.
For the series resonant converter only the operation with variable
switching frequency (f
S
100kHz) is considered. The non-isolated
voltage converters of the two stage topologies are operated with
constant switching frequency (f
S
= 100kHz).
Fig. 6(a) to (e) depict the calculated total power loss of the
converters within the specified range of input and output voltages.
There the DAB shows the highest total power losses when
operated with constant switching frequency (Fig. 6(a)) which is
due to high rms switch and transformer currents. A reduction of
the power losses is achieved with variable switching frequency
operation of the DAB (Fig. 6(b)). Further improvements are
attained with the series resonant converter as reduced rms values
of switch and transformer currents are achieved (Fig. 6(c)).
However, the transformer turns ratios n of the single stage
topologies DAB
1
and SRC
1
are smaller than those of the two stage
topologies DAB
2
and SRC
2
as explained in Section II. Therefore,
the two stage solutions not only allow for an optimized utilization
T
2,B
T
1,B
T
1,A
T
2,A
Transformer + Transformer -
V V
Layer 2
Layer 3
100A/m
2
40A/mm
2
10A/mm
2
4A/mm
2
1A/mm
2
1,+ 1,-
90mm
T
4,B
T
3,B
T
3,A
T
4,A Layer 1 Layer 4
8
0
m
m
Figure 5. Current distribution in the primary side PCB for a sinusoidal
current at the peak value of 283A and with a frequency of 100kHz
flowing through transistors T1 and T4 (Ti,A and Ti,B denote the parallel
disposition of two transistors forming Ti; the dashed line represents the
current path). High current densities (red) occur at the borders where the
transistors are located.
P / W
out
500 1000 1500 2000
0.7
0.75
0.8
0.85
0.9
0.95
1
h
DAB, const. frequ.
DAB, var. frequ.
SRC
(a)
DAB, const. frequ.
DAB, var. frequ.
SRC
h
P / W
out
500 1000 1500 2000
0.7
0.75
0.8
0.85
0.9
0.95
1
(b)
Figure 7. Calculated efficiency of the single stage (a) and two stage (b)
converters at V1=12V and V2=336V depending on the output power.
of the isolation stage within a wide range of input and output
voltages. Even more, the increased transformer turns ratio results
in reduced secondary side rms current values, which in turn leads
to decreased power losses (Fig. 6(d), (e), and (f)). The
discontinuity that can be observed in these figures is due to the
switching losses of the non-isolated voltage conversion stage
which is operated according to (9) and (10). Therefore, the voltage
converter stage is operated without switching in the region where a
high voltage transfer ratio is needed and thus no switching losses
occur.
Fig. 7 summarizes the calculated efficiency of the considered
converter topologies for varying output power P
out
at V
1
=12V and
V
2
=336V. Obviously, a more effective converter utilization is
achieved with variable frequency modulation for the high power
range (P
out
> 750W). However, the switching frequency increases
for the variable frequency control method with decreasing output
power which in turn causes significant switching losses at low
output power (P
out
< 750W). For the series resonant converter a
gain in efficiency of 5% at rated power (from 85% to 90%) is
achieved with the two stage topology. The additional voltage
converter stage also increases the efficiency of the dual active
bridge by 4% (from 84% to 88% at rated power) when variable
frequency control is used.
The mathematical models that are derived in order to obtain
the transistor and transformer current values needed for the
analysis are verified with the use of digital simulation. Figure 8
depicts the calculated as well as the simulated distribution of the
power losses of the worst case (topology DAB
1
operated with
constant switching frequency) and the best case (topology SRC
2
operated with variable switching frequency) for a power transfer
DAB
1
with constant frequency control DAB
1
with variable frequency control SRC
1
with variable frequency control
11
12
13
14
15
16
250
300
350
400
100
200
300
400
1
12
13
14
15
V / V
1
V / V
2
loss
P / W
(a)
11
12
13
14
15
16
250
300
350
400
100
200
300
400
1
12
13
14
15
V / V
1
loss
V / V
2
P / W
(b)
11
12
13
14
15
16
250
300
350
400
100
200
300
400
1
12
13
14
15
V / V
1
V / V
2
loss
P / W
(c)
DAB
2
with constant frequency control DAB
2
with variable frequency control SRC
2
with variable frequency control
11
12
13
14
15
16
250
300
350
400
100
200
300
400
1
12
13
14
15
V / V
1
V / V
2
loss
P / W
(d)
11
12
13
14
15
16
250
300
350
400
100
200
300
400
1
12
13
14
15
V / V
1
V / V
2
loss
P / W
(e)
11
12
13
14
15
16
250
300
350
400
100
200
300
400
1
12
13
14
15
V / V
1
V / V
2
loss
P / W
(f)
Figure 6. Calculated total power losses of the single stage ((a), (b), and (c)) and two stage converter topologies ((d), (e), and (f)) for Pout = 2kW.
direction from the primary to the secondary side. It can be
observed that the dominant part of the power losses is due to the
conduction losses of the primary side transistors which justifies
why the proposed design methods emphasize on the high current
side. High conduction losses occur in the secondary side
transistors of topology DAB
1
(Fig. 8(a1) and 8(a2)) because of a
low transformer turns ratio n. Moreover, significant switching
losses are observed on the secondary side of this single stage
topology due to high peak currents at turn off. Compared with this,
the two stage solution allows for a great reduction of the secondary
side switching and conduction losses of the isolation stage.
Additional amount of dissipated power seen from the
simulations (Fig. 8(b1) and 8(b2)) is due to the fact that the
converter also has to transfer the power losses and this is neglected
in the mathematical models.
Table II summarizes the volume which is needed for each
converter. The volume of the electronics for the dual active bridge
is taken from an actual hardware design of a 2kW converter. It
includes the primary and the secondary side full bridges, the gate
drivers, the transformer, the DC capacitors and the space needed
for the auxiliary power supply. Additional volume is required for
the series resonant capacitor C
R
of topology SRC
1
and SRC
2
(V
CR1
= 0.05dm
3
and V
CR2
= 0.01dm
3
respectively) and for the
voltage level converter of topologies DAB
2
and SRC
2
which
consists of its electronics (V = 0.04dm
3
) and the inductor L
DC
(V
LDC
= 0.065dm
3
). However, a significant amount of volume is
needed for the heat sink depending on the dissipated heat. The
volume given in Table II is calculated based on the maximum
dissipated power and a maximum tolerated difference between
ambient and heat sink temperature of T=60C for a commercial
heat sink with forced convection (8x8cm
2
cross section, R
th
= 0.17
K/W for a length of l = 150cm). Obviously a reduction of the total
converter volume is achieved with the two stage solution which is
due to the improved efficiency.
V. CONCLUSIONS
Four different topologies of bi-directional power converters
with 2kW rated power, a primary voltage range of 11V to 16V,
and a secondary voltage range of 220V to 447V are investigated: a
dual active bridge and a series resonant converter, each of them
also operated in combination with a separate voltage converter
stage. With the presented design methods and modulation
techniques, high switching frequency is achieved as well as high
current operation on the primary converter side. From the
converter analysis it follows, that the operation within a wide
voltage range leads to a performance degradation for both, the
DAB and the series resonant converter. It was shown that a
reduced amount of total losses and a reduction of the converter
volume can be achieved with a two stage topology as it enables
high efficiency operation of the voltage conversion stage. There,
the series resonant converter supported by a voltage level
converter stage (topology SRC
2
) is most promising with respect to
converter efficiency and volume. Measurement results from an
actual realization of the hardware will be presented shortly in order
to validate the theoretical results.
VI. REFERENCES
[1] A. Julian, D. M. Divan, T. A. Lipo, F. Nozari, P. A. Mezs, Double
bridge resonant DC link converter with variable input and output
frequency, Applied Power Electronics Conference and Exposition, vol.
1, pp. 181-186, March 1996.
[2] J. Walter, R. W. De Doncker, High-power galvanically isolated DC/DC
converter topology for future automobiles, IEEE 34
th
Annual Power
Electronics Specialists Conference, vol. 1, pp. 27-32, June 2003.
[3] L. Zhu, X. Xu, F. Flett, A 3kW isolated bi-directional DC/DC converter
for fuel cell electric vehicle application, Proceedings of power
electronics, pp. 77-82, June 2001.
[4] N. Schibli, Symmetrical multilevel converters with two quadrant DC-
DC feeding, EPFL, Thse Nr. 2220, pp. 99-171, 2000.
[5] Y. Cheron, Soft commutation, technical edition. London: Chapman &
Hall, 1992, pp. 208-219.
[6] A. Levy, Comparing the push-pull, forward converter and full bridge
topologies in low voltage, high power DC-DC converter, High
Frequency Power Converter Conference (HFPC) proceedings, pp. 470-
476, September 2001.
[7] M. B. Gerber, On packaging techniques for a high power density
DC/DC converter, M.Sc. thesis Johannesburg, South Africa: Rand
Afrikaans Univ., Dec. 2001.
[8] J. Minibck, J. W. Kolar, Experimental analysis of the application of
latest SiC diode and CoolMOS power transistor technology in a 10kW
three-phase PWM (VIENNA) rectifier., Power Electronics Conference
(PCIM) proceedings, pp. 121-125, June 2001.
[9] P. L. Dowell, Effect of eddy currents in transformer windings, IEE
Proc., vol. 113, no. 8, pp. 1387-1394, August 1966.
[10] W. G. Hurley, E. Gath, J. G. Breslin, Optimizing the AC resistance of
multilayer transformer windings with arbitrary current waveforms,
IEEE Transactions on Power Electronics, vol. 15, pp. 369 - 376, March
2000.
[11] J. Reinert, A. Brockmeyer, R. W. De Doncker, Calculation of losses in
ferro- and ferrimagnetic materials based on the modified Steinmetz
equation, IEEE Transactions on Industry Applications, vol. 37, pp.
1055 - 106, July-August 2001.
Figure 8. Calculated and simulated power loss distribution (in Watts) for
nominal operation (V1 = 12V, V2 = 336V, Pout = 2kW) of topology DAB1
operated at constant frequency ((a1), (a2)) and topology SRC2 ((b1), (b2)).
Power transfer from the primary to the secondary side is considered.
26
138
81
0.25
68
27
12
20
20
101
16
0.22
10
17
8
14
20 23
18
0.22
11
21
8
14
20
29
153
90
0.25
70
33
13
20
PCB, primary side
(p)
Conduction losses,
primary side (c1)
Conduction losses,
secondary side (c2)
Switching losses,
primary side (s1)
Switching losses,
secondary side (s
2
)
Transformer (t)
Capacitors (c)
Voltage level
Converter (v)
Auxiliary power
supply (a)
118
p
c2
c1
p
p p
c1 c1
c1
c2
c2 c2
s2 s2
s2
s2
t
t
t t
c c
c
c
a
a a
a
v
v
Calculated losses Simulated losses
(a1) (a2)
(b2) (b1)
TABLE II. CONVERTER VOLUME (IN DM
3
) FOR 2KW OUTPUT POWER
Topology and control method
DAB1/
CF
DAB1/
VF
SRC1/
VF
DAB2/
CF
DAB2/
VF
SRC2/
VF
Isolation
stage
0.45 0.45 0.5 0.45 0.45 0.46
Non-isolated
converter
0.105 0.105 0.105
Heatsink 1.46 1.26 1.13 1.13 0.93 0.66
Total volume 1.91 1.71 1.63 1.69 1.49 1.23
CF constant frequency modulation, VF variable frequency modulation