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    Assignment-VLSI Design

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    Rabinsa Yadav
    The document outlines 15 assignments on topics related to VLSI design and MOS transistors for a class. The assignments include discussing Moore's law and the VLSI design flow, explaining the structure and operation of MOS transistors, n-MOS and c-MOS fabrication processes, scaling effects on delay and power, and drawing layouts and stick diagrams of basic MOS logic gates following design rules. Students are asked to define threshold voltage and derive the expression for MOS transistors.

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    Assignment-VLSI Design

    Uploaded by

    Rabinsa Yadav
    51 views1 page
    The document outlines 15 assignments on topics related to VLSI design and MOS transistors for a class. The assignments include discussing Moore's law and the VLSI design flow, explaining the structure and operation of MOS transistors, n-MOS and c-MOS fabrication processes, scaling effects on delay and power, and drawing layouts and stick diagrams of basic MOS logic gates following design rules. Students are asked to define threshold voltage and derive the expression for MOS transistors.

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    Assignment-VLSI Design (1)

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    The document outlines 15 assignments on topics related to VLSI design and MOS transistors for a class. The assignments include discussing Moore's law and the VLSI design flow, explaining the structure and operation of MOS transistors, n-MOS and c-MOS fabrication processes, scaling effects on delay and power, and drawing layouts and stick diagrams of basic MOS logic gates following design rules. Students are asked to define threshold voltage and derive the expression for MOS transistors.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    51 views1 page

    Assignment-VLSI Design

    Uploaded by

    Rabinsa Yadav
    The document outlines 15 assignments on topics related to VLSI design and MOS transistors for a class. The assignments include discussing Moore's law and the VLSI design flow, explaining the structure and operation of MOS transistors, n-MOS and c-MOS fabrication processes, scaling effects on delay and power, and drawing layouts and stick diagrams of basic MOS logic gates following design rules. Students are asked to define threshold voltage and derive the expression for MOS transistors.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    of 1

    Assignment-1 ( VLSI Design ) Note: Last date of submission of Assignment-1 on before September 15, 2012 1.

    Discuss the hierarchy of various semiconductor technology with Moores law and VLSI design flow ( Y chart). 2. Explain the structure and operation of MoS transistor. What is meant by Zpu and Zpd in the inverter circuit? Derive the required ratio between Zpu and Zpd, if a MoS inverter is to be driven from another n-MoS inverter. 3. Explain n-MoS fabrication with suitable sketch. 4. Write short notes on the following: (i) MoSFeT Scaling (ii) Channel Length Modulation 5. Explain the effect of constant voltage scaling on Delay and Power Delay Product (PDP). 6. Explain c-MoS fabrication with suitable diagram. 7. What are the factors that have led the evolution and enhancement of VLSI? 8. State Moores first law and explain the deviation from the predicted path. 9. Draw the layout of a cMoS inverter and compare it with static diagram. 10. Explain Lambda based design rules. 11. Describe the stick diagram for cMoS circuit design. 12. Draw the layout of cMoS inverter. Follow all lambda rule. 13. Draw the color coded stick diagrams of two input nMoS, CMoS NAND and NOR gates. 14. Explain the differences between enhancement and depletion type MoSFeT. 15. Define the threshold voltage and derive the expression for this MoS transistor. (Dr. Manoj Kumar) Professor & HoD ECE Department

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