Jon R. Morss
Winterville, North Carolina, United States
373 followers
303 connections
About
Results-driven Senior Test and Validation Engineer with extensive expertise in elevating software system performance and reliability. Proven track record of identifying critical system bottlenecks, implementing strategic optimization techniques, and driving cross-functional collaboration to deliver high-performing, scalable applications. Demonstrated ability to ensure rigorous quality standards while enhancing overall system efficiency and technological robustness..
Experience
Education
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University of California, Irvine
Device Software Engineering Certificate Embedded Systems Completed
Covers RTOS, Embedded Linux, Embedded System programming for ARM, ATMEL ATmega, and PIC32 processors.
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University of California, Irvine
Embedded Systems Engineer Certificate Embedded Systems Completed
Covers: Digital Logic and Hardware Architecture, Embedded Systems Design and Programming, Real-Time Embedded Systems, RToS, Embedded Linux, VHDL
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Udemy
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Licenses & Certifications
Volunteer Experience
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Field Assembly crew
FIRST
- 1 month
Science and Technology
Participated as part of the Field Assembly Crew at the FIRST Robotics Competition CRESCENDO- State Championship at East Carolina University.
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1 Comment -
Paul McKneely
Most of you have been reading about the savings in power and cost of ownership when using new RISC as opposed to old CISC architectures. You never see comparisons between new RISC and new CISC architectures because nobody is designing new CISC architectures. Almost nobody is designing and promoting newer and better non-RISC or post-RISC devices. Everyone wants to save a little now and pay a lot later because they have bought into the hype. The knee-jerk response is that “memory is cheap”. ϕEngine, as an example, not only has much better code density than RISC-V but it supports much better data density. These not only translate into the need for less memory but also less and lower bandwidths in caches, main memory, busses, mass storage interfaces and devices and networks. This is because the sizes of program and data files that you need are much smaller. These tend to hang around, need storage and management over a long time. Computational speed has traditionally been the sole parameter for comparison between processors with little regard for anything else. But you are hampered with the extra network bandwidths and the larger data that is both consumed and produced before, during and after computation with a low-data-density “general-purpose” RISC processor. The larger data has to be transmitted and stored and retrieved to and from larger devices. Not considering anything else, RISC devices burn less power and cost less to manufacture than more capable processors. But ease of development is also not considered. This is why so many people burn up over 99% or their processor's power by using Python for their programs. The truth is that the great majority of applications are not compute-bound. But you are stuck to deal with the bloat that it needs and produces long before, during and after you run your programs. Promoters of RISC technology ignore that programming a RISC processor requires a lot more mental work than with a well-designed non-RISC processor. RISC processors are not designed for programmability. They are designed for ease of manufacture and low power. Non-RISC processors cater to a programmer's way of thinking. They are a lot easier to program. RISC processors have fewer and simpler instructions so assembly programmers must use a lot more of them and be more creative about how to stretch meager resources for accomplishing the same things. If you only have a hammer, you can't use screws. Every project must look like a nail. People are doing a lot less assembly programming than they used to do because it is more difficult to do with RISC. People will say that you don't have to because the programming languages are better than they used to be. The truth is they used assembly language to do basic things that you can't do any better with a newer programming language. RISC users choose to be more wasteful in writing low-quality code to avoid having to perform mental gymnastics. #computers #electronics #RISC #programming #assembly
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Enterprises need #acceleratedcomputing infrastructure that provides the performance, reliability, and scalability to power today’s modern applications. NVIDIA-Certified Systems enable enterprises to confidently deploy hardware solutions that securely and optimally run their modern accelerated workloads—from desktop to #datacenter to edge. Learn more now.
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