IEICE Transactions on Information and Systems
Online ISSN : 1745-1361
Print ISSN : 0916-8532
Regular Section
Dual-Core Framework: Eliminating the Bottleneck Effect of Scalar Kernels on SIMD Architectures
Yaohua WANGShuming CHENHu CHENJianghua WANKai ZHANGSheng LIU
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Keywords: SIMD, dual-core, scalar, vector
JOURNAL FREE ACCESS

2013 Volume E96.D Issue 2 Pages 365-369

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Abstract

The efficiency of ubiquitous SIMD (Single Instruction Multiple Data) media processors is seriously limited by the bottleneck effect of the scalar kernels in media applications. To solve this problem, a dual-core framework, composed of a micro control unit and an instruction buffer, is proposed. This framework can dynamically decouple the scalar and vector pipelines of the original single-core SIMD architecture into two free-running cores. Thus, the bottleneck effect can be eliminated by effectively exploiting the parallelism between scalar and vector kernels. The dual-core framework achieves the best attributes of both single-core and dual-core SIMD architectures. Experimental results exhibit an average performance improvement of 33%, at an area overhead of 4.26%. What's more, with the increase of the SIMD width, higher performance gain and lower cost can be expected.

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© 2013 The Institute of Electronics, Information and Communication Engineers
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