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ORCIDZhufei Chu
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2020 – today
- 2024
[b1]Kaihui Tu, Xifan Tang, Cunxi Yu, Lana Josipovic, Zhufei Chu:
FPGA EDA - Design Principles and Implementation. Springer 2024, ISBN 978-981-99-7754-3, pp. 3-227- [j21]Qiyu Yang, Zheng-Dong Luo, Fei Xiao, Junpeng Zhang, Dawei Zhang
, Dongxin Tan, Xuetao Gan, Yan Liu, Zhufei Chu, Yinshui Xia, Genquan Han:
Solid-state non-volatile memories based on vdW heterostructure-based vertical-transport ferroelectric field-effect transistors. Sci. China Inf. Sci. 67(6) (2024) - [j20]Tiancheng Li, Erping Li, Huali Duan, Zhufei Chu, Jian Wang, Wenchao Chen:
Artificial neural network models for metal-ferroelectric-insulator-semiconductor ferroelectric tunnel junction memristor. Microelectron. J. 144: 106083 (2024) - [j19]Hongyang Pan, Yinshui Xia, Lunyao Wang, Zhufei Chu:
Semi-Tensor Product-Based Exact Synthesis for Logic Rewriting. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(4): 1093-1106 (2024) - [c14]Hongyang Pan, Ruibing Zhang, Yinshui Xia, Lunyao Wang, Fan Yang, Xuan Zeng, Zhufei Chu:
A Semi-Tensor Product based Circuit Simulation for SAT-sweeping. DATE 2024: 1-6 - [i5]Lei Chen, Yiqi Chen, Zhufei Chu, Wenji Fang, Tsung-Yi Ho, Yu Huang, Sadaf Khan, Min Li, Xingquan Li, Yun Liang, Yibo Lin, Jinwei Liu, Yi Liu, Guojie Luo, Zhengyuan Shi, Guangyu Sun, Dimitrios Tsaras, Runsheng Wang, Ziyi Wang, Xinming Wei, Zhiyao Xie, Qiang Xu, Chenhao Xue, Evangeline F. Y. Young, Bei Yu, Mingxuan Yuan, Haoyi Zhang, Zuodong Zhang, Yuxiang Zhao, Hui-Ling Zhen, Ziyang Zheng, Binwu Zhu, Keren Zhu, Sunan Zou:
The Dawn of AI-Native EDA: Promises and Challenges of Large Circuit Models. CoRR abs/2403.07257 (2024) - [i4]Zhengyuan Shi, Tiebing Tang, Sadaf Khan, Hui-Ling Zhen, Mingxuan Yuan, Zhufei Chu, Qiang Xu:
EDA-Driven Preprocessing for SAT Solving. CoRR abs/2403.19446 (2024) - 2023
- [j18]Hongyang Pan, Zhufei Chu:
A Semi-Tensor Product Based All Solutions Boolean Satisfiability Solver. J. Comput. Sci. Technol. 38(3): 702-713 (2023) - [j17]Kunmei Hu, Zhufei Chu:
An efficient circuit-based SAT solver and its application in logic equivalence checking. Microelectron. J. 142: 106005 (2023) - [c13]Hongyang Pan, Zhufei Chu:
Exact Synthesis Based on Semi-Tensor Product Circuit Solver. DATE 2023: 1-6 - [c12]Zhengyuan Shi, Hongyang Pan, Sadaf Khan, Min Li, Yi Liu, Junhua Huang, Hui-Ling Zhen, Mingxuan Yuan, Zhufei Chu, Qiang Xu:
DeepGate2: Functionality-Aware Circuit Representation Learning. ICCAD 2023: 1-9 - [i3]Zhengyuan Shi, Hongyang Pan, Sadaf Khan, Min Li, Yi Liu, Junhua Huang, Hui-Ling Zhen, Mingxuan Yuan, Zhufei Chu, Qiang Xu:
DeepGate2: Functionality-Aware Circuit Representation Learning. CoRR abs/2305.16373 (2023) - [i2]Hongyang Pan, Ruibing Zhang, Yinshui Xia, Lunyao Wang, Fan Yang, Xuan Zeng, Zhufei Chu:
A Semi-Tensor Product based Circuit Simulation for SAT-sweeping. CoRR abs/2312.00421 (2023) - 2022
- [j16]Xiang He, Zhufei Chu:
Stochastic circuit synthesis via satisfiability. Integr. 84: 84-91 (2022) - [j15]Qing Wan, Changjin Wan, Huaqiang Wu, Yuchao Yang, Xiaohe Huang, Peng Zhou, Lin Chen, Tian-Yu Wang, Yi Li, Kanhao Xue, Yu-Hui He, Xiangshui Miao, Xi Li, Chenchen Xie, Houpeng Chen, Zhitang Song, Hong Wang, Yue Hao, Junyao Zhang, Jia Huang, Zheng Yu Ren, Li Qiang Zhu, Jianyu Du, Chen Ge, Yang Liu, Guanglong Ding, Ye Zhou, Su-Ting Han, Guosheng Wang, Xiao Yu, Bing Chen, Zhufei Chu, Lunyao Wang, Yinshui Xia, Chen Mu, Feng Lin, Chixiao Chen, Bojun Cheng, Yannan Xing, Weitao Zeng, Hong Chen, Lei Yu, Giacomo Indiveri, Ning Qiao:
2022 roadmap on neuromorphic devices and applications research in China. Neuromorph. Comput. Eng. 2(4): 42501 (2022) - [j14]Chenghao Yang, Yinshui Xia, Zhufei Chu, Xiaojing Zha:
Logic Synthesis Optimization Sequence Tuning Using RL-Based LSTM and Graph Isomorphism Network. IEEE Trans. Circuits Syst. II Express Briefs 69(8): 3600-3604 (2022) - [j13]Zhufei Chu, Chuanhe Shang, Tingting Zhang, Yinshui Xia, Lunyao Wang, Weiqiang Liu:
Efficient Design of Majority-Logic-Based Approximate Arithmetic Circuits. IEEE Trans. Very Large Scale Integr. Syst. 30(12): 1827-1839 (2022) - [i1]Chenghao Yang, Yinshui Xia, Zhufei Chu:
The prediction of the quality of results in Logic Synthesis using Transformer and Graph Neural Networks. CoRR abs/2207.11437 (2022) - 2021
- [j12]Xiaojing Zha, Yinshui Xia, Shang-Luan Xie, Zhufei Chu:
Defect-Tolerant Mapping of CMOL Circuit Targeting Delay Optimization. J. Comput. Sci. Technol. 36(5): 1118-1132 (2021) - [j11]Huiming Tian, Zhufei Chu:
Inversion Optimization Strategy Based on Primitives with Complement Attributes. J. Comput. Sci. Technol. 36(5): 1145-1154 (2021) - [j10]Zhufei Chu, Zeqiang Li, Yinshui Xia, Lunyao Wang, Weiqiang Liu:
BCD Adder Designs Based on Three-Input XOR and Majority Gates. IEEE Trans. Circuits Syst. II Express Briefs 68(6): 1942-1946 (2021) - [c11]Jianguo Ni, Zhufei Chu:
An Efficient Demultiplexer Design in Quantum-dot Cellular Automata. ASICON 2021: 1-4 - [c10]Chuanhe Shang, Zhufei Chu:
Design of Majority Logic Based 4-bit Approximate Subtractors and its Application in Divider. ASICON 2021: 1-4 - [c9]Xuan Wang, Zhufei Chu, Weikang Qian:
MinSC: An Exact Synthesis-Based Method for Minimal-Area Stochastic Circuits under Relaxed Error Bound. ICCAD 2021: 1-9 - 2020
- [j9]Zhufei Chu, Huiming Tian, Zeqiang Li, Yinshui Xia, Lun-Yao Wang:
A High-Performance Design of Generalized Pipeline Cellular Array. IEEE Comput. Archit. Lett. 19(1): 47-50 (2020) - [j8]Zhufei Chu, Mathias Soeken, Yinshui Xia, Lun-Yao Wang, Giovanni De Micheli:
Advanced Functional Decomposition Using Majority and Its Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(8): 1621-1634 (2020)
2010 – 2019
- 2019
- [j7]Zhufei Chu, Lei Shi, Lun-Yao Wang, Yinshui Xia:
Multi-objective algebraic rewriting in XOR-majority graphs. Integr. 69: 40-49 (2019) - [j6]Libo Qian, Kefang Qian, Xitao He, Zhufei Chu, Yidie Ye, Shi Ge, Yinshui Xia:
Through-Silicon Via-Based Capacitor and Its Application in LDO Regulator Design. IEEE Trans. Very Large Scale Integr. Syst. 27(8): 1947-1951 (2019) - [c8]Qiuhong Ying, Lun-Yao Wang, Zhufei Chu, Yinshui Xia:
Area Optimization of MPRM Circuits Using Approximate Computing. ASICON 2019: 1-4 - [c7]Zhufei Chu, Mathias Soeken, Yinshui Xia, Lun-Yao Wang, Giovanni De Micheli:
Structural rewriting in XOR-majority graphs. ASP-DAC 2019: 663-668 - [c6]Zhufei Chu, Winston Haaswijk, Mathias Soeken, Yinshui Xia, Lun-Yao Wang, Giovanni De Micheli:
Exact Synthesis of Boolean Functions in Majority-of-Five Forms. ISCAS 2019: 1-5 - 2018
- [c5]Zhufei Chu, Mathias Soeken, Yinshui Xia, Giovanni De Micheli:
Functional decomposition using majority. ASP-DAC 2018: 676-681 - 2017
- [c4]Zhufei Chu, Xifan Tang, Mathias Soeken, Ana Petkovska, Grace Zgheib, Luca Gaetano Amarù, Yinshui Xia, Paolo Ienne, Giovanni De Micheli, Pierre-Emmanuel Gaillardon:
Improving Circuit Mapping Performance Through MIG-based Synthesis for Carry Chains. ACM Great Lakes Symposium on VLSI 2017: 131-136 - 2016
- [j5]Zhufei Chu, Yinshui Xia, Lun-Yao Wang, Jian Wang:
Efficient power pad assignment for multi-voltage SoC and its application in floorplanning. Int. J. Circuit Theory Appl. 44(8): 1533-1550 (2016) - [j4]Zhufei Chu, Yinshui Xia, Lun-Yao Wang:
Multi-supply voltage (MSV) driven SoC floorplanning for fast design convergence. Integr. 52: 335-346 (2016) - 2014
- [j3]Zhufei Chu, Yinshui Xia, Lun-Yao Wang, Jian Wang:
Efficient nonrectangular shaped voltage island aware floorplanning with nonrandomized searching engine. Microelectron. J. 45(4): 382-393 (2014) - [c3]Zhufei Chu, Yinshui Xia, Lun-Yao Wang:
Level shifter planning for timing constrained multi-voltage SoC floorplanning. ACM Great Lakes Symposium on VLSI 2014: 329-334 - 2013
- [j2]Lun-Yao Wang, Zhufei Chu, Yinshui Xia:
Low Power State Assignment Algorithm for FSMs Considering Peak Current Optimization. J. Comput. Sci. Technol. 28(6): 1054-1062 (2013) - [c2]Zhufei Chu, Yinshui Xia, Lun-Yao Wang, Jian Wang:
Voltage Drop Aware Power Pad Assignment and Floorplanning for Multi-voltage SoC Designs. CAD/Graphics 2013: 87-94 - 2012
- [j1]Zhufei Chu, Yinshui Xia, Lun-Yao Wang:
Cell Mapping for Nanohybrid Circuit Architecture Using Genetic Algorithm. J. Comput. Sci. Technol. 27(1): 113-120 (2012) - 2010
- [c1]Zhufei Chu, Yinshui Xia, William N. N. Hung, Lun-Yao Wang, Xiaoyu Song:
A Memetic Approach for Nanoscale Hybrid Circuit Cell Mapping. DSD 2010: 681-688
Coauthor Index
aka: Lunyao Wang
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