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INTRODUCTION

TO
PIC MICROCONTROLLERS

Dr. Y.Narasimha Murthy Ph.D


SRI SAIBABA NATIONAL COLLEGE(AUTONOMOUS)
ANANTAPUR-515001-A.P-INDIA
[email protected]
Do you Know this gentleman ???..
• None other than Steve Sanghi, the chairman,
president and CEO of Microchip Technology
Inc.
• Sanghi moved from India to U.S. to pursue a
Master’s degree at the University of
Massachusetts after bachelor’s degree in
engineering, from Punjab Engineering College.
• In 1993, Sanghi became president and CEO of
Microchip after seeking advice from venture
capital firms on starting his own company.
Since then, he has transformed Microchip
into a billion-dollar company specializing in
Microcontroller and analog semiconductors
used in devices ranging from remote
controls to cars. He also has been involved
in science and technology education
programs, and he’s been known to frequent
science fairs and question kids about their
projects.
Brief Introduction….
• The term PIC stands for “Peripheral
Interface Controller” .It is the brain child of
Microchip Technology, USA .They have
coined this name to identify their single
chip micro-controllers. These 8-bit micro
controllers have become very important
now -a -days in industrial automation and
embedded applications etc…..
• PICs are popular with both industrial
developers and hobbyists alike due to their
low cost, wide availability, large user base,
extensive collection of application notes,
availability of low cost or free development
tools, and serial programming (and re-
programming with flash memory)
capability.
• Microchip PIC microcontrollers are
available in various types. When PIC
microcontroller MCU was first available
from General Instruments in early 1980's,
the micro-controller had a simple
processor executing 12-bit wide
instructions with basic I/O functions. These
devices are known as low-end
architectures. They have limited program
memory and are meant for applications
requiring simple interface functions and
small program & data memories.
Some of the low-end device numbers are

• 12C5XX
• 16C5X
• 16C505
Mid range PIC architectures
• built by upgrading low-end architectures
with more number of peripherals, more
number of registers and more
data/program memory.
Some of the mid-range devices are
• 16C6X
• 16C7X
• 16F87X
Program memory type is indicated by an
alphabet.
• C = EPROM
• F = Flash
• RC = Mask ROM
• 28/40-Pin 8-Bit CMOS FLASH
Microcontrollers Core Features:
• High performance RISC CPU
• Only 35 single word instructions to learn
• All single cycle instructions except for program
• branches which are two cycle
• Operating speed: DC - 20 MHz clock input
• DC - 200 ns instruction cycle
• Up to 8K x 14 words of FLASH Program
Memory,
• Up to 368 x 8 bytes of Data Memory (RAM)
• Up to 256 x 8 bytes of EEPROM Data Memory
• Pin-out compatible to the PIC16C73B/74B/76/77
• Interrupt capability (up to 14 sources)
• Eight level deep hardware stack
• Direct, indirect and relative addressing modes
• Power-on Reset (POR)
• Power-up Timer (PWRT) and
• Oscillator Start-up Timer (OST)
• Watchdog Timer (WDT) with its own on-chip RC
• oscillator for reliable operation
• Programmable code protection
• Power saving SLEEP mode
• Selectable oscillator options
• Low power, high speed CMOS FLASH/EEPROM
technology
• Fully static design
• In-Circuit Serial Programming (ICSP) via two
pins
• Single 5V In-Circuit Serial Programming capability
• In-Circuit Debugging via two pins
• Processor read/write access to program memory
• Wide operating voltage range: 2.0V to 5.5V
• High Sink/Source Current: 25 mA
• Commercial, Industrial and Extended
temperature
• ranges
• • Low-power consumption:
• - < 0.6 mA typical @ 3V, 4 MHz
• - 20 μA typical @ 3V, 32 kHz
• - < 1 μA typical standby current
Salient features
• Speed :
When operated at its maximum clock rate
a PIC executes most of its instructions in
0.2 s or five instructions per
microsecond.
• Instruction set Simplicity :
The instruction set is so simple that it
consists of just 35 instructions
• Integration of operational features:
Power-on-reset and brown-out
protection ensure that the chip operates
only when the supply voltage is within
specifications. A watch dog timer resets
the PIC if the chip malfunctions or
deviates from its normal operation at any
time.
• Programmable timer options:
Three timers can characterize inputs,
control outputs and provide internal
timing for the program execution.
• Powerful output pin control:
A single instruction can select and drive
a single output pin high or low in its 0.2
s instruction execution time. The PIN
can drive a load of up to 25A.
• I/O port expansion:
With the help of built in serial peripheral
interface the number of I/O ports can be
expanded. EPROM/DIP/ROM options
are provided.
• I/O port expansion:
This is the most important aspect in the
PIC controllers.With the help of built in
Serial Peripheral Interface(SPI) the
number of I/O ports can be expanded.
EPROM/DIP/ROM options are provided.
• Interrupt control:
Up to 12 independent interrupt sources
can control when the CPU will deal with
each sources.
PIC 16C6X/7X CONTROLLERS
PERIPHERAL FEATURES
• The PIC16CXX/17CXX is a family of low-cost,
high-performance, CMOS, fully-static, 8-bit
microcontrollers.
• There are Three Timers : Namely Timer 0,
Timer 1, Timer 2
• Timer 0: 8-bit timer/counter with 8-bit prescaler
• Timer 1: 16-bit timer/counter with prescaler can
be incremented during sleep via external
crystal/clock
• Timer 2: 8-bit timer/counter with 8-bit period
register, pre-scaler and post-scaler
Contd…

• Capture/Compare/PWM (CCP) module(s)


• Capture is 16-bit, max resolution is 12.5
ns, Compare is 16-bit, max resolution is
200ns, PWM max resolution is 10-bit
• Synchronous Serial Port (SSP) with SPITM
and I2C
• Universal Synchronous Asynchronous
Receiver Transmitter (USART/SCI)
• Parallel Slave Port (PSP) 8-bits wide, with
external RD, WR and CS controls
• Brown-out detection circuitry for Brown-out
Reset (BOR)
• PIC16CXX microcontroller family has
enhanced core features, eight-level deep
stack, and multiple internal and external
interrupt sources.
ARCHITECTURE
• The high performance of the PIC16CXX family
can be attributed to a number of architectural
features commonly found in RISC
microprocessors. To begin with, the PIC 16CXX
uses a Harvard architecture, in which, program
and data are accessed from separate memories
using separate buses. This improves bandwidth
over traditional Von Neumann architecture
where program and data may be fetched from
the same memory using the same bus.
HARVARD ARCHTECTURE
• As the PIC 16c6x/7x family of micro-controllers
uses Harvard Architecture it enables the
devices exceptionally fast execution speed for a
given clock rate. In the Harvard Architecture
separate buses are used for Data and
Instruction as shown in the diagram.

• Instructions are fetched from program memory


using buses that are distinct from the buses
used for accessing variables in data memory,
I/O ports etc. Every instruction is coded as a
single 14-bit word and fetched over a 14-bit wide
bus.
….
Contd

• Separating program and data buses


further allows instructions to be sized
differently than 8-bit wide data words.
Instruction op-codes are 14-bits wide
making it possible to have all single word
instructions. A 14-bit wide program
memory access bus fetches a 14-bit
instruction in a single cycle
Example:

• The PIC 16C61 addresses 1K x 14 of


program memory.
• The PIC16C62/62A/R62/64 addresses 2K
x 14 of program memory, and
• the PIC16C63/R63/65/65/65A/R65
devices address 4K x 14 of program
memory.
• The PIC 16C66/67 address 8K x 14
program memory. All program memory is
internal.
• The PIC16CXX can directly or indirectly address
its register files or data memory. All special
function registers including the program counter
are mapped in the data memory. The PIC16CXX
has an orthogonal (symmetrical) instruction set
that makes it possible to carry out any operation
on any register using any addressing mode. This
symmetrical nature and lack of “special optimal
situations” makes programming with the
PIC16CXX simple yet efficient, thus significantly
reducing the learning curve.
Block Diagram-16C6X
CPU REGISTERS
The CPU registers are
• Working Register (W)
• Status – Register
• FSR – File Select Register
• INDF
• PCLATH
• Program Counter
• PCL
• Eight Level Stack
General Block Diagram
Contd…

• Working Register:
Working Register is used by many instructions
as the source of an operand. It also serves as
the destination for the result of instruction
execution and it is similar to accumulator in
other cs and ps. It is a 8-bit regarding.
• Status Register:
It contains the arithmetic status of the ALU, the
RESET status and the bank select bits for the
data memory.
C: Carry/borrow bit
DC: Digit carry/borrow bit
Z: Zero bit
NOT_PD: Reset Status bit (Power-down
mode bit)
NOT_TO: Reset Status bit (tme- out bit)
RPO: Register bank Select
The bits 7 and 6 of Status Register are unused by
16c6x/7x.
Contd…

The ‘C’ bit is set when two 8-bit operands


are added together and a 9-bit result
occurs. This 9-bit is placed in the carry bit.

• The DC or Digit carry bit indicates that a


carry from the lower 4 bits occurred during
an 8-bit addition.
• Example: 0011 1000
0011 1000
0111 0000

Here DC=1 as a result of the carry from


the bit 3 to the bit 4 position.
• The Z or zero bits is affected by the execution of
arithmetic or logic instructions.

• The reset status bits NOT_TO and NOT_PD are


used in conjunction with PIC’s sleep mode. The
micro controller can put itself to sleep mode to
save power during intervals when it has nothing
to do. It can be reset by any of three kinds. Upon
reset the CPU can check these two reset status
bits to determine which kind of event resettled it
and then respond accordingly.
• The Register bank select bit RPO is used
to select either bank .
When RPO=0, select Bank 0, RPO=1,
select Bank 1.
• Example: bcf STATUS, RPO
Select bank 0
• bsf STATUS, RPO

Select bank 1.
Contd…

• FSR – (File Select Register):


It is the pointer used for indirect addressing. In
the indirect addressing mode the 8-bit register
file address is first written into FSR. It is a
special purpose register that serves as an
address pointer to any address through out the
entire register file.
• INDF – (Indirect File):
It is not a physical register .Addressing this
INDF will cause indirect addressing. Any
instruction using the INDF register actually
access the register pointed to by the FSR.
Contd…

• PCL:
PCL is actually the lower 8-bits of the 13-bit
program counter. It can be read like any other
register.
• PCLATH (Program Counter Latch):
The upper 3-bits of PCLATH remains zero and
serves no purpose, it is only when PC2 is
written to that PCLATH is automatically written
into the PC at the same time.
Memory organisation :

It has three memory blocks.


• Program memory
• Data memory
• Stack
Program Memory
• The 6x/7x family controllers have either 2k or 4k
address of program memory. Normally a
program memory of 2k addresses needs only a
11-bit program counter to access any address
(211=2048=2k).
• A program memory of 4k address needs a 12-bit
program counter. But this PIC family uses 13-bit
program counter allowing the controllers to an
8k-program memory without changing the CPU
structure.
• Two addresses in the program memory
address space are treated in a special way
by the CPU. The first address H’ 000’ being
a go to mainline instruction the second
special address, H’ 004’ being a ‘go to in
service’ instruction can be assigned to this
address to make the CPU to jump to the
beginning of the Interrupt Service routine
located elsewhere in the memory space.
• When we deal with tables, if any tables are
created they are assigned to addresses in
the range H’005 – H’0FF’. For most of the
applications this space is sufficient.
The main line program begins after the
tables.
Data memory (Register Files):
Data Memory is also known as Register
File. Register File consists of two
components.
• General purpose register file ( RAM).
• Special purpose register file (similar to
SFR in 8051).
• The special purpose register file consists
of input/output ports and control registers.
Addressing from 00H to FFH requires 8
bits of address. However, the instructions
that use direct addressing modes in PIC to
address these register files use 7 bits of
instruction only. Therefore the register
bank select (RP0) bit in the STATUS
register is used to select one of the
register bank
Data Memory map
PIC Reset actions
• Reset is used to put the
microcontroller into a known state.
Normally when a PIC microcontroller
is reset, execution starts from
address 0 of the program memory.
This is where the first executable user
program resides. The reset action
also initializes various SFR registers
inside the Microcontroller.
Contd…

• Reset mechanisms ensure that the CPU starts


running when the appropriate operating
conditions have been met, and can be used to
restart the CPU in case of program failure.

• The actual reset to the CPU or the Chip_Reset,


is generated by a flip-flop. This has two inputs, S
(Set) and R (Reset).
Contd…..

• The CPU enters Reset mode when Chip_Reset


goes low, which is caused by the S line going
high. It stays there until the flip-flop is cleared,
caused by the R line going high.

• The S input to the flip-flop goes high, via a three-


input OR gate, if any of the following goes high:
Contd…..

• The Reset action normally occurs in


various situations like
• Power On Reset
• Master Clear( ) Reset
• Watchdog Timer Reset
• Brown-out Reset (This feature is not
available in PIC16C61/62/64/65 series.
Only 74 series have this feature
Contd…..

• The reset action will set the program


counterto the starting address of the
program.This starting address is different
for different members.For Ex:Starting
address for PIC16C71 is 000H.whereas for
PIC16C57 it is 7FFH.
• So,The first instruction to be executed will
appear at the reset vector.
• An important point to be remembered, is
when powered ,most of the hardware
registers are initialized ,but RAM locations
are not initialized.A reset cycle will
initialize the RAM locations.
• So,the conclusion is Reset and Power-on
are different in PIC controllers.
Contd…..
• The Brown-out reset occurs when the
supply voltage falls below 4 volts.The
device remains in the Brown-out reset
state till the supply voltage is restored.The
Brown-out reset also includes another
feature .If Vdd is hit with a transient noise
spike ,causing Vdd to drop below 4.0Volts
for longer than 100 micro seconds the
Brown-out reset circuit detects that and
reset the
Contd…..
• chip.whereas in most of the other microcontrollers
many erroneous executions takes place during this
time.The PIC brown-out reset will also help if the
power-on reset conditions are not not met.
• There is a provision of power-up timer of about
72mS.Once this is enabled the Brown-out reset
occurs once again incase of non-restoration of
supply within 72 mS
PIC Oscillator Connections
• There are 4 common oscillator modes that are
available on most PIC micro devices.

• HS, XT, LP and RC. (High speed, Crystal, Low-


power clocking, Internal RC)

• These modes support crystals, canned oscillator


modules, some resonators or the use of an
external resistor and capacitor as a clock
source. When using a crystal or resonator, other
components such as capacitors may be needed.
Contd…..

• The HS mode stands for “High Speed” mode. It


is designed to be used with crystals,and
resonators with a frequency of 3 to 4 MHz or
more. The important thing to remember about
HS mode is that it provides the highest drive
level available.
Crystals and Resonators must be DRIVEN by a
signal to work. The gain on this signal controls
whether an oscillation will occur and how strong
it will be. Care must be taken not to underdrive
or overdrive the crystal or resonator.
Contd…..

• The XT mode stands for “Crystal” mode and will


produce a medium drive level. It is designed to
be used with crystals and resonators of 1 to
about 4 MHz.
• XT mode has moderate power consumption
since its drive level is lower than that of
HS mode, and because a lower clock speed is
produced. Remember, as a rule: the
faster the clock used, the more current the
application will require
Contd…..

• The LP mode stands for "Low Power” mode.


This mode is useful for circuits that require the
lowest power possible. LP mode is engineered
for 32.768kHz crystal operation, and it can
function at any frequency below 200kHz. LP
mode is most commonly used for 32.768kHz
operation.
LP mode will produce the slowest clock rate, and
as a result, the lowest power consumption of all
the modes.
• LP mode is ideal for timing sensitive applications
since these same crystals are used as a time
base in wrist-watches.
Contd…..

• The RC mode stands for “External RC” mode.


• It is important to note that this is an
_EXTERNAL_ RC mode, ( some PICmicro
devices have an _INTERNAL_ RC mode).
• RC mode uses a resistor-capacitor network
connected to the OSC1 pin. When the
device is configured for external RC mode, these
components are automatically driven to produce
a frequency which will run the PICmicro MCU.
Contd…..

• RC mode is designed for very low-cost


applications. The power consumed will
vary due to the wide range of frequencies
that can be created using this mode
Contd…..

• It is extremely important to note that RC


mode will produce an inaccurate clock
source. In some applications this won’t
matter, but applications that are timing
sensitive should not be used with this
mode. For this reason, RC mode is not
recommended for timing sensitive
applications or for RS-232 communication.
Contd…..

• The IntRC mode stands for “Internal RC” mode


and functions much like the standard External
RC mode.
• Unlike External RC mode, in IntRC mode the
resistor and capacitor are already provided.
Microcontrollers with this feature have an on-
chip RC oscillator. Current designs run at
approximately 4 MHz.
Contd…..

• IntRC mode is the least expensive


oscillator available since no external
components are needed. It is also useful,
because devices in this mode can often
use the OSC1 and OSC2 lines for general
purpose I/O. This feature makes the
PIC12CXXX and other 8-pin PICmicro
devices very popular.
Contd…..

• The ER mode stands for “External Resistor”


mode.
• ER mode is very similar to External RC mode,
but no capacitor is needed. One resistor controls
the frequency produced.
• Similar to RC mode, ER mode has moderate
power consumption, and is low cost.However,
due to the nature of RC oscillators, it is not
recommended for timing sensitive applications
or for RS-232 use.
Limitations
The PIC architectures have several limitations:
• Only a single accumulator
• A small instruction set
• Operations and registers are not orthogonal;
some instructions can address RAM and/or
immediate constants, while others can only use
the accumulator
• Memory must be directly referenced in arithmetic
and logic operations, although indirect
addressing is available via 2 additional registers
• Register-bank switching is required to access
the entire RAM of many devices
THANQ !!

Wish you good luck

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