Xtremedsp Solutions: Selection Guide
Xtremedsp Solutions: Selection Guide
Xtremedsp Solutions: Selection Guide
Selection Guide
March 2008
INTRODUCTION
Contents
DSP System Solutions.................4 DSP Devices................................17 Development Tools.....................25 Complementary Solutions..........33 Resources...................................35
www.xilinx.com/dsp
March 2008
INTRODUCTION
Today, FPGAs play an increasing role in a wide range of DSP applications. We expect this trend to continue over the next several years. BDTIs Analysis in their report FPGAs for DSP
March 2008
www.xilinx.com/dsp
Digital Communications
Wireless/Wired Communication Systems Overview
Target Applications 3G/4G Base Stations Software Defined Radio Smart Antenna Systems Telecoms Infrastructure Satellite Broadcasting Systems Digital Audio Broadcasting Digital Video Broadcasting Fixed/mobile Wireless Broadband
Multi-Carrier Spread Spectrum (eg. 3GPP2) Narrowband
Example: Wireless Base Station Use the new XtremeDSP slices to efficiently implement: Digital Radio Functions Digital Radio Card Spectrum Channelization DDC Polyphase Transform Matched Filter Baseband Functions XtremeDSP slices are used in the receive path (shown adjacent) and the transmit path for corresponding transmit functions
Wireless/Wired Communication Systems Overview Wireless communication is experiencing rapid growth world-wide. Channel bandwidth and power constraints, coupled with the requirement for high data-rate transmission are driving system designers to employ increasingly sophisticated signal processing techniques to keep pace. These techniques require the need for very high performance signal processing resources to deal with transporting and processing digital information such as compressed speech, audio, image and video reliably from a transmit source to receivers. Digital communications systems employ various transmission schemes based on the transmission media, available bandwidth, required bit-error-rate and communication latency. Xilinx FPGAs ability to process sample rates in the hundreds of mega samples per second range provide the signal processing capability necessary to efficiently meet the demands of many RF and IF functions in narrow band, spread spectrum and multi-carrier systems.
DSP for Digital Communications Xilinx FPGAs are widely used for performing signal processing tasks in digital communication systems. The diagram above demonstrates some of these applications.
The Xilinx XtremeDSP IP portfolio for digital communications provides a rich set of algorithms to support the development of todays advanced digital communication systems. For such systems, Xilinx FPGAs allow the integration of multiple channels on a single device to reduce BOM cost and drive up channel density while reducing power per channel. The reconfigurable nature of Xilinx FPGAs also allows developers to future-proof designs through in-field upgradeability, and save thousands of dollars in maintenance costs. High performance signal processing, flexibility and upgradeability make FPGAs the ideal choice for todays wireless and wired infrastructure applications.
www.xilinx.com/dsp
March 2008
Xilinx DSP Benefits for Digital Communications Solutions capable of handling sample rates in radio, IF and base band stages of transmit and receive chains Multi-channel support available on one chip, with parameterizable IP cores supporting digital communication readily available Very low power and cost per channel Low risk through reprogrammability that provides flexibility for faster timeto-market and longer time-in-market
Communication IP Filters FIR Filter Compiler Cascaded Integrator Comb (CIC) MAC FIR Filter FIR Filter using DPRAM FIR Filter, Parallel Distributed Arithmetic Building Blocks Complex Multiplier CORDIC Multiplier Accumulator Multiply Generator Pipelined Divider Sine Cosine Look Up Table Transform FFT up to 64K point FFT, Pipelined (Vectis-QuadSpeed)
LogiCORE
AllianceCORE
Vendor
DSP Algorithms for Digital Communications The Xilinx CORE Generator system generates parameterizable algorithms (delivered as fully supported IP cores) that are optimized for Xilinx FPGAs. Exploiting these parameters allows you to make tradeoffs between performance and silicon area so that you can develop the ideal architecture to suit your algorithms. Use the Xilinx CORE Generator to design high-density designs in Xilinx FPGAs and achieve high performance results while also cutting your design time. The Xilinx CORE Generator system is included in the ISE Foundation Design Tool and comes with an extensive library of Xilinx LogiCORE IP. These include DSP functions, memories, storage elements, math functions and a variety of basic elements. Evaluation versions of more complex system level cores, which can be purchased separately, are also included. Use Xilinx IP to accelerate your time to market with pre-verified IP core functions optimized by expert designers. AllianceCORE products are intellectual property (IP) cores that are developed, sold and supported by our third-party Global Alliance Partners. AllianceCORE certification provides a showcase for the most popular IP cores offered.
FFT, Pipelined (Vectis HiSpeed) Modulation/Demodulation Digital Down Converter (DDC) Digital Up Converter (DUC) Direct Digital Synthesizer Digital Down Converter, High-Speed Wideband (4954-422) Digital Down Converter, Wideband (4954-421) DVB Satellite Modulator (MC-XIL-DVBMOD) Compression 1-D Discrete Cosine Transform 2-D Discrete Cosine Transform (DCT) ADPCM, 1024 Channel Simplex (CS4190) ADPCM, 128 Simplex (CS4125) ADPCM, 16 Simplex (CS4110) ADPCM, 256 Channel Simplex (CS4130) ADPCM, 512 Channel Duplex (CS4180) Discrete Cosine Transform (eDCT) Discrete Cosine Transform, 2D Inverse (IDCT) Discrete Cosine Transform, Combined 2D Forward/Inverse (DCT_FI) Discrete Cosine Transform, Forward 2D (DCT) Discrete Wavelet Transform, Combined 2D Forward/Inverse (RC_2DDWT) Discrete Wavelet Transform, Line-based programmable forward (LB_2DFDWT) Discrete Wavelet Transform (BA113FDWT) Discrete Cosine Transform, forward/inverse 2D (DCT/IDCT 2D) Discrete Wavelet Transform, Inverse (BA114IDWT) Radar Pulse Compression (4954-440)
Amphion Semiconductor, Ltd. Amphion Semiconductor, Ltd. Amphion Semiconductor, Ltd. Amphion Semiconductor, Ltd. Amphion Semiconductor, Ltd. eInfochips Inc. CAST, Inc. CAST, Inc. CAST, Inc. CAST, Inc. CAST, Inc. Barco-Silex Barco-Silex Barco-Silex Pentek, Inc.
March 2008
www.xilinx.com/dsp
Communication IP (Contd) Error Correction Additive White Gaussian Noise (noise source) Convolutional Encoder Interleaver / De-interleaver Reed-Solomon Decoder Reed-Solomon Encoder Turbo Convolutional Code Decoder, CDMA2000/3GPP2 Turbo Convolutional Code Encoder, CDMA2000/3GPP2 UMTS/3GPP Turbo Convolutional Decoder UMTS/3GPP Turbo Convolutional Encoder IEEE 802.16 TPC Encoder IEEE 802.16 TPC Decoder IEEE 802.16 CTC Encoder IEEE 802.16 CTC Decoder Viterbi Decoder Viterbi Decoder, (IEEE 802-Compatible) Reed Solomon Decoder (MC-XIL-RSDEC) Reed Solomon Encoder (MC-XIL-RSENC) Turbo Decoder, 3GPP Turbo Decoder, 3GPP (S3000) Turbo Decoder, DVB-RCS (S2000) Turbo Decoder, DVB-RCS (TC1000) Turbo Encoder, DVB-RCS (S2001) Turbo Product Code Decoder, 160 Mbps (TC3404) Turbo Product Code Decoder, 25 Mbps (TC3000) Turbo Product Code Decoder, 30 Mbps (TC3401) DVB-S.2 Forward Error Correction Encoder Cable Modem 183 Universal Modulator Annex A/C 183 Universal Modulator Annex B Arithmetic Floating-Point Operator
The Xilinx CORE Generator is included in the ISE Foundation Design Tool and comes with an extensive library of Xilinx LogiCORE IP.
CORE Generator software can be accessed from DSP design tools such as System Generator for DSP.
Reference Design Matrix Xilinx also provides unsupported reference designs to help developers and innovators implement solutions and test concepts. Reference designs are delivered in multiple formats such as System Generator models or netlists.
Digital Communication Reference Designs Wireless Open Base Station Architecture Initiative (OBSAI) RP3 Common Public Radio Interface (CPRI) External Memory Interface (EMIF) Random Access Channel (RACH) Searcher High Speed Downlink Packet Access (HSDPA) HSDPA-Symbol Rate HS-DSCH Crest Factor Reduction (UMTS) Digital Up Conversion (DUC) Digital Down Conversion (DDC) WCDMA/WiMax Wired MultiBERT Gigabit System Queue Manager Ethernet Aggregation Mesh Fabric
Xilinx
Alliance Partners
Vendor
www.xilinx.com/dsp
March 2008
DSP SYSTEM SOLUTIONS DSP Wireless/Wired Application Notes Jump start your design with Xilinx application notes that describe specific design examples and methodologies. These application notes prove very helpful in saving valuable time in the design process allowing you to concentrate on differentiating your product in the marketplace. XtremeDSP Development Kit with System Generator for DSP Developed in collaboration with Nallatech, the FPGA computing solutions company, the XtremeDSP Development Kit provides a complete platform for high-performance signal processing applications such as Software Defined Radio, 3G Wireless, etc. The development board works seamlessly with the Xilinx System Generator for DSP tool and allows you to perform hardwarein-the-loop co-simulation so that you can verify your design running on the FPGA itself. Interface to the PC is via PCI bus allowing for high bandwidth co-simulation.
Application Note CDMA2000 and UMTS DUC/DDC implementations for Spartan3/3E WCDMA Reference Design Implementing an ADSL to USB Interface Using Spartan Devices Common Switch Interface CSIX-L1 Reference Design Implementing an ISDN PCMCIA Modem Using Spartan Devices CDMA Matched Filter Implementation in Virtex Devices Configurable LocalLink CRC Reference Design Mixed-Version IP Router (MIR) LFSRs as Functional Blocks in Wireless Applications Digital Up and Down Converters for the CDMA2000 and UMTS Base Stations High-Speed DES and Triple DES Encryptor/Decryptor Mesh Fabric Reference Design MultiBERT IP Toolkit for Serial Backplane Signal Integrity Validation Queue Manager Reference Design SONET Rate Conversion in Virtex-II Pro Devices SONET and OTN Scramblers/Descramblers Word Alignment and SONET/SDH Deframing Dynamic Reconfiguration of RocketIO MGT Attributes RocketIO Transceiver Bit-Error Rate Tester In-Circuit Partial Reconfiguration of RocketIO Attributes An Overview of Multiple CAM Designs in Virtex Family Devices Content Addressable Memory (CAM) in ATM Applications Designing Flexible, Fast CAMs with Virtex Family FPGAs Using Block RAM for High Performance Read/Write CAMs High Performance TCP/IP on Xilinx FPGA Devices Using the Treck Embedded TCP/IP Stack Virtex-II SiberBridge High Performance Multi-Port Memory Controller Gigabit System Reference Design 644-Mhz SDR LVDS Transmitter/Receiver FPGA Interface to the TMSC6000 DSP Platform Using EMIF Gigabit Ethernet Aggregation to SPI-4.2 with Optional GFP-F Adaptation Configurable Physical Coding Sublayer PN Generators Using the SRL Macro Hardware Acceleration of 3GPP Turbo Encoder/Decoder BER Measurement Using System Generator PowerPC Processor with Floating Point Unit for Virtex-4 FX Devices Continuously Variable Fractional Rate Decimator Under Literature Column
Description Hardware Development Tools HW-AFX-FF672-300 Proto Board HW-AFX-FF1152-300 Proto Board XtremeDSP Development Kit for Virtex-4 XtremeDSP Development Kit for Virtex-II Pro Virtex-II Pro ML300 Evaluation Platform Virtex-4 ML403 Embedded Platform Virtex-4 ML402 SX XtremeDSP Evaluation Platform Virtex-4 ML461 Advanced memory Development System Spartan-3 Starter Kit 2VP50 PICMG ATCA Design Kit 2VP70 PICMG ATCA Design Kit JTAG Emulators Parallel Cable IV Platform Cable USB Software Development Tools ISE Foundation System Generator for DSP 2VP70 PICMG ATCA Design Kit AccelDSP Synthesis Development Option, AccelDSP Synthesis Development Option, AccelWare Communications Toolkit Development Option, AccelWare Advanced Math Toolkit Development Option, AccelDSP Synthesis with AccelWare DSP IP Toolkits
SYSTEM
SOLUTIONS
Literature Number XAPP569 XAPP921c XAPP171 XAPP289 XAPP170 XAPP212 XAPP562 XAPP655 XAPP220 XAPP569 XAPP270 XAPP698 XAPP537 XAPP511 XAPP649 XAPP651 XAPP652 XAPP660 XAPP661 XAPP662 XAPP201 XAPP202 XAPP203 XAPP204 XAPP546 XAPP254 XAPP535 XAPP536 XAPP622 XAPP753 XAPP695 XAPP759 XAPP211 XAPP948 XAPP547 XAPP936
Part Number HW-AFX-FF672-300 HW-AFX-FF1152-300 DO-DI-DSP-DK4 DO-DI-DSP-DK2PRO DO-V2P-ML300 HW-V4-ML403 HW-V4-ML402 HW-V4-ML461 DO-SPAR3-DK ADS-XLX-ATCA-DEVP50 ADS-XLX-ATCA-DEVP70 HW-PC4 HW-USB
Hardware and Software Development Tools Xilinx has a wide range of development tools available that enable quick movement through the DSP-based application design process. These development tools are designed to enable developers and innovators to bring new products to market fast and turn ideas into reality.
March 2008
www.xilinx.com/dsp
DSP for MVI Applications MVI technologies provide the foundation to serve applications in many markets. Whether you are designing CAT scanners for imaging or head-ends for broadcast systems, Xilinx FPGAs provide the performance you need.
www.xilinx.com/dsp
March 2008
Xilinx DSP Benefits for MVI Applications Solutions capable of handling high performance needed for real-time video applications. Examples include high definition encoding, multiple video streaming channels and support for very high frame rates Very low power and cost per channel Low risk through reprogrammability that provides flexibility for faster timeto-market and longer time-in-market Product differentiation through integrating other system features such as SDI interfaces for broadcast and Serial Rapid IO
Video & Imaging IP Color Space Conversion, RGB2YCrCb NTSC Color Separator (NTSC-COSEP) PCI to HDTV using FPGA and shared RAM SDVO: Next Generation High-Speed Serial Digital Video Interface UXGA Video Controller, 1600x1200 MPEG-2 HDTV I & P Encoder (DV1 HDTV) MPEG-2 SDTV I & P Encoder (DV1 SDTV) MPEG-2 Video Decoder (CS6651) MPEG-4 Video Compression Decoder MPEG-4 Video Compression Encoder MPEG-4 Video Compression Decoder MPEG-4 Video Compression Encoder MPEG-2 HD Decoder JPEG Encoder JPEG 2000 Decoder (BA111JPEG2000D) JPEG 2000 Encoder (BA112JPEG2000E) JPEG Fast Codec (JPEG_FAST_C) JPEG 2000 Encoder (JPEG2K_E)
LogiCORE
AllianceCORE
Venue CAST, Inc. Pinpoint Solutions, Inc. Colorado Electroni Product Design, Inc. ExaLinx, Inc. Synchronous Design, Inc. Duma Video, Inc. Duma Video, Inc. Amphion Semiconductor, Ltd 4i2i Communications Ltd 4i2i Communications Ltd
Barco-Silex Barco-Silex CAST, Inc. CAST, Inc. Barco-Silex CAST, Inc. CAST, Inc. Barco-Silex Amphion Semiconductor, Ltd Amphion Semiconductor, Ltd Amphion Semiconductor, Ltd 4i2i Communications Ltd 4i2i Communications Ltd
MVI DSP Algorithms The Xilinx CORE Generator software generates parameterizable algorithms (delivered as IP cores) that are optimized for Xilinx FPGAs. Exploiting these parameters allows you to make tradeoffs between performance and silicon area so that you can develop the ideal architecture to suit your algorithms. Use the Xilinx CORE Generator to design highdensity designs in Xilinx FPGAs and achieve high-performance results while also cutting your design time. The Xilinx CORE Generator system is included in the ISE Foundation Design Tool and comes with an extensive library of Xilinx LogiCORE IP. These include DSP functions, memories, storage elements, math functions and a variety of basic elements. Evaluation versions of more complex system level cores, which can be purchased separately, are also included. Use Xilinx IP to accelerate your time to market with pre-verified IP core functions optimized by expert designers. AllianceCORE products are intellectual property (IP) cores that are developed, sold and supported by our third-party Global Alliance Partners. AllianceCORE certification provides a showcase for the most popular IP cores offered.
JPEG, Fast color image decoder (FASTJPEG C DECODER) JPEG, Fast Decoder (JPEG_FAST_D) JPEG, Fast Encoder (JPEG_FAST_E) JPEG, Fast gray scale image decoder (FASTJPEG BW DECODER) JPEG, Motion Codec V1.0 (CS6190) JPEG, Motion Decoder (CS6150) JPEG, Motion Encoder (CS6100) Motion JPEG Decoder (JPEG Decoder) Motion JPEG Encoder (JPEG Encoder) 1-D Discrete Cosine Transform 2-D Discrete Cosine Transform 2-D Inverse Discrete Cosine Transform Combined 2-D Forward/Inverse Discrete Cosine Transform 2-D Forward/Inverse Discrete Cosine Transform Discrete Cosine Transform (eDCT) Combined 2-D Forward/Inverse Discrete Wavelet Transform (RC_2DDWT) Discrete Wavelet Transform (BA113FDWT) Discrete Wavelet Transform Inverse (BA114IDWT) Discrete Wavelet Transform Line-based programmable forward (LB 2DFDWT) H.264 Video Compression-MPEG-4/AVC Encoding Huffman Decoder (HUFFD) Compact Video Controller
CAST, Inc. CAST, Inc. Barco-Silex eInfochips Inc. CAST, Inc. Barco-Silex Barco-Silex CAST, Inc. Ateme SA CAST, Inc. Xylon d.o.o
March 2008
www.xilinx.com/dsp
MVI Application Notes Jump start your design with Xilinx application notes that describe specific design examples and methodologies. These applications prove very helpful in saving valuable time in the design process allowing you to concentrate on differentiating your product in the marketplace.
Application Note Serial Digital Interface (SDI) Video Encoder Serial Digital Interface (SDI) Video Decoder I2C Video Peripheral Loader SDI : Ancillary Data & EDH Processor SDI : Physical Layer Implementation DVB-ASI Physical Layer Implementation 10 Gb/s Serial Digital Video Aggregation Digital Video Test Pattern Generators Virtex-EM FIR Filter for Video Applications v1.1 (10/00) Efficient Math for Video in Virtex Devices The Design of a Video Capture Board Using the Spartan Series Color Space Conversion: YCrCb to RGB Color Space Converter: RGB to YCbCr DCT - Transforming Image Blocks from Spatial Domain to Transform Domain IDCT - Transforming Image Blocks from Transform Domain to Spatial Domain HDTV Video Pattern Generator Color-Space Converter: RGB to YCrCb Color-Space Converter: YCrCb to RGB Chroma Resampler Two-Dimensional Linear Filtering (2D FIR) Video Virtual Socket Architecture PowerPC Processor with Floating Point Unit for Virtex-4 Device Literature Number XAPP298 XAPP288 XAPP293 XAPP299 XAPP247 XAPP509 XAPP543 XAPP248 XAPP241 XAPP249 XAPP172 XAPP283 XAPP637 XAPP610 XAPP611 XAPP682 XAPP930 XAPP931 XAPP932 XAPP933 XAPP919 XAPP547
Virtex-II XLVDS Demonstration Board XtremeDSP Development Kit for Virtex-4 Virtex-4 ML403 Embedded Platform Virtex-4 ML402 SX XtremeDSP Evaluation Platform Spartan-3 Starter Kit Video co-processing Kit XEVM642 Video Starter Kit Virtex-4SX35 JTAG Emulators Parallel Cable IV Platform Cable USB Software Development Tools ISE Foundation System Generator for DSP AccelChip DSP Synthesis Development Option, AccelDSP Synthesis Development Option, AccelWare Communications Toolkit Development Option, AccelWare Advanced Math Toolkit Development Option, AccelDSP Synthesis with AccelWare DSP IP Toolkits DO-ACDSP-F-PC DO-AWCMT-F-PC DO-AWAMT-F-PC DO-ACALL-F-PC DS-SYSGEN-4SL-PC HW-PC4 HW-USB HW-V2-XLVDS DO-DI-DSP-DK4 HW-V4-ML403 HW-V4-ML402 DO-SPAR3-DK HW-XEVM642-SX35 HW-V4SX35-VIDEO-SK1 Description Hardware Development Tools Part Number
MVI White Papers The Digital Video White Papers provide a system level overview of various end-equipment. The White papers contain supporting information to aid your development process when using Xilinx products.
White Papers
Wavelet Characteristics What Wavelet Should I Use Minimum Multiplicative Complexity Implementation of the 2-D DCT using Xilinx FPGAs Multirate Filters and Wavelets: From Theory to Implementation Filtering in the Wavelet Transform Domain Real Time Image Rotation and Resizing Algorithms and Implementations FPGA Implementation of Adaptive Temporal Kalman Filter for Real Time Video Filtering FPGA Implementation of a Nonlinear Two Dimensional Fuzzy Filter FPGA Interpolators Using Polynomial Filters Issues on Medical Image Enhancement
MVI Systems Hardware and Software Development Tools Xilinx has a wide range of development tools available that enable quick movement through the DSP-based application design process. These development tools are designed to enable developers and innovators to bring new products to market fast and turn ideas into reality.
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www.xilinx.com/dsp
March 2008
XtremeDSP Video Starter Kit Spartan-3A DSP Edition The XtremeDSP Video Starter Kit Spartan-3A Edition is a video development platform consisting of the Spartan-3A DSP 3400 Development Platform, the FMC-Video daughter card and a VGA camera. The Spartan-3A DSP 3400A development Platform, which can be purchased separately, is built around the Spartan3A DSP XC3SD3400A device that provides 126 embedded DSP blocks for implementing high performance video processing systems and co-processors and DVI in and DVI out video ports. An FMC-Video daughter card is included and extends the video capabilities of the Spartan-3A DSP 3400A development platform to also include the following additional interfaces: DVI-I Input, both digital and analog Composite input S-video input 2 camera inputs Composite output S-video output
The Video Starter Kit includes the Xilinx design software tools Embedded Development Kit (EDK) and System Generator for DSP that can be used to create video applications without prior RTL knowledge or experience. Three reference designs and a library of video IP are provided to jumpstart the development process.
Performance Acceleration for DSP Video Processors FPGAs are being used in many ways to complement DSP processors. Examples include: Performance acceleration in the signal chain Connect directly to TI DSP Processor via EMIF or serial RapidIO interface Consolidate system logic into FPGA Implement New Peripheral or bus interface using FPGA With over 350 GMACs of horsepower, Xilinx FPGAs can also be used as pre-processors or post-processors for DSP processors like the Texas Instruments DM642. Using an FPGA co-processor, you can enhance the capabilities of your DSP video co-processor in many ways including: Integrating more video channels Building advanced codecs (e.g. H.264) Increasing the resolution to support SD or HD rates Integrating more modes
Benefits of using FPGAs as DSP co-processors for video applications
March 2008
www.xilinx.com/dsp
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Defense Systems
Defense Systems Overview
Target Markets Military Communications Intelligence Electronic Warfare Sensors Target Applications Cognitive & Software Defined Radio Military Satellite Terminals Smart Antenna (Direction Finding/Beamforming) Communications Infrastructure Wideband Analysis Electronic Countermeasures Radar Sonar Defense Systems Overview Defense communication and intelligence systems are migrating from legacy stovepipe architectures to Software Defined Radios (SDR) that can be dynamically reconfigured based on mission requirements. These SDR platforms must support both legacy waveforms for voice and low-speed data as well as new wideband waveforms providing high-speed data and multimedia content. This is enabled by new and extremely fast FPGAs, such as the Virtex family, that are designed for reprogrammable, high performance, signal processing. Phased Array Radar systems are required to perform many sophisticated signal processing tasks, including wideband digital down conversion, channel equalization, beamforming and pulse compression. While there are various silicon alternatives available for implementing these functions, such as DSP processors and General Purpose Processors (GPPs), often Xilinx FPGAs are the preferred solution due to their parallel processing ability, thereby significantly reducing system cost and power consumption. Electronics Countermeasures (EC) systems need to identify the signal of interest and jam it. These systems are required to perform wideband digital down conversion, FFTs, signal detection, and target correlation and may include electronic beam steering to optimize the jamming energy at the target receiver. Xilinx FPGAs are uniquely positioned to meet the DSP requirements demanded by EC. With advanced process technology, Xilinx high-density Virtex-5 FPGA devices makes them low in static, dynamic and inrush power, enabling customers to design systems with smaller supply circuitry and simpler system thermal design, resulting in lower power and system cost.
Building Cost and Power Efficient SDR Xilinx FPGAs are commonly used in demanding applications such as software defined radio (SDR). SDR solutions require high data sample rates and channel integration, creating the need for very highperformance, yet fully programmable, digital signal processing designs that are enabled by Virtex-5, Virtex-4, and Virtex-II Pro FPGAs. With over 350 GMACs of performance, the signal processing capability of these devices are highly suitable for many of todays demanding realtime defense applications. Xilinx has a wide range of enabling technologies that can help reduce the power consumption and cost of your system, an example of which is illustrated below.
The dedicated resources model pictured above results in: Higher Power Cost Limited Scalability
The shared resources model pictured above is a more desirable modem architecture Lower Power Cost Greater Efficiency, Scalability
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www.xilinx.com/dsp
March 2008
The SFF SDR Development Platform The Small Form Factor (SFF) Software-defined Radio (SDR) Development Platform is a unique new product that addresses the special portable SDR needs of military, public safety, and commercial markets. It was designed around the TI TMS320DM6446 digital media processor DSP and Xilinx Virtex-4 SX35 FPGA as a low-cost, off-the-shelf, integrated hardware and software development solution for engineers who need a SCA-compliant low power coprocessing modem development platform. This platform enables users to experiment and make educated waveform partitioning decisions based on power and performance while abstracting the complexities of of the DSP/FPGA coprocessing interface. The SFF SDR Development Platform is separated into three distinct modules the Digital Processing Module, Data Conversion Module, and RF Module offering developers highly flexible development capabilities. The SFF SDR Development Platform is part of the SFF SDR family, which also includes: SFF SDR Evaluation module: a limited feature version of the SFF SDR Development Platform for digital processing only, without conversion capabilities, the SCA framework, CORBA nor the model-based design kit board support package. SFF SCA Development Platform: SCA-enabled version of the SFF SDR Development Platform, with the first CORBA-enabled FPGA on an SCA platform.
ITAR Compliance Xilinx compliance with International Traffic in Capital Arms Regulations (ITARs) meaning we can accept, develop and market designs and products that meet the requirements as set out in the Federal Code of Regulations. ITARs products can be handled by U.S. citizens.
March 2008
www.xilinx.com/dsp
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Xilinx DSP Benefits for Defense Systems With 15+ years uninterrupted experience in the Defense Industry, Xilinx understands the various dynamics and risks facing designers in the industry, including longer life cycles as well as substantial costs and loss of reputation associated with mission failure. Xilinxs focus is on providing solutions that address your SWAPC concerns - Size, Weight, And Power, and Cost. Xilinx is combining innovative technologies, such as partial reconfiguration and SCA-enabled SoCs, with systems-level domain expertise to identify ways to reduce SWAPC in your MILCOM, Intelligence, EW, radar or sonar system. The Xilinx XtremeDSP solution provides the performance, flexibility, productivity as well as lower costs for long life cycle applications you need. Parameterizable algorithms and third party development boards enable you to get to market quickly by using proven technologies. Elements of the XtremeDSP Solution that are particularly suited for defense applications include:
Advanced FPGAs for signal processing that support - High-sample rate applications such as multi-channel DUC/DDC for radar - A combination of complex and real data types - Integer and floating point data representa- Defense Systems IP tions and computation Filters - Low enough power for handheld and Cascaded Integrator Comb (CIC) manpack wideband SDR radios Distributed Arithmetic FIR Filter MAC FIR Filter - Partial reconfiguration that allows for FIR Filter using DPRAM more functionality to be time shared in FIR Filter, Parallel Distributed Arithmetic a smaller device, thus reducing system Building Blocks cost and power Complex Multiplier - Easy and efficient support for floating CORDIC point operations using 18x25 DSP48E Multiplier Accumulator slices (Virtex-5 only) algorithms Multiply Generator - Reprogramabality to reduce design risk Pipelined Divider and lower field upgrade costs Sine Cosine Look Up Table
Transform
Xilinx Algorithms The Xilinx CORE Generator software generates parameterizable algorithms (delivered as fully supported IP cores) that are optimized for Xilinx FPGAs. Exploiting these parameters allows you to make tradeoffs between performance and silicon area so that you can develop the ideal architecture to suit your algorithms. Use the Xilinx CORE Generator System to design high-density designs in Xilinx FPGAs and achieve high performance results while also cutting your design time. The Xilinx CORE Generator system is included in the ISE Foundation Design Tool and comes with an extensive library of Xilinx LogiCORE IP. These include DSP functions, memories, storage elements, math functions and a variety of basic elements. Evaluation versions of more complex system level cores, which can be purchased separately, are also included. Use Xilinx IP to accelerate your time to market with pre-verified IP core functions optimized by expert designers. AllianceCORE products are intellectual property (IP) cores that are developed, sold and supported by our third-party Global Alliance Partners. AllianceCORE certification provides a showcase for the most popular IP cores offered.
LogiCORE
AllianceCORE
Vendor
World Class Development tools 2-D Discrete Cosine Transform (DCT) - Algorithms and IP cores for advanced FFT up to 64K points functions such as floating point FFTs for FFT, Pipelined (Vectis-QuadSpeed) expanding dynamic range, working in FFT, Pipelined (Vectis HiSpeed) high noise environments and sensitive Modulation/Demodulation processing applications Digital Down Converter (DDC) - Software tools that let you design in the Digital Up Converter language that best tackles the problem at Direct Digital Synthesizer hand. Examples include MATLAB, Digital Down Converter, High-Speed Wideband (4954-422) Simulink, VHDL, Verilog, RTL, C or a Digital Down Converter, Wideband (4954-421) combination of these DVB Satellite Modulator (MC-XIL-DVBMOD) - Development platforms such as JTRS SDR kits that let you move rapidly from prototype to production 14
XtremeDSP Selection Guide www.xilinx.com/dsp
March 2008
Defense Systems IP (cont.) Compression 1-D Discrete Cosine Transform 2-D Discrete Cosine Transform (DCT) ADPCM, 1024 Channel Simplex (CS4190) ADPCM, 128 Simplex (CS4125) ADPCM, 16 Simplex (CS4110) ADPCM, 256 Channel Simplex (CS4130) ADPCM, 512 Channel Duplex (CS4180) Discrete Cosine Transform (eDCT) Discrete Cosine Transform, 2D Inverse (IDCT) Discrete Cosine Transform, Combined 2D Forward/Inverse (DCT_FI) Discrete Cosine Transform, Forward 2D (DCT) Discrete Wavelet Transform, Combined 2D Forward/Inverse (RC_2DDWT) Discrete Wavelet Transform, Line-based programmable forward (LB_2DFDWT) Discrete Wavelet Transform (BA113FDWT) Discrete Cosine Transform, forward/inverse 2D (DCT/IDCT 2D) Discrete Wavelet Transform, Inverse (BA114IDWT) Radar Pulse Compression (4954-440) Error Correction Additive White Gaussian Noise Convolutional Encoder Interleaver / De-interleaver Reed-Solomon Decoder Reed-Solomon Encoder AEHF Turbo Convolutional Code Decoder AEHF Turbo Convolutional Code Encoder UMTS/3GPP Turbo Convolutional Decoder UMTS/3GPP Turbo Convolutional Encoder IEEE 802.16 TPC Encoder IEEE 802.16 TPC Decoder Turbo Product Code (TPC) Decoder Turbo Product Code (TPC) Encoder Viterbi Decoder Viterbi Decoder, (IEEE 802-Compatible) Reed Solomon Decoder (MC-XIL-RSDEC) Reed Solomon Encoder (MC-XIL-RSENC) Turbo Decoder, 3GPP Turbo Decoder, 3GPP (S3000) Turbo Decoder, DVB-RCS (S2000) Turbo Decoder, DVB-RCS (TC1000) Turbo Encoder, DVB-RCS (S2001) Turbo Product Code Decoder, 160 Mbps (TC3404) Turbo Product Code Decoder, 25 Mbps (TC3000) Turbo Product Code Decoder, 30 Mbps (TC3401) Arithmetic Floating-Point Operator
LogiCORE
AllianceCORE
Vendor
Amphion Semiconductor, Ltd. Amphion Semiconductor, Ltd. Amphion Semiconductor, Ltd. Amphion Semiconductor, Ltd. Amphion Semiconductor, Ltd. eInfochips Inc. CAST, Inc. CAST, Inc. CAST, Inc. CAST, Inc. CAST, Inc. Barco-Silex Barco-Silex Barco-Silex Pentek, Inc.
Parameterizable algorithms, and third party development boards enable you to get to market quickly by using proven technologies.
Memec Design Memec Design SysOnChip, Inc. iCoding Technology, Inc. iCoding Technology, Inc. TurboConcept iCoding Technology, Inc. TurboConcept TurboConcept TurboConcept
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Reference Designs Matrix Xilinx also provides unsupported reference designs to help developers and innovators implement solutions quickly. Our reference designs include the documentation you need to reproduce designs. These reference designs have been built and tested as documented.
Defense Systems Reference Designs Analog and Signal Integrity Analysis for Flight Simulator External Memory Interface (EMIF) Complete Radar processing on single FPGA Xilinx Dillon Engineering, Inc Alliance Partners Vendor NUVATION
Defense Systems Application Notes Jump start your design with Xilinx application notes that describe a specific design examples and methodologies. These applications prove very helpful in saving valuable time in the design process allowing you to concentrate on differentiating your product in the marketplace.
Application Notes Implementing an ADSL to USB Interface Using Spartan Devices Common Switch Interface CSIX-L1 Reference Design Implementing an ISDN PCMCIA Modem Using Spartan Devices Gigabit System Reference Design PN Generators Using the SRL Macro CDMA Matched Filter Implementation in Virtex Devices Configurable LocalLink CRC Reference Design Gold Code Generators in Virtex Devices Mixed-Version IP Router (MIR) LFSRs as Functional Blocks in Wireless Applications Digital Up and Down Converters for the CDMA2000 and UMTS Base Stations Two Flows for Partial Reconfiguration: Module Based or Difference Based FPGA Interface to the TMSC6000 DSP Platform Using EMIF High Speed DES and Triple DES Encryptor/Decryptor Partial Reconfiguration RLDRAMII Memory Interface for Virtex-5 FPGAs Literature Number XAPP171 XAPP289 XAPP170 XAPP536 XAPP211 XAPP212 XAPP562 XAPP217 XAPP655 XAPP220 XAPP569 XAPP290 XAPP753 XAPP270 XAPP746 XAPP852
Xilinx Everywhere Product Grades Xilinx supports the widest range of FPGAs for Aerospace and Defense in the industry. Xilinx has solutions for the challenges facing designers of aerospace and defense systems from space to base. Xilinx offers a wide range of product grades: from commercial to Mil-Temp QPRO devices. The Xilinx QPRO family addresses the issues that are critical to the aerospace and defense market: QML/Best commercial practices. Commercial manufacturing strengths result in more efficient process flows Performance-based solutions, including cost-effective plastic packages Reliability of supply. Controlled mask sets and processes insure the same quality devices, every time, without variation, which remain in production for an extended time Off-the-shelf ASIC solutions. Standard devices readily available, no need for custom logic and gate arrays
Defense Systems Hardware and Software Development Tools Xilinx has a wide range of development tools available that enable quick movement through the DSP-based application design process. These development tools are designed to enable developers and innovators to bring new products to market fast and turn ideas into reality.
Description Hardware Development Tools XtremeDSP Development Kit for Virtex-4 XtremeDSP Development Kit for Virtex-II Pro Virtex-II Pro ML300 Evaluation Platform Virtex-4 ML403 Embedded Platform Virtex-4 ML402 SX XtremeDSP Evaluation Platform Virtex-5 SXT ML506 Evaluation Platform Virtex-4 ML461 Advanced Memory Development System Spartan-3 Starter Kit XtremeDSP Development Platform Spartan-3A DSP 3400A Edition XtremeDSP Starter Platform Spartan-3A DSP 1800A Edition JTAG Emulators Parallel Cable IV Platform Cable USB Software Development Tools ISE Foundation System Generator for DSP AccelDSP Synthesis Development Option, AccelDSP Synthesis Development Option, AccelWare Communications Toolkit Development Option, AccelWare Advanced Math Toolkit Development Option, AccelDSP Synthesis with AccelWare DSP IP Toolkits Part Number DO-DI-DSP-DK4 DO-DI-DSP-DK2PRO DO-V2P-ML300 HW-V4-ML403 HW-V4-ML402 HW-V5-ML506-UNI-G HW-V4-ML461 DO-SPAR3-DK HW-SD3400A-DSP-DB-UNI-G HW-SD1800A-DSP-SB-UNI-GP HW-PC4 HW-USB
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XtremeDSP Devices
Overview XtremeDSP Device portfolio fills the performance gap created by the growth in algorithmic complexity and limitation of sequential processors in wireless, multimedia, video imaging, and defense systems markets. The XtremeDSP platform portfolio, comprised of two series - Virtex-DSP and Spartan-DSP, provides the range of price, performance, power efficiency, bandwidth and I/O to satisfy a broad spectrum of application requirements within the communications, MVI (multimedia, video and imaging) and Defense Systems. Industry-Proven Highest Performance DSP Over 350 billion multiply-accumulate operations per second (GMAC/s) Parallelism with distributed memory enables sample rate to equal the clock rate up to 550 mega samples per second (MSPS) in Virtex-5 SXT devices and 250 MSPS in Spartan-3A DSP devices (slow speed grade) High internal memory bandwidth - 1.5 to 19.3 Gbps (not including distributed memory)
*Algorithmic Complexity: - As demand for processing power rapidly increases, sequential processing cannot support algorithmic complexities within required response times. To overcome these architectural limitations, the parallel processing offered by XtremeDSP devices is essential.
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DSP DEVICES
Virtex-DSP
Virtex-4 SX 4VSX25 642 4,6082 500 2 128 27x27 160 2,304 23,040
120 x 1+ Gb/s LVDS pairs
Virtex-5 SXT 4VSX55 2562 11,5202 500 2 512 27x27 384 5,760 55,296
360 x 1+ Gb/s LVDS pairs
1 2 *
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DSP DEVICES
Virtex-5 Family The Virtex-5 family of FPGAs offers a choice of four new platforms, each delivering an optimized balance of high-performance logic, serial connectivity, signal processing, and embedded processing. Three platforms are available now: LX Optimized for high-performance logic LXT Optimized for high-performance logic with low-power serial connectivity SXT Optimized for DSP and memory intensive applications with low-power serial connectivity .
Virtex-4 & 5 Platforms Based on your system requirements, choose the platform that best fits the application.
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DSP DEVICES
Spartan-3A DSP
Breakthrough Price for High-Performance DSP
Spartan-3A DSP
Breakthrough in Price for High Performance DSP The new Spartan-3A DSP platform is ideal for cost sensitive DSP algorithmic and co-processing applications requiring significant DSP performance. The new Spartan-3A DSP platform consists of 2 devices, the 3SD3400A and the 3SD1800A. The 3SD3400A delivers over 30 GMAC/s (30 billion multiply accumulate operations per second) and up to 2,200 Mbps memory bandwidth at a volume price starting at under $45* while the 3SD1800A delivers over 20 GMAC/s for under $30* in a small-footprint package. Now Power Efficient Introducing Spartan 3A DSP power efficient line of devices, these devices deliver 4.06 GMACs per mW of high performance signal processing capability to competing devices in this class. Spartan 3A DSP power efficient devices deliver a 50% static power savings, and a 70% savings while in suspend mode, compared to the non-low power devices. Dynamic power in Spartan-3A DSP devices is inherently low because of the dedicated DSP 48A slices. This represents an unprecedented price/performance and power efficiency breakthrough that hits the mark for price and energy sensitive applications such as digital front-end (DFE) and baseband solutions in a single-channel pico-cell wireless base station, mobile tactical radios, MILCOM portable, portable medical systems, driver assistance/media systems, HD video and Smart IP cameras and motor/motion control.
*25K units/yr in late 2008
Target Applications Picocell /Femto Basestations Video Surveillance Consumer Video Milcom Portable Mounted Software Defined Radio
PN 0010829 -1
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DSP DEVICES
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DSP DEVICES
XtremeDSP DSP48 Slices for the Virtex-4 family DSP48 slices are available in all Virtex-4 family members to accelerate algorithms and solve complex DSP challenges. They provide: 500MHz performance independently or when combined within a column to implement DSP functions 2.3 mW/100 MHz power consumption per slice, at a typical toggle rate of 38% Support for over 40 dynamically controlled operating modes including; multiplier, multiplier-accumulator, multiplier adder/ subtracter, three input adder, barrel shifter, wide bus multiplexers, or wide counters DSP48 slice cascading without using device fabric or routing resources to perform wide math functions, DSP filters, and complex arithmetic XtremeDSP DSP48 Slice Highlights 18-bit by 18-bit, two's complement multiplier with full precision 36-bit result, sign extended to 48 bits Three input, flexible 48-bit adder/subtracter with optional registered accumulation feedback Over 40 dynamic user-controller operating modes to adapt XtremeDSP Slice functions from clock cycle to clock cycle Cascading, 18-bit B bus, supporting input sample propagation Cascading, 48-bit P bus, supporting output propagation of partial results Multi-precision multiplier and arithmetic support with 17-bit operand right shift to align wide multiplier partial products (parallel or sequential multiplication) Symmetric intelligent rounding support for greater computational accuracy Performance-enhancing pipeline options for control and data signals are selectable by configuration bits Input port "C" typically used for multiply, add, large three-operand addition or flexible rounding mode Separate reset and clock enable for control and data registers 22
XtremeDSP Selection Guide
Over 40 dynamic user-controller operating modes 18-bit B cascade routing New 30-bit A cascade routing
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DSP DEVICES
XtremeDSP Slice Highlights 18-bit by 18-bit, two's complement multplier with full precision 36-bit result, sign extended to 48 bits Pre-adder saves 9 logic slices per DSP48A used Two input, flexible 48-bit adder/subtracter with optional registered accumulation feedback Cascading, 18-bit B bus, supporting input sample propagation Cascading, 48-bit P bus, supporting output propagation of partial results Multi-precision multiplier and arithmetic support with 17-bit operand right shift to align wide multiplier partial products (parallel or sequential multiplication) Symmetric intelligent rounding support for greater computational accuracy Performance-enhancing pipeline options for control and data signals are selectable by configuration bits Input port "C" typically used for multiply, add, large three-operand addition or flexible rounding mode Separate reset and clock enable for control and data registers Design Optimal FIR Filters Quickly The easiest way to implement designs to exploit the full power of the XtremeDSP Slices is to use the new FIR compiler or the Xilinx System Generator for DSP design tool. The FIR compiler will help you to optimize performance, power and cost.
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DSP DEVICES
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DEVELOPMENT DSP
TOOLS
HARDWARE SOLUTIONS
SYSTEM
XtremeDSP Starter Kit Spartan 3A DSP 1800A Edition This low cost introductory design solution includes Xilinx System Generator for DSP, reference designs and ISE design tools supporting industry-standard peripherals, connectors and interfaces. Designed for use with the Xilinx System Generator for DSP development platform, the Spartan-3A DSP Development Platform provides a ideal environment for developing signal processing designs based on the Spartan-3A DSP device.
XtremeDSP Development Platform Spartan-3A DSP 3400A Edition This low cost development platform is designed for use with the Xilinx System Generator for DSP and ISE design tools supporting industry-standard peripherals, connectors and interfaces. This platform delivers instant access to the Spartan-3A DSP family capabilities and is ideal for General Prototyping, Embedded Processing, Digital Video, DSP Co-Processing and Digital Communications applications. It was developed to help designers and system architects deal with the design challenges in a wide variety of markets including wireless, automotive, consumer, multimedia, video imaging, industrial, medical, military/aerospace, servers, storage and telecom/datacom.
XtremeDSP Starter Platform Spartan-3A DSP 3400A Edition
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DEVELOPMENT
Xilinx DSP Development Boards
Xilinx Part Number Digital Communication (Wired/Wireless) DO-DI-DSP-DK2PRO DO-DI-DSP-DK2PRO-SG DO-DI-DSP-DK4 DO-DI-DSP-DK4-SG HW-AFX-FF672-300 HW-AFX-FF1152-300 DO-V2P-ML300 HW-V4-ML403 HW-V4-ML402 ADS-XLX-ATCA-DEVP50 ADS-XLX-ATCA-DEVP70 Multimedia, Video and Imaging HW-V2-XLVDS DO-DI-DSP-DK2PRO DO-DI-DSP-DK2PRO-SG DO-DI-DSP-DK4 DO-DI-DSP-DK4-SG HW-V4-ML403 HW-V4-ML402 DO-SPAR3-DK HW-V4SX35-VIDEO-SK HW-X61-VIDEO Aerospace and Defense DO-DI-DSP-DK2PRO DO-DI-DSP-DK2PRO-SG DO-DI-DSP-DK4 DO-DI-DSP-DK4-SG HW-AFX-FF672-300 HW-AFX-FF1152-300 DO-V2P-ML300 HW-V4-ML403 HW-V4-ML402 General Purpose Signal Processing HW-V4-ML402 HW-V5-ML506-UNI-G DO-SPAR3-DK HW-SD3400A-DSP-DB-UNI-G HW-SD1800A-DSP-SB-UNI-G
TOOLS
HARDWARE
Tool Description XtremeDSP Development Kit for Virtex-II Pro XtremeDSP Development Kit for Virtex-II Pro with System Generator tool XtremeDSP Development Kit for Virtex-4 XtremeDSP Development Kit for Virtex-4 with System Generator tool HW-AFX-FF672-300 Proto Board HW-AFX-FF1152-300 Proto Board Virtex-II Pro ML300 Evaluation Platform Virtex-4 ML403 Embedded Platform Virtex-4 ML402 SX XtremeDSP Evaluation Platform 2VP50 PICMG ATCA Design Kit 2VP70 PICMG ATCA Design Kit Virtex-II XLVDS Demonstration Board XtremeDSP Development Kit for Virtex-II Pro XtremeDSP Development Kit for Virtex-II Pro with System Generator tool XtremeDSP Development Kit for Virtex-4 XtremeDSP Development Kit for Virtex-4 with System Generator tool Virtex-4 ML403 Embedded Platform Virtex-4 ML402 SX XtremeDSP Evaluation Platform Spartan-3 Starter Kit Virtex-4 Video Starter Kit VIDEO 10 Daughter Card XtremeDSP Development Kit for Virtex-II Pro XtremeDSP Development Kit for Virtex-II Pro with System Generator tool XtremeDSP Development Kit for Virtex-4 XtremeDSP Development Kit for Virtex-4 with System Generator tool HW-AFX-FF672-300 Proto Board HW-AFX-FF1152-300 Proto Board Virtex-II Pro ML300 Evaluation Platform Virtex-4 ML403 Embedded Platform Virtex-4 ML402 SX XtremeDSP Evaluation Platform ML402 XtremeDSP Evaluation Platform Virtex-5 XST Evaluation Platform Spartan-3 Starter Kit XtremeDSP Development Platform Spartan-3A DSP 3400A Edition XtremeDSP Starter Platform Spartan-3A DSP 1800A Edition
Devices Supported Virtex-II Pro Virtex-II Pro Virtex-4 Virtex-4 Virtex-4 Virtex-4 Virtex-II Pro Virtex-4 Virtex-4 Virtex-II Pro Virtex-II Pro Virtex-II Virtex-II Pro Virtex-II Pro Virtex-4 Virtex-4 Virtex-4 Virtex-4 Spartan-3/3E Virtex-4 Virtex-4 Virtex-II Pro Virtex-II Pro Virtex-4 Virtex-4 Virtex-4 Virtex-4 Virtex-II Pro Virtex-4 Virtex-4 Virtex-4 Virtex-5 SXT Spartan-3/3E Spartan-3A DSP Spartan-3A DSP
Virtex-II/II Pro Virtex 4 Virtex-II/II Pro Virtex-II/II Pro and Virtex-4 Virtex-II/II Pro Virtex-II/II Pro and Virtex 4 Virtex-II/II Pro Virtex-II/II Pro and Virtex 4 Virtex-II/II Pro Virtex-II/II Pro Virtex-II/II Pro and Spartan-3/3E Virtex-II/II Pro Virtex-II/II Pro and Virtex 4 Virtex-II/II Pro Virtex-II/II Pro Virtex 4 Virtex-II/II Pro Virtex-II/II Pro Virtex-II/II Pro Virtex-II/II Pro and Virtex 4 Virtex-II/II Pro Virtex-II/II Pro and Virtex 4 Virtex-II/II Pro and Virtex-4 Virtex-II/II Pro Virtex-II/II Pro and Spartan-3/3E Virtex-II/II Pro and Virtex 4 Virtex-II/II Pro and Virtex-4 Virtex-II/II Pro Virtex-II/II Pro, Virtex 4 and Spartan-3/3E Virtex-II/II Pro Virtex-II/II Pro and Spartan-3/3E Virtex-II/II Pro
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Algorithm Design Accelerate Simulink algorithms in FPGAs without knowledge of Hardware design techniques
Hardware Design Automated verification and debug environment for DSP FPGAs
System Design
DSP hardware platforms, traditionally based on processors running algorithms developed in C, have been migrating towards the use of FPGA co-processors in order to increase performance while reducing power and cost. System design of this hardware involves the partitioning of the main components into software running on DSP or embedded processors and the FPGA. Support for Embedded Processing through Shared Memories System Generator facilitates hardware/software partitioning by offering tight integration to the Xilinx Platform Studio tool for embedded processing (available through EDK, the Embedded Development Kit). A shared memory interface is available for targeting the Xilinx MicroBlaze embedded processor. This abstracts away the hardware implementation details for both the C programmer and DSP designer.
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Resource Estimation System Generators Resource Estimator provides a quick FPGA resource utilization estimate prior to performing the synthesis and place and route implementation steps. These estimates can be used to guide the hardware/ software partitioning process.
Design Exploration through IP Parameterization Different hardware architectures for a DSP algorithm can be quickly explored through parameterization of the IP building blocks. Each block can be customized through a unique set of hardware implementation parameters that effect hardware features, pipelining, sample rate and resource sharing. These effects can be quickly analyzed using the Simulink cycle accurate simulation environment. Boost Simulation Performance using Hardware Co-Simulation Exploring and verifying mathematical approaches to system requirements, often requires test and refinement of DSP algorithms using real world data. This can result in large vector sets and the need for real-time verification performance. System Generator enables designs captured in Simulink, MATLAB, and RTL to be accelerated up to 1000x using hardware-in-the-loop co-simulation on a variety of Xilinx provided and 3rd party hardware platforms. MATLAB Support Floating-point MATLAB is supported for model generation, via the Xilinx AccelDSP Synthesis tool. MATLAB provides an efficient DSP modeling language through native support for vector and matrix operations and an extensive set of built-in functions. User defined DSP blocks can be generated from AccelDSP Synthesis and used within the System Generator modeling and hardware generation environment. AccelWare parameterized DSP IP can be used with the floating-point MATLAB for hardware representations of linear algebra operations such as adaptive filtering, matrix inversion, matrix factorization and MIMO.
Algorithm Design
System Generator comes complete with an optimized, bit and cycle accurate library for assembling sophisticated signal processing systems. Xilinx algorithmic IP is an integral part of this library and is used to rapidly create efficient implementations of common DSP building blocks such as FIR filters, FFTs and forward error correction (FEC) blocks.
Hardware Design
Hardware engineers developing production FPGAs need to maximize the performance and minimize the cost of their final implementation. For these designers VHDL or Verilog is often their design creation method of choice. System Generator bridges a verification gap by allowing RTL models to be simulated and verified from within the Simulink DSP modeling environment. Inputs created using the Simulink standard blocksets can be used to drive the RTL simulation and outputs generated from RTL simulation can be viewed using the standard Simulink plotting functions. Hardware in the loop co-simulation is supported for this flow providing up to a 1000x simulation performance increase.
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System Generator for DSP Product Features Tight integration to the Xilinx EDK for adding embedded processors to the DSP hardware Fixed-point RTL generation FPGA resource estimation Integration to 3rd partly ESL C-synthesis tools 1000x simulation performance improvement through hardware co-simulation Xilinx optimized DSP blockset for Simulink MATLAB language support through AccelDSP FIR Filter compiler Black box support for VHDL and Verilog RTL testbench generation Major Benefits Assists system designers in partitioning operations between processors and FPGA logic Accelerates the verification of RTL within a DSP modeling environment by up to 1000x Enables the use of the algorithm friendly MATLAB/ Simulink modeling environment for FPGA design
Explore Multiple Design Implementations Using Single Golden Source Algorithms written in the MATLAB language become the golden design source driving the entire AccelDSP design and verification flow. All major design tasks, from floating-point definition to gate-level implementation, are derived from the MATLAB golden source. Speed and area tradeoffs can be explored by setting system-level requirements and using the tools IP-Explorer technology to rapidly select optimal silicon implementations of key DSP building blocks. AccelDSP reports make it easy to evaluate the effects of design changes on resource utilization, throughput and latency. Automated Floating- to Fixed-point Generation MATLAB algorithms must be implemented in fixed-point hardware to achieve higher performance in FPGAs. This requires the scaling and precision of each variable to be defined to avoid overflow/underflow conditions a tedious, error-prone process. AccelDSP Synthesis assists in this process by using the floating-point source and stimulus to determine the dynamic range of each variable and input/output port. Once determined, quantization directives are set throughout the design and a fixed-point MATLAB or C++ model is generated that is optimized for fast execution in MATLAB. These quantization values can be re-defined by the user. Scalable and Synthesizable Cores AccelWare toolkits are hardware optimized DSP IP core generators for use with AccelDSP Synthesis that provide essential signal processing components. These generators support multiple macro-architectures to let designers craft a design for the specific requirements. Toolkits are available for: Communications, Reed-Solomon encoding/decoding, Viterbi decoding, etc. Advanced Math SVD/QR/Cholesky matrix factorization, QR & Cholesky/triangular matrix inversion, etc. AccelWare toolkits are functionally equivalent to their MATLAB toolbox counterparts supporting the same input parameters. The hardware parameterization of AccelWare IP far exceeds that of RTL-level intellectual property, providing synthesizable cores with the flexibility to precisely meet requirements with optimal hardware. IP-Explorer Technology for Heuristic-Driven Optimization IP-Explorer automatically replaces standard function calls used in a MATLAB model with hardware accurate architectures from the AccelWare IP library. This process is heuristic-driven based on bit widths and system constraints such as area and performance. Statistical methods are then used to select the best
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AccelWare architecture for each use of a function to produce an overall optimized design. This technology elevates hardware design to a higher abstraction increasing productivity and reducing the time to implement designs. Optimize Hardware Implementation through Directives AccelDSP offers a set of synthesis directives that guide decisions about resource utilization and alternative implementations that cannot be inferred from the high-level MATLAB language constructs. Supported directives include loop rolling/unrolling, quantization, matrix multiplication expansion, RAM/ROM memory mapping, pipeline insertion, and shift register mapping. Using these directives enables hardware-based design exploration without code rewrites. Correct-by-Construction DSP Design Developing and maintaining verification suites that check equivalency of algorithmic, RTL, and gate-level designs is a resource-intensive task that must be done to ensure that the hardware matches the original algorithm. AccelDSP automates this process by generating a simulation testbench using test vectors created from the MATLAB fixed-point simulation. AccelDSP is integrated with leading 3rd party simulation tool providers. Generate Models for System Validation and Integration inside System Generator for DSP. MATLAB algorithms synthesized by AccelDSP can be incorporated into larger DSP systems using Simulink. AccelDSP generates bit and cycle accurate models for use with the standard Simulink blockset or with the Xilinx DSP blockset provided as part of System Generator. This allows rapid validation of MATLAB algorithms in a hardware system through System Generators hardware co-simulation. The Xilinx ESL Initiative Adding an FPGA co-processor to a DSP hardware system provides new implementation options, including FPGA logic and embedded processing that can be used to dramatically increase the performance and lower the cost of the hardware system. Taking advantage of these new options, however, can be a daunting task for DSP designers accustomed to working in a C development environment. To ease the adoption of FPGA co-processors Xilinx has created the ESL Initiative which is a partnership between Xilinx and the industries leading providers of Electronic System Level (ESL) design solutions. Through this initiative innovative solutions are being developed to map C routines directly onto the hardware resources of the Xilinx FPGAs from a software friendly development environment.
AccelDSP Synthesis Product Features MATLAB-based algorithmic synthesis generates technologyoptimized RTL Automated floating-to-fixed-point conversion IP-Explorer technology enables heuristic-driven selection of hardware architecture at algorithmic level Complete automated verification flow with automatic testbench generation Hardware optimizations including loop rolling/unrolling, matrix multiplication expansion, RAM/ROM memory mapping, pipeline insertion, and shift register mapping Model generators for Simulink and Xilinx System Generator for DSP Easy-to-use graphical user interface integrates with downstream tools Major Benefits Single, golden source drives synthesis and verification flow for all Xilinx FPGAs, Provides flexibility to use both algorithmic synthesis and DSP intellectual property Works with MATLAB and Simulink products from The MathWorks Provides device neutrality Proven to increase productivity up to 20x
ESL Initiative Capabilities Includes industry-leading ESL tool providers Focus on C-to-FPGA design flows Flows Support the MicroBlaze and PowerPC 405 embedded processors C-to-FPGA logic flows support both module creation and hardware accelerators
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Platform Studio
Algorithm Development
MATLAB
Synthesis
ModelSim
ChipScope Pro
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XtremeDSP Co-Processing The combination of reconfigurable hardware and a programmable DSP provides a very good fit for handling highly complex signal processing algorithms. With Xilinx XtremeDSP co-processing, you can migrate computationally intensive DSP tasks to the FPGA and free up programmable DSP processors to perform other value-added software features. Xilinx FPGAs extend the capabilities of DSP and media processors in many ways as shown.
An example is a H.264 digital video encoding/decoding system with transrating and transcoding capabilities. You can offload compute-intensive algorithms into the FPGA or extend the number of channels that can be processed or tackle higher resolutions and rates. Fast Time to Market with Xilinx DSP Co-Processing System Design Tools Xilinx and its partners provide complete solutions for rapid DSP co-processing development and implementation. Hardware and software development tools allow you to model your FPGA-DSP system, design the FPGA portion even if you cannot write HDL, and allow you to test and debug your design on the FPGA itself.
XtremeDSP Selection Guide
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COMPLEMENTARY SOLUTIONS
Coprocessing Designation
Building FPGA Co-Processors for DSPs Building FPGA co-processors for traditional DSP processors has become much simpler using The MathWorks Simulink tool. You can first design your complete system in floating point and verify the functionality. Then by replacing floating point blocks with bit-true and cycle-true library blocks from the Xilinx blockset you can also introduce quantization to verify accuracy. For the DSP processor portion of the design The MathWorks and Partners offer tools such as Real-Time Workshop and Embedded Target that allow you to automatically generate code.
Interfaces
A number of interfaces to TI DSPs are available as IP cores including: Serial RapidIO VLYNQ EMIF
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RESOURCES
On-Demand Webcasts On-Demand webcasts are 60 minutes, were recorded live and now made available online. These lectures range from beginner overviews to advanced, highly technical design information. Learn more about how to design Digital Signal Processsing (DSP) applications from FPGAs. Introducing Virtex-5 FPGA Virtex-4 FPGA Design Techniques and Tools Settings for MaximumPerformance Virtex-5 FPGAs and PlanAhead Delvier Maximum Performance
DSP Design Services Xilinx DSP Design Services provide you the supplementary support you may need to meet your market requirements. Our team of experts is available to help you conduct turn-key designs and ensure that you have the most optimized FPGA-DSP design for your target application. Here are some ways in which our DSP Design Services team can help you with your next design: Create a Simulink/System Generator design our designers will design and model all or part of your system to your specification, generate the code and verify that the design works in hardware. Algorithm development Some designs require the development of performance or area optimized algorithms. Use our Design Services team to develop highly optimized filters, transforms, FFTs, demodulators, error correction algorithms (e.g. Viterbi decoders) wireless designs (e.g. Rake receivers, searchers) or video codecs (e.g. MPEG 4). Modify DSP IP cores While our library of DSP IP cores can be parameterized, there may still cases when you need additional features that require modification to our cores. Use our Design Services team to modify these cores rather then develop them from scratch. DSP Support / Packaged Solutions XPA Packaged Solutions The Xilinx Productivity Advantage (XPA) offers all of Xilinx world class Software, Education, Support Services, and IP cores in one easy to buy package. Custom tailored to your specific needs, the scalable XPA solution is the best way to get everything you or your design team need to make your next design your best. The DSP XPA Seat is your ticket to productivity, providing you with the advanced tools and expertise you need to develop advanced, low-cost DSP designs in Xilinx industry-leading FPGAs. Save 20% when you purchase this predefined value bundle, which includes the System Generator for DSP software tools and 15 training credits.
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DD S P SS Y S T E M SS O L U T I O N S SP YSTEM OLUTIONS
www.xilinx.com/dsp/
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DSP
SYSTEM
SOLUTIONS
Corporate Headquarters
Xilinx, Inc. 2100 Logic Drive San Jose, CA 95124 Tel: (408) 559-7778 Fax: (408) 559-7114 Web: www.xilinx.com
Europe
Xilinx Europe One Logic Drive Citywest Bsiness Campus Saggart, County Dublin Ireland Tel: +353-1-464-0311 Web: www.xilinx.com
Japan
Xilinx, K.K. Art Village Osaki Central Tower 4F 1-2-2 Osaki, Shinagawa-Ku Tokyo 141-0032 Japan Tel: +81-6744-7777 Web: japan.xilinx.com
www.xilinx.com
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PN 0010944-5