PIC-P67J60 Development Board Users Manual: Rev. C, December 2009
PIC-P67J60 Development Board Users Manual: Rev. C, December 2009
PIC-P67J60 Development Board Users Manual: Rev. C, December 2009
INTRODUCTION:
If you want to build your own Internet enabled device this is the board for you. It has PIC18F67J60 microcontroller which has integrated Ethernet MAC+PHY and comes pre-programmed with Microchip's free TCP-IP stack. So all you need is to add your circuit in the prototype area and you are ready! With 128K Flash memory for programs and 128KB Flash memory your application will not suffer from low memory at all.
BOARD FEATURES:
PIC18F67J60 microcontroller with Ethernet and 1Mbit memory for
code; 1Mbit data Flash for data storage; mini ICSP/ICD connector for programming with PIC-ICD2; Ethernet connector with status leds; RS232 driver and connector; Complete web server and TCP-IP stack support as per Microchip's open source TCP-IP stack; All PIC free ports available on header close to the prototype area; Dimensions 100x80 mm (3.94 x 3.4");
ELECTROSTATIC WARNING:
The PCI-P67J60 development board is shipped in protective anti-static packaging. The board must not be subject to high electrostatic potentials. General practice for working with static sensitive devices should be applied when working with this board.
!!!Warning!!! When you want to program this microcontroller with PICICD2, PIC-ICD2-POCKET or PIC-ICD2-TINY, before connecting the programmer to your target board, you should first connect the programmer to your computer and open MPLAB. There, first from menu Configure Select Device choose the microcontroller you are about to program, then from menu Programmer Select Programmer choose MPLAB ICD 2, wait while MPLAB is downloading operation system, and after ICD2 is connected check in menu Programmer Settings Power there is option Power target circuit from MPLAB ICD 2 this
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option should be forbidden, you could not select it. Now it is safe to connect the programmer to your target board. Software: PIC-MICRO-WEB is tested with MPLAB IDE v.7.62 + MPLAB C18 C compiler. It is possible that the stack might not function properly if used with later versions of MPLAB IDE.You will also need a terminal program configured at 19 200 bps, 8N1 and no flow control.
PROCESSOR FEATURES:
The PIC-P67J60 uses MCU PIC67j60 which has the following features: IEEE 802.3 Compatible Ethernet Controller Integrated MAC and 10Base-T PHY 8-Kbyte Transmit/Receive Packet Buffer SRAM Supports One 10Base-T Port Programmable Automatic Retransmit on Collision Programmable Padding and CRC Generation Programmable Automatic Rejection of Erroneous Packets Activity Outputs for 2 LED Indicators Buffer:
Configurable transmit/receive buffer size Hardware-managed circular receive FIFO Byte-wide random and sequential access Internal DMA for fast memory copying Hardware assisted checksum calculation for various protocols
MAC:
Support for Unicast, Multicast and Broadcast packets Programmable Pattern Match of up to 64 bytes within packet at user-defined offset Programmable wake-up on multiple packet formats
PHY:
One, two or four PWM outputs Selectable polarity Programmable dead time Auto-shutdown and auto-restart
Up to Two Master Synchronous Serial Port (MSSP) modules supporting SPI (all 4 modes) and I2C Master and Slave modes Up to Two Enhanced USART modules:
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Run: CPU on, peripherals on Idle: CPU off, peripherals on Sleep: CPU off, peripherals off
Priority Levels for Interrupts 8 x 8 Single-Cycle Hardware Multiplier Extended Watchdog Timer (WDT): Programmable period from 4 ms to 134s Single-Supply 3.3V In-Circuit Serial Programming (ICSP) via Two Pins In-Circuit Debug (ICD) with 3 Breakpoints via Two Pins Operating Voltage Range of 2.35V to 3.6V (3.1V to 3.6V using Ethernet module) On-Chip 2.5V Regulator
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BLOCK DIAGRAM
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MEMORY MAP:
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SCHEMATIC:
U1
RST
3.3V
KP-3216EC(RED)
RA0/LEDA/AN0 RA1/LEDB/AN1 RA2/AN2/VREFRA3/AN3/VREF+ RA4/T0CKI RA5/AN4 RB0/INT0/FLT0 RB1/INT1 RB2/INT2 RB3/INT3 RB4/KBI0 RB5/KBI1 RB6/KBI2/PGC RB7/KBI3/PGD RC0/T1OSO/T13CKI RC1/T1OSI/ECCP2/P2A RC2/ECCP1/P1A RC3/SCK1/SCL1 RC4/SDI1/SDA1 RC5/SDO1 RC6/TX1/CK1 RC7/RX1/DT1 RD0/P1B RD1/ECCP3/P3A RD2/CCP4/P3D RE0/P2D RE1/P2C RE2/P2B RE3/P3C RE4/P3B RE5/P1C RF1/AN6/C2OUT RF2/AN7/C1OUT RF3/AN8 RF4/AN9 RF5/AN10/CVREF RF6/AN11 RF7/#SS1 RG4/CCP5/P1D 24 23 22 21 28 27 3 4 5 6 44 43 42 37 30 29 33 34 35 36 31 32 60 59 58 2 1 64 63 62 61 17 16 15 14 13 12 11 8
LEDA LEDB
3.3V
#MCLR 3.3V
22pF
7 18
#MCLR ENVREG
C3
Q1 25MHz
GND_ GND
39
R21 1M
T PINT PIN+ T POUT T POUT +
OSC1/CLKI OSC2/CLKO
RA2 RA3 RA4 RA5 RB0 RB1 RB2 RB3 RB5 C19
LED
40
22pF
C4
46 47 50 51 TPINTPIN+ TPOUTTPOUT+
R2 330 B1
B1
PGC PGD
GN D
22pF 22pF
R8
2k/1%
R7 C5
270/1%
32768/6pF
53 10
RBIAS VDDCORE/VCAP
3.3V
220nF
26 38 57
C7 100nF
3.3V
9 25 41 56 49 48 52 45 54 55
RD0 RD1 RD2 RE0 RE1 RE2 RE3 RE4 RE5 RF1 RF2 RF3 RF4 RF5 RF6 RG4 L1 C27
100nF
VSS VSS1 VSS2 VSS3 VDDTX VDDRX VSSTX VSSRX VDDPLL VSSPLL AVDD AVSS
3.3V 3.3VA
3.3V
#SS1
C17 10uF/6.3V
ST3232 C1+ V+ C1VC2+ C2T1IN T2IN R1OUT R2OUT 16 VCC T1OUT T2OUT R1IN R2IN 15 GND 14 7 13 8 2 6
R15
49.9/1% T POUT + 1
LAN
TD+ TCT TDAG KG AY KY RD+ RCT RD1:1 75 75
R23 NA
1 2 3 4 5 6 7 8 9
R13
49.9/1%
R12
RXD1
R11
12 9
R22 NA
R14
49.9/1%
1 4 5 2 3 7 8 6
75
1nF/2kV
C25
180 180
U4PWR
C24 100nF
RS232 DB9-F
100nF
PWR_JACK
G2 DB104(SMD)
R3 R4
0.68 0.68
C2 100nF
3.3V WF6S
6VAC 9VDC
VCC
IS DC
GND1
3
+
VSS
C10
1000uF/6.3V/8m m
U2
M OSI
C9
SO GND VCC /WP/ 8 7 6 5
M ISO
1 2 3
390pF
U3 MC34063AP1/ACN_MBR
R9 3.0k/1%
R1 100k
SCK
R6
0R
R10 1.8k/1%
R5 330
NA(0R) C1 100nF
#SS1
AT45DB011
PIC-P67J60
Rev. B COPYRIGHT(C) 2009, Olimex Ltd. http://www.olimex.com/dev
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RED_5MM
FB
D2
3.3V
3.3V
PWR_LED
1N5819
C11 220u/25V
TC
SC SE
1 2
L3 CL150uH/SW68
CLOSE
7 8
BOARD LAYOUT:
RESET CIRCUIT:
PIC-P67J60 reset circuit is made with the pull-up R18 (10K), R17 (330) and C31 (100nF).
CLOCK CIRCUIT:
Quartz crystal 25 MHz is connected to PIC18F67J60 pin 39 (OSC1/CLKI) and pin 40 clock out (OSC2/CLKO). clock in
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Quartz crystal 32.768 kHz is connected to PIC18F67J60 pin 29 (T1OSI) and pin 30 (T1OSO) and supplies the Timer1.
JUMPER DESCRIPTION:
enables 3.3 V power supply for the PIC18F67J60 and all other devices. Default state is closed. 3.3V_E
INPUT/OUTPUT:
One user button with name BUT1 connected to PIC18F67J60 pin 6 RB3/INT3; One LED named LED(red) connected to PIC18F67J60 pin 44 RB4/KBI0; Power supply red LED with name PWR_LED indicates that power supply 3.3V is present.
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Pin # 1 2
ICSP:
Pin # 1
2
3 4 5 6
PGD I/O Program Data. Serial data for programming. PGC Input Program Clock. Clock used for transferring the serial data (output from ICSP, input for the MCU).
RS232:
Pin # 1 2 3 4 5
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6 7 8 9
TXD OutputTransmit Data. This is the asynchronous serial data output (RS232) for the shift register on the UART controller. RXD Input Receive Data. This is the asynchronous serial data input (RS232) for the shift register on the UART controller.
LAN:
Pin #
1 2 3 4
Pin #
5 6 7 8
LED
Right Left Yellow Green
Color
Activity
Usage
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PROTOAREA:
Pin # 3.3V #MCLR RG4 RF6 RF5 RF4 RF3 RF2 RF1 RE5 RE4 RE3 RE2 RE1 RE0 RD2 RD1 RD0 RC5 RC4 RC3 RC2 RB5 RB3 RB2 RB1 RB0 RA5 RA4 RA3 RA2 3.3VA AGND Signal Name 3.3V RST RG4/CCP5/P1D RF6/AN11 RF5/AN10/CVREF RF4/AN9 RF3/AN8 RF2/AN7/C1OUT RF1/AN6/C2OUT RE5/P1C RE4/P3B RE3/P3C RE2/P2B RE1/P2C RE0/P2D RD2/CCP4/P3D RD1/ECCP3/P3A RD0/P1B RC5/SDO1/MOSI RC4/SDI1/SDA1/MISO RC3/SCK1/SCL1/SCK RC2/ECCP1/P1A RB5/KBI0 RB3/INT3/B1 RB2/INT2 RB1/INT1 RB0/INT0/FLT0 RA5/AN4 RA4/TOCKI RA3/AN3/VREF+ RA2/AN2/VREF 3.3V ANALOG ANALOG GND
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MECHANICAL DIMENSIONS:
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You could find information about PIC-P67J60 board, Microchip TCP/IP stack and how to change and configure the software in Understanding PIC WEB boards on www.olimex.com/dev.
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ORDER CODE:
PIC-P67J60 completely assembled and tested with PIC18F67J60 on board.
How to order? You can order to us directly or by any of our distributors. Check our web www.olimex.com/dev for more info.
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Disclaimer: 2009 Olimex Ltd. All rights reserved. Olimex, logo and combinations thereof, are registered trademarks of Olimex Ltd. Other terms and product names may be trademarks of others. The information in this document is provided in connection with Olimex products. No license, express or implied or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Olimex products. Neither the whole nor any part of the information contained in or the product described in this document may be adapted or reproduced in any material from except with the prior written permission of the copyright holder. The product described in this document is subject to continuous development and improvements. All particulars of the product and its use contained in this document are given by OLIMEX in good faith. However all warranties implied or expressed including but not limited to implied warranties of merchantability or fitness for purpose are excluded. This document is intended only to assist the reader in the use of the product. OLIMEX Ltd. shall not be liable for any loss or damage arising from the use of any information in this document or any error or omission in such information or any incorrect use of the product.
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