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    Lecture 2.3: FET Introduction

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    Aids Sumalde
    The document discusses field effect transistors (FETs), specifically junction FETs (JFETs). It provides information on JFET construction and operation, including: - JFETs are voltage-controlled, unipolar devices with high input impedance and lower gains than BJTs. - In an N-channel JFET, applying a positive voltage between the drain and source draws electrons towards the drain, creating a drain current. Increasing the negative voltage at the gate decreases the thickness of the depletion region and limits the current. - The maximum drain current, IDSS, occurs when the gate-source voltage is 0V and the drain-source voltage exceeds the pinch-off voltage. Applying a more

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    Lecture 2.3: FET Introduction

    Uploaded by

    Aids Sumalde
    158 views3 pages
    The document discusses field effect transistors (FETs), specifically junction FETs (JFETs). It provides information on JFET construction and operation, including: - JFETs are voltage-controlled, unipolar devices with high input impedance and lower gains than BJTs. - In an N-channel JFET, applying a positive voltage between the drain and source draws electrons towards the drain, creating a drain current. Increasing the negative voltage at the gate decreases the thickness of the depletion region and limits the current. - The maximum drain current, IDSS, occurs when the gate-source voltage is 0V and the drain-source voltage exceeds the pinch-off voltage. Applying a more

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    Junction field effect transistor basics

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    The document discusses field effect transistors (FETs), specifically junction FETs (JFETs). It provides information on JFET construction and operation, including: - JFETs are voltage-controlled, unipolar devices with high input impedance and lower gains than BJTs. - In an N-channel JFET, applying a positive voltage between the drain and source draws electrons towards the drain, creating a drain current. Increasing the negative voltage at the gate decreases the thickness of the depletion region and limits the current. - The maximum drain current, IDSS, occurs when the gate-source voltage is 0V and the drain-source voltage exceeds the pinch-off voltage. Applying a more

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    158 views3 pages

    Lecture 2.3: FET Introduction

    Uploaded by

    Aids Sumalde
    The document discusses field effect transistors (FETs), specifically junction FETs (JFETs). It provides information on JFET construction and operation, including: - JFETs are voltage-controlled, unipolar devices with high input impedance and lower gains than BJTs. - In an N-channel JFET, applying a positive voltage between the drain and source draws electrons towards the drain, creating a drain current. Increasing the negative voltage at the gate decreases the thickness of the depletion region and limits the current. - The maximum drain current, IDSS, occurs when the gate-source voltage is 0V and the drain-source voltage exceeds the pinch-off voltage. Applying a more

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 3

    1/30/2012

    Field Effect Transistor (FET)


    Voltage-Controlled Device Two types: N-channel and P-channel The output current is dependent on the applied voltage.

    Field Effect Transistors


    EE 21 Fundamentals of Electronics

    EE 21 Slides (AAMS) 1

    JFET Schematic Symbols

    Field Effect Transistor (FET)


    Unipolar Device, unlike the BJT (why is it called unipolar?) Another question: why is it called field-effect transistor? Have very high input impedance (1-100M), but have considerably less gains compared to BJTs. Also referred to as Junction Field Effect Transistor (JFET)

    JFET Construction

    JFET Operation: The water analogy


    Electron flow : Water flow (From source to drain) Gate control: similar to applied potential Source and drain : opposite ends of the channel

    1/30/2012

    JFET Operation, Case 1: VGS = 0, VDS = some (+) value


    Application of potential draws e- towards drain, causing a drain current. e- flow is limited by the resistance of nchannel b/w drain and source (represented by the depletion region thickness). Question: Why isnt the d.r. thickness constant??
    7

    Varying Resistances and IG = 0


    Assuming uniform resistance for Nchannel, voltage divisions occur along the channel The PN junctions are all reverse biased, but by different voltage levels. NOTE: IG = 0 in JFETs. (WHY??)
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    Pinch-off condition

    A few more things about IDSS


    IDSS is the maximum drain current possible for a JFET It is defined at VGS = 0 and VDS > |VP| The value of IDSS is usually specified in datasheets.
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    This value is constant even if VGS is applied, though it will not be reached if VGS is present

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    Case 2: Applied VGS < 0


    When applying VGS, it is always < 0 for N-channel JFET! VGS is applied to establish D.Rs at a lower level of VDS. This is similar to how a BJTs IB can vary the levels of VCE & I C.

    For increasing (-) VGS values

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    1/30/2012

    Ohmic Region
    The region to the left of the pinch-off locus is known as the ohmic region or the voltagecontrolled resistance region. ro is the resistance at VGS = 0, rd is the resistance at a voltage level VGS.

    Summary of Operation
    1. Maximum Drain Current = IDSS, occurs at VGS = 0 and VDS |VP|. 2. Maximum possible ID is reduced by application of VGS voltage, and ID = 0 for |VGS| > |VP| (VGS is more negative than VP).

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    Summary of Operation
    3. For |VP| |VGS| 0 V, 0 mA ID IDSS. Meaning, for varying levels of VGS, the drain current varies accordingly.

    Summary of Operation
    Recall that for a BJT, IC = IB; i.e. IC = f(IB) In the same manner, a JFETs ID and VGS are related as defined by SHOCKLEYS EQUATION:

    Note that we used N-Channel JFETs in this discussion. For Pchannel JFETs, the biasing polarities , current directions, and thresholds will just be reversed! 15

    This will help us construct the input characteristics of the JFET under bias.

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    Shockley Curve
    The curve of the input characteristics as defined by the Shockleys equation. For decent approximation, four points are chosen for the graphical solution. 1. VGS = 0 ID = IDSS 2. VGS = VP ID = 0 3. VGS = VP ID = IDSS 4. VGS = 0.3VP ID = IDSS/2
    17

    Example: Shockley Curve


    Sketch the transfer curve for an N-channel JFET defined by IDSS = 12mA and Vp = -6 Volts by using the graphical (four-point) method. Sketch the transfer curve for a P-channel JFET with IDSS = 4 mA and Vp = 3 V.

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