Experiment: 1

Date: ____/______/20______

Aim: To study about Architecture of DSP Processors

Theory:

Introduction of DSP processor

Signal can be defined as a function that conveys information, generally about the state or
behavior of a physical system. There are two basic types of signals via Analog (continuous time
signals which are defined along a continuum of times) and Digital (discrete-time).

Remarkably, under reasonable constraints, a continuous time signal can be adequately

represented by samples, obtaining discrete time signals. Thus digital signal processing is an ideal
choice for anyone who needs the performance advantage of digital manipulation along with
today’s analog reality.

Hence a processor which is designed to perform the special operations (digital manipulations) on
the digital signal within very less time can be called as a Digital signal processor. The difference
between a DSP processor, conventional microprocessor and a microcontroller are listed below.

Microprocessor or General-Purpose Processor such as Intel xx86 or Motorola 680xx family

Contains - only CPU
-No RAM
-No ROM
-No I/O ports
-No Timer

Microcontroller such as 8051 family

Contains - CPU
- RAM
- ROM
-I/O ports
- Timer &
- Interrupt circuitry
Some Micro Controllers also contain A/D, D/A and Flash Memory

DSP Processors such as Texas instruments and Analog Devices

Contains:
- CPU
- RAM
- ROM

1
- I/O ports
- Timer

Optimized for:
- Fast arithmetic
- Extended precision
- Dual operand fetch
- Zero overhead loop
- Circular Buffering
The basic features of a DSP Processor are

Feature Use

Fast-Multiply accumulate Most DSP algorithms, including filtering, transforms, etc. are
multiplication- intensive Multiple – access memory architecture Many data-intensive DSP
operations require reading a program instruction and multiple data items during each instruction
cycle for best performance Specialized addressing modes Efficient handling of data arrays and
first-in, first-out buffers in memory Specialized program control Efficient control of loops for
many iterative DSP algorithms. Fast interrupt handling for frequent I/O operations.
On-chip peripherals and I/O interfaces On-chip peripherals like A/D converters allow for small
low-cost system designs. Similarly, I/O interfaces tailored for common peripherals allow clean
interfaces to off-chip I/O devices.

ARCHITECTURE OF 6713 DSP PROCESSOR

2
This chapter provides an overview of the architectural structure of the TMS320C67xx DSP,
which comprises the central processing unit (CPU), memory, and on-chip peripherals. The
C67xE DSPs use an advanced modified Harvard architecture that maximizes processing power
with eight buses. Separate program and data =spaces allow simultaneous access to program
instructions and data, providing a high degree of parallelism. For example, three reads and one
write can be performed in a single cycle. Instructions with parallel store and application-specific
instructions fully utilize this architecture. In addition, data can be transferred between data and
program spaces. Such Parallelism supports a powerful set of arithmetic, logic, and bit-
manipulation operations that can all be performed in a single machine cycle. Also, the C67xx
DSP includes the control mechanisms to manage interrupts, repeated operations, and function
calling.

Fig 2 – 1 BLOCK DIAGRAM OF TMS 320VC 6713

Bus Structure

3
The C67xx _DSP architecture is built around eight major 16-bit buses (four program/data buses
and four address buses):
The program bus (PB) carries the instruction code and immediate operands from program
memory.

Three data buses (CB, DB, and EB) interconnect to various elements, such as the CPU, data
address generation logic, program address generation logic, on-chip peripherals, and data
memory.

_ The CB and DB carry the operands that are read from data memory.
_ The EB carries the data to be written to memory.
_ Four address buses (PAB, CAB, DAB, and EAB) carry the addresses needed for instruction
execution.
The C67xx DSP can generate up to two data-memory addresses per cycle using the two auxiliary
register arithmetic units (ARAU0 and ARAU1). The PB can carry data operands stored in
program space (for instance, a coefficient table) to the multiplier and adder for
multiply/accumulate operations or to a destination in data space for data move instructions
(MVPD and READA). This capability, in conjunction with the feature of dual-operand read,

supports the execution of single-cycle, 3-operand instructions such as the FIRS instruction. The
C67xx DSP also has an on-chip bidirectional bus for accessing on-chip peripherals. This bus is
connected to DB and EB through the bus exchanger in the CPU interface. Accesses that use this
bus can require two or more cycles for reads and writes, depending on the peripheral’s structure.

Central Processing Unit (CPU)

The CPU is common to all C67xE devices. The C67x CPU contains:

_ 40-bit arithmetic logic unit (ALU)

_ Two 40-bit accumulators
_ Barrel shifter
_ ltiplier
_ 40-bit add17 × 17-bit mu er
_ Compare, select, and store unit (CSSU)
_ Data address generation unit
_ Program address generation unit

Arithmetic Logic Unit (ALU)

The C67x DSP performs 2s-complement arithmetic with a 40-bit arithmetic logic unit (ALU)
and
two 40-bit accumulators (accumulators A and B). The ALU can also perform Boolean
operations.
The ALU uses these inputs:
_ 16-bit immediate value
_ 16-bit word from data memory
_ 16-bit value in the temporary register,
_ Two 16-bit words from data memory

4
_ 32-bit word from data memory
_ 40-bit word from either accumulator
The ALU can also function as two 16-bit ALUs and perform two 16-bit operations
simultaneously.

Fig 2 – 2 ALU UNIT

Accumulators

Accumulators A and B store the output from the ALU or the multiplier/adder block. They can
also provide a second input to the ALU; accumulator A can be an input to the multiplier/adder.

Each accumulator is divided into three parts:

Guard bits (bits 39–32)
High-order word (bits 31–16)
Low-order word (bits 15–0)

5
Instructions are provided for storing the guard bits, for storing the high- and the low- order
accumulator words in data memory, and for transferring 32-bit accumulator words in or out of
data memory. Also, either of the accumulators can be used as temporary storage for the other.

Barrel Shifter

The C67x DSP barrel shifter has a 40-bit input connected to the accumulators or to data memory
(using CB or DB), and a 40-bit output connected to the ALU or to data memory (using EB). The
barrel shifter can produce a left shift of 0 to 31 bits and a right shift of 0 to 16 bits on the input
data. The shift requirements are defined in the shift count field of the instruction, the shift count
field (ASM) of status register ST1, or in temporary register T (when it is designated as a shift
count register).The barrel shifter and the exponent encoder normalize the values in an
accumulator in a single cycle. The LSBs of the output are filled with 0s, and the MSBs can be
either zero filled or sign extended, depending on the state of the sign-extension mode bit (SXM)
in ST1. Additional shift capabilities enable the processor to perform numerical scaling, bit
extraction, extended arithmetic, and overflow prevention operations.

Multiplier/Adder Unit

The multiplier/adder unit performs 17 _ 17-bit 2s-complement multiplication with a 40- bit
addition in a single instruction cycle. The multiplier/adder block consists of several elements: a
multiplier, an adder, signed/unsigned input control logic, fractional control logic, a zero detector,
a rounder (2s complement), overflow/saturation logic, and a 16-bit temporary storage register

Fig 2 – 3 MULTIPLIER/ADDER UNIT

6
(T). The multiplier has two inputs: one input is selected from T, a data-memory operand, or
accumulator A; the other is selected from program memory, data memory, accumulator A, or an
immediate value. The fast, on-chip multiplier allows the C54x DSP to perform operations
efficiently such as convolution, correlation, and filtering. In addition, the
multiplier and ALU together execute multiply/accumulate (MAC) computations and ALU
operations in parallel in a single instruction cycle. This function is used in determining the
Euclidian distance and in implementing symmetrical and LMS filters, which are required for
complex DSP algorithms. See section 4.5, Multiplier/Adder Unit, on page 4-19, for more details
about the multiplier/adder unit.
These are the some of the important parts of the processor and you are instructed to go through
the detailed architecture once which helps you in developing the optimized code for the required
application.

CONCLUSION:
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________

Date of Assessment Name of the Faculty Signature of the Faculty

7
 Experiment: 2
Date: ____/______/20______

Aim: Enlist various Peripherals of DCS2833x.

Theory:

Peripherals of 2833X :

The integrated peripherals of the 2833x and 2823x devices are described in the following
subsections:

• 6-channel Direct Memory Access (DMA)

• Three 32-bit CPU-Timers

• Up to six enhanced PWM modules (ePWM1, ePWM2, ePWM3, ePWM4, ePWM5, ePWM6)

• Up to six enhanced capture modules (eCAP1, eCAP2, eCAP3, eCAP4, eCAP5, eCAP6)

• Up to two enhanced QEP modules (eQEP1, eQEP2)

• Enhanced analog-to-digital converter (ADC) module

• Up to two enhanced controller area network (eCAN) modules (eCAN-A, eCAN-B)

• Up to three serial communications interface modules (SCI-A, SCI-B, SCI-C)

• One serial peripheral interface (SPI) module (SPI-A)

• Inter-integrated circuit (I2C) module

• Up to two multichannel buffered serial port (McBSP-A, McBSP-B) modules

• Digital I/O and shared pin functions

• External Interface (XINTF)

 DMA Overview Features:

8
• 6 channels with independent PIE interrupts

• Trigger sources: – ePWM SOCA/SOCB – ADC Sequencer 1 and Sequencer 2 – McBSP-A and
McBSP-B transmit and receive logic – XINT1–7 and XINT13 – CPU timers – Software

• Data sources and destinations: – L4–L7 16K × 16 SARAM – All XINTF zones – ADC
Memory Bus mapped RESULT registers – McBSP-A and McBSP-B transmit and receive buffers
– ePWM registers

• Word Size: 16-bit or 32-bit (McBSPs limited to 16-bit)

• Throughput: 4 cycles/word (5 cycles/word for McBSP reads)

 32-Bit CPU-Timer 0

CPU-Timer 1, CPU-Timer 2 There are three 32-bit CPU-timers on the devices (CPU-Timer 0,
CPU-Timer 1, CPU-Timer 2). CPU-Timer 2 is reserved for DSP/BIOS or SYS/BIOS. CPU-
Timer 0 and CPU-Timer 1 can be used in user applications. These timers are different from the
timers that are present in the ePWM modulesThe general operation of the timer is as follows:
The 32-bit counter register "TIMH:TIM" is loaded with the value in the period register
"PRDH:PRD". The counter register decrements at the SYSCLKOUT rate of the C28x. When the
counter reaches 0, a timer interrupt output signal generates an interrupt pulse.

 Enhanced PWM Modules

The 2833x/2823x devices contain up to six enhanced PWM (ePWM) modules (ePWM1 to
ePWM6).

 High-Resolution PWM (HRPWM)

The HRPWM module offers PWM resolution (time granularity) which is significantly
better than what can be achieved using conventionally derived digital PWM methods.
The key points for the HRPWM module are: • Significantly extends the time resolution
capabilities of conventionally derived digital PWM • Typically used when effective
PWM resolution falls below approximately 9 or 10 bits. This occurs at PWM frequencies
greater than approximately 200 kHz when using a CPU/System clock of 100 MHz. • This
capability can be used in both duty cycle and phase-shift control methods. • Finer time

9
 granularity control or edge positioning is controlled through extensions to the Compare A
and Phase registers of the ePWM module. • HRPWM capabilities are offered only on the
A signal path of an ePWM module (that is, on the EPWMxA output). EPWMxB output
has conventional PWM capabilities.
 Enhanced CAP Modules
The 2833x/2823x device contains up to six enhanced capture (eCAP) modules (eCAP1 to
eCAP6).
 Enhanced QEP Modules
The device contains up to two enhanced quadrature encoder (eQEP) modules (eQEP1,
eQEP2)
 Analog-to-Digital Converter (ADC) Module
The ADC module consists of a 12-bit ADC with a built-in sample-and-hold (S/H)
circuit. Functions of the ADC module include:
• 12-bit ADC core with built-in S/H
• Analog input: 0.0 V to 3.0 V (Voltages above 3.0 V produce full-scale conversion
results.)
• Fast conversion rate: Up to 80 ns at 25-MHz ADC clock, 12.5 MSPS
• 16 dedicated ADC channels. 8 channels multiplexed per Sample/Hold
• Autosequencing capability provides up to 16 "autoconversions" in a single session.
Each conversion can be programmed to select any 1 of 16 input channels
• Sequencer can be operated as two independent 8-state sequencers or as one large 16-
state sequencer (that is, two cascaded 8-state sequencers)
• Sixteen result registers (individually addressable) to store conversion values – The
digital value of the input analog voltage is derived by:
• Multiple triggers as sources for the start-of-conversion (SOC) sequence – S/W -
software immediate start – ePWM start of conversion – XINT2 ADC start of conversion
• Flexible interrupt control allows interrupt request on every end-of-sequence (EOS) or
every other EOS.
• Sequencer can operate in "start/stop" mode, allowing multiple "time-sequenced
triggers" to synchronize conversions.
• SOCA and SOCB triggers can operate independently in dual-sequencer mode.

10
 • Sample-and-hold (S/H) acquisition time window has separate prescale control.
 Enhanced Controller Area Network (eCAN) Modules (eCAN-A and eCAN-B)

The CAN module has the following features: • Fully compliant with ISO 11898-1 (CAN
2.0B) • Supports data rates up to 1 Mbps

 Serial Peripheral Interface (SPI) Module (SPI-A)

The device includes the four-pin serial peripheral interface (SPI) module. One SPI module (SPI-
A) is available. The SPI is a high-speed, synchronous serial I/O port that allows a serial bit
stream of programmed length (1 to 16 bits) to be shifted into and out of the device at a
programmable bit-transfer rate. Normally, the SPI is used for communications between the DSC
controller and external peripherals or another processor. Typical applications include external
I/O or peripheral expansion through devices such as shift registers, display drivers, and ADCs.
Multidevice communications are supported by the master/slave operation of the SPI.

 External Interface (XINTF)

This section gives a top-level view of the external interface (XINTF) that is implemented
on the 2833x/2823x devices.

CONCLUSION:

______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________

REFERENCE ;-

TEXAS Instrumentation datasheet

Date of Assessment Name of the Faculty Signature of the Faculty

11
 EXPERIMENT : 3
AIM : Differential Microcontroller And Digital Signal Processor Tabular Method

THEORY :
Differential Microcontroller

Features
• High-performance, Low-power AVR® 8-bit Microcontroller
• RISC Architecture
– 118 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 16 MIPS Throughput at 16 MHz
• Data and Non-volatile Program Memory
– 2K Bytes of In-System Programmable Program Memory Flash
Endurance: 10,000 Write/Erase Cycles
– 128 Bytes of In-System Programmable EEPROM
Endurance: 100,000 Write/Erase Cycles
– 128 Bytes Internal SRAM
– Programming Lock for Flash Program and EEPROM Data Security
• Peripheral Features
– 8-bit Timer/Counter with Separate Prescaler
– 8-bit High-speed Timer with Separate Prescaler
2 High Frequency PWM Outputs with Separate Output Compare Registers
Non-overlapping Inverted PWM Output Pins
– Universal Serial Interface with Start Condition Detector
– 10-bit ADC
11 Single Ended Channels
8 Differential ADC Channels
7 Differential ADC Channel Pairs with Programmable Gain (1x, 20x)
– On-chip Analog Comparator
– External Interrupt
– Pin Change Interrupt on 11 Pins
– Programmable Watchdog Timer with Separate On-chip Oscillator
• Special Microcontroller Features
– Low Power Idle, Noise Reduction, and Power-down Modes
– Power-on Reset and Programmable Brown-out Detection
– External and Internal Interrupt Sources
– In-System Programmable via SPI Port
– Internal Calibrated RC Oscillator
• I/O and Packages
– 20-lead PDIP/SOIC: 16 Programmable I/O Lines
– 32-lead QFN/MLF: 16 programmable I/O Lines
• Operating Voltages

12
– 2.7V - 5.5V for ATtiny26L
– 4.5V - 5.5V for ATtiny26
• Speed Grades
– 0 - 8 MHz for ATtiny26L
– 0 - 16 MHz for ATtiny26
• Power Consumption at 1 MHz, 3V and 25°C for ATtiny26L
– Active 16 MHz, 5V and 25°C: Typ 15 mA
– Active 1 MHz, 3V and 25°C: 0.70 mA
– Idle Mode 1 MHz, 3V and 25°C: 0.18 mA
– Power-down Mode: < 1 μ

Pin Descriptions

VCC Digital supply voltage pin.

GND Digital ground pin.

13
AVCC AVCC is the supply voltage pin for Port A and the A/D Converter (ADC). It should be
externallyconnected to VCC, even if the ADC is not used. If the ADC is used, it should be
connected to VCCthrough a low-pass filter. See page 94 for details on operating of the ADC.
Port A (PA7..PA0) Port A is an 8-bit general purpose I/O port. PA7..PA0 are all I/O pins that
can provide internalpull-ups (selected for each bit). Port A has alternate functions as analog
inputs for the ADC andanalog comparator and pin change interrupt as described in “Alternate
Port Functions” .
Port B (PB7..PB0) Port B is an 8-bit general purpose I/O port. PB6..0 are all I/O pins that can
provide internal pullups(selected for each bit). PB7 is an I/O pin if not used as the reset. To use
pin PB7 as an I/Opin, instead of RESET pin, program (“0”) RSTDISBL Fuse. Port B has
alternate functions for theADC, clocking, timer counters, USI, SPI programming, and pin change
interrupt as described in“Alternate Port Functions” on page 46.An External Reset is generated by
a low level on the PB7/RESET pin. Reset pulses longer than50 ns will generate a reset, even if
the clock is not running. Shorter pulses are not guaranteed togenerate a reset.
XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating
circuitXTAL2 Output from the inverting oscillator amplifier.

Description

The ATtiny26(L) is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC
architecture. By executing powerful instructions in a single clock cycle, the ATtiny26(L)
achieves
throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power
consumptionversus processing speed.The AVR core combines a rich instruction set with 32
general purpose working registers. All the32 registers are directly connected to the Arithmetic
Logic Unit (ALU), allowing two independentregisters to be accessed in one single instruction
executed in one clock cycle. The resultingarchitecture is more code efficient while achieving
throughputs up to ten times faster than conventionalCISC microcontrollers. The ATtiny26(L) has
a high precision ADC with up to 11 singleended channels and 8 differential channels. Seven
differential channels have an optional gain of20x. Four out of the seven differential channels,
which have the optional gain, can be used at thesame time. The ATtiny26(L) also has a high
frequency 8-bit PWM module with two independentoutputs. Two of the PWM outputs have
inverted non-overlapping output pins ideal for synchronousrectification. The Universal Serial
Interface of the ATtiny26(L) allows efficient softwareimplementation of TWI (Two-wire Serial
Interface) or SM-bus interface. These features allow forhighly integrated battery charger and
lighting ballast applications, low-end thermostats, andfiredetectors, among other applications.
The ATtiny26(L) provides 2K bytes of Flash, 128 bytes EEPROM, 128 bytes SRAM, up to 16
general purpose I/O lines, 32 general purpose working registers, two 8-bit Timer/Counters, one
with PWM outputs, internal and external Oscillators, internal and external interrupts,
programmableWatchdog Timer, 11-channel, 10-bit Analog to Digital Converter with two
differentialvoltage input gain stages, and four software selectable power saving modes. The Idle
modestops the CPU while allowing the Timer/Counters and interrupt system to continue
functioning.The ATtiny26(L) also has a dedicated ADC Noise Reduction mode for reducing the
noise in ADCconversion. In this sleep mode, only the ADC is functioning. The Power-down

14
mode saves theregister contents but freezes the oscillators, disabling all other chip functions until
the next interruptor hardware reset. The Standby mode is the same as the Power-down mode, but
externaloscillators are enabled. The wakeup or interrupt on pin change features enable the
ATtiny26(L)to be highly responsive to external events, still featuring the lowest power
consumption while inthe Power-down mode.
The device is manufactured using Atmel’s high density non-volatile memory technology. By
combining an enhanced RISC 8-bit CPU with Flash on a monolithic chip, the ATtiny26(L) is a
powerful microcontroller that provides a highly flexible and cost effective solution to many
embedded control applications.
The ATtiny26(L) AVR is supported with a full suite of program and system development tools
including: Macro assemblers, program debugger/simulators, In-circuit emulators, and evaluation

15
Digital Signal Processor (DSP) Tabular Method

The following tabular method uses the 2nd of the 2 forms, which are, y(n) =∑h(k ) x(n - k ) , for the
convolution sum.

The sequence y(n) is plotted in diagram below. Note that Ly, the length of y(n), equals the sum of
the lengths of x(n) and h(n) minus 1: Ly = Lx + Lh - 1.

16
MATLAB (Linear Convolution)

xn = [1, 2, 3, 1]; hn = [4, 3, 2, 1];

yn = conv(xn, hn)

M = length(xn) + length(hn) - 1;

m = 0: M-1;

stem(m, yn)

The result is: yn = 4 11 20 18 11 5 1

Email based Tabular method of linearity – Convolution assignment help - Tabular method of
linearity – Convolution homework help at Experts mind

 Basic Architectural Features of DSPs

• Data path configured for DSP

– Fixed-point arithmetic

– MAC- Multiply-accumulate

• Multiple memory banks and buses -

17
– Harvard Architecture

– Multiple data memories

• Specialized addressing modes

– Bit-reversed addressing

– Circular buffers

• Specialized instruction set and execution control

– Zero-overhead loops

– Support for fast MAC

– Fast Interrupt Handling

• Specialized peripherals for DSP

 Advantage of DSP processor :

1. High volume embedded systems

2. Cell phones
3. Hard Drives CD Drives
4. Modems
5. Printers
6. High performance data processing
7. Sonar
8. Wireless Basestations

 TYPES OF DSP PROCESSORS :

• 32-BIT FLOATING POINT (5% of market)

– TI TMS320C3X, TMS320C67xx
– AT&T DSP32C
– ANALOG DEVICES ADSP21xxx
– Hitachi SH-4
• 16-BIT FIXED POINT (95% of market):
– TI TMS320C2X, TMS320C62xx
– Infineon TC1xxx (TriCore1)
– MOTOROLA DSP568xx, MSC810x
– ANALOG DEVICES ADSP21xx
– Agere Systems DSP16xxx, Starpro2000
– LSI Logic LSI140x (ZPS400)

18
 – Hitachi SH3-DSP
– StarCore SC110, SC140

 Processor Applications :
• General Purpose Processors (GPPs) - high performance.
– Alpha’s, SPARC, MIPS ...
– Used for general purpose software
– Heavy weight OS - UNIX, Windows
– Workstations, PC’s, Clusters
• Embedded processors and processor cores
– ARM, 486SX, Hitachi SH7000, NEC V800...
– Often require Digital signal processing (DSP) support.
– Single program
– Lightweight, often realtime OS
– Cellular phones, consumer electronics .. (e.g. CD players)
• Microcontrollers
– Extremely cost sensitive
– Small word size - 8 bit common
– Highest volume processors by far
– Control systems, Automobiles, toasters, thermostats, ...

 Requirements of Embedded Processors :

Optimized for a single program - code often in on-chip ROM
or off chip EPROM
• Minimum code size (one of the motivations initially for Java)
• Performance obtained by optimizing datapath
• Low cost
– Lowest possible area
– Technology behind the leading edge
– High level of integration of peripherals (reduces system cost)
• Fast time to market
– Compatible architectures (e.g. ARM) allows reusable code
– Customizable cores (System-on-Chip, SoC).
• Low power if application requires portability

 DSP vs. General Purpose CPUs

• DSPs tend to run one program, not many programs.

– Hence OSes are much simpler, there is no virtual memory

19
or protection, ...

• DSPs usually run applications with hard real-time

constraints:

– You must account for anything that could happen in a time

slot

– All possible interrupts or exceptions must be accounted for

and their collective time be subtracted from the time

interval.

– Therefore, exceptions are BAD.

• DSPs usually process infinite continuous data streams.

• The design of DSP architectures and ISAs driven by the

requirements of DSP algorithms

CONCLUSION:

______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________

Date of Assessment Name of the Faculty Signature of the Faculty

20
 Experiment: 4
Date: ____/______/20______

Aim: To study about ccs (code composer studio)

Theory:
Code Composer Studio is primarily designed as for embedded project design and low-level
JTAG based debugging. However, the latest releases are based on unmodified versions of
the Eclipse open source IDE, which can be easily extended to include support for OS level
application debug (Linux, Android, Windows Embedded) and open source compiler suites such
as GCC.
Early versions included a real time kernel called DSP/BIOS and its later inception
SYS/BIOS. Currently, the successor to these tools, the TI-RTOS embedded tools ecosystem, is
available for downloading as a free plugin to Code Composer Studio.
Code Composer Studio extends the basic code generation tools with a set of debugging and real-
time analysis capabilities.

You should have already done the following:

❏ Install target board and driver software. Follow the installation instructions provided with the
board. If you are using the simulator or a target board whose driver software is provided with this
product you can perform the steps in the Installation Guide for this product.

❏ Install Code Composer Studio. Follow the installation instructions. If you have Code
Composer Studio Simulator and the TMS320C6000 code generation tools, but not the full Code
Composer Studio perform.

❏ Run Code Composer Studio Setup. The setup program allows Code Composer Studio to use
the drivers installed for the target board.

Code Composer Studio includes the following components:

❏ TMS320C6000 code generation tools.

❏ Code Composer Studio Integrated Development Environment (IDE).

❏ DSP/BIOS plug-ins and API.

❏ RTDX plug-in, host interface, and API.

Code Generation Tools:

21
The code generation tools provide the foundation for the development environment provided by
Code Composer Studio The most common software development path for C language programs
is shaded. Other portions are peripheral functions that enhance the development process.

Code Composer Studio Integrated Development Environment:

The Code Composer Studio Integrated Development Environment (IDE) is designed to allow
you to edit, build, and debug DSP target programs.

 Developing a Simple Program

Creating a New Project

1) If you installed Code Composer Studio in c:\ti, create a folder called hello1 in the c:\ti\
myprojects folder. (If you installed elsewhere, create a folder within the my projects
folder in the location where you installed.)
2) Copy all files from the c:\ti\c6000\tutorial\hello1 folder to this new folder.
3) From the Windows Start menu, choose Programs→ Code Composer Studio
’C6000→CCStudio. (Or, double-click the Code Composer Studio icon on your
desktop.)
4) Choose the Project→ New menu item.
5) In the Save New Project As window, select the working folder you created and click
Open. Type my hello as the filename and click Save. Code Composer Studio creates a
project file called myhello.mak. This file stores your project settings and references the
various files used by your project

Adding Files to a Project

1) Choose Project→ add Files to Project. Select hello. and click Open.
2) Choose Project→ Add Files to Project. Select a Source Files (*.a*, *.s*) in the Files
of type box. Select vectors.asm and click Open. This file contains assembly
instructions needed to set the RESET interrupt service fetch packets (ISFPs) to
branch to the program’s C entry point, c_int00. (For more complex programs, you
can define additional interrupt vectors in vectors.asm, or you can use DSP/BIOS as
shown in section 3.1, page 3-2 to define all the interrupt vectors automatically.)
3) Choose Project→ Add Files to Project. Select Linker Command File (*.cmd) in the
Files of type box. Select hello.cmd and click Open. This file maps sections to
memory.

22
 4) Choose Project→ Add Files to Project. Go to the compiler library folder (C:\ti\
c6000\cgtools\lib). Select Object and Library Files (*.o*, *.lib) in the Files of type
box. Select rts6201.lib and click Open. This library provides run-time support for the
target DSP. (If you are using the TMS320C6701 and floating point values, select
rts6701.lib instead.)

5) Expand the Project list by clicking the + signs next to Project, myhello.mak,
Libraries, and Source. This list is called the Project View.
6) Notice that include files do not yet appear in your Project View. You do not need to
manually add include files to your project, because Code Composer Studio finds
them automatically when it scans for dependencies as part of the build process. After
you build your project, the include files appear in the Project View.

Building and Running the Program

Code Composer Studio automatically saves changes to the project setup as you make
them. In case you exited from Code Composer Studio after the previous section, you can return
to the point where you stopped working by restarting Code Composer Studio and using Project→
Open.

To build and run the program, follow these steps:

1) Choose Project→ Rebuild All or click the (Rebuild All) toolbar button. Code
Composer Studio recompiles, reassembles, and relinks all the files in the project.
Messages about this process are shown in a frame at the bottom of the window.
2) Choose File→ Load Program. Select the program you just rebuilt, my hello .out, and
click Open. (It should be in the c:\ti\myprojects\hello1 folder unless you installed
Code Composer Studio elsewhere.) Code Composer Studio loads the program onto
the target DSP and opens a Dis-Assembly window that shows the disassembled
instructions that make up the program. (Notice that Code Composer Studio also
automatically opens a tabbed area at the bottom of the window to show output the
program sends to std out.)
3) Click on an assembly instruction in the Dis-Assembly window. (Click on the actual
instruction, not the address of the instruction or the fields passed to the instruction.)
Press the F1 key. Code Composer Studio searches for help on that instruction. This

4) Choose Debug →Run or click the (Run) toolbar button. When you are developing
is a good way to get help on an unfamiliar assembly instruction.

and testing programs, you often need to check the value of a variable during program
execution. In this section, you use breakpoints and the Watch Window to view such
values. You also use the step commands after reaching the breakpoint.

23
 1) Choose File→ Reload Program.
2) Double-click on the hello .c file in the Project View. You may want to make the
window larger so that you can see more of the source code at once.
1. Put your cursor in the line that says: fprintf (fptr, "%s", scanStr);
3) Click the (Toggle Breakpoint) toolbar button or press F9. The line is highlighted
in magenta. (If you like, you can change this color using Option→ Color.)
4) Choose View→ Watch Window. A separate area in the lower-right corner of the
Code Composer Studio window appears. At run time, this area shows the values
of watched variables.
5) Right-click on the Watch Window area and choose Insert New Expression from
the pop-up list.

Testing Algorithms and Data from a File

You begin by opening a project with Code Composer Studio and examining the source
code files and libraries used in that project.

1) If you installed Code Composer Studio in c:\ti, create a folder called volume1
in the c:\ti\myprojects folder. (If you installed elsewhere, create a folder
within the my projects folder in the location where you installed.)
2) Copy all files from the c:\ti\c6000\tutorial\volume1 folder to this new folder.
3) If Code Composer Studio is not already running, from the Windows Start
menu, choose Programs→ Code Composer Studio ’C6000→CCStudio.
4) Choose Project→ Open. Select the volume.mak file in the folder you created
and click Open.
5) Code Composer Studio displays a dialog box indicating the library file was
not found. This is because the project was moved. To locate this file, click
the Browse button, navigate to c:\ti\c6000\cgtools\lib, and select rts6201.lib.
(If you installed somewhere other than c:\ti, navigate to the \c6000\cgtools\
lib folder within the folder where you installed.)
6) Expand the Project View by clicking the + signs next to Project,
VOLUME.MAK, Include, Libraries, and Source.

Debugging Program Behavior

Opening and Examining the Project

You begin by opening a project with Code Composer Studio and examining the source
code files and libraries used in that project.

24
 1) If you installed Code Composer Studio in c:\ti, create a folder called volume2
in the c:\ti\myprojects folder. (If you installed elsewhere, create a folder
within the my projects folder in the location where you installed.)
2) Copy all files from the c:\ti\c6000\tutorial\volume2 folder to this new folder.
3) From the Windows Start menu, choose Programs→ Code Composer Studio
’C6000→CCStudio
4) Choose Project→ Open. Select the volume.mak file in the folder you created
and click Open.
5) Expand the Project View by clicking the + signs next to Project,
VOLUME.MAK, DSP/BIOS Config, and Source. The volumecfg.cmd file,
which was created along with a configuration file, includes a large number of
DSP/BIOS header files. (You do not need to examine all these header files.)

Modifying the Configuration File

A DSP/BIOS configuration file has already been created for this example. In this section,
you examine the objects that have been added to the default configuration.

1) In the Project View, double-click on the volume.cdb file (in the DSP/BIOS Con fig
folder) to open it
2) Click the + signs next to the CLK, LOG, and SWI managers. This configuration file
contains objects for these modules in addition to the default set of objects in the
configuration file.
3) Highlight the LOG object called trace. You see the properties for this log in the right half
of the window. This object’s properties are the same as those of the trace LOG you
created in section 3.1, page 3-2. The volume c program calls Log print f to write volume
example started to this log.
4) Right-click on the LOG object called LOG system. From the pop-up menu, select
Properties.
5) Change the befallen property to 512 words and click OK.
6) Highlight the CLK object called DATAO CLK. Notice that the function called when this
CLK object is activated is _data O. This is the data O function in volume c.
7) Since the data O function is no longer run within main, what causes this CLK object to
run its function? To find out, right-click on the CLK - Clock Manager object. From the
pop-up menu, select Properties. You see the Clock Manager Properties dialog.
8) Click Cancel to close the Clock Manager Properties dialog without making any changes.
9) Expand the list of HWI objects and examine the properties of the HWI_INT14 object. Its
interrupt source is Timer 0 on the DSP and it runs a function called CLK_F_isr when the
on-chip timer causes an interrupt.
10) Right-click on the processing_SWI software interrupt object. From the pop-up menu,
select Properties.

25
 11) Click Cancel to close this properties dialog without making any changes.
12) Since the processing function is no longer run within main, what causes this SWI object
to run its function? In volume.c, the dataIO function calls SWI_dec, which decrements
the mailbox value and posts the software interrupt if the new mailbox value is 0. So, this
SWI object runs its function every tenth time the dataIO_CLK object runs the dataIO
function.
13) Choose File→Close. You are asked whether you want to save your changes to
volume.cdb. Click Yes. Saving this file also generates volumecfg.cmd, volumecfg.s62,
and volumecfg.h62.
14) Choose Project→Build or click the (Incremental Build) toolbar button.
15) Connecting to I/O Devices

Opening and Examining the Project

1) If you installed Code Composer Studio in c:\ti, create a folder called hostio in the c:\
ti\myprojects folder. (If you installed elsewhere, create a folder within the myprojects
folder in the location where you installed.)
2) Copy all files from the c:\ti\c6000\tutorial\hostio1 folder to this new folder.
3) From the Windows Start menu, choose Programs→Code Composer Studio
’C6000→CCStudio.
4) Choose Project→Open. Select the hostio.mak file in the folder you created and click
Open.
5) Expand the Project View by clicking the + signs next to Project, HOSTIO.MAK, and
Source. The hostiocfg.cmd file, which was created when the configuration was saved,
includes a large number of DSP/BIOS header files. You do not need to examine all
these header files.

Reviewing the Signal prog Application

The source code for the Visual Basic signalprog.exe application is available in the
signalfrm.frm file. Details about this application are provided in the signalprog.pdf Adobe
Acrobat file. In this section, you examine a few of the routines and functions that are important
for this example.

❏Test_ON. This routine runs when you click the Test_ON button. It creates instances of the
RTDX exported interface for the input channel (toDSP) and for the output channel (fromDsp).
Then it opens and enables both of these channels. The channels in the signalprog.exe application
are the same channels declared globally in the hostio.c source code. This routine also clears the
graphs and starts the timer used to call the Transmit_Signal and Receive_Signal functions. These
global declarations made earlier in the Visual Basic source code connected the

26
READ_CHANNEL and WRITE_CHANNEL used in the Test_ON routine to the D2A_channel
and A2D_channel used in hostio.c:

❏ Test OFF. This routine disables, closes, and releases the RTDX objects created by Test ON. It
also disables the timer.

❏ Transmit Signal. This function generates a sine wave signal and displays it in the Transmitted
Signal graph. Then, the function attempts to transmit the signal to the target using the Write
method of the to DSP channel

❏ Receive signal. This function uses the ReadSAI2 method of the from DSP channel to read a
signal from the target. It displays the signal in the Received Signal graph.

Running the Modified Program

1) Choose Project→Rebuild All or click the (Rebuild All) toolbar button.

2) Choose File→Load Program. Select the program you just rebuilt, hostio.out, and
click Open.
3) Choose Tools→DSP/BIOS→Host Channel Control. The Host Channel Control
lists the HST objects and allows you to bind them to files on the host PC and to
start and stop the channels.
4) Choose Debug→Run or click the (Run) toolbar button.
5) Right-click on the input_HST channel and choose Bind from the pop-up menu.
6) Select the input.dat file in your working folder and click Bind.
7) Right-click on the output_HST channel and choose Bind from the pop-up menu.

CONCLUSION:

______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________

Date of Assessment Name of the Faculty Signature of the Faculty

Experiment: 5
27
Date: ____/______/20______

Aim: To study functional overview of TMS320F28335

Theory:

In this lab and also lab assignments we are going to switch gears a bit and focus on another
processor on the robot’s circuit board that takes care of the motor control and acquisition of
many of the robot’s sensors. This chip is named the TMS320F28335. Texas Instruments
categorizes this processor as a microcontroller but just for marketing reasons. It is actually one
of TI’s first DSP series and Figure 1 below it is much more powerful than a standard
microcontroller. The TMS320F28335 is clocked at 150MHz, has 67Kb of internal RAM, 512Kb
of program flash and a large number of peripherals. The peripherals we are most interested in
for our robot vehicle are the ADC (Analog to Digital) inputs, Optical Encoder inputs, PWM
outputs and SPI and I2C serial ports. In addition to the on-chip peripherals of the
TMS320F28335, external chips and sensors have been added to the robot’s circuit board to
interface with the TMS320F28335 giving it even more capabilities. See Table 1 for a list of
inputs, outputs and sensors the TMS320F28335 provides for the robot.

So you are not completely in the dark about the source code given, a brief description is in order.
To read four of the possible six optical encoder sensors that can be connected to the robot’s
processor board, four LS7366 chips are interfaced to the TMS320F28335 through its SPI serial
peripheral. So the TMS320F28335 uses its SPI serial port to read this 32 bit count from each of
the LS7366 chips. The TMS320F28335 has a peripheral for generating PWM signals so no
addition circuits are needed for PWM outs. In the case of the DAC outputs, the TMS320F28335
does not have a DAC peripheral. So in addition to the LS7366 chips connected to the
TMS320F28335’s SPI serial port there is a DAC7564 chip connected to the SPI serial interface
giving the TMS320F28335 two channels of 0-2.5V 12bit DAC output.
The TMS320F28335 code’s purpose is twofold. One is to acquire all the sensor information
every 1 millisecond and communicate this information to the OMAPL138 through another serial
port called the McBSP serial port. Second is to perform the speed control of the robot’s motors
also every 1 millisecond. In lab 4 you will be developing code to add the acquisition of the
sensors connected to the ADC peripheral of the TMS320F28335.

28
Features:
 C2000 Delfino TMS320F28335 MCU with 150 MIPS floating point core, 512 KB flash
memory, 18 PWM channels with high resolution, 12-bit 12.5 MSPS ADC, and more
 Built in isolated XDS100 JTAG Emulator enables real-time in-system programming and
debugging via USB
 Header pin access to key MCU signals
 Breadboard area for customizable routing
 Docking station with on board USB JTAG emulation
 Modular controlCARD slot, allowing easy interchange of the MCU
 Included controlCARD based on the C2000 Delfino TMS320F28335 MCU
 Jumper-based boot mode selection
 Free download of controlSUITE software examples, libraries, drivers, and more for
general application development.
 Free unrestricted version of Code Composer Studio integrated development environment
(IDE)

Hardware Features:
This C2000 Experimenter Kit is based around the C2000 Delfino™ TMS320F28335 MCU ,
which features a 150 MIPS processing core with floating point support, 512 KB integrated flash,
18 PWM channels with high resolution capability, 12-bit 12.5 MSPS ADC, capture interfaces,
QEP interfaces, serial connectivity, and more.The C2000 Experimenter Kit board hardware
includes an isolated XDS100 JTAG emulator facilitating easy programming and debugging,
header pins access to key microcontroller signals, breadboard area for customizable routing,
DIMM100 controlCARD plug-in slot, included controlCARD based on the C2000 Delfino
TMS320F28335 microcontroller, and more.

Plus, with the modularity provided by the controlCARD interface on the Experimenter Kit,
designers can purchase and experiment with other compatible C2000 MCU controlCARDs using
the same Experimenter Kit board hardware.

29
Figure 1: Pictorial of the Many Capabilities of the TMS320F28335 Processor

Table 1: TMS320F28335 Capabilities

30
 Sensors/Actuators Interfaced by
On Chip Peripherals Off Chip Peripherals
these Peripherals

1. 4 Optical Encoder
1. 12 PWM Outputs 1. +/- 400 deg/s Rate Gyro
Inputs

2. 16 ADC Inputs 2. 2 DAC Outputs 2. Ultrasonic Distance Sensors

3. 2 Optical Encoder Inputs 3. IR Distance Sensors

4. SPI serial port 4. Compass

5. I2C serial port 5. 6 Optical Encoder Sensors

6. UART serial port 6. 6 RC Servos

7. McBSP serial port 7. 2 DC Motors

8. Text LCD Screen

9. 4 Toggle Switches

10. 2 LEDs

This material is intended to be used as a student guide for a series of lessons and lab exercises
dedicated to the TMS320F28335 Digital Signal Controller. The series of modules will guide you
through the various elements of this device and train you in using Texas Instruments
development tools as well as additional Internet resources. The material should be used for
undergraduate classes at university. A basic knowledge of microprocessor architecture and
programming microprocessors in language C is necessary. The material in Modules 1 to 10 shall
be used in one semester, accompanied by lab exercises in parallel. Each module includes a
detailed lab procedure for self-study and guidance during the lab sessions. The experimental lab
sessions are based on the Texas Instruments Peripheral Explorer Board (TI part number:
TMDSPREX28335). A 32K code-size limited version of the software design suite Code
Composer Studios bundled with the Peripheral Explorer Board and will be used for the
development of code examples. Modules 11 to 19 of the series go deeper into details of the
TMS320F28335. They cover more advanced subjects and can be viewed as an optional series of
lessons.

CONCLUSION:

31
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________

Date of Assessment Name of the Faculty Signature of the Faculty

32
 Experiment: 6
Date: ____/______/20______

Aim: PWM Generation and application.

Theory:
Pulse Width Modulation is a technique that conforms a signal width, generally pulses based on
modulator signal information.

 The general purpose of Pulse Width Modulation is to control power delivery, especially
to inertial electrical devices.
 The on-off behavior changes the average power of signal.
 Output signal alternates between on and off within a specified period.
 If signal toggles between on and off quicker than the load, then the load is not affected by
the toggling.
 A secondary use of PWM is to encode information for transmission.

General Types of Pulse Width Modulation

 There are three commonly used types of PWM defined by which edge of the analog
signal is to be modulated
 Lead Edge Modulation
 Trail Edge Modulation
 Pulse Center Two Edge Modulation/Phase Correct PWM

Lead Edge Modulation

33
Trail Edge Modulation

Advantages of Using PWM

 Average value proportional to duty cycle, this dependence is often observed to follow a
linear trend due to the previous formulaic definition.
 Low power used in transistors used to switch the signal, and fast switching possible due
to MOSFETS and power transistors at speeds in excess of 100 kHz
 Alleviates the problem of high heat loses through resistive elements at intermediate
voltage points.

34
Disadvantages to Using PWM

 Cost of integrated circuit packages for PWM

 Complexity of circuitry necessary for implementation
 Radio Frequency Interference/Electromagnetic Interference limits the performance of the
circuitry
 Voltage spikes in the pulse signal to a rapid succession of switches similar to an impulse.

Methods for Pulse Width Modulation Generation

 There are several methods for generating the PWM signal, including the following:
 Analog Generation Methods
 The Intersective Method
 Digital Generation Method
 Delta Modulation
 Delta Sigma Modulation
 Space Vector Modulation
 Application Specific Methods
 Direct Torque Control
 Time Proportioning

Applications
• Audio and video effects
• Telecommunications
• Power delivery
• Voltage regulation
• Amplification
• Controlling Actuators
• Use as ADC

Applications: LED Displays

• RGB LEDs often use 8 bit PWM control

• Each pixel is individually controlled

• Color can be defined as % of duty cycle (#/255)

– Red: 0 – 255

– Green: 0 – 255

– Blue: 0 – 255

35
 – Number of colors: 256^3 = 16.77 million

• Decimal Code (RR,GG,BB)

Hex Code #RRGGBB.

Applications: Telecommunications

• Embed a data signal in a modified clock signal

Can discretize further for larger than base 2 transmission.

CONCLUSION:

______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________

Date of Assessment Name of the Faculty Signature of the Faculty

36
 Experiment: 7
Date: ____/______/20______

Aim: ADC Generation and Application

Theory:

WHAT IS ADC?

 An electronic integrated circuit which transforms a signal from analog (continuous) to

digital (discrete) form.
 Analog signals are directly measurable quantities.
 Digital signals only have two states. For digital computer, we refer to binary states, 0 and
1.

WHY ADC IS NEEDED?

 Microprocessors can only perform complex processing on digitized signals.

 When signals are in digital form they are less susceptible to the deleterious effects of
additive noise.
 ADC Provides a link between the analog world of transducers and the digital world of
signal processing and data handling.

APPLICATION OF ADC:

 ADC are used virtually everywhere where an analog signal has to be processed, stored, or
transported in digital form.
 Some examples of ADC usage are digital volt meters, cell phone, thermocouples, and
digital oscilloscope.
 Microcontrollers commonly use 8, 10, 12, or 16 bit ADCs, our micro controller uses an 8
or 10 bit ADC.

ADC PROCESS:

2 steps:

 Sampling and Holding (S/H)

 Quantizing and Encoding (Q/E)

Figure of this process is in next page.

37
 “Figure of ADC process”

SAMPLING AND HOLDING:

“Figure of sampling and holding”

 Holding signal benefits the accuracy of the A/D conversion

38
  Minimum sampling rate should be at least twice the highest data frequency of the analog
signal

QUANTIZING AND ENCODING:

Resolution:

The smallest change in analog signal that will result in a change in the digital output.

V = Reference voltage range

N = Number of bits in digital output.
2N = Number of states.
ΔV = Resolution

The resolution represents the quantization error inherent in the conversion of the signal to digital
form

• Quantizing:

In binary Partitioning the reference signal range into a number of discrete quanta, then matching
the input signal to the correct quantum.

• Encoding:

Assigning a unique digital code to each quantum, then allocating the digital code to the input
signal.

ACCURACY OF ADC CONVERSION:

There are two ways to best improve the accuracy of A/D conversion:

 Increasing the resolution which improves the accuracy in measuring the amplitude of the
analog signal.
 Increasing the sampling rate which increases the maximum frequency that can be
measured.

39
TYPES OF ADC:

 Dual Slope A/D Converter

 Successive Approximation A/D Converter
 Flash A/D Converter
 Delta-Sigma A/D Converter
 Other

o Voltage-to-frequency, staircase ramp or single slope, charge balancing or

redistribution, switched capacitor, tracking, and synchro or resolver

OUTPUT:

ADVANTAGES:

 Capable of high speed and reliable

 Medium accuracy compared to other ADC types
 Good tradeoff between speed and cost
 Capable of outputting the binary number in serial (one bit at a time) format.

DISADVANTAGES:

 Higher resolution successive approximation ADC’s will be slower

 Speed limited to ~5Msps

CONCLUSION:

40
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________

Date of Assessment Name of the Faculty Signature of the Faculty

41
 Experiment: 8
Aim: To study about timers in microcontroller.

Theory:

What is timer?

We use timers every day - the simplest one can be found on your wrist. A simple clock will time
the seconds, minutes and hours elapsed in a given day - or in the case of a twelve hour clock,
since the last half-day. AVR timers do a similar job, measuring a given time interval.

An AVR timer in simplest term is a register. Timers generally have a resolution of 8 or 16 bits.
So an 8 bit timer is 8 bits wide, and is capable of holding value within 0-255. But this register
has a magical property - its value increases/decreases automatically at a predefined rate (supplied
by user). This is the timer clock. And this operation does not need CPU’s intervention.

The AVR timers are very useful as they run asynchronous to the main AVR core. This is a fancy
way of saying that the timers are separate circuits on the AVR chip which can run independent of
the main program, interacting via the control and count registers, and something called timer
interrupts.

How to use timer?

Since Timer works independently of CPU it can be used to measure time accurately. Timer upon
certain conditions takes some action automatically or informs CPU. As we know a timer is an 8
bit register that keeps on increasing its value, so one of the basic conditions is the situation when
timer register OVERFLOWS i.e. it has counted up to its maximum value (255 for 8 BIT timers)
and rolled back to 0. In this situation timer can issue an interrupt and you must write an Interrupt
Service Routine (ISR) to handle the event. There are three different timers available in
Atmega16 and all the timers work in almost same way. They are TIMER0, TIMER1 and
TIMER2.

42
Timer modes:
Timers are usually used in one of the following modes:
 Normal
 CTC
 Fast PWM
 Phase correct PWM

Normal mode
A timer running in normal mode will count up to its maximum value. When it reaches this
maximum value, it issues an Overflow interrupt and resets the value of the timer to its
original value.

In the above case, you can see that the time period is 256 times the time period of the clock. 255
clock cycles are required to attain the maximum value and one clock cycle to clear the timer
value.
So, ftimer = fclock / 256

CTC MODE

Here we shall see how to use a timer in compare mode. In the normal mode, we set the clock of
the timer using a prescalar and the let the timer run. When it overflowed, we set up an interrupt
to handle the overflow. While simple, this mode has its limitations. We are confined to a very
small set of values of frequency for the timer. This limitation is overcome by the compare mode.
Compare mode makes use of a register known as the Output Compare Register which stores a
value of our choice. The timer continuously compares its current value with the value on the
register and when the two values match, the following events can be configured to happen:

1. A related Output Compare pin can be made set (put to high), cleared (put to low) or toggled
automatically. This mode is ideal for generating square waves of different frequency.

2. It can be used to generate PWM signals used to implement a DAC digital to analog converter
which can be used to control the speed of DC motors.
43
3. Simply generate and interrupt and call a handler.

On a compare match, the timer resets itself to 0. This is called CTC – Clear Timer on Compare
Match.
In this case, suppose we set our event to toggle the output pin. In that case, the output pin will
remain high for one time period of the timer and will remain low for another time period.
So, tout = 2 x ttimer

From the normal case, we can draw an analogy to find out ttimer.
ttimer = tclock x (OCR + 1)

So, finally, we have the frequency as,

fout = fclock / (2 x (OCR + 1))

PWM MODE

A digital device like a microcontroller can easily work with inputs and outputs that have only
two states - on or off. So you can easily use it to control a LED's state i.e. on or off. In the same
way you can use it to turn “on or “off” any electrical device by using proper drivers (transistor,
triac, relays etc). But sometimes you need more than just "on" & "off" control over the device.
For example, if you want to control the brightness of an LED (or any lamp), or the speed of DC
motor, then digital on/off signals will not suffice. This situation is very smartly handled by a
technique called as PWM or Pulse Width Modulation.
PWM is the technique used to generate analog signals from a digital device like a MCU.

PHASE CORRECT PWM MODE

This mode is very similar to the Fast PWM mode except that whenever the value of the timer
reaches its maximum value then instead of clearing the value of the timer it simply starts
counting down.
The value of the pin toggles only when the value of the OCR0 matches with the TIMER0
counter.

Here,
tout = ttimer = 2 x tclock x OCR
Hence,
fout =fclock / (2 x OCR)

44
CONCLUSION:

______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________

Date of Assessment Name of the Faculty Signature of the Faculty

Experiment: 9
Date: ____/______/20______

45
Aim: To study the basics of DCS programming with examples.

Theory:
DCS Programming

Programming Languages

A program loaded into DCS systems in machine code, a sequence of binary code numbers to
represent the program instructions. Assembly language based on the use of mnemonics can be
used, and a computer program called an assembler is used to translate the mnemonics into
machine code. High level Languages (C, BASIC, etc.) can be used.

Introduction to Ladder Logic

Ladder logic uses graphic symbols similar to relay schematic circuit diagrams. Ladder diagram
consists of two vertical lines representing the power rails. Circuits are connected as horizontal
lines between these two verticals.

Ladder diagram features

 Power flows from left to right.

 Output on right side cannot be connected directly with left side.
 Contact cannot be placed on the right of output.
 Each rung contains one output at least.
 Each output can be used only once in the program.
 A particular input a/o output can appear in more than one rung of a ladder.
 The inputs a/o outputs are all identified by their addresses.

Fig.: - (1) Basic Ladder Programming

Introduction to Statement list

46
Statement list is a programming language using mnemonic abbreviations of Boolean logic
operations. Boolean operations work on combination of variables that are true or false. A
statement is an instruction or directive for the PLC.

Statement List Operations

* Load (LD) instruction.

* And (A) instruction.

* Or (O) instruction.

* Output (=) instruction.

Function Block Diagrams

Function block is represented as a box with the function name written in.

Fig.: - (2) Function block

Here, Note that,

 LD: load

47
  O: or
 AN: and not (and a normally closed contact)
 ALD: AND the first LD with second LD

Programming Examples:

Example 1:

Write a program (instruction list) to put the number (4000) in a memory location, and the
number (41) in another location. Divide the first one by the second and put the result in a
memory location.

Solution:

Example 2:

Make a program to increase the counter by one with each pulse from the pulse generator SM0.4
(on rising edge), and decrease another counter by the same pulse.

Solution:

Steps of solution would be like this:

1. Put zero in memory location vw100.

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2. Put (10) in the memory location vw110.

3. with each rising edge from SM0.4 (every 30 sec), we increase memory location vw100 by
one. And at the same time decrease VW110 by one. The program will continue like that without
any instruction to stop.

Please note that:

MOVW => move word

INCW => increment word

DECW => decrement word

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Example 3:

Put a value in memory location vw200, and using shifting method, move this value to the output
of the PLC.

Solution:

When we press the PLC input button (I0.0), the PLC will put the value (980) inside memory
location vw200, and when the rising edge of the pulse arrives, the contents of memory location
will be shifted to the left for one bit (the instruction SLW = shift left word). We could put 2 after
# to shift two bits to left. If we put 7 after the #, the overflow indicator will be activated
(SM1.1=1) which will activate the output in question.

Example 4:

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Using two timers write a program so we have a pulse on PLC output with (TON = 10 sec.) and
(TOFF = 10 sec.) *TON: timer output on, TOFF: timer output off.

Solution:

Example 5:

Using up-counter (CTU), make the PWM algorithm.

Solution:

There is inside the PLC places for generating a series of pulses with fixed durations, one of
these places is SM0.5, it generates a pulse of 1 second (on time is 0.5 sec and off time is 0.5 sec).
Another one is SM0.4, it generates a 60 second pulses.

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CONCLUSION:
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________

Date of Assessment Name of the Faculty Signature of the Faculty

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 Experiment: 10
Date: ____/______/20______

Aim: To develop elementary signal function modules (m-files) for unit sample, unit step,
exponential and unit ramp sequences.

Apparatus:
PC having MATLAB software.

Program:
% program for generation of unit sample

clc;clear all;close all;

t = -3:1:3;

y = [zeros(1,3),ones(1,1),zeros(1,3)];

subplot(2,2,1);stem(t,y);

ylabel('Amplitude------>');

xlabel('(a)n ------>');

title('Unit Impulse Signal');

% program for genration of unit step of sequence [u(n)- u(n)-N]

t = -4:1:4;

y1 = ones(1,9);

subplot(2,2,2);stem(t,y1);

ylabel('Amplitude------>');

xlabel('(b)n ------>');

title('Unit step');

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% program for generation of ramp signal

n1 = input('Enter the value for end of the seqeuence '); %n1 = 7 %

x = 0:n1;

subplot(2,2,3);stem(x,x);

ylabel('Amplitude------>');

xlabel('(c)n ------>');

title('Ramp sequence');

% program for generation of exponential signal

n2 = input('Enter the length of exponential seqeuence '); %n2 = 7 %

t = 0:n2;

a = input('Enter the Amplitude'); %a=1%

y2 = exp(a*t);

subplot(2,2,4);stem(t,y2);

ylabel('Amplitude------>');

xlabel('(d)n ------>');

title('Exponential sequence');

disp('Unit impulse signal');y

disp('Unit step signal');y1

disp('Unit Ramp signal');x

disp('Exponential signal');x

Output:
Enter the value for end of the sequence 6

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Enter the length of exponential sequence 4

Enter the Amplitude1

Unit impulse signal y = 0 0 0 1 0 0 0

Unit step signal y1 = 1 1 1 1 1 1 1 1 1

Unit Ramp signal x = 0 1 2 3 4 5 6

Exponential signal x = 0 1 2 3 4 5 6

Graph:

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CONCLUSION:

______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________

Date of Assessment Name of the Faculty Signature of the Faculty

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