COMPUTER ORGANIZATION

AND
ARCHITECTURE

E. Ilavarasan
 What is a computer?
• A computer is a sophisticated electronic calculating machine
that:
– Accepts input information,
– Processes the information according to a list of internally
stored instructions (program) and
– Produces the resulting output information.

2
Block Diagram of Computer with Functional Units
 COMPUTER COMPUTER
S.NO ARCHITECTURE ORGANIZATION

Architecture describes what Organization describes how it

1. the computer does. does it.
Deals with functional Deals with structural
2. behavior of computer system. relationship
It deals with high-level It deals with low-level design
3. design issue. issue.
Architecture indicates its Where, Organization indicates
4. hardware. its performance.
For designing a computer,
For designing a computer, its organization is decided after its
5. architecture is fixed first. architecture.
 COMPUTER COMPUTER
S.NO ARCHITECTURE ORGANIZATION
Computer Architecture
comprises logical functions Computer Organization
such as instruction sets, consists of physical units like
registers, data types and circuit designs, peripherals and
6. addressing modes. adders.
Organization is done on the
Abstract model and is basis of architecture
programmer's view in terms
of instructions, addressing
7. modes and registers
Architecture coordinates Computer Organization
between the hardware and handles the segments of the
8. software of the system. network in a system.
 To be Noted
• Programs written to run on a particular computer architecture
should always run correctly on that architecture no matter what
computer organization (implementation) is used.
• For example, both Intel and AMD processors have the same
X86 architecture, but how the two companies implement that
architecture (their computer organizations) is usually very
different.
• The same programs run correctly on both, because the
architecture is the same, but they may run at different speeds,
because the organizations are different.
Types of Computer Architecture
• Von-Neumann Architecture
• Based on the stored-program computer concept, where program
and data are stored in the same memory
• Harvard Architecture
• Harvard architecture is used when data and program code is
present in different memory blocks
• Instruction Set Architecture
• ISA describes the design of a Computer in terms of the basic
operations it must support.
• ISA has a set of instructions that the processor understands. It
has two instruction set one is RISC (reduced instruction set
computer) and CISC (complex instruction set computer).
Von Neumann Vs Harvard architecture
Types of Computer Architecture
Microarchitecture
• It is the way a given ISA is implemented in a particular
processor
• The Microarchitecture is more concerned with the lower level
implementation of how the instructions are going to be
executed
• For example, x86-64 (64-bit CPU architecture) is the ISA
used by most modern laptop and desktop computers. It is
implemented by various micro-architectures, including those
designed by Intel and AMD.
• Software that is compiled for the x86-64 ISA can run on any
micro-architecture designed to use the x86-64 instruction set
Computer Components: Top-Level View
Computer Architecture
Central Processing Unit (CPU)
• The Central Processing Unit (CPU) is the electronic circuit
responsible for executing the instructions of a computer program.
• It is sometimes referred to as the microprocessor or processor.
• The CPU contains the ALU, CU and a variety of registers.
Arithmetic and Logic Unit (ALU)
• The ALU perform arithmetic (add, subtract etc) and logic (AND,
OR, NOT etc) operations.
Registers
• Registers are high speed storage areas in the CPU.
• All data must be stored in a register before it can be processed.

Memory Address Holds the memory location of data that

MAR
Register needs to be accessed
Memory Data Holds data that is being transferred to
MDR
Register or from memory
Where intermediate arithmetic and
AC Accumulator
logic results are stored
Contains the address of the next
PC Program Counter
instruction to be executed
Current Instruction Contains the current instruction during
CIR
Register processing
Control Unit (CU)
• The control unit controls the operation of the ALU, memory
and input/ output devices
• Control unit generates timing signals which determines
“when” a particular operation should takes place.
Memory Unit
• The memory unit consists of RAM. This memory is fast and
directly accessible by the CPU.
• RAM has two parts address and its data / contents (binary).
• The address will uniquely identify every location in the memory
• Loading program and data from permanent memory (hard
drive), into RAM, allows the CPU to operate much quicker
Memory unit
• Memory unit stores instructions and data.
• Processor reads instructions and reads/writes data from/to the
memory during the execution of a program.
– In practice, a group of bits is fetched at a time.
– Group of bits stored or retrieved at a time is termed as word
– Number of bits in a word is termed as the “word length” of
a computer.
• In order to write/read a word to and from memory, a processor
should know where to look:
– “Address” is associated with each word location.

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Memory unit (contd..)
• Random Access Memory (RAM) provides fixed access time
independent of the location of the word.
– Access time is known as “Memory Access Time”.
• Memory and processor have to “communicate” with each
other in order to read/write information.
– To reduce “communication time”, a small amount of RAM
(known as Cache) is tightly coupled with the processor.
• Modern computers have three to four levels of RAM units
with different speeds and sizes:
– Fastest, smallest known as Cache
– Slowest, largest known as Main memory.

15
Memory unit (contd..)
• Primary storage is insufficient to store large amounts of data
and programs. We can increase capacity, but it is expensive.
• To retain data/information permanently, secondary storage
devices are required
• We Store large amounts of data on secondary storage devices:
– Magnetic disks and tapes,
– Optical disks (CD-ROMs).
– Access to the data stored in secondary storage in slower,
compared to the primary memory
• Cost of a memory unit depends on its access time, lesser
access time implies higher cost.

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Input unit
Binary information must be presented to a computer in a specific
format. This task is performed by the input unit:
- Interfaces with input devices.
- Accepts binary information from the input devices.
- Presents this binary information in a format expected by the
computer.
- Transfers this information to the memory or processor.

Real world Computer

Memory
Keyboard
Audio input
…… Input Unit

Processor

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Output unit
- Interface with output devices.
- Accept processed results provided by the computer in specific
binary form.
- Convert the information in binary form to a form understood by
an output device.

Computer
Memory
Real world

Output Unit
Printer
Graphics display
Processor Speakers
……

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How are the functional units connected?
•For a computer to achieve its operation, the functional units need
to communicate with each other.
•In order to communicate, they need to be connected.

• Functional units may be connected by a group of parallel wires.

called a bus.
• Each wire in a bus can transfer one bit of information.
•The number of parallel wires in a bus is equal to the word length
of a computer
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Buses
• A standard CPU system bus is comprised of a control bus, data
bus and address bus.
• Address Bus- Carries the addresses of data between the
processor and memory and other devices
• Data Bus- Carries data between the processor, the memory
unit and the input/output devices
• Control Bus- Carries control signals/commands from the CPU
(and status signals from other devices) in order to control and
coordinate all the activities within the computer
Computer System Components
Software- Operating System
• An operating system is the most important system software that
runs on a computer
• Every general-purpose computer must have an operating system
to run other programs and applications
• An operating system acts as an interface between the user of a
computer and computer hardware.
• It manages the computer's hardware (memory, CPU input and
output etc..) resources, as well as all of its software
• The purpose of an operating system is to provide an
environment in which a user can execute programs in a
convenient and efficient manner.
Computer booting
• When booting, the computer
performs the following tasks.
• Pressing the power button on
the computer starts up the
power supply, which
subsequently provides power
to all other hardware inside
the computer
• A self diagnostic is
performed, also known as
a POST, to check if all
hardware in the computer is
working properly.
Computer booting Process contd…
• The BIOS checks the hard drive for the boot loader, located in
the first sector of the hard drive.
• The boot loader looks for the operating system on the hard
drive and begins loading the OS (e.g., Linux, or Windows).
• Hardware drivers are loaded, allowing the operating system to
interact and utilize the hardware components
• If configured in the operating system, a login screen is
displayed, allowing a user to enter a username and password to
log in.
• The computer becomes ready for operation
Instructions
• Instructions specify commands to:
– Transfer information within a computer (e.g. from memory to ALU)
– Transfer of information between the computer and I/O devices (e.g.,
from keyboard to computer, or computer to printer)
– Perform arithmetic and logic operations (e.g., Add two numbers,
Perform a logical AND).
• A sequence of instructions to perform a task is called a program,
which is stored in the memory.
• Processor fetches instructions that make up a program from the
memory and performs the operations stated in those instructions.
• What do the instructions operate upon?

26
Data
• Data are the “operands” upon which instructions operate.
• Data could be:
– Numbers,
– Encoded characters.
• Data, in a broad sense means any digital information.
• Computers use data that is encoded as a string of binary digits
called bits.

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Basic Operational Concepts: Instruction Execution
Assembly Program
Add R0, R1
Move #10, R0

High Level Language

register int R0, R1
R0= 10
R0 = R0 +R1

Main Memory
Address Content
1000 Add / Op-code
1001 Move / Op-code
1002 10 / Data
1003 -
Execution of typical Instruction
• (PC)  (MAR)
- The contents of PC transferred to MAR
• (MAR)  (Address bus)
- Select a particular memory location
• CU issues RD control signal
• Reads instruction present in memory and loaded into MDR
• MDR content will be placed in IR ( MDR  IR )
• Instruction code in IR is decoded by CPU to understand the
type of operation it has to perform
• Increments the contents of PC by 1 (to point next instruction)
• Perform the operation, if data is available in register (CPU)
Execution of typical Instruction contd..
• If data is present in memory following sequence is performed
• Address of the data in PC  MAR
• MAR  Address bus
• Select memory location based on MAR and generated RD signal
• Reads data via data bus  MDR
• From MDR data can be directly routed to ALU or it can be
placed in register and then operation can be performed
• Results of the operation can be directed towards output device,
memory or register
• One or more steps are performed in one clock pulse
Example : Add R1, R2

T1  Enable R1

T2  Enable R2

Enable ALU for addition operation

T3 

T4 
 •Control unit works with a reference
signal called processor clock
T1
•Processor divides the operations
T2 into basic steps

•Each basic step is executed in one

clock cycle

R1 R2

R2
 Evolution of Computers
FIRST GENERATION (1945 – 1955)
• Program and data reside in the same memory (stored program
concepts – John von Neumann)
• First generation computers relied on ‘machine language’ which
is the most fundamental programming language that can be
understood by computers
• Vacuum tubes were used to implement (ALU & CU design)
• Magnetic core and magnetic tape storage devices are used
• Using electronic vacuum tubes, as the switching components
• The two eminent machines of this era were the UNIVAC
(Universal Automatic Computer) and ENIAC (Electronic
Numerical Integrator and Computer) machines
SECOND GENERATION (1955 – 1965)
• Transistor were used to design ALU & CU
• Computers moved from machine language to symbolic, or
assembly languages, which allowed programmers to specify
instructions in words. (ADD, SUB, INR.. etc)
• Symbolic (‘assembly’) languages were used to write programs
• High-level Programming languages (early versions of COBOL
and FORTRAN) were being developed
• To convert HLL to ML compiler were used
• Separate I/O processor were developed to operate in parallel
with CPU, thus improving the performance
• Invention of the transistor which was faster, smaller and
required considerably less power to operate
• Consume less electricity and generate less heat
THIRD GENERATION (1965-1975)
• IC technology improved
• Improved IC technology helped in designing low cost, high
speed processor and memory modules
• First computers where users interacted utilizing keyboards and
monitors with the help of operating systems (OS)
• OS- system program controls the resources of computers
• Multiprogramming, pipelining concepts were incorporated
• Cache and virtual memory concepts were developed
• More than one circuit on a single silicon chip became available
FOURTH GENERATION (1975-1985)
• The microprocessor brought the fourth generation of
computers, as thousands of integrated circuits were built onto a
single silicon chip using VLSI technology
• INTEL, MOTOROLA, TEXAS,NATIONAL semiconductors
started developing microprocessor (CPU /Processor)
• Workstations, microprocessor (PC) & Notebook computers
were developed
• Different computers are interconnected for better
communication by LAN, MAN,WAN
• Fourth generation computers also saw the development
of GUIs, the mouse and handheld devices.
• Processors like Digital Signal Processor were also developed
BEYOND THE FOURTH GENERATION
(1985 – TILL DATE)
• Fifth generation computing devices, based on artificial
intelligence, are still in development, though there are some
applications, such as voice recognition, that are being used
today
• The goal of fifth-generation computing is to develop devices
that respond to natural language input and are capable of
learning and self-organization
• E-Commerce, E- banking, home office
• ARM, AMD, INTEL, MOTOROLA
• High speed processor - GHz speed
 COMPUTER TYPES

Computers are classified based on the

parameters like
• Speed of operation
• Cost
• Computational power
• Type of application
DESKTOP COMPUTER
• The most common computer is the personal computer
• Processing & storage units, visual display & audio units,
keyboards
• Storage media-Hard disks, CD-ROMs
• Eg: Personal computers which is used in homes and offices
• Advantage: Cost effective, easy to operate, suitable for general
purpose educational or business application

NOTEBOOK COMPUTER
• Compact form of personal computer (laptop)
• Advantage is portability
WORK STATIONS
• More computational power than PC
• Costlier
• Used to solve complex problems which arises in
engineering application (graphics, CAD/CAM etc)

ENTERPRISE SYSTEM (MAINFRAME)

•More computational power
•Larger storage capacity
•Used for business data processing in large organization
•Commonly referred as servers or super computers
SERVER SYSTEM
• Supports large volumes of data which frequently need to
be accessed or to be modified
• Supports request response operation

SUPER COMPUTERS
• Faster than mainframes
• Helps in calculating large scale numerical and algorithm
calculation in short span of time
• Used for aircraft design and testing, military application
and weather forecasting
HANDHELD
• Also called a PDA (Personal
Digital Assistant).
• A computer that fits into a
pocket, runs on batteries,
and is used while holding
the unit in your hand.
• Typically used as an
appointment book, address
book, calculator, and
notepad.
• Can be synchronized with a
personal microcomputer as
a backup.
 Basic Terminology
• Computer • Software
– A device that accepts input, – A computer program that
processes data, stores tells the computer how to
data, and produces output, perform particular tasks.
all according to a series of
stored instructions.
• Network
– Two or more computers
• Hardware
and other devices that are
– Includes the electronic and connected, for the purpose
mechanical devices that of sharing data and
process the data; refers to programs.
the computer as well as
peripheral devices.
• Peripheral devices
– Used to expand the
computer’s input, output
and storage capabilities.
 Basic Terminology
Interpreter
Converts HLL to MLL, does this job statement by
statement

System software
Program routines which aid the user in the
execution of programs eg: Assemblers,
Compilers

Operating system
Collection of routines responsible for controlling
and coordinating all the activities in a computer
system
Clock
• Synchronizes Processor and Bus operations
• Clock cycle = Clock period = 1 / Clock rate

Cycle 1 Cycle 2 Cycle 3

• Clock rate = Clock frequency = Cycles per second

• Cycle per second is also called Hertz
– 1 Hz = 1 cycle/sec 1 KHz = 103 cycles/sec
– 1 MHz = 106 cycles/sec 1 GHz = 109 cycles/sec
– 2 GHz clock has a cycle time = 1/(2×109) = 0.5
nanosecond (ns)
• Clock cycles measure the execution of instructions
Time Calculation
• 8085- based Microprocessor with 4 MHz clock frequency
• For Instruction of MOV A,B, take 4 t-state or clock cycles
• Clock frequency f = 4 MHz
• Clock period T = 1/f = 1/4 x 10-6
= 0.25 μs
• Time to execute MOV A, B
= 4 t-states x 0.25 μs
= 1 μs (1000 ns)
• For Processor with 4 GHz clock
T = 1/f = 1/4 x 10-9
= 0.25 ns
• Time to execute MOV A, B
= 4 t-states x 0.25 ns = 1 ns
MOV A,B – timing
• T1 : microprocessor places the memory
address from PC onto address bus
• T2: Control unit sends RD signal to enable memory
• T3: Instruction ( op-code) from memory location is
placed in data bus
• T4: Op-code is placed in IR register and is decoded and
executed
Basic Performance Equation
• The processor time required to execute a program is given by
T = N x S / R, where,
– N is the actual number of machine instructions executions
– S is the average number of basic steps needed to execute
one machine instruction, where each basic step is executed
in one clock cycle
– R is the clock rate in cycle per second
Note : Actual number of instruction execution is not necessarily equal
to the number of machine instructions in the object program
Higher performance is achieved by reducing N and S values or/and
increasing the R
Problem
A program contains 1000 instructions. Out of that 25%
instructions requires 4 clock cycles, 40% instruction
requires 5 cycles and remaining requires 3 clock cycles for
execution. Find the total time required to execute the
program in a 1 GHz machine

Solution
N =1000
25% of N = 250 instructions require 4 clock cycles
40% of N = 400 instructions require 5 clock cycles
35% of N = 350 instructions require 3 clock cycles
T = (N x S) R
= (250*4+400*5+350*3) / 1x109
= (1000+2000+1050) / 1x109
= 4.05 μs
Performance Measurement
• Computer designer use performance estimates to evaluate the
effectiveness of new features
– Practice is to use benchmarks available to all manufacturers
e.g. SPEC benchmark (www.spec.org)
– SPEC rating of 2 means that the computer under test is
2 times faster than the reference computer.
– The test is repeated for various programs in the SPEC suite.
The overall rating for the computer is given by
Running time on the reference computer
SPEC rating 
Running time on the computer under test
n 1
SPEC rating  (  SPEC i ) n

i 1
where n is the number of programs

50
Instruction Execution Cycle
• Fetch PC program
• Decode
I-1 I-2 I-3 I-4
• Fetch operands
• Execute memory fetch
• Store output op1
read
op2
registers registers
instruction
I-1 register

decode
write

write

flags ALU

execute
(output)
51
Instruction pipelining
• Instruction pipelining is a technique that implements a
form of parallelism called instruction-level
parallelism within a single processor.
• It therefore allows faster CPU throughput (the number of
instructions that can be executed in a unit of time
• The basic instruction cycle is broken up into a series
called a pipeline. Rather than processing each instruction
sequentially,each instruction is split up into a sequence of
dependent steps so different steps can be executed
in parallel and instructions can be processed
concurrently (starting one instruction before finishing the
previous one).
A non-pipelined processor. Many wasted cycles.

Stages
S1 S2 S3 S4 S5 S6
1 I-1
2 I-1
3 I-1
4 I-1
5 I-1
Cycles

6 I-1
7 I-2
8 I-2
9 I-2
10 I-2
11 I-2
12 I-2
53
Pipelined Execution
• More efficient use of cycles, greater throughput of instructions:

S ta g e s
S1 S2 S3 S4 S5 S6
1 I-1
2 I-2 I-1
Cycles

3 I-2 I-1
4 I-2 I-1
5 I-2 I-1
6 I-2 I-1
7 I-2

For k stages and n instructions, the number of

required cycles is: k + (n – 1), here it is 6+(2-1)=7
Superscalar Processor
• A superscalar processor is a CPU that implements a form
of parallelism called instruction-level parallelism within a
single processor.
• A superscalar processor can execute more than one instruction
during a clock cycle by simultaneously dispatching multiple
instructions to different execution units on the processor.
Hence, provide higher throughput
• The CPU dynamically checks for data dependencies between
instructions at run time
• Each execution unit is not a separate processor (or a core if the
processor is a multi-core processor), but an execution resource
within a single CPU such as an arithmetic logic unit.
Simple superscalar pipeline.
By fetching and dispatching two instructions at a time, a maximum
of two instructions per cycle can be completed.
(IF = Instruction Fetch, ID = Instruction Decode, EX = Execute,
MEM = Memory access, WB = Register write back, i = Instruction
number, t = Clock cycle [i.e., time])
Multi-core Processor
• A multi-core processor is a single computing component with
two or more independent actual processing units (called
"cores"), which are units that read and execute program
instructions.
• The instructions are ordinary CPU instructions (such as add,
move data, and branch), but the single processor can run
multiple instructions on separate cores at the same time,
increasing overall speed for programs amenable to parallel
computing.
• Manufacturers typically integrate the cores onto a
single integrated circuit die (known as a chip multiprocessor or
CMP), or onto multiple dies in a single chip package.
A generic dual-core processor with CPU-local
level-1 caches and a shared, on-die level-2 cache.
Multiprocessors and Multicomputers
• The multiprocessor can be viewed as a parallel computer with a
main memory system shared by all the processors
• Tightly-coupled systems
• Tasks they execute communicate data by read and write operations
on shared memory
• The multicomputer can be viewed as a distributed computing in
which each processor has its own local memory.
• The memory address space is not shared among the processors; that
is, a processor only has direct access to its local memory and not to
the other processors' local memories.
• Loosely-coupled systems
• Tasks they execute communicate data by exchanging messages over
communication network (send, receive)
 Distributed Systems
• A distributed system is a collection of
independent computers that appears to its users
as a single coherent system
• A distributed system is a system in which
components are located on different networked
computers, which can communicate and
coordinate their actions by passing messages to
one another.
• The components interact with one another in
order to achieve a common goal

Distributed Systems 60
 Architecture of Distributed Systems

Distributed Systems 61
 Distributed Operating System

DOS runs on multiple, autonomous CPUs which provides

its users an illusion of an ordinary Centralized Operating
System that runs on a Virtual Uniprocessor
Distributed Systems 62
 Parallel Vs Distributed Systems

Distributed Systems 63
MEMORY LOCATIONS AND ADDRESSES

• Main memory is the second major subsystem in a computer.

It consists of a collection of storage locations, each with a
unique identifier, called an address
• Data is transferred to and from memory in groups of bits
called words
words.. A word can be a group of 8 bits, 16 bits, 32 bits
or 64 bits
• If the word is 8 bits, it is referred to as a byte
byte.. The term “byte”
is so common in computer science that sometimes a 16- 16-bit
word is referred to as a 2-2-byte word, or a 32-
32-bit word is
referred to as a 4-
4-byte word.
Main Memory (MM) Organization
• In a main memory with address
0 word 0
m-bit addresses, word 1
1
0 to 2m-1 words are available. 2 word 2
:
:
• Each word stores n bits
:
i word i
• m, n are independent

• m specifies the number of

units; n specifies the unit size
m
2 -1 word 2m -1

m bits n bits

65
10-address lines, 16-data lines
Address space
• The total number of uniquely identifiable locations in
memory is called the address space.

• For example, a memory with 64 kilobytes (16

address line required) and a word size of 1 byte has an
address space that ranges from 0 to 65,535.
i
Memory addresses are defined using unsigned
binary integers.
Example 1
A computer has 32 MB (megabytes) of memory.
memory. How many bits
are needed to address any single byte in memory?
Solution
The memory address space is 32 MB, or 225 (25 × 220). This
means that we need log2 225, or 25 bits
bits,, to address each byte
byte..

Example 2
A computer has 128 MB of memory.
memory. Each word in this computer
is eight bytes.
bytes. How many bits are needed to address any single
word in memory?
Solution
The memory address space is 128 MB, which means 227.
However, each word is eight (23) bytes, which means that we
have 224 words
words.. This means that we need log2 224, or 24 bits
bits,, to
address each word
word..
Memory: Contents of a Word (I)
Here is an example of a 32-bit word.

b31 b30 b1 b0

32 bits (word length)

A word can store information. For example,

1. Four English characters, each encoded in a common 8-bit code

ASCII: American Standard Code for Information Interchange
or
EBCDIC: Extended Binary Coded Decimal Interchange Code

char 3: 8-bit char 2: 8-bit char 1: 8-bit char 0: 8-bit

70
Memory: Contents of a Word (II)
2. Two Chinese characters
16 bits 16 bits
Big5/GB code
3. A 32-bit Signed integer
b31 b30 b1 b0
sign bit
b31=0 means positive integer, b31=1 means negative integer
magnitude = b30230 + … + b0 20
4. A 32-bit machine instruction
8 bits 12 bits 12 bits
operation address field address field 71
code
Assignment of byte addresses
• Little Endian (e.g., in DEC, Intel)
» low order byte stored at lowest address
» byte 0 byte1 byte 2 byte 3

• Eg: 46,78,96,54 (32 bit data)

• H BYTE L BYTE

• 8000 54
• 8001 96
• 8002 78
• 8003
46
• 8004
|
Big Endian
• Big Endian (e.g., in IBM, Motorolla, Sun, HP)
» high order byte stored at lowest address
» byte 3 byte 2 byte 1 byte 0

• Programmers/protocols should be careful when

transferring binary data between Big Endian and Little
Endian machines
Big-Endian and Little-Endian Assignments
Big-Endian: lower byte addresses are used for the most significant
bytes of the word
Little-Endian: opposite ordering. lower byte addresses are used for the
less significant bytes of the word
Word
address Byte address Byte address

0 0 1 2 3 0 3 2 1 0

4 4 5 6 7 4 7 6 5 4

• •
• •
• •

k k k k k k k k k k
2 -4 2 -4 2 -3 2- 2 2 - 1 2 - 4 2- 1 2 - 2 2 -3 2 -4

(a) Big-endian assignment (b) Little-endian assignment

Byte and word addressing.

• In case of 16 bit data, aligned words begin at byte
addresses of 0,2,4,………………………….
• In case of 32 bit data, aligned words begin at byte
address of 0,4,8,………………………….
• In case of 64 bit data, aligned words begin at byte
addresses of 0,8,16,………………………..
• In some cases words can start at an arbitrary byte
address also then, we say that word locations are
unaligned
MEMORY OPERATIONS
• Today, general
general--purpose computers use a set of
instructions called a program to process data.
• A computer executes the program to create output data
from input data
• Both program instructions and data operands are stored
in memory
• Two basic operations requires in memory access
• Load operation (Read or Fetch)-Contents of
specified memory location are read by processor
• Store operation (Write)- Data from the processor
is stored in specified memory location
• INSTRUCTION SET ARCHITECTURE:-
Complete instruction set of the processor

• BASIC 4 TYPES OF OPERATION:-

• Data transfer between memory and
processor register
• Arithmetic and logic operation
• Program sequencing and control
• I/O transfer
Register transfer notation (RTN)
Transfer between processor registers & memory,
between processor register & I/O devices
Memory locations, registers and I/O register names
are identified by a symbolic name in uppercase
alphabets
• LOC,PLACE,MEM are the address of memory
location
• R1 , R2,… are processor registers
• DATA_IN, DATA_OUT are I/O registers
• Contents of location is indicated by using square
brackets [ ]

• RHS of RTN always denotes a values, and is

called Source

• LHS of RTN always denotes a symbolic name

where value is to be stored and is called destination

• Source contents are not modified

• Destination contents are overwritten

 Examples of RTN statements

• R2 [LOCN]

• R4 [R3] +[R2]
ASSEMBLY LANGUAGE NOTATION (ALN)
• RTN is easy to understand and but cannot be
used to represent machine instructions
• Mnemonics can be converted to machine
language, which processor understands using
assembler
Eg:
1. MOVE LOCN, R2
2. ADD R3, R2, R4
3. ADD B A= A + B
4. MOV A, B A=B
 A Typical Instruction
• Add LOCA, R0
• Add the operand at memory location LOCA to the
operand in a register R0 in the processor.
• Place the sum into register R0.
• The original contents of LOCA are preserved.
• The original contents of R0 is overwritten.
• Instruction is fetched from the memory into the processor
– the operand at LOCA is fetched and added to the
contents of R0 – the resulting sum is stored in register R0.
TYPE OF INSTRUCTION
Three address instruction
• Syntax: Operation source 1, source 2, destination
• Eg: ADD D, E, F where D,E,F are memory location
• Advantage: Single instruction can perform the complete
operation
• Disadvantage : Instruction code will be too large to fit in
one word location in memory
TWO ADDRESS INSTRUCTION
•Syntax : Operation source, destination

•Eg: MOVE E, F F=E

ADD D, F F = F+D
ADD A, B B = A+ B

The operation C =[A]+[B] can be performed with

2 instructions
MOVE B, C
ADD A, C
Disadvantage: Single instruction is not sufficient to
perform the entire operation.
ONE ADDRESS INSTRUCTION

• Syntax- Operation source / destination

• In this type either a source or destination
operand is mentioned in the instruction
• Other operand is implied to be a
processor register called Accumulator
• Eg: ADD B (general)
• Load D; ACC [memlocation _D]
• ADD E; ACC (ACC) +(E)
• STORE F; memlocation_ F (ACC )
Zero address instruction
• Location of all operands are defined implicitly
• Operands are stored in a structure called
pushdown stack
C=A+B
 If processor supports ALU operations one data in
memory and other in register then the instruction
sequence is
• MOVE A, Ri
• ADD B, Ri
• MOVE Ri, C
 If processor supports ALU operations only with registers
then one has to follow the instruction sequence given
below
F=D+E
• LOAD D, Ri
• LOAD E, Rj
• ADD Ri, Rj
• MOVE Rj, F
Basic Instruction Cycle
• Basic computer operation cycle
– Fetch the instruction from memory into a control
register (PC)
– Decode the instruction
– Locate the operands used by the instruction
– Fetch operands from memory (if necessary)
– Execute the operation in processor registers
– Store the results in the proper place
– Go back to step 1 to fetch the next instruction
 INSTRUCTION EXECUTION & STRIAGHT LINE
SEQUENCING
Address Contents
Begin execution here i Move A,R0
i+4 Add B,R0
3-instruction program
i+8 Move R0,C
. segment
.
.

A
.
.
.

B Data for Program

. C [A]+[B]
.

C
• PC – Program counter: hold the address of the
next instruction to be executed
• Straight line sequencing: If fetching and
executing of instructions is carried out one by
one from successive addresses of memory, it is
called straight line sequencing.
• Major two phase of instruction execution
• Instruction fetch phase: Instruction is fetched
form memory and is placed in instruction register
IR
• Instruction execute phase: Contents of IR is
decoded and processor carries out the
operation either by reading data from memory or
registers.
 BRANCHING

A straight line program for adding n

numbers
Using a loop to add n numbers
 Adding N numbers
• Move N, R1
• Clear Ro
• Move Num1, Next
• Loop ADD Next, Ro
• INC Next
• DEC R1
• Branch > 0 Loop
• Move R0, Sum
 BRANCHING
• Branch instruction are those which changes the normal
sequence of execution.
• Sequence can be changed either conditionally or
unconditionally.
• Accordingly we have conditional branch instructions and
unconditional branch instruction.
• Conditional branch instruction changes the sequence only
when certain conditions are met.
• Unconditional branch instruction changes the sequence of
execution irrespective of condition of the results.
 CONDITION CODES
 CONDITIONAL CODE FLAGS: The processor keeps track
of information about the results of various operations for use
by subsequent conditional branch instructions

• N – Negative 1 if results are Negative

0 if results are Positive
• Z – Zero 1 if results are Zero
0 if results are Non zero
• V – Overflow 1 if arithmetic overflow occurs
0 non overflow occurs
• C – Carry 1 if carry and from MSB bit
0 if there is no carry from MSB bit
Figure Format and different instruction types
 Types of Addressing Modes
The different ways in which the location of the operand is specified
in an instruction are referred to as addressing modes

• Immediate Addressing
• Direct Addressing
• Indirect Addressing
• Register Addressing
• Register Indirect Addressing
• Relative Addressing
• Indexed Addressing
• Auto Increment Mode
• Auto Decrement Mode
Implementation of Variables and Constants
• In assembly language, a variable is represented by allocating a
register or a memory location to hold its value.
• We access an operand by specifying the name of the register or
the address of the memory location

• Effective Address (EA):

• Effective address is the address of the exact memory
location where the value of the operand is present
 Immediate Addressing
• Operand is given explicitly in the instruction
• Operand = Value
• e.g. ADI 05 ; A= A+5
– Add 05 to contents of accumulator
– 5 is operand
• e.g Move #200, R0 ; R0 = 200
(sharp sign # is used to indicate a value)
• No memory reference to fetch data
• Fast
Instruction
• Limited range
opcode operand
 A = B+6
• Move B, R1
• ADD #6, R1
• Move R1, A
 Absolute/ Direct Addressing
• Address field contains address of operand
• Effective address (EA) = address field (A)
• e.g. Move LOC, R2
– The contents of memory Location LOC is copied into
register R2
– Look in memory at address LOC for operand
• Single memory reference to access data
• No additional calculations to work out effective address
 Direct Addressing Diagram
Move LOC, R2

Instruction
Opcode Address LOC
Memory

Operand / 200

After Execution R2 = 200

 Indirect Addressing
• Some instructions does not give the operand or its address
explicitly, instead, they provide information from which the
memory address of the operand is determined. This address is
referred as effective address
• In the indirect addressing, the effective address of the operand
is the contents of register or memory location whose address
appears in the instruction
• The register or memory location that contains the address of an
operand is called a pointer
 Indirect Addressing Diagram
Instruction
Opcode Address A
Memory

Pointer to operand

Operand
 Indirect Addressing
• Add (R1), R0 Add (A), R0
Main Memory Main Memory
Add (R1), R2 Add (A), R2
- -
- -
B Operand /20 A B (Memory Address)

B Operand /20

Registers Registers

R1 B (Memory Address) R1
R2 10 R2 10

R2 30 R2 30
Through a general purpose register Through a memory location
 Register Addressing
• The instruction which uses processor registers to represent
operands is the instruction in register addressing mode.
• The effective address is a register where the value of the
operand is present. i.e. EA=R
• Advantage: In the register addressing mode there are no
memory references as the value to be operated is present in the
register.
• Very fast execution
• Disadvantage: Registers have limited address space. So, it has
a limit on the size of value that can be stored.
 Register Addressing
• ADD R4, R3 R3 = R4+R3

Instruction
 Indexed Addressing
• The effective address of the operand is generated by
adding a constant value to the contents of a index
register / GP register
• EA = X + [R]
• Address field hold two values
– X = constant value (offset) / displacement
– R = register that holds address of memory locations
– or vice versa
(Offset given as constant or in the index register)
Add 20(R1),R2 or Add 1000(R1),R2
 Indexed Addressing Diagram

Instruction
Opcode Register R Constant Value
Memory

Registers

Pointer to Operand + Operand

 Relative Addressing
• A version of displacement addressing
• Here, the effective address is determined by the index
mode using the program counter in place of the GP
register
• R = Program counter, PC
• EA = X + (PC)
• i.e. get operand from X bytes away from current location
pointed to by PC
• c.f locality of reference & cache usage
 Auto increment mode
• The effective address of the operand is the contents of a
register specified in the instruction.
• After accessing the operand, the contents of this register
are automatically incremented to point to the next item in
the list
• Automatically increment the contents of the register by a
value that corresponds to the size of the accessed
operand
• Increment by 1 for byte-sized operand, 2 for 16-bit
operands, 4 for 32-bit operands in a byte addressable
memory
• EA = [R1], increment Ri ----- (Ri)+
Eg: Add (R2)+,R0
 Auto decrement mode
• The contents of a register specified in the instruction are
first automatically decremented and are then used as the
effective address of the operand

• Decrement Ri; EA= [Ri] ----- - (Ri)

• Note that the address is decremented before it is used in
the autodecrement and incremented after it is used in
the autoincrement
Adding list of Nos. (indirect addressing)
• Move N, R1 N – No. of Nos.
• Move #Num, R2 Num - address
• Clear R0
• LOOP Add (R2), R0 Address Data
• Add #4, R2 1000 32-bit Data
• Decrement R1 1004 32-bit Data
• Branch > 0 LOOP
1008 32-bit Data
• Move R0, Sum
100C 32-bit Data
Adding list of Nos. (auto increment mode)
• Move N, R1 N – No. of Nos.
• Move #Num, R2 Num - address
• Clear R0
• LOOP Add (R2)+, R0 Address Data
• Decrement R1 1000 32-bit Data
• Branch >0 LOOP 1004 32-bit Data
• Move R0, Sum
1008 32-bit Data

100C 32-bit Data

 Instruction Set Architecture
• RISC (Reduced Instruction Set Computer) Architectures
– Memory accesses are restricted to load and store instruction, and data
manipulation instructions are register to register.
– Addressing modes are limited in number.
– Instruction formats are all of the same length.
– Instructions perform elementary operations
– Large register file
– Control unit: hardwired
• CISC (Complex Instruction Set Computer) Architectures
– Memory access is directly available to most types of instruction.
– Addressing mode are substantial in number.
– Instruction formats are of different lengths.
– Instructions perform both elementary and complex operations.
– Register file: smaller than in a RISC
– Control unit: micro-programmed
 Characteristics of RISC Vs CISC
processors
No RISC CISC
1 Simple instructions taking one Complex instructions taking
cycle multiple cycles
2 Instructions are executed by Instructions are executed by
hardwired control unit microprogramed control unit
3 Few instructions Many instructions

4 Fixed format instructions Variable format instructions

5 Few addressing mode, and most Many addressing modes

instructions have register to
register addressing mode
6 Multiple register set Single register set

7 Highly pipelined Not pipelined or less pipelined