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Long-Tail Pair Transistor Circuit

Figure 1 below shows the simplied ‘Pi’ model of a Long-Tail Pair transistor circuit.

B1 ib1 -β1.ib1 C1

+Vcc gm1.Vbe1

rbe1 Vbe1
Rc
E1
Vo
Vd i=0

Q1 Q2
E2
RE
rbe2
VB1 VB2
Vbe2
-β2.ib2 C2
REE
gm2.Vbe2
B2 ib2
-Vcc Vo
Rc

Vd - Vd
If v b1 = and v b2 =
2 2
ie no common-mode signal then, Vee = 0 , since the emitters are at zero potential.

Differential Input Gain Avd

Assuming matched transistors ie

Q1 = Q 2 so that gm1 = gm 2 = gm and

β Vd
rbe1 = rbe2 = rbe = and v be1 = v be2 =
gm 2

Vd
So Vo = (gm.R c ).
2

Vo ⎛ gm ⎞ 1
∴ A vd = = ⎜ ⎟.R c ( ie the voltage gain of a CE amplifier)
Vd ⎝ 2 ⎠ 2
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1 Io
Where gm =
2 VT

A vd =
(Io .R c ) ie
1 Io R c
. .
4.VT 2 2 VT

Common-Mode Input Gain Avc

B1 ib1

B2
C1
-β1.ib1
ib C2
gm1.Vbe1
Rc
rbe1 Vbe1 rbe2 Vbe1

Vo
Vc E1 is E1

E1 E2
-β1.ib2
iEE
gm2.Vbe2

2REE 2REE

It can be viewed as two equal parallel halves

Vo = - gmRc Vbe Assuming gm1 = gm2 = gm & v be1 = v be2 = v be

v be
Vc = - (iEE .2REE + ib .rbe ) Where iEE = ib + is = +gmvbe
rbe
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v be
Vc = - (iEE .2REE + ib .rbe ) Where iEE = ib + is = +gmvbe
rbe

⎛v ⎞ v ⎡⎛ v ⎞ ⎤
Vc = − ⎜⎜ be + gmvbe ⎟⎟.2REE + be .rbe = - ⎢⎜⎜ gm.vbe + be ⎟⎟.2REE + v be ⎥
⎝ rbe ⎠ rbe ⎣⎝ rbe ⎠ ⎦

gm
Substituting for rbe =
β

⎡⎛ gm(1+ β) ⎞ ⎤ gm gmβ gm(1+ β) (1+ β)

Vc = vbe⎢⎜⎜ ⎟⎟.2REE + 1⎥ Since + = and as ≈1
⎣⎝ β ⎠ ⎦ β β β β

Then
Vo
= A vc = -
(gm.Rc )
Vc (gm.2REE + 1)

- Rc
Now Avc =
1
2REE +
gm

⎛ R ⎞ 1
Thus Avc = - ⎜⎜ c ⎟⎟ Since is much smaller thanREE
⎝ 2REE ⎠ gm

Clearly to obtain a high value of common-mode rejection ratio (ideally infinite) we need to use
a very good high source impedance current-sink circuit instead of a simple resistor REE.
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B ib C iT

RL β.ib
iT+β.ib)

c rbe Vout
Zout Vbe

b RL
rce
Vout iT

e E

RE
RE

To determine the Output impedance of the circuit, we ground the base and the emitter. We
then have two resistances in parallel connected to the current source β.ib.

Output Impedance

VOUT R L .rce
R OUT = rce ' =
iT R L + rce

VOUT = (i T + β.ib )rce '+ib .rbe

RE
Also ib = i T sub into above equation
rbe + R E

⎛ RE ⎞ RE RE RE
VOUT = ⎜⎜ iT + β.iT ⎟⎟rce ' + iT .rbe = iT .rce '+β.iT .rce ' + iT .rbe
⎝ rbe + R E ⎠ rce +' R E rbe + RE rce +' R E

VOUT RE R .r
R OUT = = rce '+β.rce ' + E be
iT rbe + RE rbe + RE

Generally

R OUT = rce '+β.rce '+1 = (β + 1).rce '

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Common Mode Rejection Ratio CMRR

As we want to reject the common mode signal (usually noise) then we would ideally like a
very high CMRR ratio which is given by: -

- Io .R C
A vd 4VT - I .R 2R IR
CMRR ≈ = = o C . EE = o EE
A vc - RC 4VT - R C 2VT
2R EE

If we assume a load resistor (Rc) of 5K and a current sink of source impedance 50K (ie RE)
set to a current of 2mA then

RC 5K
A vc = - = - = - 0.05
2R EE 2 * 50K

- Io .R C - 2E -3 * 5E 3
A vd = = = - 96
4VT 4 * 26E -3

A vd - 96
∴ CMRR = = = 1923
A vc - 0.05

In any amplifier the signal to noise ration should be infinite. For example, consider a
difference voltage of 20mV and a common-mode voltage of 100mV applied to the differential
amplifier above.

Vd = 20mV ∴ Vod = 1.92V

1.92
Vc = 100mV ∴ Voc = 5mV EffectiveS/N ratio = = 384
5E-3

Therefore, the relationship betweenS/N ratio and CMRRis given by : -

(S/N)O = (S/N)IN x CMRR = 0.2 * 1923 = 384

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Improving Voltage gain

The voltage gain of the differential amplifier is dependant on the load resistor RL (and
ultimately the value of rce

Thus replacing the load resistor with a current source will present a larger load resistor and
hence gain. Also if we add a current source to the emitter ‘tail’ we will increase the Common-
mode gain as this is dependant on the value of RE .

An additional advantage of using a current mirror as an active load is that this will reflect both
differential output signals to a single output.

+Vcc

Q3

Q4

Io
+ δI
2
2δI

Io Vo
− δI
2

Q1 Q2

Io VB2
VB1

REE

-Vcc

Therefore as this is a ‘Widlar’ current mirror the load resistor will be the rce of Q4.

Gain is now = gm.rce4

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Long-Tail pair with Common-Mode Input

This circuit ties the two differential inputs together to form a single stage amplifier that has
enhanced properties due to the differential pair an active load.

+Vcc

Q3

Q4

Io δI
+
2 2
I~0

Io δI
+
2 2 Io δI Vo
−
2 2

Q1 Q2

VCM
IO + δI
REE

-Vcc

Gain is now = gm.(rce4 // rce2 )

VA
Load resistance ≈ rce4 =
IO
2

CMRR = 2gm 2 R EE