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A SPICE compatible behavioral model of SEPIC converters

Conference Paper in PESC Record - IEEE Annual Power Electronics Specialists Conference · July 1996
DOI: 10.1109/PESC.1996.548805 · Source: IEEE Xplore

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 A SPICE Compatible Behavioral Model
of SEPIC Converters
Sam Ben-Yaakov*, Daniel Adar1 and Gil Rahav

Department of Electrical and Computer Engineering

Ben-Gurion University of the Negev
P. O. Box 653, Beer-Sheva 84105
ISRAEL

Tel: +972-7-461561; Fax: +972-7-472949; Email: [email protected]

Abstract - An average model of SEPIC converters operating (e.g. HSPICE, MetaSoftware Inc.; ISSPICE, Intusoft Inc.;
in Continuous Current Mode (CCM) was developed and PSPICE, MicroSim Inc.). The large signal model can then be
verified against cycle-by-cycle simulation. The proposed used as is to run time domain simulation or to run small
model is compatible with SPICE and other modern electronic signal, frequency domain simulation by applying the AC
circuit simulators and can be used to run DC (static transfer analysis capability embedded in all modern simulators.
function), AC (small signal, frequency domain) and TRAN Averaging can be conveniently carried out by isolating the
(large signal, time domain) analyses. The model is developed switched sub-system and then applying the Switched Inductor
in terms of the average, large signal behavior while the small Model (SIM) [3] to obtain the continuous equivalent circuit. It
signal (AC) response is worked out automatically by the has already been demonstrated that the SIM approach can be
simulator. An extension to current programmed SEPIC for the easily applied to all basic PWM topologies operating in
case of Peak Current Mode (PCM) Control is also presented. continuous or discontinuous inductor current mode [4-6].
This paper treats the case of SEPIC with uncoupled inductors. Furthermore, a simple extension of this methodology can be
used to emulate the behavior of peak and average current mode
I. INTRODUCTION control [7]. Recently, the equivalent circuit approach
combined with the power of behavioral dependent sources, was
Average modeling of switch mode converters is a vital tool for also used to model the series-parallel resonant converter [8].
the examination of their dynamic response and for designing The PWM cases treated hitherto by the equivalent circuit
the feedback loop. Various approaches for average modeling of approach were confined to systems which include one switched
PWM converters have been suggested. The PWM switch inductor. However, some PWM converters (e.g. the C'uk and
model [1] was recently applied to model the small signal SEPIC topologies) may include a number of switched
response of a SEPIC converter [2]. inductors. To model these cases one needs to extend the basic
A powerful approach to average modeling and simulation SIM approach to more than one element. This was
of switch mode system is the equivalent circuit methodology. investigated in this study by considering one such case, the
In this technique the switched system is converted into a uncoupled SEPIC converter.
continuous, albeit non-linear, equivalent circuit that is
compatible with any modern electronic circuit simulator

Lfi VCfi Ls ILs (b) ICs Cs Lfo

(a) (c) ID D (d) VCp Vo

Cfi VLs VCs Cp Cfo

Vs + Vsw S Lp VLp Ro
ILp RCfo

Fig. 1. Basic topology of a SEPIC converter.

* Corresponding author.
1 Presenting author.
 II. AVERAGE MODEL DEVELOPMENT inductor current (ILs) can now be used to generate the average
current flowing into capacitor Cs (ILsDoff ) at terminal (b).
Close examination of the SEPIC power stage (Fig. 1) reveals The second inductor (Lp ) is switched to terminal (c),
that it includes three switching elements: two switched during the 'on' time, and to terminal (d) during the 'off' time.
inductors (L s , Lp ) and one switched capacitor (Cs ). These Again, the inductor is switched between two constant voltages
switched elements are depicted separately in Fig. 2. The (VCs at the 'on' time and -VCp at the 'off' time,
proposed average modeling of these switched assemblies is approximately) therefore, a dependent voltage source (ELp) can
based on the concept of the SIM presented earlier [3]. This be used to impose the average voltage across L p , as shown in
approach hinges on the observation that by applying the Fig. 3. The resultant current (ILp) is used to generate the
average voltage across an inductor one gets the average current
average currents flowing into capacitor Cs at terminal (c) and
flowing through it. This current can then be incorporated in
dependent current sources to emulate the average currents of into the output section (Cp and the output filter) at terminal
the other two ports of the switched inductor. (d).
Following the basic SIM philosophy, the average behavior The capacitor Cs is switched between two current sources
of a switched capacitor can be derived by injecting into the (Fig. 2) (assuming that the average currents of the inductors
capacitor (via dependent sources) the expected average current. do not change significantly during one cycle). Therefore, the
This will reproduce the average voltage across it. Applying capacitor's average voltage (VCs ) can be emulated by injecting
this methodology, one can convert the three switching blocks into the capacitor C s (Fig. 3) the average currents obtained by
of Fig. 2 into the three average circuits of Fig. 3. the upper two switched inductor models (at terminals (b) and
To be more specific, the inductor Ls of Fig. 1 is connected (c)).
at terminal (a) to a relatively large capacitor (Cfi ) which is The complete expressions for the voltage dependent
assumed to represent a constant voltage source during one sources (of Fig. 3) imposed on inductor Ls and Lp are as
cycle (but can vary from cycle to cycle). The other terminal of follows :
Ls , (b), is switched between ground (through the switch) and ELs = Vsw(on)*Don + (V Cs + VD(on)
the sum of the voltages across capacitors Cs and Cp (via the
diode D). These are again assumed to be large enough so that + V Cp )*Doff (1)
their voltages do not change significantly during one cycle.
ELp = (VCs - V sw(on))*Don - (VD(on)
Therefore, we can emulate the average voltage across the
inductor (Ls ) by applying a dependent voltage source (E Ls) as + V Cp )*Doff (2)
shown in the upper model of Fig. 3. The resultant average where:
Vsw(on) is the 'on' switch voltage
(a) Ls toff (b) VD(on) is the diode 'on' voltage

(a) L (b)
I Ls s
ton
I Ls I Ls Doff
+|

ELs

Lp t
off (d)
(c) (d)
I Lp
ton I Lp
I Lp Don I Ls Doff I Lp Doff
ELp
+|

Lp
(c)
ton
I Ls C
s
(a) (b) ICs (c) (d)
(b)
toff
I Ls Doff I LpDon
t
on V
Cs I C
toff Lp V Cs s

(c)

Fig. 2. The switched elements of a SEPIC converter (refer Fig. 3. The average models of the SEPIC switched
to Fig. 1 for notations). elements (as shown in Fig. 2).
 L fi V Cfi Ls RLs I Lp V Cs

I Ls Ls
Cfi ELs +- ELp +- GCs Cs RCs
V s +-
RLp

V Cp L fo Vo Don

RDon
Cp Cfo
GCp Ro + V
- Don
Rfo

Fig. 4. The proposed average model of an opened loop SEPIC converter.

Combining the three average circuits of Fig. 3, we obtain III. EXTENSION TO CURRENT
the complete average model of the SEPIC converter as shown PROGRAMMING
in Fig. 4. Note that the dependent current sources that
appeared in parallel in Fig. 3, have been combined into one As presented earlier [9, 10], Current Programmed models need
dependent current source that is described by an expression that a 'Duty Cycle Generator' to represent the relationship between
reflects the sum of the currents. the control voltage and the duty cycle. The waveforms for the
The duty cycle is emulated by a continuous independent case of SEPIC with PCM control, where the current is sensed
voltage source for open loop simulations. This source can be through the switch, are shown in Fig. 6. The duty cycle (Don )
replaced by a dependent voltage source and the corresponding can be determined by the intersection of the voltage associated
circuitry for closed loop simulation. with the sensed current (Ks Isw) and the slope compensated
The voltage across the switch can be emulated dynamically control voltage (Ve -Mct). The intersection can be expressed
by the following expression: by the following equation:
Vsw(on) = (ILs + ILp)*Rs (on) (3) Ks (ILs + ILp)

where Rs(on) is the 'on' switch resistance.

+ K s  CFi
V - V sw(on) V - V sw(on) Ton
+ Cs =
The diode voltage drop (VD(on) ) during the 'on' time is  Ls Lp  2
assumed here (eq. 4-5) to be constant (0.7V) but can be
emulated more accurately by injecting the diode's 'on' current Ve - M cTon (8)
into the appropriate diode model as shown in Fig. 5.
The expressions of the dependent sources for the complete where:
SEPIC average model of Fig. 4 are thus as follows :
Ton = Don Ts (9)
ELs = (ILs + ILp)*Rs(on) *Don
+ (V Cs + 0.7+ VCp )*Doff (4)
ELp = (VCs - (ILs + ILp)*Rs (on))*Don I Ls + ILp V D(on) D
- (0.7 + VCp )*Doff (5)

GCs = -ILp*Don + ILs*Doff (6)

GCp = (ILs + ILp)*Doff (7) Fig. 5. A circuit for emulating the average diode voltage
drop VD(on).
Substituting eq. (9) into eq. (8) and rearranging we get the Don Ve
required relationship :

Ve - K s (ILs + I Lp) RDon + Re

Don = - +
Ts  Mc + s  CFi sw(on) + Cs sw(on) 
K V -V V -V EDon - V
e
 2  L s Lp 

(10)
where: Fig. 7. 'Duty Cycle Generator' for Current Programmed
SEPIC. EDon is defined by equation (10).
Ve is the error voltage of the outer (voltage) loop (V).
Ks is the sensed current conversion gain (V/A). Vs = 36V, Lfi = 2.75µH, C fi = 0.2µF, L s = 9.75µH,
ILs is the average current of Ls (A). Lp = 9.75µH, C s = 0.3µF, C p = 0.44µF, Lfo = 3.8µH,
ILp is the average current of Lp (A). C fo = 940µF, R Cfo = 90 mΩ , Ro(nominal) = 5 Ω
Ts is the switching period time (Sec). (see Fig. 1 for notations).
Mc is the slope compensation constant (V/Sec). Fig. 8 shows the DC characteristics of the SEPIC power
stage for two values of the switch resistance (Rs(on) ). For
Consequently, for a current programmed SEPIC converter, large duty cycles, the switch resistance has significant effect
in which the current through the switch is sensed, the on the transfer ratio and therefore should be taken into
independent voltage source VDon (Fig. 4) need to be replaced account. As can be seen, in both cases the model and cycle-by-
by an equivalent circuit that includes a dependent voltage cycle simulations agree very well.
source (EDon ) that emulates eq. (10). This dependent source is Fig. 9a demonstrates the validity of the small signal
driven by an independent voltage source Ve (for open outer control-to-output responses. The continuous line is the output
loop) as shown in Fig 7. Again, this source (Ve) can be of the average model simulation. The few discrete points
replaced by a dependent voltage source and the auxiliary (phase and gain) were tediously collected one by one for each
circuitry associated with the outer (voltage) loop. frequency using a straightforward cycle-by-cycle simulation of
the switching circuit. This was carried out by modulating the
IV. SPICE SIMULATION input to a pulse width modulator by a sine wave and
measuring the resulting small signal at the output. The
Since the proposed average model is SPICE compatible, it can running time for each point was few orders of magnitudes
be used directly to simulate the large and small signal longer than the complete average simulation done by the
responses of SEPIC converters in open or closed loop proposed model. A similar comparison was carried out for the
configuration. current programmed case (Fig. 9b). The results demonstrate
The average model was verified against a cycle-by-cycle the validity and accuracy of the proposed average model of
PSPICE (V. 6.1, MicroSim Co.) simulation of the switched SEPIC converters when operated in the voltage or current
SEPIC converter. The parameters of the converter were as programmed modes.
follows: 10

Ve Rs(on)=1mΩ
-Mc
Vo/Vin

KsIsw 5

Ks(ILs + ILp) +
+ Rs(on)=50mΩ
+
+ +
0 + +
0 0.5 1

t Duty-Cycle
0 Ton Ts
Fig. 8. DC characteristics of SEPIC topology. Cycle by
cycle simulations (o for Rs(on)=50m Ω, + for
Fig. 6. The wave forms (one cycle) for SEPIC with PCM
control . Rs(on)=1mΩ) vs. average model simulations.
 Large signal responses for a load step change obtained by The 'Schematics' diagram of Fig. 11 covers the open loop
cycle-by-cycle simulation and by average model simulation are power stage operating in voltage mode. For current mode
shown in Fig. 10. Again, there is almost a perfect agreement control one has to define an additional behavioral dependent
between the two, except for the ripple that appears, as sources that emulates equation (10). The output of this
expected, only in the cycle-by-cycle results. The speed up ratio module will replace VDon in Fig. 11.
of the average model simulation was about 300.
A PSPICE [11] schematics of the proposed model is VI. CONCLUSIONS
depicted in Fig. 11. This representation is compatible with the
schematics capture front end of recent PSPICE versions (6.1 This study extends the methodology of average modeling by
and up). The schematics of Fig. 11 is a direct translation of the SIM approach to systems that cannot be reduced to a
Fig. 1 per the values given in Section IV. The behavioral single switched inductor. By applying the same reasoning,
dependent sources emulate eq. (4-7). average models of the ZETA and C'uk converters can be easily
developed. The treatment of coupled inductor cases will be
1 2 presented in a subsequent paper.
40db 700deg

0db

0 deg + +
+ +
+ + + ++
-40db
+

-80db -700deg
100 1K 10K 100K 1M
Frequency
1 Mag 2 Phase

(a)
1 2

15db 700deg (a)

0db

0 deg
+ + + + + + + +

-45db -700deg
100 1K 10K 100K 1M
Frequency (Hz)
1 Mag 2 Phase

(b)

Fig. 9. Small signal response of a SEPIC converter. (a)

Control (Don ) to output response of Voltage (b)
Mode control (operating point: Don =0.125,
Ro =5Ω). (b) Control (Ve) to output response of Fig. 10. Transient response for a load step of 20% (from
Current Mode control (Operating point: Ro =5Ω down to 4Ω and back).
Ve=0.625V, Ro =1.666Ω). Continuous curve: Upper plots: inductor currents (ILs (top) and
average model. Discrete points: Cycle-by-cycle ILp). Bottom plots: output voltage. (a) Cycle-
simulations (o ) for Magnitude[dB], (+ ) for by-cycle simulation .(b) Average Model
Phase[deg]. simulation.
 REFERENCES [6] D. Edry, O. Mor, M. Hadar and S. Ben-Yaakov, "A
Spice compatible model of Tapped-Inductor PWM
[1] V. Vorperian, "Simplified analysis of PWM converters converters," APEC '94, pp. 1021-1027.
using the model of PWM switch, Part I: Continuous [7] S. Ben-Yaakov and Z. Gaaton, "A unified model of
conduction mode," IEEE Trans. on AES, Vol. 26, No. current feedback in switch mode converters,"
3, May 1990. International Symposium on Circuits and Systems
[2] W. M. Moussa , "Modeling and performance evaluation (ISCAS '92), 1992, Vol. 4, pp. 1891-1894, San Diego,.
of a DC/DC SEPIC converter," APEC '95 , Vol. 2, pp. [8] S. Ben-Yaakov and G. Rahav, "Average modeling and
702-706. simulation of Series-Parallel Resonant Converters by
[3] S. Ben-Yaakov, "SPICE simulation of PWM DC-DC SPICE compatible behavioral dependent sources,"
converter systems: Voltage feedback, continuous APEC '96, vol. 1, pp. 116-120.
inductor conduction mode," IEE Electronics letters, Vol. [9] S. Ben-Yaakov, "Average modeling of PWM converters
25, No. 16, 1989, pp. 1061-1063. by direct implementation of behavioral relationships,"
[4] Y. Amran, F. Huliehel and S. Ben-Yaakov,“ A unified APEC '93, pp. 510-516.
SPICE compatible average model of PWM converters,“ [10] S. Ben-Yaakov and D. Adar, "Average models as tools
IEEE Trans. on Power Electronics, vol. 6, pp. 585-594, for studying the dynamics of switch mode DC-DC
Oct. 1991. converters," PESC '94, vol. 2, pp. 1369-1376.
[5] D. Edry and S. Ben-Yaakov, "A SPICE compatible [11] PSPICE: MicroSim Inc.,20 Fairbanks, Irvine,
model of Magamp post regulator," APEC '92, pp. 793- California.
800.
 Fig. 11 'Schematics' (MicroSim Inc.) diagram of SEPIC power stage operating in open loop.

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