Mr3391 Demp Unit I
Mr3391 Demp Unit I
Mr3391 Demp Unit I
COURSE OBJECTIVES:
➢ To present the Digital fundamentals, Boolean algebra, and its applications in digital systems
➢ To familiarize with the design of various combinational digital circuits using logic gates
➢ To introduce the analysis and design procedures for synchronous and asynchronous sequential circuits
➢ To explain the various semiconductor memories and related technology
➢ To introduce the electronic circuits involved in the making of logic gate
1. Number System
A number system relates quantities and symbols.In digital system how information is represented is key
and there are different radices, i.e. number bases, that a numbering system can use.
1.1 Digital computer
Any class of devices capable of solving problems by processing information in discrete form.It operates on
data,including letters and symbols,that are expressed in binary form i.e using only two digits 0 and 1.
The block diagram of digital computer is given below:
Processor (or)
Control Unit Arithmetic unit
Storage (or)
Memory Unit
Input Output
Devices and Devices and
Control Control
The memory unit stores programs as well as input, output and intermediate data. The processor unit
performs arithmetic and other data processing tasks as specified by the program.The control unit
supervises the flow of information between various units. The program and data prepared by the user
are transferred into the memory unit by means of an input device such as punch card reader (or) tele
typewriter. An output device, such as printer, receives the result of the computations and the printed
results are presented to the user.
1.2 Number Representation:
It can have different base values like: binary (base-2), octal (base-8), decimal (base 10) and
hexadecimal (base 16),here the base number represents the number of digits used in that numbering
system. As an example, in decimal numbering system the digits used are: 0, 1, 2, 3, 4, 5, 6, 7, 8 and 9.
Therefore the digits for binary are: 0 and 1, the digits for octal are: 0, 1, 2, 3, 4, 5, 6 and 7. For the
hexadecimal numbering system, base 16, the digits are: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F.
2. Binary numbers
Numbers that contain only two digit 0 and 1 are called Binary Numbers. Each 0 or 1 is called a Bit,
from binary digit. A binary number of 4 bits is called a Nibble. A binary number of 8 bits is called a
Byte. A binary number of 16 bits is called a Word on some systems, on others a 32-bit number is called
a Word while a 16-bit number is called a Halfword.
Using 2 bit 0 and 1 to form
a binary number of 1 bit, numbers are 0 and 1
a binary number of 2 bit, numbers are 00, 01, 10, 11
a binary number of 3 bit, such numbers are 000, 001, 010, 011, 100, 101, 110, 111
a binary number of 4 bit, such numbers are 0000, 0001, 0010, 0011, 0100, 0101, 0110, 0111, 1000,
1001, 1010, 1011, 1100,1101,1110,1111
Therefore , using n bits there are 2n binary numbers of n bits
Each digit in a binary number has a value or weight. The LSB has a value of 1. The second from the right
has a value of 2, the next 4 , etc.,
16 8 4 2 1
24 23 22 21 20
The binary equivalent for some decimal numbers are given below.
Decimal 0 1 2 3 4 5 6 7 8 9 10 11
MSB
(1110)2
1st Multiplication Iteration
Multiply 0.625 by 2
0.625 x 2 = 1.25(Product) Fractional part=0.25 Carry=1 (MSB)
(410)8
The octal number of (264)10 is (410)8
Convert (105.589)10 decimal number to octal number
1 MSB
LSB (151)
MSB
LSB ( 0.4554)
The octal number of (105.589)10 is (151.4554)8
(1693)10 (69D)16
Convert (1693.0628)10 decimal fraction to hexadecimal fraction (?)16
1693/16 = 105 Reminder (13) D (LSB)
105/16 = 6 Reminder 9
6/16 = 0 Reminder 6 (MSB)
(69D)
Multiply 0.0628 by 16
0.0628 x 16 = 1.0048(Product) Fractional part=0.0048 Carry=1 (MSB)
Multiply 0.0048 by 16
0.0048 x 16 = 0.0768(Product) Fractional part = 0.0768 Carry = 0
Multiply 0.0768 by 16
0.0768 x 16 = 1.2288(Product) Fractional part = 0.2288 Carry = 1
Multiply 0.2288 by 16
0.2288 x 16 = 3.6608(Product) Fractional part = 0.6608 Carry = 3 (LSB)
(.1013)
(1693.0628)10 = (69D.1013)16
101.101
= 1 x 22 + 0 x 21 + 1 x 20 . 1 x 2-1 + 0 x 2-2 + 1 x 2-3
= 5 + 0.5 + 0.125
= 5 . 625
Therefore ( 1 0 1 . 1 0 1 )2 = ( 5.625 )10
Convert 11001100.101 to ( )8
011|001|100. |101|
3 1 4 .5
So the equivalent octal number is 314.5
4. COMPLEMENTS
In digital computers to simplify the subtraction operation and for logical manipulation complements
are used . There are two types of complements for each radix system the radix complement and diminished
radix complement. The first is referred to as the r’s complement and the second as the (r-1)’s complement.
r’s Complement
Given a positive number N in base r with an integer part of n digits, the r’s complement of N is
defined as rn-N if N≠0 and 0 if N=0
(r-1)’s Complement
Given a positive number N in base r with an integer part of n digits and a fraction part of m
digits, the (r-1)’s complement of N is defined as rn-r-m-N
The subtraction of two positive numbers (M-N), both of base r, may be done as follows.
• The procedure for subtraction with (r-1)’s complement is same as r’s complement except for
end-around carry.
• The subtraction of M-N, both positive numbers in base r, may be calculated in the following
manner.
1. Add the minuend M to the (r-1)’s complement of the subtrahend N.
2. Inspect the result obtained in step 1 for an end carry.
• If an end-carry occurs, add 1 to the least significant digit (end-around carry)
• If an end-carry does not occur, take the (r-1)’s complement of the number
obtained in step 1 and place a negative sign in front.
It is classified into four types they are 1’s complement , 2’s complement , 9’s complement and
10’s complement.
4.1 1’s complement representation: The 1’s complement of a binary number is the number that
results when we change all 1’s to zeros and the zeros to ones.
2’s complement representation:
The 2’s complement is the binary number that results when we add 1 to the 1’s complement.
Problems related to 1’s complement and 2’s complement :
4.2 1’s complement subtraction
Subtraction of binary numbers can be accomplished by the direct method by using the 1’s complement
method, which allows to perform subtraction using only addition . for subtraction of two numbers we have
two cases.
1. Subtraction of smaller number from larger number and
2. Subtraction of larger number from smaller number.
Method:
1. Determine the 1’s complement of the smaller number.
2. Add the 1’s complement to the larger number.
3. Remove the carry and add it to the result.
This is called end -around carry.
1’s complement Subtraction of larger number from smaller number
Method:
1. Determine the 1’s complement of the larger number.
2. Add the 1’s complement to the smaller number.
3. Answer is in 1’s complement form. To get the answer in true form take the 1’s complement and
assign negative sign to the answer.
1. 9s complement
2. 10s complement
3. 9s complement subtraction
4. 10s complement subtraction
Now first of all let us know what 9's complement is and how it is done. To obtain the 9,s complement
of any number we have to subtract the number with (10n - 1) where n = number of digits in the number, or
in a simpler manner we have to divide each digit of the given decimal number with 9. The table 1. will
explain the 9's complement more easily.
9s
Decimal digit
complement
0 9
1 8
2 7
3 6
4 5
5 4
6 3
7 2
8 1
9 0
Now coming to 10's complement, it is relatively easy to find out the 10's complement after finding
out the 9,s complement of that number. We have to add 1 with the 9,s complement of any number to obtain
the desired 10's complement of that number. Or if we want to find out the 10's complement directly, we can
do it by following the formula, (10n - number), where n = number of digits in the number. An example is
given below to illustrate the concept of obtaining 10’s complement
A decimal number 456, find 9's complement and 10’s complement of this number
In 9’s complement subtraction when 9’s complement of smaller number number is added to the
larger number carry is generated. It is necessary to add this carry to the result. ( this is called an end around
carry).when larger number is subtracted from the smaller number, there is no carry, and the result is in 9’s
compliment form and negative. This is explained with following examples.
5.SIGNED NUMBERS
• Digital systems like computer, must be able to handle both positive and negative numbers.
• A signed binary number consists of both sign and magnitude information.
• The sign indicates whether a number is positive or negative.
5.1 Representation
There are three forms in which the signed integer (whole numbers) can be represented. They
include,
Note:
(eg)
(eg)
11100110 +
(eg) 1. Determine the decimal value of this signed binary number expressed in sign –
magnitude. 10010101
Soln:
• The seven magnitude bits and their powers of 2 weights are as follows.
1 0010101
↓ 26252423222120
Sign bit
• Summing weights where there are 1’s.
→ 16+4+1 = 21
• Since, the sign bit is 1, the decimal number is -21
(2) 1’s Complement
• Decimal values of positive numbers in this form are determined by summing the
weights in all bit postions.
• Decimal values of negative numbers are determined by assigning a negative value to
the weight of the sign bit, summing all the weights where there are 1’s and adding 1 to
the result.
(eg) Determine the decimal value of the signed binary number expressed in 1’s complement
11101000
Soln:
• The bits and their powers- of- two weights are as follows.
1 1 1 0 1 0 0 0
-27 26 25 24 23 22 21 20
(eg): Determine the decimal values of the signed binary numbers expressed in 2’s complement
from 10101010
Soln:
1 0 1 0 1 0 1 0
-27 26 25 24 23 22 21 20
• Summing weights where there are 1’s
-128+32+8+2 = -86
• Since 8-bit (1byte) grouping is common in most computers, the illustrations are all 8-
bits. With 8-bits, we can represent 256 different numbers.
• With 16-bits (2 bytes), we can represent 65,536 different numbers.
• With 32-bits (4 bytes), we can represent 4.295×109 different numbers.
The formula for finding the number of different combinations of n-bits is,
Total combinations = 2n
Range of values for n-bit numbers is,
-(2n-1) to + (2n-1 – 1)
Addition
• The two numbers in an addition are the addend and the augend
• The result is sum.
• There are four cases that can occur when two signed binary numbers are added.
(1) Both numbers positive.
(2) Positive number with magnitude larger than negative number.
(3) Negative number with magnitude larger than positive number
(4) Both numbers negative.
6. BINARY ARITHMETIC
6.1 BINARY ADDITION
The binary addition table is as follows:
A+B SUM CARRY
0+0 0 0
0+1 1 0
1+0 1 0
1+1 0 1
Illustration 1:
Add (1010)2 and (0011)2
1010 (Augend)
0011 (Addend)
1101 (sum)
0110 (Difference)
101101
101101
000000
000000 Partial Product
101101
000000
111
101
101
101
7. BINARY CODES
Binary codes are codes which are represented in binary system with modification from the original
one. The group of symbols is called as a code. The digital data is represented, stored and transmitted as
group of binary bits. This group is also called as binary code. The binary code is represented by the
number as well as alphanumeric letter.
Advantages of Binary Code
Following is the list of advantages that binary code offers.
1. Binary codes are suitable for the computer applications.
2. Binary codes are suitable for the digital communications.
3. Binary codes make the analysis and designing of digital circuits if we use the binary codes.
4. Since only 0 and 1 are being used, implementation becomes easy.
7.1 Classification of binary codes:The codes are broadly categorized into following four categories.
• Weighted Codes
• Non-Weighted Codes
• Binary Coded Decimal Code
• Alphanumeric Codes
• Error Codes
7.1.1 Weighted codes: Weighted binary codes are those binary codes which obey the positional weight
principle. Each position of the number represents a specific weight
Decimal 8421 5421 2421 5211
0 0000 0000 0000 0000
1 0001 0001 0001 0001
2 0010 0010 0010 0011
3 0011 0011 0011 0101
4 0100 0100 0100 0111
5 0101 1000 1011 1000
6 0110 1001 1100 1010
7 0111 1010 1101 1100
8 1000 1011 1110 1110
9 1001 1100 1111 1111
For example, in 8421BCD code, 1001 the weights of 1, 0, 0, 1 (from left to right) are 8, 4, 2 and 1
respectively. The codes 8421BCD, 2421BCD, 5211BCD are all weighted codes.
7.1.2 Non-weighted codes: The non-weighted codes are not positionally weighted. In other words, each
digit position within the number is not assigned a fixed value (or weight).
Examples are
• Excess-3
• Gray code
DECIMAL EXCESS - 3 GRAY CODE
0 0011 0000
1 0100 0001
2 0101 0011
8. Decimal code
Binary codes for decimal digits require a minimum of four bits. Numerous different codes can be obtained
by arranging four or more bits in ten distinct possible combinations. A few possibilities are tabulated.
9. Error detection code
In data transmission, Interference and physical defects in the communication medium can cause random bit
errors. As the signal is transmitted through a media, the signal gets corrupted because of noise and
distortion. Therefore the media is not reliable. To achieve a reliable communication through this unreliable
media, there is need for detecting the error in the signal so that suitable mechanism can be devised to take
corrective actions.
Error coding is a method of detecting and correcting these errors to ensure information is transferred intact
from its source to its destination
The errors can be divided into two types:
• Single-bit Error: only one bit of given data unit (such as a byte, character, or data unit) is changed from 1
to 0 or from 0 to 1.
• Burst Error: two or more bits in the data unit have changed from 0 to 1 or vice-versa. (Here doesn’t
necessary means that error occurs in consecutive bits)
Error Detecting Codes:
Basic approach used for error detection is the use of redundancy, where additional bits are added to
facilitate detection and correction of errors.
Popular techniques are:
• Simple Parity check
• Two-dimensional Parity check
• Checksum
• Cyclic redundancy check
Detecting Errors using simple parity check
Suppose we are transmitting 7-bit ASCII characters. A parity bit is added to each character to make it 8
bits. Parity can detect all single-bit errors
–If even parity is used and a single bit changes, it will change the parity to odd, which will be detected at
the receiver end
–The receiver end can detect the error, but cannot correct it because it does not know which bit is erroneous
Parity can also detect some multiple-bit errors
Table 1 shows the four bit data word and its corresponding code words
Decimal value Data block Parity bit Code word
0 0000 0 00000
1 0001 1 00011
2 0010 1 00101
3 0011 0 00110
4 0100 1 01001
5 0101 0 01010
6 0110 0 01100
7 0111 1 01111
8 1000 1 10001
9 1001 0 10010
10 1010 0 10100
11 1011 1 10111
12 1100 0 11000
13 1101 1 11011
14 1110 1 11101
15 1111 0 11110
Gray-to-Binary Conversion
• The MSB in the binary code is the same as the corresponding bit in the Gray code.
• Add each binary code bit generated to the Gray code bit in the next adjacent position.
• Discard carries.
Problem: Convert the Gray code word 11011 to binary
11. Binary-Coded Decimal Code
Although the binary number system is the most natural system for a computer because it is readily
represented in today’s electronic technology, most people are more accustomed to the decimal system. One
way to resolve this difference is to convert decimal numbers to binary, perform all arithmetic calculations
in binary, and then convert the binary results back to decimal. This method requires that we store decimal
numbers in the computer so that they can be converted to binary. Since the computer can accept only
binary values, we must represent the decimal digits by means of a code that contains 1’s and 0’s. It is also
possible to perform the arithmetic operations directly on decimal numbers when they are stored in the
computer in coded form.
A binary code will have some unassigned bit combinations if the number of elements in the set is
not a multiple power of 2. The 10 decimal digits form such a set. A binary code that distinguishes among
10 elements must contain at least four bits, but 6 out of the 16 possible combinations remain unassigned.
Different binary codes can be obtained by arranging four bits into 10 distinct combinations. This scheme is
called binary-coded decimal and is commonly referred to as BCD.
A number with k decimal digits will require 4k bits in BCD. Decimal 396 is represented in BCD
with 12 bits as 0011 1001 0110, with each group of 4 bits representing one decimal digit. A decimal
number in BCD is the same as its equivalent binary number only when the number is between 0 and 9. A
BCD number greater than 10 looks different from its equivalent binary number, even though both contain
1’s and 0’s. Note that the BCD code is not self‐complementing. Moreover, the binary combinations 1010
through 1111 are not used and have no meaning in BCD. Consider decimal 185 and its corresponding value
in BCD and binary:
(185)10 = (0001 1000 0101) BCD = (10111001)2
Table 1
In multi digit BCD coding
The sum 1110 is an invalid BCD number. This has occurred because the sum of the two digits exceeds 9.
Whenever this occurs this occurs the sum has to be corrected by the addition of six (1110) in the invalid
BCD number, as shown below
In this case, result (001 0001) is valid BCD number, but it is incorrect. To get the correct BCD result
correction factor of 6 has to be added to the least significant digit sum, as shown.
12.Alphanumeric codes
Alphanumeric codes are sometimes called character codes due to their certain properties. Now
these codes are basically binary codes. We can write alphanumeric data, including data, letters of the
alphabet, numbers, mathematical symbols and punctuation marks by this code which can be easily
understandable and can be processed by the computers. Input output devices such as keyboards, monitors,
mouse can be interfaced using these codes. 12-bit Hollerith code is the better known and perhaps the first
effective code in the days of evolving computers in early days. During this period punch cards were used as
the inputting and outputting data. But nowadays these codes are termed obsolete as many other modern
codes have evolved. The most common alphanumeric codes used these days are ASCII code, EBCDIC
code and Unicode.
Error
Weighted Non-weighted Reflective Sequential Alpha detecting and
Codes Code Codes Code numeric correcting
Codes
1. Weighted Codes
• Obey positional weight principle.
• A specific weight is assigned to each position of the number.
• Eg.: Binary, BCD codes
2. Non-weighted Codes
• Do not obey positional weight principle.
• Positional weights are not assigned.
• Eg.: excess-3 code, Gray code
3. Reflective Codes
• A code is said to be reflective when code for 9 is complement of code for 0, code for
8 is complement of code for 1, code for 7 is complement of code for 2, code for 6 is
complement of code for 3, code for 5 is complement of code for 4.
• Reflectivity is desirable when 9’s complement has to be found.
• Eg.: excess-3 code
4. Sequential Codes
• A code is said to be sequential when each succeeding code is one binary number
greater than preceding code.
• Eg.: Binary, XS-3
5. Alphanumeric Codes
• Designed to represent numbers as well as alphabetic characters.
• Capable of representing symbols as well as instructions.
• Eg.: ASCII, EBCDIC
Decimal equivalent → 0 7 9
Therefore (1010 0011 1100)XS-3 = (709)10
--------------------------------------------------------------------------------------------------------------
Obtain XS-3 equivalent of following numbers:
(a) (235)10 (b) (146)10 (c) (0111 1000)BCD (d) (1001 0011)BCD
(e) (101010)2 (hint: first convert to decimal)
Gray Code
Decimal Binary Gray Code
• Non-weighted code.
0 0000 0000
• It has a very special feature that only
1 0001 0001 one bit will change, each time the
2 0010 0011 decimal number is incremented,
3 0011 0010 therefore also called unit distance code.
4 0100 0110
5 0101 0111 Binary and Gray conversions:
6 0110 0101 • For Gray to binary or binary to Gray
conversions let’s understand rules for
7 0111 0100
Ex-OR
8 1000 1100
(Ex-OR is represented by symbol )
9 1001 1101
10 1010 1111 Rules for EX-OR:
11 1011 1110
12 1100 1010
13 1101 1011
14 1110 1001
15 1111 1000
Conversion from Binary to Gray code:
Step 1: Write MSB of given Binary number as it is.
Step 2: Ex-OR this bit with next bit of that binary number and write the result.
Step 3: Ex-OR each successive sum until LSB of that binary number is reached.
• Eg.: Convert (1010011)2 to its equivalent Gray code.
1 0 1 0 0 1 1
1 1 1 1 0 1 0
Therefore (1010011)2 = (1111010)Gray
Conversion from Gray to Binary:
Step 1: Write MSB of given Binary number as it is.
Step 2: Ex-OR this bit with next bit of that binary number and write the result.
Step 3: Continue this process until LSB of that binary number is reached.
• Eg.: Convert (1010111)Gray to its equivalent Binary number.
1 0 1 0 1 1 1
1 1 0 0 1 0 1
Therefore (1010111)Gray = (1100101)2
Alphanumeric Codes
• A binary bit can represent only two symbols ‘0’ and ‘1’. But it is not enough for
communication between two computers because there we need many more
symbols for communication.
• These symbols are required to represent
- 26 alphabets with capital and small letters
- Numbers from 0 to 9
- Punctuation marks and other symbols
• Alphanumeric codes represent numbers and alphabetic characters. They also
represent other characters such as punctuation symbols and instructions for
conveying information.
• Therefore instead of using only single binary bits, a group of bits is used as a code
to represent a symbol.
Boolean theorems
Boolean algebraic theorems are the theorems that are used to change the form of a boolean
expression. Sometimes these theorems are used to minimize the terms of the expression,
and sometimes they are used just to transfer the expression from one form to another.
There are boolean algebraic theorems in digital logic:
Transposition Theorem:
It states that:
AB + A'C = (A + C) (A' + B)
Proof:
RHS
= (A + C) (A' + B)
= AA' + A'C + AB + CB
= 0 + A'C + AB + BC
= A'C + AB + BC(A + A')
= AB + ABC + A'C + A'BC
= AB + A'C
= LHS
Duality Theorem:
Dual expression is equivalent to write a negative logic of the given boolean relation. For this,
1. Change each OR sign by and AND sign and vice-versa.
2. Complement any 0 or 1 appearing in the expression.
3. Keep literals as it is.
Example:
Dual of A(B+C) = A+(B.C) = (A+B)(A+C)
Complementary Theorem:
For obtaining complement expression,
1. Change each OR sign by AND sign and vice-versa.
2. Complement any 0 or 1 appearing in the expression.
3. Complement the individual literals.
Example:
Complement of A(B+C) = A'+(B'.C') = (A'+B')(A'+C')
Commutative Law
Any binary operation which satisfies the following expression is referred to as a commutative
operation. Commutative law states that changing the sequence of the variables does not have any
effect on the output of a logic circuit.
• A. B = B. A
• A+ B = B +A
Associative Law
It states that the order in which the logic operations are performed is irrelevant as their effect is the
same.
• ( A. B ). C = A . ( B . C )
• ( A + B ) + C = A + ( B + C)
Distributive Law
AND Law
These laws use the AND operation. Therefore, they are called AND laws.
• A .0 = 0
• A. 1 =A
• A. A = A
• A.A’ = 0
OR Law
These laws use the OR operation. Therefore they are called OR laws.
• A + 0 =A
• A+1=1
• A+A=A
• A + A’ = 1
Inversion Law
In Boolean algebra, the inversion law states that the double inversion of a variable results in the
original variable itself.
• (A’)’ = A
The two important theorems which are extremely used in Boolean algebra are De
Morgan’s First law and De Morgan’s second law. These two theorems are used to change the
Boolean expression. This theorem basically helps to reduce the given
Boolean expression in the simplified form. These two De Morgan’s laws are used to change the
expression from one form to another form. Now, let us discuss these two theorems in detail.
The first law states that the complement of the product of the variables is equal to the sum of their
individual complements of a variable.
The truth table that shows the verification of De Morgan’s First law is given as follows:
The last two columns show that (A.B)’ = A’+B’.
The second law states that the complement of the sum of variables is equal to the product of their
individual complements of a variable.
The following truth table shows the proof for De Morgan’s second law.
The last two columns show that (A+B)’ = A’. B’.
The other theorems in Boolean algebra are complementary theorem, duality theorem, transposition
theorem, redundancy theorem and so on. All these theorems are used to simplify the given Boolean
expression. The reduced Boolean expression should be equivalent to the given Boolean expression.
Universal Gates
In addition to AND, OR, and NOT gates, other logic gates like NAND and NOR are also used in the
design of digital circuits.
The small circle (bubble) at the output of the graphic symbol of a NOT gate is formally called a
negation indicator and designates the logical complement.
NAND Gate:
The NAND gate represents the complement of the AND operation. Its name is an abbreviation of
NOT AND.
The graphic symbol for the NAND gate consists of an AND symbol with a bubble on the output,
denoting that a complement operation is performed on the output of the AND gate.
The truth table and the graphic symbol of NAND gate is shown in the figure.
The truth table clearly shows that the NAND operation is the complement of the AND. NOR Gate:
The NOR gate represents the complement of the OR operation. Its name is an abbreviation of NOT
OR.
The graphic symbol for the NOR gate consists of an OR symbol with a bubble on the output,
denoting that a complement operation is performed on the output of the OR gate.
The truth table and the graphic symbol of NOR gate is shown in the figure.
The truth table clearly shows that the NOR operation is the complement of the OR.
Universal Gates:
A universal gate is a gate which can implement any Boolean function without need to use any other
gate type.
In practice, this is advantageous since NAND and NOR gates are economical and easier to fabricate
and are the basic gates used in all IC digital logic families.
In fact, an AND gate is typically implemented as a NAND gate followed by an inverter not the
other way around!!
Likewise, an OR gate is typically implemented as a NOR gate followed by an inverter not the other
way around!!
The figure shows two ways in which a NAND gate can be used as an inverter (NOT gate).
1. All NAND input pins connect to the input signal A gives an output A’.
2. One NAND input pin is connected to the input signal A while all other input pins are connected
to logic 1. The output will be A’.
An AND gate can be replaced by NAND gates as shown in the figure (The AND is replaced by a
NAND gate with its output complemented by a NAND gate inverter).
An OR gate can be replaced by NAND gates as shown in the figure (The OR gate is replaced by a
NAND gate with all its inputs complemented by NAND gate inverters).
Thus, the NAND gate is a universal gate since it can implement the AND, OR and NOT
functions.
The figure shows two ways in which a NOR gate can be used as an inverter (NOT gate).
1. All NOR input pins connect to the input signal A gives an output A’.
2. One NOR input pin is connected to the input signal A while all other input pins are connected to
logic 0. The output will be A’.
An AND gate can be replaced by NOR gates as shown in the figure (The AND gate is replaced by a
NOR gate with all its inputs complemented by NOR gate inverters)
Thus, the NOR gate is a universal gate since it can implement the AND, OR and NOT functions.
Equivalent Gates:
The shown figure summarizes important cases of gate equivalence. Note that bubbles indicate a
complement operation (inverter).
Two NOT gates in series are same as a buffer because they cancel each other as A’’ = A.
Two-Level Implementations:
We have seen before that Boolean functions in either SOP or POS forms can be implemented using
2-Level implementations.
For SOP forms AND gates will be in the first level and a single OR gate will be in the second level.
For POS forms OR gates will be in the first level and a single AND gate will be in the second level.
Note that using inverters to complement input variables is not counted as a level.
We will show that SOP forms can be implemented using only NAND gates, while POS forms can be
implemented using only NOR gates.
Introducing two successive inverters at the inputs of the OR gate results in the shown equivalent
implementation. Since two successive inverters on the same line will not have an overall effect on
the logic as it is shown before.
(see animation in authorware version)
By associating one of the inverters with the output of the first level AND gate and the other with
the input of the OR gate, it is clear that this implementation is reducible to 2-level implementation
where both levels are NAND gates as shown in Figure.
There are some other types of 2-level combinational circuits which are
• NAND-AND
• AND-NOR,
• NOR-OR,
• OR-NAND
AND-NOR functions:
Example 3: Implement the following function F = XZ +YZ
+ XYZ or
F = XZ + YZ + XYZ
Since F’ is in SOP form, it can be implemented by using NAND-NAND circuit. By
complementing the output we can get F, or by using NAND-AND circuit as shown in the
figure.
It can also be implemented using AND-NOR circuit as it is equivalent to NAND- AND circuit as
shown in the figure.
OR-NAND functions:
Example 4: Implement the following function
F = ( X + Z ).(Y + Z ).(X +Y + Z ) or
F = ( X + Z )(Y + Z )( X + Y + Z )
The concept of the sum of products (SOP) mainly includes minterm, types of SOP, K-map, and schematic
design of SOP. Similarly, the product of sums (POS) mainly includes the max term, types of product of
sums, k-map and schematic design of POS. What is a Sum of Product (SOP)?
The short form of the sum of the product is SOP, and it is one kind of Boolean algebra expression. In this,
the different product inputs are being added together. The product of inputs is Boolean logical AND
whereas the sum or addition is Boolean logical OR. Before going to understand the concept of the sum of
products, we have to know the concept of minterm.
The min term can be defined as, when the minimum combinations of inputs are high then the output
will be high. The best example of this is AND gate, so we can say that min terms are combinations of
AND gate inputs. The truth table of the min term is shown below.
In the above table, there are three inputs namely X, Y, Z and the combinations of these inputs are 8.
Every combination has a minterm that is specified with m.
The sum of products is available in three different forms which include the following.
The number of inputs and the number of AND gates depend upon the expression one is implementing.
The design for a minimal sum of product & canonical expression using AND-OR gates is shown above.
What is a Product of Sum (POS)?
The short form of the product of the sum is POS, and it is one kind of Boolean algebra expression. In this,
it is a form in which products of the dissimilar sum of inputs are taken, which are not arithmetic result &
sum although they are logical Boolean AND & OR correspondingly. Before going to understand the
concept of the product of the sum, we have to know the concept of the max term.
The maxterm can be defined as a term that is true for the highest number of input combinations otherwise
that is false for single input combinations. Because OR gate also provides false for just one input
combination. Thus Max term is OR of any complemented otherwise non-complemented inputs.
In the above table, there are three inputs namely X, Y, Z and the combinations of these inputs are 8.
Every combination has a max term that is specified with M.
In max term, every input is complemented as it provides only ‘0’ while the stated combination is applied
& complement of minterm is a max term.
The product of the sum is classified into three types which include the following.
The canonical POS is also named as a product of max term. These are AND jointly for which o/p is low or
false. The expression this is denoted by ∏ and the max terms in the bracket are taken when the output is
false. The truth table of the canonical product of sum is shown below.
For the above table, the canonical POS can be written as F = ∏ (M0, M4, M6, M7) By expanding
the above equation we can get the following function.
F = M0, M4, M6, M7
By substituting the max terms in the above equation we can get the below expression
F = (X+Y+Z) (X’+Y+Z)(X’+Y’+Z)(X’+Y’+Z’)
The product term of the canonical form includes both complemented and non-complimented inputs
2). Non – Canonical Product of Sum
The expression of the product of sum (POS) is not in normal form is named as non-canonical form. For
example, let’s take the above expression
This is the most simplified expression of the product of the sum, and it is also a type of non-canonical.
This type of can is made simplified with the Boolean algebraic theorems although it is simply done by
using K-map (Karnaugh map).
This form is chosen due to the number of input lines & gates are used in this is minimum. It is profitably
useful due to its solid size, quick speed, along with low manufacture price.
Let’s take an example of canonical form function, and the Product of sums K map is
POS K-map
The expression of this based on the K-map will be
The expression of the product of the sum executes two levels OR- AND design and this design requires a
collection of OR gates and one AND gate. Each expression of the product of the sum has similar
designing.
Schematic
Design of POS
The number of inputs and the number of AND gates depend upon the expression one is implementing.
The design for a minimal sum of product and canonical expression using OR-AND gates is shown
above.
interms and Maxterms are important parts of Boolean algebra. Minterm is the product of N
distinct literals where each literal occurs exactly once. The output of the minterm functions is 1.
Minterm is represented by m. Maxterm is the sum of N distinct literals where each literals occurs
exactly once. The output of the maxterm functions is 0. Maxterm is represented by M. In this
article we will learn about minterms and maxterms, their difference, why we use minterms and
maxterms along with the solved examples.
What is Minterm?
Minterm is the product of various different literals in which each literal occurs exactly once. The
output result of the minterm functions is 1. It is represented by m. To represent a function, we
perform a sum of minterms also called the Sum Of Products (SOP).
Example of SOP:
A’B + AC + BC
Maxterms for values is the maxterms obtained by the values of the Boolean variable.
Steps for obtaining maxterms from values:
1. If the value of the Boolean variable is 0 then we will take the variable without complementing it.
2. If the value of the Boolean variable is 1 then we will take the variable by complementing it. Maxterm
Example:
If there are four Boolean variables A, B, C, D with the values A = 1, B = 0, C = 0 and D = 1. Find the
maxterm for values given.
Solution:
Given the values of the Boolean variables:
A = 1, B = 0, C = 0 and D = 1
The required maxterm is given by = A’ + B + C + D’ We
complemented A and D as its value is 1.
Minterm vs Maxterm
Minterm Maxterm
It is represented by m. It is represented by M.
The sum of minterms forms SOP (Sum of The product of maxterms forms POS (Product of
Product) functions. Sum) functions.
The output result of minterm function is 1. The output result of maxterm function is 0.
The simplification of the functions using Boolean laws and theorems becomes complex
with the increase in the number of variables and terms. The map method, first proposed by Veitch
and slightly improvised by Karnaugh, provides a simple, straightforward procedure for the
simplification of Boolean functions. The method is called Veitch diagram or Karnaugh map,
which may be regarded as a pictorial representation of a truth table.
The Karnaugh map technique provides a systematic method for simplifying and
manipulation of Boolean expressions. A K-map is a diagram made up of squares, with each square
representing one minterm of the function that is to be minimized. For n variables on a Karnaugh
map there are 2n numbers of squares. Each square or cell represents one of the minterms. It can be
drawn directly from either minterm (sum-of- products) or maxterm (product-of-sums) Boolean
expressions.
It is important to note that when we move from one cell to the next along any row or from
one cell to the next along any column, one and only one variable in the product term changes (to
a complement or to an uncomplemented form). Irrespective of number of variables the labels along
each row and column must conform to a single change. Hence gray code is used to label the rows
and columns of K-map as shown below.
Grouping cells for Simplification:
The grouping is nothing but combining terms in adjacent cells. The simplification is
achieved by grouping adjacent 1’s or 0’s in groups of 2i, where i = 1, 2, …, n and n is the number
of variables. When adjacent 1’s are grouped then we get result in the sum of product form;
otherwise we get result in the product of sum form.
Examples of Quads
The four 1’s in fig (d) and fig (e) are also adjacent, as are those in fig (f) because, the top
and bottom rows are considered to be adjacent to each other and the leftmost and rightmost
columns are also adjacent to each other.
F = yz+ xz’
F = z’+ xy’
Therefore,
Y= A’B’CD’+ AC’D+ BC’
Therefore,
F= y’+ w’z’+ xz’
3. F= A’B’C’+ B’CD’+ A’BCD’+ AB’C’
= A’B’C’ (D+ D’) + B’CD’ (A+ A’) + A’BCD’+ AB’C’ (D+ D’)
= A’B’C’D+ A’B’C’D’+ AB’CD’+ A’B’CD’+ A’BCD’+ AB’C’D+ AB’C’D’
Therefore,
F= B’D’+ B’C’+ A’CD’.
1. Y= (A+ B+ C’) (A+ B’+ C’) (A’+ B’+ C’) (A’+ B+ C) (A+ B+ C)
= M1. M3. M7. M4. M0
=∏ M (0, 1, 3, 4, 7)
= ∑ m (2, 5, 6)
Y’ = B’C’+ A’C+ BC.
2. Y= (A’+ B’+ C+ D) (A’+ B’+ C’+ D) (A’+ B’+ C’+ D’) (A’+ B+ C+ D) (A+ B’+ C’+ D)
(A+ B’+ C’+ D’) (A+ B+ C+ D) (A’+ B’+ C+ D’)
= M12. M14. M15. M8. M6. M7. M0. M13
Y’ = B’C’D’+ AB+ BC
= (A”+ B”+ D”). (A”+ B”+C’). (A’+ B’+ D’). (A’+ C”) = (A+
Y’ = BD’+ CD+ AB
F (x, y, z) = 1
F (w, x, y, z) = w’x’+ yz
F (w, x, y, z) = w’xz+ wy’+ x’z’.
3. F (w, x, y, z) = ∑m (0, 1, 4, 8, 9, 10)+ ∑d (2, 11) Soln:
Thus, every row on one map is adjacent to the corresponding row (the one occupying the
same position) on the other map, as are corresponding columns.
Also,the rightmost and leftmost columns within each 16- cell map are adjacent, just as they
are in any 16- cell map, as are the top and bottom rows.
Typical subcubes on a five-variable map
However, the rightmost column of the map is not adjacent to the leftmost column of the other
map.
2. F (A, B, C, D, E) = ∑m (0, 5, 6, 8, 9, 10, 11, 16, 20, 24, 25, 26, 27, 29, 31)
Soln:
F (A, B, C, D, E) = C’D’E’+ A’B’CD’E+ A’B’CDE’+ AB’D’E’+ ABE+ BC’
3. F (A, B, C, D, E) = ∑m ( 1, 4, 8, 10, 11, 20, 22, 24, 25, 26)+∑d (0, 12, 16, 17) Soln:
5.
F (x1, x2, x3, x4, x5) = x2x3’x4’+ x2x3x4x5’+ x3’x4’x5+ x1x2x4+ x1’x2’x3x5’+ x1’x2’x3’x4
Minterm a b c d
0 0 0 0 0
3 0 0 1 1
4 0 1 0 0
6 0 1 1 0
11 1 0 1 1
8 1 0 0 0
10 1 0 1 0
12 1 1 0 0
13 1 1 0 1
Binary representation of minterms
Step 2:
The above binary representations are grouped into a number of sections in terms of
the number of 1’s.
No of 1’s Minterm a b c d
0 0 0 0 0 0
4 0 1 0 0
1
8 1 0 0 0
3 0 0 1 1
6 0 1 1 0
2 10 1 0 1 0
12 1 1 0 0
11 1 0 1 1
3
13 1 1 0 1
Group of minterms for different number of 1’s
2. Find the minimal SOP expression for the following function
F (w, x, y, z) = ∑ m (0, 1, 2, 3, 10, 11, 12, 13, 14, 15) using Quine-McCluskey method.
Soln:
Step 1:
These minterms are represented in the binary form.
Minterm w x y z
0 0 0 0 0
1 0 0 0 1
2 0 0 1 0
3 0 0 1 1
10 1 0 1 0
11 1 0 1 1
12 1 1 0 0
13 1 1 0 1
14 1 1 1 0
15 1 1 1 1
0 0 0 0 0 0
1 0 0 0 1
1
2 0 0 1 0
3 0 0 1 1
2 10 1 0 1 0
12 1 1 0 0
11 1 0 1 1
3 13 1 1 0 1
14 1 1 1 0
4 15 1 1 1 1
Group of minterms for different number of 1’s
Step 3:
Minterm Combination w x y z
(0, 1) 0 0 0 -
(0, 2) 0 0 - 0
(1, 3) 0 0 - 1
(2, 3) 0 0 1 -
(2, 10) - 0 1 0
(3, 11) - 0 1 1
(10, 11) 1 0 1 -
(10, 14) 1 - 1 0
(12, 13) 1 1 0 -
(12, 14) 1 1 - 0
(11, 15) 1 - 1 1
(13, 15) 1 1 - 1
(14, 15) 1 1 1 -
2-cell combinations
Step 4:
From the two-cell combinations, one variable and a dash (-) in the same position can
be combined to form 4-cell combination.
Minterm Combination w x y z
(0, 1, 2, 3) 0 0 - -
(2, 3, 10, 11) - 0 1 -
(10, 11, 14, 15) 1 - 1 -
(12, 13, 14, 15) 1 1 - -
4-cell combinations
Step 5:
The column having only one cross mark corresponds to the essential prime implicants.
A tick mark is put against every column which has only one cross mark. A star mark is put
against every essential prime implicants.
Prime Implicants 0 1 2 3 10 11 12 13 14 15
w’x’ * (0, 1, 2, 3) x x x
x’y * (2, 3, 10, 11) x x x x
wy (10, 11, 14, 15) x x x x
wx * (12, 13, 14, 15) x x x
1 0 0 0 1
3 0 0 1 1
4 0 1 0 0
7 0 1 1 1
8 1 0 0 0
10 1 0 1 0
11 1 0 1 1
13 1 1 0 1
15 1 1 1 1
Binary representation of minterms
Step 2:
The above binary representations are grouped into a number of sections in terms
of the number of 1’s.
Step 3:
F (A, B, C, D) = A’BC’D’+ A’B’D+ AB’D’+ ABD+ CD
F (A, B, C, D) = A’B’C’+ B’D’+ AC.
5. Find the minimal SOP expression for the following function
F (A, B, C, D) = Σ m (0, 2, 3, 6, 7, 8, 10, 12, 13) using Tabulation method.
Soln:
Step 1:
List all minterms in the binary form.