Lab 5 Universal Gates
Lab 5 Universal Gates
Lab 5 Universal Gates
Lab No. 5
1.Objectives
Having completed this experiment, you will be able to:
Use NAND and NOR gates to implement AND, OR, NOT gate functionalities.
Understand and appreciate De Morgan’s Laws
2. Basic Information
2.1. Universal Gates
The NAND and NOR gates are also called Universal Gates since their combinations can be used to
accomplish any of the basic logic operations, i.e. NOT, AND and OR operations. The non-inverting gates
do not have this versatility since they can't produce an invert.
NAND Gate:
NAND gate is basically an AND gate but with the output inverted, as shown by the 'o' on
the output of the AND gate symbol. Thus the output is true if both the inputs A AND B are NOT true
simultaneously, in equation form we can write it as Q = NOT (A AND B). Like AND gates, some NAND
gates can have more than two inputs, in that case, the output is true if NOT ALL the inputs are true.
A Q A Q
Input A Input B Output Q
0 0 1
0 1 1
B 1 0 1
B
1 1 0
Traditional symbol IEC symbol Truth Table
NOR Gate:
NOR gate is basically an OR gate but with the output inverted, as shown by the 'o' on
the output of the OR gate symbol. Thus the output is true if neither of the inputs A OR B is true, in
equation form we can write it as Q = NOT (A OR B). Like OR gates, some NOR gates can have more than
two inputs, in that case, the output is true if NONE of the inputs is true.
A Q A Q
Input A Input B Output Q
0 0 1
0 1 0
1 0 0
B B
1 1 0
Traditional symbol IEC symbol Truth Table
3. Experimental Work
Part-I: Working with NAND Gate
3.1 Material Required
a) Logic Trainer
b) 74LS00
2
Digital Logic Design Lab (EE-2401)
c) Connecting wires
3.2 Procedure
1. Connect the trainer to 220v AC power supply.
2. Turn on the Trainer and verify the DC voltage by using voltmeter, it should be almost 5.0 volts
(specifically between 4.75V – 5.25V). If not consult the Lab. Supervisor.
3. Install the NAND-Gate IC 74LS00 on the trainer’s breadboard.
4. Connect the +Vcc (pin # 14) and Ground (pin # 7) pins of the IC to +5V and Gnd supply of the
trainer board. (Consult Fig 3.1 for pin diagram of the IC)
5. Make the appropriate circuit connections according to the diagrams provided in Fig 3.2 for
implementing NOT, AND and OR gate functionalities.
6. Mark the input as “A”, “B” and output as A’, A+B, and AB with respective logic circuit.
7. For each of the NOT, AND and OR gate implementations with NAND gate, verify the proper
working of the gate by completing the Truth-Tables given in Table 3.1.
Fig 3.2: NAND Gate connections for NOT, AND and OR operations
3
Digital Logic Design Lab (EE-2401)
3.3 Experimental Results
Fig 3.4: NOR Gate connections for NOT, AND and OR operations
4
Digital Logic Design Lab (EE-2401)
3.6 Experimental Results
In Case of Trouble
1. Check the power supply for correct voltage.
2. Check the Vcc (pin # 14) and Ground (pin # 7) connections of the IC under test.
3. Check all the wire connections and remove any possible breaks.
4. Check the IC under test using truth table.
5
Digital Logic Design Lab (EE-2401)
Lab 5 Evaluation Sheet
Understanding (12)
Teamwork (6)
Total: /30
6
Digital Logic Design Lab (EE-2401)