A1301,02

A1301 and A1302
Continuous-Time Ratiometric Linear Hall Effect Sensor ICs
Features and Benefits Description

▪ Low-noise output The A1301 and A1302 are continuous-time, ratiometric, linear
▪ Fast power-on time Hall-effect sensor ICs. They are optimized to accurately provide
▪ Ratiometric rail-to-rail output a voltage output that is proportional to an applied magnetic
▪ 4.5 to 6.0 V operation field. These devices have a quiescent output voltage that is
▪ Solid-state reliability 50% of the supply voltage. Two output sensitivity options
▪ Factory-programmed at end-of-line for optimum are provided: 2.5 mV/G typical for the A1301, and 1.3 mV/G
performance typical for the A1302.
▪ Robust ESD performance The Hall-effect integrated circuit included in each device
includes a Hall circuit, a linear amplifier, and a CMOS Class A
output structure. Integrating the Hall circuit and the amplifier
on a single chip minimizes many of the problems normally
Packages: 3 pin SOT23W (suffix LH), and associated with low voltage level analog signals.
3 pin SIP (suffix UA)
High precision in output levels is obtained by internal gain
and offset trim adjustments made at end-of-line during the
manufacturing process.
These features make the A1301 and A1302 ideal for use in
position sensing systems, for both linear target motion and
rotational target motion. They are well-suited for industrial
applications over extended temperature ranges, from –40°C
to 125°C.
Two device package types are available: LH, a 3-pin SOT23W
type for surface mount, and UA, a 3-pin ultramini SIP for
through-hole mount. They are lead (Pb) free (suffix, –T) with
100% matte tin plated leadframes.
Not to scale
Functional Block Diagram
V+
VCC
To all subcircuits
VOUT
Filter
Amp Out
Gain Offset
CBYPASS
Trim
Control
GND
A1301-DS, Rev. 13
A1301 and Continuous-Time Ratiometric
A1302 Linear Hall Effect Sensor ICs
Selection Guide
Part Number Packing1 Package Ambient, TA Sensitivity (Typical)
A1301ELHLT-T2 7-in. tape and reel, 3000 pieces/reel Surface Mount
–40ºC to 85ºC
A1301EUA-T Bulk, 500 pieces/bag SIP
2.5 mV/G
A1301KLHLT-T 7-in. tape and reel, 3000 pieces/reel Surface Mount
–40ºC to 125ºC
A1301KUA-T Bulk, 500 pieces/bag SIP
A1302ELHLT-T 7-in. tape and reel, 3000 pieces/reel Surface Mount
–40ºC to 85ºC
A1302EUA-T3 Bulk, 500 pieces/bag SIP
1.3 mV/G
A1302KLHLT-T 7-in. tape and reel, 3000 pieces/reel Surface Mount
–40ºC to 125ºC
A1302KUA-T Bulk, 500 pieces/bag SIP
1Contact Allegro for additional packing options.
2Variant is in production but has been determined to be LAST TIME BUY. This classification indicates that the variant is obsolete and
notice has been given. Sale of the variant is currently restricted to existing customer applications. The variant should not be purchased for
new design applications because of obsolescence in the near future. Samples are no longer available. Status date change May 4, 2009.
Deadline for receipt of LAST TIME BUY orders is November 4, 2009.
3Variant is in production but has been determined to be NOT FOR NEW DESIGN. This classification indicates that sale of the variant is
currently restricted to existing customer applications. The variant should not be purchased for new design applications because obsoles-
cence in the near future is probable. Samples are no longer available. Status change: May 4, 2009.
Absolute Maximum Ratings

Characteristic Symbol Notes Rating Units
Supply Voltage VCC 8 V
Output Voltage VOUT 8 V
Reverse Supply Voltage VRCC –0.1 V
Reverse Supply Voltage VRCC –0.1 V
Output Sink Current IOUT 10 mA
Range E –40 to 85 ºC
Operating Ambient Temperature TA
Range K –40 to 125 ºC
Maximum Junction Temperature TJ(max) 165 ºC
Storage Temperature Tstg –65 to 170 ºC
Allegro MicroSystems, Inc. 2

115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Pin-out Drawings
Package LH Package UA
1 2 1 2 3
Terminal List
Number
Symbol Description
Package LH Package UA
VCC 1 1 Connects power supply to chip
VOUT 2 3 Output from circuit
GND 3 2 Ground

DEVICE CHARACTERISTICS over operating temperature range, TA, and VCC = 5 V, unless otherwise noted
Characteristic Symbol Test Conditions Min. Typ. Max. Units
Electrical Characteristics
Supply Voltage VCC Running, TJ < 165°C 4.5 – 6 V
Supply Current ICC Output open – – 11 mA
VOUT(High) ISOURCE = –1 mA, Sens = nominal 4.65 4.7 – V
Output Voltage
VOUT(Low) ISINK = 1 mA, Sens = nominal – 0.2 0.25 V
Output Bandwidth BW – 20 – kHz
VCC(min) to 0.95 VOUT; B = ±1400 G;
Power-On Time tPO – 3 5 μs
Slew rate = 4.5 V/μs to 4.5 V/100 ns
Output Resistance ROUT ISINK ≤ 1 mA, ISOURCE ≥ –1 mA – 2 5 Ω
External output low pass filter ≤ 10 kHz;
Wide Band Output Noise, rms VOUTN – 150 – μV
Sens = nominal
Ratiometry
Quiescent Output Voltage Error
ΔVOUTQ(V) TA = 25°C – – ±3.0 %
with respect to ∆VCC1
Magnetic Sensitivity Error with
ΔSens(V) TA = 25°C – – ±3.0 %
respect to ∆VCC2
Output
Linearity Lin TA = 25°C – – ±2.5 %
Symmetry Sym TA = 25°C – – ±3.0 %
Magnetic Characteristics
Quiescent Output Voltage VOUTQ B = 0 G; TA = 25°C 2.4 2.5 2.6 V
Quiescent Output Voltage over
VOUTQ(TA) B = 0 G 2.2 – 2.8 V
Operating Temperature Range
A1301; TA = 25°C 2.0 2.5 3.0 mV/G
Magnetic Sensitivity Sens
A1302; TA = 25°C 1.0 1.3 1.6 mV/G
Magnetic Sensitivity over A1301 1.8 – 3.2 mV/G
Sens(TA)
Operating Temperature Range A1302 0.85 – 1.75 mV/G
1Refer to equation (4) in Ratiometric section on page 4.
2Refer to equation (5) in Ratiometric section on page 4.

Characteristic Definitions
Quiescent Output Voltage. In the quiescent state (no sig- Ratiometric. The A1301 and A1302 feature a ratiometric
nificant magnetic field: B = 0), the output, VOUTQ, equals one output. This means that the quiescent voltage output, VOUTQ,
half of the supply voltage, VCC, throughout the entire operating and the magnetic sensitivity, Sens, are proportional to the supply
ranges of VCC and ambient temperature, TA. Due to internal voltage, VCC.
component tolerances and thermal considerations, there is a
The ratiometric change (%) in the quiescent voltage output is
tolerance on the quiescent output voltage, ∆VOUTQ, which is
defined as:
a function of both ∆VCC and ∆TA. For purposes of specifica-
VOUTQ(VCC) VOUTQ(5V)
tion, the quiescent output voltage as a function of temperature, ΔVOUTQ(ΔV) = (4)
× 100%
∆VOUTQ(∆TA), is defined as: VCC 5V
VOUTQ(ΤΑ) – VOUTQ(25ºC)
and the ratiometric change (%) in sensitivity is defined as:
ΔVOUTQ(ΔΤΑ) = (1)
Sens(25ºC) Sens(VCC) Sens(5V)
ΔSens(ΔV) = × 100% (5)
where Sens is in mV/G, and the result is the device equivalent VCC 5V
accuracy, in gauss (G), applicable over the entire operating tem-
perature range.
Linearity and Symmetry. The on-chip output stage is
Sensitivity. The presence of a south-polarity (+B) magnetic designed to provide linear output at a supply voltage of 5 V.
field, perpendicular to the branded face of the device package, Although the application of very high magnetic fields does not
increases the output voltage, VOUT, in proportion to the magnetic damage these devices, it does force their output into a nonlinear
field applied, from VOUTQ toward the VCC rail. Conversely, the region. Linearity in percent is measured and defined as:
application of a north polarity (–B) magnetic field, in the same
orientation, proportionally decreases the output voltage from its VOUT(+B) – VOUTQ
quiescent value. This proportionality is specified as the magnetic Lin+ = × 100% (6)
sensitivity of the device and is defined as: 2 (VOUT(+B½) – VVOUTQ )
VOUT(–B) – VOUT(+B)
Sens = (2) VOUT(–B) – VOUTQ
2B Lin– = × 100% (7)
2(VOUT(–B½) – VOUTQ)
The stability of the device magnetic sensitivity as a function of
ambient temperature, ∆ Sens (∆TA) (%) is defined as: and output symmetry as:
Sens(ΤΑ) – Sens(25ºC) VOUT(+B) – VOUTQ
ΔSens(ΔΤΑ) = × 100% (3) Sym = × 100% (8)
Sens(25ºC) VOUTQ – VOUT(–B)

Typical Characteristics
(30 pieces, 3 fabrication lots)
1301 Device Sensitivity vs. Ambient Temperature 1302 Device Sensitivity vs. Temperature
2.65 1.40
1.38
2.60 UA Package
UA Package 1.36
Sensitivity (mV/G)
Sensitivity (mV/G)
2.55 1.34
2.50 1.32
LH Package 1.30
2.45 LH Package
1.28
2.40
1.26
2.35 1.24
–50 –25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150
Temperature (°C) Temperature (°C)
1301 Device VOUTQ vs. Ambient Temperature 1302 Device VOUTQ vs. Ambient Temperature
2.60 2.60
Output Voltage (V)
Output Voltage (V)
2.55 2.55
2.50 2.50
2.45 2.45
2.40 2.40
–50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150
Temperature (°C) Temperature (°C)
1301 Device Sensitivity vs. Supply Voltage 1302 Device Sensitivity vs. Supply Voltage
3.5 1.7
1.6
3.0
Sensitivity (mV/G)
Sensitivity (mV/G)
1.5
1.4
2.5
1.3
1.2
2.0
1.1
1.5 1.0
4.5 5.0 5.5 6.0 4.5 5.0 5.5 6.0
Supply Voltage (V) Supply Voltage (V)
Continued on the next page...

Typical Characteristics, continued
(30 pieces, 3 fabrication lots)
1301 Device VOUTQ vs. Supply Voltage 1302 Device VOUTQ vs. Supply Voltage
3.5 3.5
Output Voltage (V)

Output Voltage (V)
3.0 3.0
2.5 2.5
2.0 2.0
1.5 1.5
4.5 5.0 5.5 6.0 4.5 5.0 5.5 6.0
1301 Device LIN+ and LIN– vs. Supply Voltage 1302 Device LIN+ and LIN– vs. Supply Voltage
100.4 100.0
100.3
LIN+
LIN– 99.9
100.2
Linearity (%)
Linearity (%)
100.1 99.8
LIN–
100.0
LIN+ 99.7
99.9
99.8 99.6
4.5 5.0 5.5 6.0 4.5 5.0 5.5 6.0
1301 Device Symmetry vs. Supply Voltage 1302 Device Symmetry vs. Supply Voltage
100.0 100.5
99.9 100.4
99.8 100.3
99.7 100.2
Symmetry (%)
Symmetry (%)
99.6 100.1
99.5 100.0
99.4 99.9
99.3 99.8
99.2 99.7
99.1 99.6
99.0 99.5
4.5 5.0 5.5 6.0 4.5 5.0 5.5 6.0

Package LH, 3-Pin; (SOT-23W)
+0.12
2.98 –0.08
1.49 D +4°
4° –0°
3 A
+0.020
0.180–0.053
0.96 D
+0.10 +0.19 2.40

2.90 –0.20 1.91 –0.06
0.70
D
0.25 MIN
1.00
1 2
0.55 REF 0.25 BSC 0.95

Seating Plane
Gauge Plane B PCB Layout Reference View
8X 10° REF Branded Face
1.00 ±0.13
NNT
+0.10 1
0.05 –0.05
0.95 BSC C Standard Branding Reference View
0.40 ±0.10
N = Last two digits of device part number
T = Temperature code
For Reference Only; not for tooling use (reference dwg. 802840)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Active Area Depth, 0.28 mm REF
B Reference land pattern layout
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances
C Branding scale and appearance at supplier discretion
D Hall element, not to scale

Package UA, 3-Pin SIP

Matrix Leadframe
+0.08
4.09 –0.05
45°
B
C
E
2.04
1.52 ±0.05
1.44 E
Mold Ejector
+0.08 2X10°
3.02 –0.05 Pin Indent NNT
E
Branded 45°
Face 1
D Standard Branding Reference View
A
= Supplier emblem
1.02 0.79 REF
N = Last two digits of device part number
MAX
T = Temperature code
0.51
REF
1 2 3
For Reference Only; not for tooling use (reference DWG-9013)

14.99 ±0.25 +0.03 Exact case and lead configuration at supplier discretion within limits shown
0.41 –0.06
A Dambar removal protrusion (6X)

B Gate and tie bar burr area
C Active Area Depth, 0.50 mm REF
D Branding scale and appearance at supplier discretion
E Hall element, not to scale
+0.05 1.27 NOM

0.43 –0.07
Please note that there are changes to the existing UA package drawing pending.
Please contact the Allegro Marketing department for additional information.

Package UA, 3-Pin SIP

Conventional Leadframe
+0.08
4.09 –0.05
45°
B
C
E
2.04
1.52 ±0.05
1.44 E
Mold Ejector
+0.08 Pin Indent NNT
3.02 –0.05
E
Branded 45°
Face 1
2.16 D Standard Branding Reference View
MAX
= Supplier emblem
0.79 REF N = Last two digits of device part number
A T = Temperature code
0.51
REF
1 2 3
For Reference Only; not for tooling use (reference DWG-9049)

+0.03 Exact case and lead configuration at supplier discretion within limits shown
0.41 –0.06
15.75 ±0.51
A Dambar removal protrusion (6X)

B Gate burr area
C Active Area Depth, 0.50 mm REF
D Branding scale and appearance at supplier discretion
E Hall element, not to scale
+0.05 1.27 NOM

0.43 –0.07
Copyright ©2005-2009, Allegro MicroSystems, Inc.

The products described herein are manufactured under one or more of the following U.S. patents: 5,045,920; 5,264,783; 5,442,283; 5,389,889;
5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pending.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to per-
mit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use;
nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com


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A1301 and A1302

Continuous-Time Ratiometric Linear Hall Effect Sensor ICs

Features and Benefits Description

Functional Block Diagram

Absolute Maximum Ratings

Allegro MicroSystems, Inc. 2

Allegro MicroSystems, Inc. 3

Allegro MicroSystems, Inc. 4

Allegro MicroSystems, Inc. 5

Output Voltage (V)

Continued on the next page...

Allegro MicroSystems, Inc. 6

Output Voltage (V)

Allegro MicroSystems, Inc. 7

Package LH, 3-Pin; (SOT-23W)

+0.10 +0.19 2.40

0.55 REF 0.25 BSC 0.95

8X 10° REF Branded Face

D Hall element, not to scale

Allegro MicroSystems, Inc. 8

Package UA, 3-Pin SIP

For Reference Only; not for tooling use (reference DWG-9013)

A Dambar removal protrusion (6X)

+0.05 1.27 NOM

Allegro MicroSystems, Inc. 9

Package UA, 3-Pin SIP

For Reference Only; not for tooling use (reference DWG-9049)

A Dambar removal protrusion (6X)

+0.05 1.27 NOM

Copyright ©2005-2009, Allegro MicroSystems, Inc.

Allegro MicroSystems, Inc. 10

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