Binary Codes

 In the coding, when numbers, letters or words are

represented by a specific group of symbols.
 The group of symbols is called as a code.
 The digital data is represented, stored and
transmitted as group of binary bits.
 This group is also called as binary code.
 The binary code is represented by the number as
well as alphanumeric letter.
Advantages of Binary Code

 Binary codes are suitable for the computer

applications.
 Binary codes are suitable for the digital
communications.
 Binary codes make the analysis and designing of
digital circuits if we use the binary codes.
 Since only 0 & 1 are being used, implementation
becomes easy.
Classification of binary codes

The codes are broadly categorized into following four

categories:
 Weighted Codes
 Non-Weighted Codes
 Binary Coded Decimal Code
 Alphanumeric Codes
 Error Detecting Codes
 Error Correcting Codes
Weighted Codes
 Weighted binary codes are those binary codes which obey the
positional weight principle.
 Each position of the number represents a specific weight. Several
systems of the codes are used to express the decimal digits 0 through
9.
 In these codes each decimal digit is represented by a group of four
bits.

Non-Weighted Codes
In this type of binary codes, the positional weights are not
assigned. The examples of non-weighted codes are Excess-3
code and Gray code.
Excess-3 code
 The Excess-3 code is also called as XS-3 code.


 It is non-weighted code used to express decimal numbers.

 The Excess-3 code words are derived from the 8421 BCD code words adding
(0011)2 or (3)10 to each code word in 8421.

 The excess-3 codes are obtained as follows −

Example:
Gray Code
 It is the non-weighted code and it is not arithmetic codes.
 That means there are no specific weights assigned to the bit position.
 It has a very special feature that, only one bit will change each time the decimal
number is incremented as shown in fig.
 As only one bit changes at a time, the gray code is called as a unit distance code.
 The gray code is a cyclic code. Gray code cannot be used for arithmetic operation.

Application of Gray code

 Gray code is popularly used in the shaft position encoders.
 A shaft position encoder produces a code word which represents the angular
position of the shaft.
Note: A shaft encoder, also known as a rotatory encoder, is a device that reports the
rotational angle of its shaft.
Shaft encoders are often used in robotic applications, computer mice and industrial
controls.
They are also frequently used in machine tool changers, camera lenses and
telescopes.
Binary to Gray conversion :
 The Most Significant Bit (MSB) of the gray code is always equal to the MSB of the given binary code.
 Other bits of the output gray code can be obtained by XORing binary code bit at that index and
previous index.

Gray to Binary conversion:

Gray code table
 Binary Coded Decimal (BCD) code
 In this code each decimal digit is represented by a 4-bit binary number.

 BCD is a way to express each of the decimal digits with a binary code.

 In the BCD, with four bits we can represent sixteen numbers (0000 to 1111).

 But in BCD code only first ten of these are used (0000 to 1001). The remaining six code
combinations i.e. 1010 to 1111 are invalid in BCD.
 Advantages of BCD Codes
• It is very similar to decimal system.
• We need to remember binary equivalent of decimal numbers 0 to 9 only.

 Disadvantages of BCD Codes

• The addition and subtraction of BCD have different rules.
• The BCD arithmetic is little more complicated.
• BCD needs more number of bits than binary to represent the decimal number.
So BCD is less efficient than binary.
Extended Binary Coded Decimal Interchange
Code(EBCIDIC)
 Extended binary coded decimal interchange code (EBCDIC) is an 8-bit binary
code for numeric and alphanumeric characters.
 It was developed and used by IBM.
 EBCDIC was developed to enhance the existing capabilities of binary-coded
decimal code.
 EBCDIC mainly used on IBM mainframe operating systems.
 The EBCDIC code allows for 256 different characters.
 Setting the first 4-bits to all-ones,1111, defines the character as a number,
and the next 4-bits defines which number is encoded.
 For character A to I setting first four bits(nibble) to 1100, J to R is 1101, S to
z is 1110.
 EX: 1 in decimal is 1111 0001, A is 1100 0001 and so on.
ASCII Code
 The ASCII stands for American Standard Code for Information
Interchange.
 The ASCII code is an alphanumeric code used for data communication
in digital computers.
 The ASCII is a 7-bit code capable of representing 27 or 128 number of
different characters.
 First 31(0 to 30) is for control characters such as unprintable like
printers etc.
 Codes 32 to 127 are for printable characters like letters, digits,
punctuation marks.
 Ex: 32 for space, 33 for !, 34 for “ , 65 to 90(A to Z), 97 to 122(a to z),
48 to 57(0 to 9) etc
 Fixed and floating point data representation
 Fixed point representation
 In computing, fixed-point number representation is a real data type for a number.
 With the help of fixed number representation, data is converted into binary form, and
then data is processed, stored and used by the system.


To write the number 4.5 in Fixed-point notation

Step 1:- Convert the number into binary form.
4.5 = 100.1
Step 2:- Represent binary number in Fixed point notation
Floating-point representation:

 The description of binary numbers in the exponential form is called

floating-point representation.
 The floating-point representation breaks the number into two parts.
 The left-hand side is a signed, fixed-point number known as a mantissa.
 The right-hand side of the number is known as the exponent.
 The general structure of floating-point representation of a binary number
is mantissa*2Exponent.
 Ex: -53.5=(-110101.1)2=(-1.101011)x25
 Structure of Computer
Definition:
A computer can be defined as a fast electronic calculating machine that
accepts the (data). Digitized input information, process it as per the list of
internally stored instructions and produces the resulting information.

Note:
List of instructions are called programs & internal storage is called computer
memory.
 Types of computer
The different types of computers are:
 1. Personal computers: - This is the most common type found in homes, schools, Business
offices etc., It is the most common type of desk top computers with processing and storage
units along with various input and output devices.
 2. Note book computers: - These are compact and portable versions of PC
 3. Work stations: - These have high resolution input/output (I/O) graphics capability, but
with same dimensions as that of desktop computer. These are used in engineering
applications of interactive design work.
 4. Enterprise systems: - These are used for business data processing in medium to large
corporations that require much more computing power and storage capacity than work
stations. Internet associated with servers have become a dominant worldwide source of all
types of information.
 5. Super computers: - These are used for large scale numerical calculations required in
the applications like weather forecasting etc.,
Functional units
 A computer consists of five functionally independent main parts input, memory,
arithmetic logic unit (ALU), output and control unit.
Input Unit

 Input device accepts the coded information as source program i.e. high level
language.
 This is either stored in the memory or immediately used by the processor to
perform the desired operations.
 The source program/high level language program/coded information/simply
data is fed to a computer through input devices keyboard is a most common
type.
 Whenever a key is pressed, one corresponding word or number is translated
into its equivalent binary code over a cable & fed either to memory or
processor.
 EX: Joysticks, trackballs, mouse, scanners etc
Memory unit:
 Its function is to store programs and data.

 It is basically to two types

 1. Primary memory
Examples: RAM, ROM

 2. Secondary memory
Examples: - Magnetic disks & tapes, optical disks (ie CD-ROM’s),
floppies etc.,
Primary Memory
 Is the one exclusively associated with the processor and operates at the
electronics speeds.
 programs must be stored in this memory while they are being executed.
 The memory contains a large number of semiconductors storage cells.
 Each capable of storing one bit of information.
 To provide easy access to a word in memory, a distinct address is associated
with each word location.
 Addresses are numbers that identify memory location.
 The time required to access one word in called memory access time.
 Caches are the small fast RAM units, which are coupled with the processor
and it tends to be expensive.
Secondary memory:
 Is used where large amounts of data & programs have to be stored, particularly
information that is accessed in frequently.

Arithmetic logic unit (ALU):

 Most of the computer operators are executed in ALU of the processor like addition,
subtraction, division, multiplication, etc.
 The operands are brought into the ALU from memory and stored in high speed storage
elements called register.
 Then according to the instructions the operation is performed in the required sequence.
 The control and the ALU are many times faster than other devices connected to a
computer system.
 This enables a single processor to control a number of external devices such as key
boards, displays, magnetic and optical disks, sensors and other mechanical controllers.
Output unit:
 These actually are the counterparts of input unit.
 Its basic function is to send the processed results to the outside world.
 Examples:- Printer, speakers, monitor etc.

Control unit:
 It is effectively acts as the nerve center that sends signals to other units and
senses their states.
 The actual timing signals that govern the transfer of data between input unit,
processor, memory and output unit are generated by the control unit.
Basic operational concepts
 To perform a given task an appropriate program consisting of a list of
instructions is stored in the memory.
 Individual instructions are brought from the memory into the processor,
which executes the specified operations.
 Data to be stored are also stored in the memory
 Examples: - Add LOCA, R0
This instruction requires the performance of several steps,
 First the instruction is fetched from the memory into the processor.
 The operand at LOCA is fetched and added to the contents of R0
 Finally the resulting sum is stored in the register R0.
 The add instruction combines a memory access operation with an ALU
Operations.
In some other type of computers, these two types of operations are performed by
separate instructions for performance reasons.
 Load LOCA, R1
 Add R1, R0
 Contd…
In addition to the ALU & the control circuitry, the processor contains a
number of registers used for several different purposes.
 The instruction register (IR):- Holds the instructions that is currently
being executed. Its output is available for the control circuits which
generates the timing signals that control the various processing
elements in one execution of instruction.
 The program counter PC:- This is another specialized register that
keeps track of execution of a program. It contains the memory
address of the next instruction to be fetched and executed.
The other two registers which facilitate communication with memory
are: -
 1. MAR – (Memory Address Register):- It holds the address of the
location to be accessed.
 2. MDR – (Memory Data Register):- It contains the data to be written
into or read out of the address location.
Computer Organization:
 Computer Organization is concerned with the structure and behavior of a
computer system as seen by the user.
 Computer Organization tells us how exactly all the units in the system are
arranged and interconnected.
 An organization is done on the basis of architecture.
 Computer Organization deals with low-level design issues.
 Organization involves Physical Components (Circuit design, Adders, Signals,
Peripherals)
Computer Architecture
 Computer Architecture is concerned with the way hardware components are
connected together to form a computer system.
 It acts as the interface between hardware and software.
 Computer Architecture helps us to understand the functionalities of a system.
 A programmer can view architecture in terms of instructions, addressing
modes and registers.
 Computer Architecture deals with high-level design issues.
 While designing a computer system architecture is considered first.
 Types of Computer Architecture:
There are two basic types of computer architecture
 Von Neumann architecture
 Harvard architecture
Historically there have been 2 types of Computers:
 Fixed Program Computers – Their function is very specific and they couldn’t
be programmed, e.g. Calculators.
 Stored Program Computers – These can be programmed to carry out many
different tasks, applications are stored on them, hence the name.
 The modern computers are based on a stored-program concept introduced by
John Von Neumann.
 In this stored-program concept, programs and data are stored in a separate
storage unit called memories and are treated the same.
 This novel idea meant that a computer built with this architecture would be
much easier to reprogram.
Von-Neumann Architecture
It is having three basic units:
 The Central Processing Unit (CPU)
 The Main Memory Unit
 The Input/Output Device
Control Unit –
 A control unit (CU) handles all processor control signals.
 It directs all input and output flow, fetches code for instructions, and controls how
data moves around the system.

Arithmetic and Logic Unit (ALU) –

 The arithmetic logic unit is that part of the CPU that handles all the calculations the
CPU may need, e.g. Addition, Subtraction, Comparisons.
 It performs Logical Operations, Bit Shifting Operations, and Arithmetic operations.
 Contd…
Input/Output Devices -
 Program or data is read into main memory from the input device or secondary
storage under the control of CPU input instruction.
 Output devices are used to output the information from a computer.

Buses –
 Data is transmitted from one part of a computer to another, connecting all
major internal components to the CPU and memory, by the means of Buses.
 Different types of buses are data bus, address bus, system bus.
.
Contd…
Main Memory Unit (Registers) –
 Accumulator: Stores the results of calculations made by ALU.
 Program Counter (PC): Keeps track of the memory location of the next
instructions to be dealt with. The PC then passes this next address to Memory
Address Register (MAR).
 Memory Address Register (MAR): It stores the memory locations of
instructions that need to be fetched from memory or stored into memory.
 Memory Data Register (MDR): It stores instructions fetched from memory or
any data that is to be transferred to, and stored in, memory.
 Current Instruction Register (CIR): It stores the most recently fetched
instructions while it is waiting to be coded and executed.
 Instruction Buffer Register (IBR): The instruction that is not to be executed
immediately is placed in the instruction buffer register IBR
Contd…
Bus Structures
 Bus structures in computer plays important role in connecting the internal
components of the computer.
 The bus in the computer is the shared transmission medium.
 This means multiple components or devices use the same bus structure to
transmit the information signals to each other.
Contd…
 A system bus has typically has fifty to hundreds of distinct lines where each
line is meant for a certain function.
 These lines can be categoriez into three functional groups i.e., data lines,
address lines, and control lines.
 Data Bus: It carries data among the memory unit, the I/O devices, and the
processor.
 Address Bus: It carries the address of data (not the actual data) between
memory and processor.
 Control Bus: It carries control commands from the CPU in order to control
and coordinate all the activities within the computer.
 Performance of computer
 The most important measure of the performance of a computer is how quickly
it can execute programs.
 The speed with which a computer executes program is affected by the design of
its hardware.
 For best performance, it is necessary to design the compilers, the machine
instruction set, and the hardware in a coordinated way.
 The total time required to execute the program is elapsed time is a measure of
the performance of the entire computer system.
 It is affected by the speed of the processor, the disk and the printer.
 The time needed to execute a instruction is called the processor time.
 Just as the elapsed time for the execution of a program depends on all units in
a computer system.
 The processor time depends on the hardware involved in the execution of
individual machine instructions.
Multiprocessor & Multicomputer:-
Multiprocessor:
 A Multiprocessor is a computer system with two or more central processing
units (CPUs) share full access to a common RAM.
 The main objective of using a multiprocessor is to boost the system’s
execution speed, with other objectives being fault tolerance and application
matching.
 There are two types of multiprocessors, one is called shared memory
multiprocessor and another is distributed memory multiprocessor.
 In shared memory multiprocessors, all the CPUs shares the common memory
but in a distributed memory multiprocessor, every CPU has its own private
memory.

 Note:Fault tolerance is a process that enables an operating system to respond

to a failure in hardware or software. This fault-tolerance definition refers to
the system’s ability to continue operating despite failures or malfunctions.
 Contd…
 Benefits of using a Multiprocessor –
 Enhanced performance.
 Multiple applications.
 Multi-tasking inside an application.
 High throughput and responsiveness.
 Hardware sharing among CPUs.
Multicomputer:
 MultiComputer is a computer system with multiple processors that are
connected together to solve a problem.
 Each processor has its own memory and it is accessible by that particular
processor and those processors can communicate with each other via an
interconnection network.
 As the multicomputer is capable of messages passing between the processors,
it is possible to divide the task between the processors to complete the task.
 Hence, a multicomputer can be used for distributed computing.
 It is cost effective and easier to build a multicomputer than a multiprocessor.
Difference between multiprocessor and
Multicomputer:
 Multiprocessor is a system with two or more central processing units (CPUs) that is
capable of performing multiple tasks where as a multicomputer is a system with
multiple processors that are attached via an interconnection network to perform a
computation task.
 A multiprocessor system is a single computer that operates with multiple CPUs
where as a multicomputer system is a cluster of computers that operate as a
singular computer.
 Construction of multicomputer is easier and cost effective than a multiprocessor.
 In multiprocessor system, program tends to be easier where as in multicomputer
system, program tends to be more difficult.
 Multiprocessor supports parallel computing, Multicomputer supports distributed
computing.
Contd…
 Parallel Computing:
In parallel computing multiple processors performs multiple tasks assigned to
them simultaneously. Memory in parallel systems can either be shared or
distributed. Parallel computing provides concurrency and saves time and
money.

 Distributed Computing:
In distributed computing we have multiple autonomous computers which
seems to the user as single system. In distributed systems there is no shared
memory and computers communicate with each other through message
passing. In distributed computing a single task is divided among different
computers.
Combinational Circuits
 The combinational logic circuits are the circuits that contain different types
of logic gates. Simply, a circuit in which different types of logic gates are
combined is known as a combinational logic circuit.
 The output of the combinational circuit is determined from the present
combination of inputs, regardless of the previous input.
 The input variables, logic gates, and output variables are the basic
components of the combinational logic circuit.
 There are different types of combinational logic circuits, such as Adder,
Subtractor, Decoder, Encoder, Multiplexer, and De-multiplexer.
Contd…
There are the following characteristics of the combinational logic circuit:
 At any instant of time, the output of the combinational circuits depends only
on the present input terminals.
 The combinational circuit doesn't have any backup or previous memory. The
present state of the circuit is not affected by the previous state of the input.
 The n number of inputs and m number of outputs are possible in
combinational logic circuits.
Half Adder
 Half adder is a combinational arithmetic circuit that adds two bits.
 It has two inputs, called A and B and produces a sum bit (s) and carry bit (c)
both as output.
 It does not take carry from previous sum.
 The adder works by combining the operations of basic logic gates, with the
simplest form using only a XOR and an AND gate.
 This can also be converted into a circuit that only has AND, OR and NOT gates.
 This might result in a bigger circuit since three different chips are used
instead of just one.
 Block diagram of half adder is:
Contd…
 Truth table is:

 From the truth table logical expression can be : S=A B and C=A.B
 Half-Adder logical circuit:
Full adder
 Full Adder is the adder that adds three inputs and produces two outputs.
 The first two inputs are A and B and the third input is an input carry as C-IN.
 The output carry is designated as C-OUT and the normal output is designated
as S which is SUM.
 A full adder logic is designed in such a manner that can take eight inputs
together to create a byte-wide adder and cascade the carry bit from one
adder to another.
 Block diagram:
Contd…
 Full adder Truth Table:
 Contd…
 Logical Expression for SUM:
= A’ B’ C-IN + A’ B C-IN’ + A B’ C-IN’ + A B C-IN
= C-IN (A’ B’ + A B) + C-IN’ (A’ B + A B’)
= C-IN (A XOR B)’ + C – IN’ (A XOR B) (A’B + AB’ = A XOR B , AB + A’B’ = (A XOR B)’
= C-IN XOR (A XOR B)
= C- IN XOR A XOR B

 Logical Expression for C-OUT:

= A’ B C-IN + A B’ C-IN + A B C-IN’ + A B C-IN
= C- IN(A’ B +A B’) + AB( C-IN’ + C-IN)
= C – IN( A XOR B) + AB (C+C’=1)
Contd…
 Circuit Diagram:
Sequential Circuits
 Sequential circuit is a combinational logic circuit that consists of inputs
variable (X), logic gates (Computational circuit), and output variable (Z).
 A combinational circuit produces an output based on input variables only, but
a sequential circuit produces an output based on current input and previous
output variables.
 sequential circuits include memory elements that are capable of storing
binary information.
 A LATCH is capable of storing one bit of information.
 Block Diagram:
Contd…
Types of Sequential Circuits:
 Asynchronous sequential circuit:These circuits do not use a clock signal but
uses the pulses of the inputs. These circuits are faster than synchronous
sequential circuits. But these circuits are more difficult to design and their
output is uncertain. Ex: Latches
 Synchronous sequential circuit: These circuits uses clock signal and level
inputs. EX: Flipflops

Note:So a clock signal consists of an indefinite series of pulses.

 A pulse is sudden change in signal level, in a digital signal from low to high or
vice versa, and after some time a return to the original level.
Cont…
Latches:
 A Latch is a special type of logical circuit. The latches have low and high two
stable states.
 Latches are basic storage elements that operate with signal levels.
 Latches controlled by a clock transition are flip-flops.
 Latches are useful for the design of the asynchronous sequential circuits.
 Flip flops that do not use clock pulse are referred to as latch.
 SR Latch:
SR Latch:

S R Qn Qn+1
0 0 x Indeterminate

0 1 x 1 set
1 0 x 0 reset

1 1 x Qn No change
 SR Flipflop
 Two types of clocked SR flip – flops are possible: based on NAND and based on NOR.
 The circuit of clocked SR flip – flop using NAND gates and truth table is shown below

Clock S R Qn+1
Not Triggered x X Qn
Triggered 0 0 Qn No change

Triggered 0 1 0 reset

Triggered 1 0 1 set
Triggered 1 1 Indeterminate
 Contd…
 This simple clocked RS flip-flop circuit has a set input (S) and a reset input (R).
 Flipflop changes the state only when clock pulse is applied depending on the input.
 SR flipflop when S=0 and R=1, it goes to reset state, when S=1 and R=0 it goes to set
sate.
 When S=0 and R=0 output will be in previous sate.When both S and R is 1 output is
invalid.
 SR flip – flops are very simple circuits but are not widely used in practical circuits
because of their illegal state, where both S and R are high (S = R = 1).
 But they are used in switching circuits as they provide simple switching function.
 JK Flipflop

 To overcome these two fundamental design problems with the SR flip-flop design,
the JK flip Flop was developed.
 This simple JK flip Flop is the most widely used of all the flip-flop designs and is
considered to be a universal flip-flop circuit.
 The two inputs labelled “J” and “K” autonomous letters chosen by its inventor Jack
Kilby.
 The JK flip flop is basically a gated SR flip-flop with the addition of a clock input
circuitry that prevents the illegal or invalid output condition that can occur when both
inputs S and R are equal to logic level “1”.
Truth table of JK flipflop
D Flipflop
 The D flip-flop is a clocked flip-flop with a single digital input ‘D’.
 Each time a D flip-flop is clocked, its output follows the state of ‘D’.
 The D Flip Flop has only two inputs D and CP.
 The D inputs go precisely to the S input and its complement is used to the R input.
 The logic symbol for the D flip-flop is shown in the figure.
Contd…

 In SR flip flop, when both the inputs are 0, that state is no longer possible. It is
an ambiguity that is removed by the complement in D-flip flop.
 In D flip flop, the single input "D" is referred to as the "Data" input.
 When the clock input is set to 1, the "set" and "reset" inputs of the flip-flop are
both set to 1.
 So it will not change the state and store the data present on its output before
the clock transition occurred.
 In simple words, the output is "latched" at either 0 or 1.
Contd…
 Truth table of D flip flop:
T Flipflop
 In T flip flop, "T" defines the term "Toggle".
 we can construct the "T Flip Flop" by making changes in the "JK Flip Flop".
 The "T Flip Flop" has only one input, which is constructed by connecting the
input of JK flipflop.
 This single input is called T. In simple words, we can construct the "T Flip Flop"
by converting a "JK Flip Flop".
 Sometimes the "T Flip Flop" is referred to as single input "JK Flip Flop".
 Block diagram of T flip flop:
Contd…
 Circuit diagram of T flip flop:

 Truth table of T flipflop:

Contd…
 If toggle input is set to 0 and the present state is also 0, the next state will be 0.
 If toggle input is set to 0 and the present state is 1, the next state will be 1.
 If toggle input is set to 1 and the present state is 0, the next state will be 1.
 If toggle input is set to 1 and the present state is 1, the next state will be 0.
Shift Register
 Shift Register is a group of flip flops used to store multiple bits of data.
 The bits stored in such registers can be made to move within the registers and
in/out of the registers by applying clock pulses.
 An n-bit shift register can be formed by connecting n flip-flops where each flip
flop stores a single bit of data.
 The registers which will shift the bits to left are called “Shift left registers”.
 The registers which will shift the bits to right are called “Shift right registers”.
 Shift registers are basically of 4 types. These are:
1. Serial In Serial Out shift register
2. Serial In parallel Out shift register
3. Parallel In Serial Out shift register
4. Parallel In parallel Out shift register

Serial-In Serial-Out Shift Register (SISO) –
 The shift register, which allows serial input (one bit after the other through a single
data line) and produces a serial output is known as Serial-In Serial-Out shift register.
 The logic circuit given below shows a serial-in serial-out shift register.

 The above circuit is an example of shift right register, taking the serial data input
from the left side of the flip flop
 The circuit consists of four D flip-flops which are connected in a serial manner.
 All these flip-flops are synchronous with each other since the same clock signal is
applied to each flip flop.
Serial-In Parallel-Out shift Register (SIPO) –
 The shift register, which allows serial input and produces a parallel output is known
as Serial-In Parallel-Out shift register.
 The logic circuit given below shows a serial-in-parallel-out shift register.

 The circuit consists of four D flip-flops which are connected.

 The output of the first flip flop is connected to the input of the next flip flop and so
on.
 The above circuit is taking the serial data input from the left side of the flip flop and
producing a parallel output
Parallel-In Serial-Out Shift Register (PISO)
– The shift register, which allows parallel input (data is given separately to each flip flop

and in a simultaneous manner) and produces a serial output is known as Parallel-In
Serial-Out shift register.
 The logic circuit given below shows a parallel-in-serial-out shift register.
 The circuit consists of four D flip-flops which are connected.
 The clock input is directly connected to all the flip flops but the input data is
connected individually to each flip flop .
 Parallel in Serial out (PISO) shift register us used to convert parallel data to serial
data.
Parallel-In Parallel-Out Shift Register (PIPO) –
 The shift register, which allows parallel input (data is given separately to each
flip flop and in a simultaneous manner) and also produces a parallel output is
known as Parallel-In parallel-Out shift register.
 The logic circuit given below shows a parallel-in-parallel-out shift register.
 The circuit consists of four D flip-flops which are connected.
 In this type of register, there are no interconnections between the individual flip-
flops.
 Since no serial shifting of the data is required.
 Data is given as input separately for each flip flop and in the same way, output
also collected individually from each flip flop.
Counters
 A Counter is a device which stores (and sometimes displays) the number of times a
particular event or process has occurred, often in relationship to a clock signal.
 Counters are used in digital electronics for counting purpose, they can count specific
event happening in the circuit.
 They can also be designed with the help of flip flops.
 Counters are sequential circuit that count the number of pulses can be either in binary
code or BCD form.
 The main properties of a counter are timing , sequencing , and counting.
 Counter works in two modes
 Up counter : In UP counter a counter increases count for every rising edge of clock.
 Down counter: a counter decreases count for every rising edge of clock.
Counters are broadly divided into two categories :
1. Asynchronous counter
2. Synchronous counter
Contd…
 In asynchronous counter we don’t use universal clock, only first flip flop is
driven by main clock and the clock input of rest of the following flip flop is driven
by output of previous flip flops.
 Synchronous counter has one global clock which drives each flip flop so output
changes in parallel.
Difference between JDK, JRE, and JVM

Integrated Circuits
 An integrated circuit (IC) is manufactured using silicon material and mounted in a ceramic
or plastic container (known as Chip).
 The basic components of an IC consist of electronic circuits for the digital gates.
 The various gates are interconnected inside an IC to form the required circuit.

The following categories can broadly classify an Integrated Circuit (IC):

 SSI (Small Scale Integration Devices):These types the number of logic gates are usually
less than 10 and are limited by the number of pins available in the IC.
 MSI (Medium Scale Integration Devices):These type of devices has a complexity of
approximately 10 to 200 gates in a single package. The basic components include
decoders, adders, and registers.
 LSI (Large Scale Integration Devices): LSI devices contain about 200 to a few
thousand gates in a single package. The basic components of an LSI device include
digital systems, such as processors, memory chips, and programmable modules.
 VLSI (Very Large Scale Integration Device):This type of devices contains thousands of
gates within a single package. The most common example of a VLSI device is a complex
microcomputer chip.

00:13/05:29
Multiplexer(Mux)
 Multiplexer is a combinational circuit that has maximum of 2n data inputs, ‘n’
selection lines and single output line.
 One of these data inputs will be connected to the output based on the values of
selection lines.
 Multiplexer is also called as Mux.
 4x1 Multiplexer has four data inputs I3, I2, I1 & I0, two selection lines s1 & s0 and
one output Y.
 The block diagram of 4x1 Multiplexer is shown in the following figure.
Contd…
 One of these 4 inputs will be connected to the output based on the
combination of inputs present at these two selection lines.
 Truth table of 4x1 Multiplexer is shown below.

From Truth table, we can directly write the Boolean function for output, Y as
Y=S’1S’0I0+S’1S0I1+S1S’0I2+S1S0I3
Contd…
The circuit diagram of 4x1 multiplexer is shown in the following figure.
De-multiplexer(Demux)
 A De-multiplexer is a combinational circuit that has only 1 input line and
2N output lines. Simply, the multiplexer is a single-input and multi-output
combinational circuit.
 De-multiplexer is opposite to the multiplexer.
 In the 1 to 2 De-multiplexer, there are only two outputs, i.e., Y0, and Y1, 1
selection lines, i.e., S0, and single input.
 On the basis of the selection value, the input will be connected to one of the
outputs. The block diagram and the truth table of the 1×2 multiplexer are given
below.

The logical expression of the term Y is as follows:Y0=S0'.A

Y1=S0.A
Contd…
Application of mux and demux
 Communication System
 Mux and demux both are used in communication systems to carry out the
process of data transmission. A De-multiplexer receives the output signals from
the multiplexer and at the receiver end, it converts them back to the original
form.
 Arithmetic Logic Unit
 The output of the ALU is fed as an input to the De-multiplexer, and the output of
the demultiplexer is connected to multiple registers. The output of the ALU can
be stored in multiple registers.
Encoder
 An Encoder is a combinational circuit
 It has maximum of 2^n input lines and ‘n’ output lines, hence it encodes the
information from 2^n inputs into an n-bit code.
 It will produce a binary code equivalent to the input, which is active High.
 Block diagram is:
Contd…
 4:2 encoder and truth table can be as follows:
Contd…
Decoder
 The combinational circuit that change the binary information into 2 N output lines
is known as Decoders.
 The binary information is passed in the form of N input lines.
 The output lines define the 2N-bit code for the binary information.
 In simple words, the Decoder performs the reverse operation of the Encoder.
 At a time, only one input line is activated for simplicity.
 The produced 2N-bit output code is equivalent to the binary information.
 Block diagram:
Contd…
 2 to 4 line decoder:
 In the 2 to 4 line decoder, there is a total of three inputs, i.e., A 0, and A1 and E and
four outputs, i.e., Y0, Y1, Y2, and Y3.
 For each combination of inputs, when the enable 'E' is set to 1, one of these four
outputs will be 1.
 The block diagram and the truth table of the 2 to 4 line decoder are given below.
Applications of encoder and decoder
 It is used to convert the data from one form to another form.
 Generally, these are frequently used in the communication systems like
telecommunication, networking, and transfer the data from one end to the other
end.
 In the same way, it is also used in the digital domain for easy transmission of
data, placed with the codes, and then transmitted.
 At the end of the receiver, the coded data are collected from the code and then
processed to display
Unit II

Basic Computer organization

and Design
 Instruction Codes:
 A computer instruction is a binary code that determines the micro-
operations in a sequence for a computer.
 They are saved in the memory along with the information. Each
computer has its specific group of instructions.
 They can be categorized into two elements as Operation codes
(Opcodes) and Address.
 Opcodes specify the operation for specific instructions.
 An address determines the registers or the areas that can be used
for that operation.
 Contd…
 Operands are definite elements of computer instruction that show
what information is to be operated on.
 It consists of 12 bits of memory that are required to define the
address as the memory includes 4096 words.
 The 15th bit of the instruction determines the addressing mode
(where direct addressing corresponds to 0, indirect addressing
corresponds to 1).
 Therefore, the instruction format includes 12 bits of address and 1
bit for the addressing mode, 3 bits are left for Opcodes.
 Contd…

Above is the block diagram of Instruction format. There are three parts of the
Instruction Format.
 Contd…
Addressing Modes
 Instructions that define the address of a definite memory location are known as memory
reference instructions.
 The method in which a target address or effective address is recognized within the
instruction is known as addressing mode.
 The address field for instruction can be represented in two different ways are as follows:
 Direct Addressing − It uses the address of the operand.
 Indirect Addressing − It facilitates the address as a pointer to the operand.
Opcodes
 An opcode is a collection of bits that represents the basic operations including add,
subtract, multiply, complement, and shift.
 The total number of operations provided through the computer determines the number of
bits needed for the opcode.
 The minimum bits accessible to the opcode should be n for 2n operations.
 Contd…
Direct Addressing Mode:
In this addressing mode,
 The address field of the instruction contains the effective address of the operand.
 Only one reference to memory is required to fetch the operand.
 It is also called as absolute addressing mode.

EX: ADD X will increment the value stored in the accumulator by the value stored at
memory location X. AC ← AC + [X]
 Contd…
 Indirect Addressing Mode-
 The address field of the instruction specifies the address of memory location that contains
the effective address of the operand.
 Two references to memory are required to fetch the operand.

EX: ADD X will increment the value stored in the accumulator by the value stored at memory
location specified by X.
AC ← AC + [[X]]
 Computer Instructions and instruction cycle
 A program consisting of the memory unit of the computer includes a series of
instructions.
 The program is implemented on the computer by going through a cycle for each
instruction.
 In the basic computer, each instruction cycle includes the following procedures −
 It can fetch instruction from memory.
 It is used to decode the instruction.
 It can read the effective address from memory if the instruction has an
indirect address.
 It can execute the instruction.
 After the following four procedures are done, the control switches back to the
first step and repeats the similar process for the next instruction.
 Therefore, the cycle continues until a Halt condition is met
 Contd…
 The figure shows the phases contained in the instruction cycle.
 Contd…
 Fetch Cycle: The address instruction to be implemented is held at the program
counter. The processor fetches the instruction from the memory that is pointed by
the PC.

 Execute Cycle: The data transfer for implementation takes place in two methods are
as follows:
 Processor-memory − The data sent from the processor to memory or from
memory to processor.
 Processor-Input/Output − The data can be transferred to or from a peripheral
device by the transfer between a processor and an I/O device.
 Timing and Control
 CPU is partitioned into Arithmetic Logic Unit (ALU) and Control Unit (CU).
 The function of control unit is to generate relevant timing and control signals to all
operations in the computer.
 It controls the flow of data between the processor and memory and peripherals.
 The control unit must communicate with both the arithmetic logic unit (ALU) and
main memory.
 The control unit co-ordinates the activities of all peripherals and auxiliary storage
devices linked to the computer.
 Timing of all register in computer is controlled by master clock generator.
 Design of control unit

 To execute an instruction, the control unit of the CPU must generate the required
control signal in the proper sequence.
 There are two approaches used for generating the control signals in proper sequence
as Hardwired Control unit and the Micro-programmed control unit.
 Hardwired control
 Micro-programmed control.
 Cntd…
HARDWIRED CONTROL UNIT:

 It is implemented as logic circuits (gates, flip-flops, decoders etc.) in the

hardware.
 This organization is very complicated if we have a large control unit.
 In this organization, if the design has to be modified or changed, requires changes
in the wiring among the various components.
 Thus the modification of all the combinational circuits may be very difficult.
 RISC architecture is based on the hardwired control unit
 Contd…
Advantages:
 Hardwired Control Unit is fast because control signals are generated by combinational
circuits.
 Performance is high when compare to microprogrammed control unit.
Disadvantages:
 More is the control signals required by CPU; more complex will be the design of control
unit.
 Modifications in control signal are very difficult. That means it requires rearranging of
wires in the hardware circuit.
 It is difficult to correct mistake in original design or adding new feature in existing
design of control unit
 Micro-programmed control unit
 A micro-programmed control unit is implemented using programming approach.
 A sequence of micro-operations are carried out by executing a program consisting
of micro-instructions.
 Micro-program, consisting of micro-instructions is stored in the control memory of
the control unit.
 Execution of a micro-instruction is responsible for generation of a set of control
signals.
 A micro-instruction consists of One or more micro-operations to be executed,
Address of next microinstruction to be executed.
 Micro-Operations are operations performed on the data stored inside the registers
are called micro-operations.
 Micro-programmed Advantages
 The design of micro-program control unit is less complex because micro-programs
are implemented using software routines.
 The micro-programmed control unit is more flexible because design modifications,
correction and enhancement is easily possible.
 The new or modified instruction set of CPU can be easily implemented by simply
rewriting or modifying the contents of control memory.
 The fault can be easily diagnosed in the micro-program control unit using
diagnostics tools by maintaining the contents of flags, registers and counters.
 Micro-programmed Dis Advantages

The micro-program control unit is slower than hardwired control unit.

The micro-program control unit is expensive than hardwired control unit.

 Memory Reference Instructions
 Basic computer has 3 types of instructions:
 Memory reference instruction
 Register reference instruction
 Input-Output reference instruction
 Memory Reference – These instructions refer to memory address as an operand.

 Register Reference – These instructions perform operations on registers rather than

memory addresses.
 Input/Output – These instructions are for communication between computer and
outside environment.
 Contd…
There are seven memory reference instructions which are as follows:
 And: The AND instruction implements the AND logic operation on the bit collection from the register
and the memory.
 ADD: The ADD instruction adds the content of the memory word that is denoted by the effective
address to the value of the register.
 LDA:The LDA instruction shares the memory word denoted by the effective address to the register.
 STA:STA saves the content of the register into the memory word that is defined by the effective
address.
 BUN: The Branch Unconditionally (BUN) instruction can send the instruction that is
determined by the effective address
 BSA: BSA stands for Branch and Save return Address. These instructions can branch a
part of the program known as subroutine or procedure.
 ISZ:The Increment if Zero (ISZ) instruction increments the word determined by
effective address.
 Input-output and Interrupt
 A data transfer between I/O and computer can be done in 3 ways:
 Programmed I/O
 Interrupt controlled I/o
 DMA
 Programmed I/O
 I/O Configuration
Contd…
 The Input/Output configuration is displayed in the figure. The transmitter
interface gets serial data from the keyboard and sends it to INPR.
 The receiver interface gets data from OUTR and transfers it to the printer
serially.
 The terminals send and receive serial information.
 Each portion of serial data has eight bits of alphanumeric code, where the
leftmost bit is continually 0.
 The serial data from the input register is transferred into the input register
INPR.
 The output register OUTR can save the serial data for the printer.
 These two registers interact with the Accumulator (AC) in parallel and with a
communication interface in a serial structure.
 FGI and FGO are flag input and output set to 1 if data is sending or loading or
else set to 0.
 Contd…

Disadvantages:
 Programmed I/O has disadvantages like CPU has to wait for longer time to receive
data. To overcome this we go for Interrupt controlled I/O.
 Interrupt controlled I/O
 Since in the above case we saw the CPU is kept busy unnecessarily.
 This situation can very well be avoided by using an interrupt driven method for data transfer.
 By using interrupt facility and special commands to inform the interface to issue an interrupt request
signal whenever data is available from any device.
 In the meantime the CPU can proceed for any other program execution.
 Whenever it is determined that the device is ready for data transfer it initiates an interrupt request
signal to the computer.
 Upon detection of an external interrupt signal the CPU stops momentarily the task that it was
already performing, branches to the service program to process the I/O transfer, and then return to
the task it was originally performing.
 Stack organization
 Stack is also known as the Last In First Out (LIFO) list.
 It is the most important feature in the CPU.
 It saves data such that the element stored last is retrieved first.
 A stack is a memory unit with an address register.
 This register influence the address for the stack, which is known as Stack Pointer (SP).
 The stack pointer continually influences the address of the element that is located at the top of the
stack.
 It can insert an element into or delete an element from the stack.
 The insertion operation is known as push operation and the deletion operation is known as pop
operation.
 In a computer stack, these operations are simulated by incrementing or decrementing the SP register.
 Contd…
Register Stack:
 The stack can be arranged as a set of memory words or registers.
 Consider a 64-word register stack arranged as displayed in the figure.
 The stack pointer register includes a binary number, which is the address of the element
present at the top of the stack.
 The three-element A, B, and C are located in the stack
 Contd…
 The element C is at the top of the stack and the stack pointer holds the address of C that is
3.
 The top element is popped from the stack through reading memory word at address 3 and
decrementing the stack pointer by 1.
 Then, B is at the top of the stack and the SP holds the address of B that is 2.
 It can insert a new word, the stack is pushed by incrementing the stack pointer by 1 and
inserting a word in that incremented location.
 Data transfer and Manipulation
 Data transfer instructions cause transfer of data from one location to another
without changing the binary information.
 The most common transfer between
 Memory and Processor Register
 Processor register and input output devices
 Contd…
Data Manipulation Instruction
 Data Manipulation instruction perform operations on data and provide the
capabilities for the computer. These instructions perform arithmetic, logic and
shift operation.
Contd…
 RISC and CISC Processor
 RISC is abbreviated as Reduced Instruction Set Computer.
 It is designed to reduce the execution time by simplifying
instruction set of computer.
 Each instruction require only one clock cycle(fetch, decode,
execute).
 The main idea behind this is to make hardware simpler by using an
instruction set composed of a few basic steps for loading,
evaluating, and storing operations.
 It uses highly optimized set of instructions and used in portable
devices like Apple ipod, smart phone, tablets etc.
 Contd…
 Characteristics of RISC:
 It consist of simple instructions.
 It supports various data type formats.
 It utilises simple addressing mode.
 It consist of one cycle execution time.
 LOAD and STORE instructions are used to access memory location.
 It consist of large number of registers.
 Contd…
 Architecture of RISC:
 CISC
 CISC is abbreviated as Complex Instruction Set Computer.
 CISC approach minimize the number of instructions per program by
ignoring number of clock cycles per instruction.
 It is used in mostly desktop or laptop computers.

Characteristics
 Variety of addressing modes will be available.
 Large number of instructions will be present.
 Several cycle may be required to execute one instructions
 Instruction decoding logic is complex.
 Contd…
 CISC Architecture:
 Difference between RISC and CISC
RISC CISC
It is Reduced Set Instruction Computer It is a Complex Instruction Set Computer.
It emphasizes on software to optimize the instruction set. It emphasizes on hardware to optimize the instruction set.
It is a hard wired unit of programming in the RISC
Processor. Microprogramming unit in CISC Processor.
It requires multiple register sets to store the instruction. It requires multiple register sets to store the instruction.
RISC has simple decoding of instruction. CISC has complex decoding of instruction.

Uses of the pipeline are simple in RISC. Uses of the pipeline are difficult in CISC.
It uses a limited number of instruction that requires less It uses a large number of instruction that requires more
time to execute the instructions. time to execute the instructions.
It uses LOAD and STORE that are independent instructions It uses LOAD and STORE instruction in the memory-to-
in the register-to-register a program's interaction. memory interaction of a program.

The execution time of RISC is very short. The execution time of CISC is longer.
RISC architecture can be used with high-end applications
CISC architecture can be used with low-end applications
like telecommunication, image processing, video processing,
like home automation, security system, etc.
etc.
It has fixed format instruction. It has variable format instruction.
The program written for RISC architecture needs to take Program written for CISC architecture tends to take less
more space in memory. space in memory
UNIT - III

Register Transfer
and
Micro Operations
REGISTER TRANSFER LANGUAGE(RTL)
 Insymbolic notation, it is used to describe the micro-operations transfer among
registers.
 Itis a kind of intermediate representation (IR) that is very close to assembly
language, such as that which is used in a compiler.
 The term “Register Transfer” can perform micro-operations and transfer the result
of operation to the same or other register.
 The information transformed from one register to another register is represented
in symbolic form by replacement operator is called Register Transfer.
CONTD…

Basic symbols of RTL :

BUS AND MEMORY TRANSFER

A digital system composed of many registers, and paths must be provided to

transfer information from one register to another.
 The number of wires connecting all of the registers will be excessive if
separate lines are used between each register.
A bus structure, on the other hand, is more efficient for transferring
information between registers.
A bus consists of a set of common lines, one for each bit of register, through
which binary information is transferred one at a time.
CONTD…
 The following block diagram shows a Bus system for four registers. It is constructed with the help
of four 4 * 1 Multiplexers each having four data inputs (0 through 3) and two selection inputs (S1
and S2).
CONTD…
 The two selection lines S1 and S2 are connected to the selection inputs of all four
multiplexers.
 The selection lines choose the four bits of one register and transfer them into the four-line
common bus.
 When both of the select lines S1S0 = 00.
 This, in turn, causes the bus lines to receive the content of register A.
 This, in turn, causes the bus lines to receive the content of register.
CONTD…
Memory Transfer:
Most of the standard notations used for specifying operations on memory transfer are stated below.
 The transfer of information from a memory unit to the user end is called a Read operation.
 The transfer of new information to be stored in the memory is called a Write operation.
 A memory word is designated by the letter M.
 We must specify the address of memory word while writing the memory transfer operations.
 The address register is designated by AR and the data register by DR.
 Thus, a read and write operation can be stated as:
 The Read statement causes a transfer of information into the data register (DR) from the memory word (M) selected
by the address register (AR).
 Read: DR ← M [AR]
 The Write statement causes a transfer of information from register R1 into the memory word (M) selected by address
register (AR).
 Write: M [AR] ← R1
ARITHMETIC MICRO-OPERATIONS
 In general, the Arithmetic Micro-operations deals with the operations performed on numeric
data stored in the registers.
 The basic Arithmetic Micro-operations are classified in the following categories:
 Addition
 Subtraction
 Increment
 Decrement
 Shift
 Some additional Arithmetic Micro-operations are classified as:
 Add with carry
 Subtract with borrow
 Transfer/Load, etc.
CONTD…
 The following table shows symbolic notation of various arithmetic operation.
LOGIC MICRO OPERATIONS
 Logic operations are binary micro-operations implemented on the bits saved in the registers.
 These operations treated each bit independently and create them as binary variables.
 There are a total of 16 micro-operations available. These are-
SHIFT MICRO OPERATION
 Shift micro-operations are used when the data is stored in registers.
 These micro-operations are used for the serial transmission of data.
 These micro-operations are also combined with arithmetic and logic micro-operations and
data-processing operations.
 There are three types of shift micro-operations-
1. Logical Shift
2. Arithmetic Shift
3. Circular Shift
CONTD…
 The logical shift micro-operation moves the 0 through the serial input. There are two ways to implement
the logical shift.
 Logical Shift Left
 Logical Shift Right
 Logical Shift Left
 Each bit in the register is shifted to the left one by one in this shift micro-operation.
 The most significant bit (MSB) is moved outside the register, and the place of the least significant bit (LSB)
is filled with 0.
 For example, in the below data, there are 8 bits 00001010. When we perform a logical shift left on these
bits, all these bits will be shifted towards the left. The MSB or the leftmost bit i.e. 0 will be moved outside,
and at the rightmost place or LSB, 0 will be inserted as shown below.
CONTD…
Logical Shift Right
 Each bit in the register is shifted to the right one by one in this shift micro-operation.
 The least significant bit (LSB) is moved outside the register, and the place of the most significant bit (MSB) is
filled with 0.
 For example, in the below data, there are 8 bits 00000101.
 When we perform a logical shift right on these bits, all these bits will be shifted towards the right.
 The LSB or the rightmost bit i.e. 1 will be moved outside, and at the leftmost place or MSB, 0 will be inserted
as shown below.
CONTROL MEMORY
 A control memory is a part of the control unit.
 Any computer that involves microprogrammed control consists of two memories.
 They are the main memory and the control memory.
 Programs are usually stored in the main memory by the users.
 The control memory consists of microprograms that are fixed and cannot be modified frequently.
 They contain microinstructions that specify the internal control signals required to execute register
micro-operations.
 Their function is to generate micro-operations that can fetch instructions from the main memory,
compute the effective address, execute the operation, and return control to fetch phase and
continue the cycle.
CONTD…
 The figure shows the general configuration of a microprogrammed control organization.
 UNIT-IV

MEMORY SYSTEM
Memory Hierarchy
• Memory hierarchy design
CONTD…

• The Computer memory hierarchy looks like a pyramid structure which is used to describe the
differences among memory types.
• In Memory Hierarchy the cost of memory, capacity is inversely proportional to speed.
• Here the devices are arranged in a manner Fast to slow, that is form register to Tertiary memory.
• Let us discuss in detail.
CONTD…
• Level-0 − Registers: The registers are present inside the CPU. As they are present inside the CPU,
they have least access time. Registers are most expensive and smallest in size generally in
kilobytes. They are implemented by using Flip-Flops.
• Level-1 − Cache: Cache memory is used to store the segments of a program that are frequently
accessed by the processor. It is expensive and smaller in size generally in Megabytes and is
implemented by using static RAM.
• Level-2 − Primary or Main Memory: It directly communicates with the CPU and with auxiliary
memory devices through an I/O processor. Main memory is less expensive than cache memory
and larger in size generally in Gigabytes. This memory is implemented by using dynamic RAM.
CONTD …
• Level-3 − Secondary storage: Secondary storage devices like Magnetic Disk are present at level 3.
They are used as backup storage. They are cheaper than main memory and larger in size
generally in a few TB.
• Level-4 − Tertiary storage: Tertiary storage devices like magnetic tape are present at level 4.
They are used to store removable files and are the cheapest and largest in size (1-20 TB).
SEMICONDUCTOR MEMORIES
• Semiconductor memory is a type of semiconductor device used for storing digital data.
• There are two electronic data storage mediums that we can utilize, magnetic or optical.
• Magnetic storage stores the data in magnetic form, has high storage capacity.
• Optical storage stores data optically and uses laser, has less storage capacity.
• A memory location is a group of storage devices that will hold one data word.
• A data word length of 8-bits is called a byte.
• Each memory location can store a different data word and has a unique address.
• Memory can hold one or more bits of information to store the Data, Instruction, and Addresses.
 CONTD…
Memory can be classified into the following three groups.

Registers:
• Registers are memories located within the Central Processing Unit (CPU).
• Various types of registers are available within CPU. Registers are small but CPU can access it quickly.
• Some of the registers available in the system are: Instruction Register, ALU I/O registers, Status Register, Stack pointer
register, Program counter, etc.
Primary Memory: It is classified into two types, namely RAM and ROM.
Secondary Memory:
• Disk memory is used to hold programs and data over the longer term.
• The contents of a disk are NOT lost if the power is turned off.
• Disks are much slower than Register.
 RANDOM ACCESS MEMORY(RAM)

• The time taken to transfer information to or from any desired location is always same hence it is
called Random Access Memory (RAM).
• Memory size = 2n × m, where n: address line, m: data
• RAM can be classified into two types, namely Static RAM and Dynamic RAM.
 CONTD…
Static RAM (SRAM):
In this type of RAM, data is retained as long as there is the power supply.
• Data is stored in flip flop like structure.
• It is Faster.
• Dissipates more power.
• The memory capacity of Static RAM is less.
• It can be used as Cache memory.
• No refreshing required.
• Circuit diagram od SRAM is given below.
CONTD…
Dynamic RAM (DRAM):
• In this type of RAM, data is stored on capacitors and requires a periodic refreshment.
• Dissipate less power.
• The memory capacity of Dynamic RAM is more.
• It can be used as Main memory.

Advantages of static RAM over Dynamic RAM:

• The access time of SRAM is less and thus these memories are faster memories.
• As SRAM is consists of flip-flops thus, refreshing is not required.
• Less number of memory cells are required in SRAM for a unit area.
READ ONLY MEMORY(ROM)

• It is non-volatile memory, implemented using the combinational circuit.

• It is also known as masked memory.
TYPES OF ROM
• Mask programmed ROM: The required contents of the memory is programmed during
fabrication. Data stored this way can never be altered. It can be implemented using Fixed AND
Fixed OR Circuit.
• PROM (Programmable ROM): Required content is written in a permanent way by burning out
internal interconnections. It can be implemented using Fixed AND Programmable OR Circuit.
• EPROM (Erasable PROM): Data is stored as a charge on an isolated gate capacitor. Data is
removed by exposing the PROM to the ultraviolet light.
• EEPROM (Electrically Erasable PROM): It is also called as Flash Memory. The content can be re-
programmed by applying suitable voltages to the EEPROM pins. The Flash Memories are very
important data storage devices for mobile applications.
CACHE MEMORY
• Cache Memory is a special very high-speed memory.
• It is used to speed up and synchronizing with high-speed CPU.
• Cache memory is costlier than main memory or disk memory but economical than CPU registers.
• Cache memory is an extremely fast memory type that acts as a buffer between RAM and the CPU.
• It holds frequently requested data and instructions so that they are immediately available to the
CPU when needed.
CONTD…
• Cache memory is used to reduce the average time to access data from the Main memory.
• The cache is a smaller and faster memory which stores copies of the data from frequently used
main memory locations.
• There are various different independent caches in a CPU, which store instructions and data.

•
CONTD…
CONTD…
Cache Memory Mapping:
• Direct mapped cache has each block mapped to exactly one cache memory location.
• Fully associative cache mapping is similar to direct mapping in structure but allows a memory
block to be mapped to any cache location rather than to a prespecified cache memory location
• Set associative cache mapping can be viewed as a compromise between direct mapping and
fully associative mapping in which each block is mapped to a subset of cache locations.
CACHE PERFORMANCE:
• When the processor needs to read or write a location in main memory, it first checks for a
corresponding entry in the cache.
• If the processor finds that the memory location is in the cache, a cache hit has occurred and data
is read from cache
• If the processor does not find the memory location in the cache, a cache miss has occurred.
• The performance of cache memory is frequently measured in terms of a quantity called Hit ratio.
• Hit ratio = hit / (hit + miss) = no. of hits/total accesses
• We can improve Cache performance using higher cache block size, higher associativity, reduce
miss rate, reduce miss penalty, and reduce the time to hit in the cache.
VIRTUAL MEMORY
• Virtual Memory is a storage scheme that provides user an illusion of having a very big main
memory.
• This is done by treating a part of secondary memory as the main memory.
• suppose, user load the bigger size processes than the available main memory with an illusion that
memory is available to load the process.
• Instead of loading one big process in the main memory, the Operating System loads the different
parts of more than one process in the main memory.
CONTD…
• whenever some pages needs to be loaded in the main memory for the execution and the memory
is not available for those many pages, then in that case, instead of stopping the pages from
entering in the main memory, the OS search for the RAM area that are least used in the recent
times to make the space for the new pages in the main memory.
• Since all this procedure happens automatically, therefore it makes the computer feel like it is
having the unlimited RAM.
• Demand Paging is a popular method of virtual memory management. In demand paging, the pages
of a process which are least used, get stored in the secondary memory.
• A page is copied to the main memory when its demand is made or page fault occurs. There are
various page replacement algorithms which are used to determine the pages which will be
replaced.
CONTD…
• Advantages of Virtual Memory
1. The degree of Multiprogramming will be increased.
2. User can run large application with less real RAM.
3.There is no need to buy more memory RAMs.

• Disadvantages of Virtual Memory

1. The system becomes slower since swapping takes time.
2. It takes more time in switching between applications.
3.The user will have the lesser hard disk space for its use.
•
PAGING
• Virtual memory can be configured using non-contiguous memory allocation method known as Paging.
• In paging technique, the program will be divided into many small blocks. And then small blocks are loaded
into elsewhere in main memory.
• In Paging technique, the virtual address space is divided into equal size blocks known as pages while
physical memory is divided into equal size blocks called frames.
• Page size is equal to the frame size. Size of the page or a frame depends on the operating system. In
general the size of page or frame is 4KB.
The page table contains two fields:
• Page number
• Frame number
CONTD…
• Advantages of Paging
• Listed below are advantages of paging:
• The paging technique is easy to implement.
• The paging technique makes efficient utilization of memory.
• The paging technique supports time-sharing system.
• The paging technique supports non-contiguous memory allocation
CONTD…

• Disadvantages of Paging
• Paging may encounter a problem called page break.
• When the number of pages in virtual memory is quite large, maintaining page table become hectic.
CONTD…
SECONDARY STORAGE
• Secondary memory is also termed external memory and refers to the various storage media on
which a computer can store data and programs.
• The Secondary storage media can be fixed or removable.
• Fixed Storage media is an internal storage medium like a hard disk that is fixed inside the
computer.
• A storage medium that is portable and can be taken outside the computer is termed removable
storage media.
CONTD…
Fixed Storage:
• Fixed storage devices are literally not fixed, obviously, these can be removed from the system for
repairing work, maintenance purposes, and also for an upgrade, etc
• Technically, almost all of the data i.e. being processed on a computer system is stored on some
type of a built-in fixed storage device.
• Types of fixed storage:
• Internal flash memory (rare)
• SSD (solid-state disk) units
• Hard disk drives (HDD)
CONTD…
Removable Storage:
• Removable storage is any type of storage device that can be removed/ejected from a computer system while the
system is running.
• In storage factors, the main benefit of removable disks is that they can provide the fast data transfer rates
associated with storage area networks (SANs)
Types of Removable Storage:
• Optical discs (CDs, DVDs, Blu-ray discs)
• Memory cards
• Floppy disks
• Magnetic tapes
• Disk packs
• Paper storage (punched tapes, punched cards)
RAID(REDUNDANT ARRAY OF INDEPENDENT DISKS)
• RAID is a setup consisting of multiple disks for data storage.
• They are linked together to prevent data loss and/or speed up performance.
• Having multiple disks allows the employment of various techniques like disk striping, disk
mirroring, and parity.
• RAID levels are grouped into the following categories:
• Standard RAID levels
• Non-standard RAID levels
• Nested/hybrid RAID levels
CONTD…
The following list explains the standard RAID levels (0, 1, 2, 3, 4, 5, 6)
RAID 0: Striping
• This process is called disk striping and involves splitting data into blocks and writing it simultaneously/sequentially on multiple disks.
• Therefore, RAID 0 is generally implemented to improve speed and efficiency.
• But Doesn't provide fault tolerance or redundancy.
CONTD…
RAID 1: Mirroring
• Unlike with RAID 0, where the focus is solely on speed and performance, the primary goal of RAID 1 is to provide
redundancy.
• But it s more expensive (needs twice as many drivers).
• It is suitable for smaller servers with only two disks, as well as if you are searching for a simple configuration you can
easily set up (even at home).
CONTD…

Raid 2: Bit-Level Striping

• RAID 2 is rarely used in practice today.
• It combines bit-level striping with error checking and information correction.
• But it is Expensive and difficult to implement.
CONTD…
Raid 3: Bit-Level Striping with Dedicated Parity
• Like RAID 2, RAID 3 is rarely used in practice.
• It requires at least three drives, where two are used for storing data strips, and one is used for parity.
• Not suitable for transferring small files and complex to implement.
• It is used in high transfer rates for long sequential reads and writes such as video editing and production.
CONTD…

Raid 4: Block-Level Striping with Dedicated Parity

• RAID 4 is another unpopular standard RAID level.
• The implementation requires at least three disks – two for storing data strips and one dedicated
for storing parity and providing redundancy.
CONTD…
Raid 5: Striping with Parity

• RAID 5 is considered the most secure and most common RAID implementation.
• This RAID level consists of at least three hard drives.
• Data is divided into data strips and distributed across different disks in the array.

• This allows for high performance rates and speed.

• It takes Longer rebuild time and complex to implement.
• RAID 5 is often used for file and application servers, additionally, it is the best, cost-effective solution.
 CONTD…
Raid 6: Striping with Double Parity
• RAID 6 is an array similar to RAID 5 with an addition of its double parity feature. For this reason, it is also referred to as the
double-parity RAID.
• This setup requires a minimum of four drives.
• Storage efficiency is more and Fast read operations.
• Complex to implement and More expensive.
• It is often used for data management in defense sectors, healthcare, and banking.
CHARACTERISTICS OF MULTIPROCESSOR
• Parallel Computing − This involves the simultaneous application of multiple processors. These
processors are developed using a single architecture to execute a common task. In reality,
however, many users are accessing the system at a given time.
• Distributed Computing − This involves the usage of a network of processors. Each processor in
this network can be considered as a computer in its own right and have the capability to solve a
problem.
• Supercomputing − This involves the usage of the fastest machines to resolve big and
computationally complex problems.
•
CONTD…
• Pipelining − This is a method wherein a specific task is divided into several subtasks that must be
performed in a sequence. The units are attached serially and all the units work simultaneously.
• Vector Computing − It involves the usage of vector processors, wherein operations such as
‘multiplication’ are divided into many steps and are then applied to a stream of operands
(“vectors”).
• Systolic − This is similar to pipelining, but units are not arranged in a linear order. The steps in
systolic are normally small and more in number. This is more frequently applied in special-
purpose hardware such as image or signal processors.
INTERCONNECTION STRUCTURES
• The processors must be able to share a set of main memory modules & I/O devices in a
multiprocessor system.
• This sharing capability can be provided through interconnection structures.
• The interconnection structure that are commonly used can be given as follows –
• Time-shared / Common Bus
• Cross bar Switch
• Multiport Memory
• Multistage Switching Network (Covered in 2nd part)
• Hypercube System
 CONTD…
• 1.Time-shared / Common Bus: In a multiprocessor system, the time shared bus interconnection
provides a common communication path connecting all the functional units like processor, I/O
processor, memory unit etc.

• 2. Crossbar Switch : A point is reached at which there is a separate path available for each memory
module, if the number of buses in common bus system is increased. Crossbar Switch (for
multiprocessors) provides separate path fro each module.
CONTD…
• 3. Multiport Memory : In Multiport Memory system, the control, switching & priority arbitration
logic are distributed throughout the crossbar switch matrix which is distributed at the interfaces
to the memory modules.

• 4.Hypercube Interconnection : This is a binary n-cube architecture. Here we can connect

2n processors and each of the processor here forms a node of the cube. A node can be memory
module, I/O interface also, not necessarily processor.
MULTI-THREADED ARCHITECTURES
• A thread is a path which is followed during a program’s execution.
• A process is a program being executed.
• A process can be further divided into independent units known as threads.
• Multithreading is a CPU feature that allows two or more instruction threads to execute independently while sharing the
same process resources.
• Multithreading allows multiple concurrent tasks can be performed within a single process
• Multithreaded architecture is easy to applicable solution for upcoming microprocessor design.
• In its regular form, a multithreaded processor is made up of many numbers of thread processing elements that are
connected to each other.
• During run-time, the multiple thread processing elements, each has its own program counter and instruction execution
path, which can then easily fetch and execute instructions from multiple program locations simultaneously.
DISTRIBUTED MEMORY MIMD ARCHITECTURE

• Distributed memory MIMD Architecture is known as Multicomputer. It can replicate the

processor/memory pairs and link them through an interconnection network. The
processor/memory pair is known as the processing element (PE) and PEs work more or less
separated from each other.
Advantages
• These systems are highly scalable and good architecture candidates for building massively
parallel computers.
Disadvantages
• It can achieve high implementation in multicomputer special attention must be paid to load
balancing.